radix dec ; Code bank 0; Start address: 0; End address: 1023 org 0 ; Define start addresses for data regions shared___globals equ 32 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # ########################################################################## ; # ; # Copyright (c) 2000-2004 by Wayne C. Gramlich & William T. Benson. ; # All rights reserved. ; # ; # This is the code that implements the Switch8 RoboBrick. Basically ; # it just waits for commands that come in at 2400 baud and responds ; # to them. See: ; # ; # http://web.gramlich.net/projects/robobricks/switch8/index.html ; # ; # for more details. ; # ; # ########################################################################## ; buffer = 'switch8' ; line_number = 16 ; library _pic12f629 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic12f629' ; line_number = 6 ; processor pic12f675 ; line_number = 7 ; configure_address 0x2007 ; line_number = 8 ; configure_fill 0x0 ; line_number = 9 ; configure_option bg: bg11 = 0x3000 ; line_number = 10 ; configure_option bg: bg00 = 0x0000 ; line_number = 11 ; configure_option cpd: on = 0x000 ; line_number = 12 ; configure_option cpd: off = 0x100 ; line_number = 13 ; configure_option cp: on = 0x00 ; line_number = 14 ; configure_option cp: off = 0x80 ; line_number = 15 ; configure_option boden: on = 0x40 ; line_number = 16 ; configure_option boden: off = 0x00 ; line_number = 17 ; configure_option mclre: on = 0x20 ; line_number = 18 ; configure_option mclre: off = 0x00 ; line_number = 19 ; configure_option pwrte: on = 0x00 ; line_number = 20 ; configure_option pwrte: off = 0x10 ; line_number = 21 ; configure_option wdte: on = 8 ; line_number = 22 ; configure_option wdte: off = 0 ; line_number = 23 ; configure_option fosc: rc_clk = 7 ; line_number = 24 ; configure_option fosc: rc_no_clk = 6 ; line_number = 25 ; configure_option fosc: int_clk = 5 ; line_number = 26 ; configure_option fosc: int_no_clk = 4 ; line_number = 27 ; configure_option fosc: ec = 3 ; line_number = 28 ; configure_option fosc: hs = 2 ; line_number = 29 ; configure_option fosc: xt = 1 ; line_number = 30 ; configure_option fosc: lp = 0 ; line_number = 31 ; code_bank 0x0 : 0x3ff ; line_number = 32 ; data_bank 0x0 : 0x7f ; line_number = 33 ; data_bank 0x80 : 0xff ; line_number = 34 ; shared_region 0x20 : 0x5f ; line_number = 35 ; interrupts_possible ; line_number = 36 ; osccal_register_symbol _osccal ; line_number = 37 ; osccal_at_address 0x3ff ; line_number = 38 ; packages pdip=8, soic=8, dfn_s=8 ; line_number = 39 ; pin vdd, power_supply ; line_number = 40 ; pin_bindings pdip=1, soic=1, dfn_s=1 ; line_number = 41 ; pin gp5_in, gp5_out, t1cki, osc1, clkin, gp5_unused ; line_number = 42 ; pin_bindings pdip=2, soic=2, dfn_s=2 ; line_number = 43 ; bind_to _gpio@5 ; line_number = 44 ; or_if gp5_in _trisio 16 ; line_number = 45 ; or_if gp5_out _trisio 0 ; line_number = 46 ; pin gp4_in, gp4_out, t1g, osc2, clkout, gp4_unused ; line_number = 47 ; pin_bindings pdip=3, soic=3, dfn_s=3 ; line_number = 48 ; bind_to _gpio@4 ; line_number = 49 ; or_if gp4_in _trisio 8 ; line_number = 50 ; or_if gp4_out _trisio 0 ; line_number = 51 ; pin gp3_in, mclr, vpp, rp3_unused ; line_number = 52 ; pin_bindings pdip=4, soic=4, dfn_s=4 ; line_number = 53 ; bind_to _gpio@4 ; line_number = 54 ; or_if gp3_in _trisio 4 ; line_number = 55 ; pin gp2_in, gp2_out, t0cki, int, cout, gp2_unused ; line_number = 56 ; pin_bindings pdip=5, soic=5, dfn_s=5 ; line_number = 57 ; bind_to _gpio@2 ; line_number = 58 ; or_if gp2_in _trisio 4 ; line_number = 59 ; or_if gp2_out _trisio 0 ; line_number = 60 ; pin gp1_in, gp1_out, cin_minus, gp1_unused ; line_number = 61 ; pin_bindings pdip=6, soic=6, dfn_s=6 ; line_number = 62 ; bind_to _gpio@1 ; line_number = 63 ; or_if gp1_in _trisio 2 ; line_number = 64 ; or_if gp1_out _trisio 0 ; line_number = 65 ; pin gp0_in, gp0_out, gp0_unused ; line_number = 66 ; pin_bindings pdip=7, soic=7, dfn_s=7 ; line_number = 67 ; bind_to _gpio@0 ; line_number = 68 ; or_if gp0_in _trisio 1 ; line_number = 69 ; or_if gp0_out _trisio 0 ; line_number = 70 ; pin vss, ground ; line_number = 71 ; pin_bindings pdip=8, soic=8, dfn_s=8 ; line_number = 76 ; library _pic12f629_675 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # Shared register definitions for the PIC12F629 and PIC12F675. ; buffer = '_pic12f629_675' ; line_number = 7 ; register _indf = _indf equ 0 ; line_number = 9 ; register _tmr0 = _tmr0 equ 1 ; line_number = 11 ; register _pcl = _pcl equ 2 ; line_number = 13 ; register _status = _status equ 3 ; line_number = 14 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 15 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 16 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 17 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 18 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 19 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 21 ; register _fsr = _fsr equ 4 ; line_number = 23 ; register _gpio = _gpio equ 5 ; line_number = 24 ; bind _gpio5 = _gpio@5 _gpio5___byte equ _gpio _gpio5___bit equ 5 ; line_number = 25 ; bind _gpio4 = _gpio@4 _gpio4___byte equ _gpio _gpio4___bit equ 4 ; line_number = 26 ; bind _gpio3 = _gpio@3 _gpio3___byte equ _gpio _gpio3___bit equ 3 ; line_number = 27 ; bind _gpio2 = _gpio@2 _gpio2___byte equ _gpio _gpio2___bit equ 2 ; line_number = 28 ; bind _gpio1 = _gpio@1 _gpio1___byte equ _gpio _gpio1___bit equ 1 ; line_number = 29 ; bind _gpio0 = _gpio@0 _gpio0___byte equ _gpio _gpio0___bit equ 0 ; line_number = 31 ; register _pclath = _pclath equ 10 ; line_number = 33 ; register _intcon = _intcon equ 11 ; line_number = 34 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 35 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 36 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 37 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 38 ; bind _gpie = _intcon@3 _gpie___byte equ _intcon _gpie___bit equ 3 ; line_number = 39 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 40 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 41 ; bind _gpif = _intcon@0 _gpif___byte equ _intcon _gpif___bit equ 0 ; line_number = 43 ; register _pir1 = _pir1 equ 12 ; line_number = 44 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 45 ; bind _cmif = _pir1@3 _cmif___byte equ _pir1 _cmif___bit equ 3 ; line_number = 46 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 48 ; register _tmr1l = _tmr1l equ 14 ; line_number = 50 ; register _tmr1h = _tmr1h equ 15 ; line_number = 52 ; register _t1con = _t1con equ 16 ; line_number = 53 ; bind _t1ge = _t1con@6 _t1ge___byte equ _t1con _t1ge___bit equ 6 ; line_number = 54 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 55 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 56 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 57 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 58 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 59 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 61 ; register _cmcon = _cmcon equ 25 ; line_number = 62 ; bind _cout = _cmcon@6 _cout___byte equ _cmcon _cout___bit equ 6 ; line_number = 63 ; bind _cinv = _cmcon@4 _cinv___byte equ _cmcon _cinv___bit equ 4 ; line_number = 64 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 65 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 66 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 67 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; line_number = 69 ; register _adcon0 = _adcon0 equ 31 ; line_number = 70 ; bind _adfm = _adcon0@7 _adfm___byte equ _adcon0 _adfm___bit equ 7 ; line_number = 71 ; bind _vcfg = _adcon0@6 _vcfg___byte equ _adcon0 _vcfg___bit equ 6 ; line_number = 72 ; bind _csh1 = _adcon0@3 _csh1___byte equ _adcon0 _csh1___bit equ 3 ; line_number = 73 ; bind _csh0 = _adcon0@2 _csh0___byte equ _adcon0 _csh0___bit equ 2 ; line_number = 74 ; bind _go = _adcon0@1 _go___byte equ _adcon0 _go___bit equ 1 ; line_number = 75 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 79 ; register _option_reg = _option_reg equ 129 ; line_number = 80 ; bind _gppu = _option_reg@7 _gppu___byte equ _option_reg _gppu___bit equ 7 ; line_number = 81 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 82 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 83 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 84 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 85 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 86 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 87 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 89 ; register _trisio = _trisio equ 133 ; line_number = 90 ; bind _trisio5 = _trisio@5 _trisio5___byte equ _trisio _trisio5___bit equ 5 ; line_number = 91 ; bind _trisio4 = _trisio@4 _trisio4___byte equ _trisio _trisio4___bit equ 4 ; line_number = 92 ; bind _trisio3 = _trisio@3 _trisio3___byte equ _trisio _trisio3___bit equ 3 ; line_number = 93 ; bind _trisio2 = _trisio@2 _trisio2___byte equ _trisio _trisio2___bit equ 2 ; line_number = 94 ; bind _trisio1 = _trisio@1 _trisio1___byte equ _trisio _trisio1___bit equ 1 ; line_number = 95 ; bind _trisio0 = _trisio@0 _trisio0___byte equ _trisio _trisio0___bit equ 0 ; line_number = 97 ; register _pie1 = _pie1 equ 140 ; line_number = 98 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 99 ; bind _cmie = _pie1@3 _cmie___byte equ _pie1 _cmie___bit equ 3 ; line_number = 100 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 102 ; register _pcon = _pcon equ 142 ; line_number = 103 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 104 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 106 ; register _osccal = _osccal equ 144 ; line_number = 107 ; bind _cal5 = _osccal@7 _cal5___byte equ _osccal _cal5___bit equ 7 ; line_number = 108 ; bind _cal4 = _osccal@6 _cal4___byte equ _osccal _cal4___bit equ 6 ; line_number = 109 ; bind _cal3 = _osccal@5 _cal3___byte equ _osccal _cal3___bit equ 5 ; line_number = 110 ; bind _cal2 = _osccal@4 _cal2___byte equ _osccal _cal2___bit equ 4 ; line_number = 111 ; bind _cal1 = _osccal@3 _cal1___byte equ _osccal _cal1___bit equ 3 ; line_number = 112 ; bind _cal0 = _osccal@2 _cal0___byte equ _osccal _cal0___bit equ 2 ; line_number = 113 ; constant _osccal_lsb = 4 _osccal_lsb equ 4 ; line_number = 115 ; register _wpua = _wpua equ 149 ; line_number = 116 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 117 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 118 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 119 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 120 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 122 ; register _ioca = _ioca equ 150 ; line_number = 123 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 124 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 125 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 126 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 127 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 128 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 130 ; register _vrcon = _vrcon equ 153 ; line_number = 131 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 132 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 133 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 134 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 135 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 136 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 138 ; register _eedata = _eedata equ 154 ; line_number = 140 ; register _eeadr = _eeadr equ 155 ; line_number = 142 ; register _eecon1 = _eecon1 equ 156 ; line_number = 143 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 144 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 145 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 146 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 148 ; register _eecon2 = _eecon2 equ 157 ; buffer = '_pic12f629' ; line_number = 76 ; library _pic12f629_675 exited ; buffer = 'switch8' ; line_number = 16 ; library _pic12f629 exited ; line_number = 17 ; library clock4mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock4mhz' ; line_number = 9 ; constant clock_rate = 4000000 clock_rate equ 4000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 1000000 ; buffer = 'switch8' ; line_number = 17 ; library clock4mhz exited ; line_number = 18 ; library bit_bang entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library provides bit bang routines for sending and receiving ; # serial data at 2400 baud in 8N1 format (1 start bit, 8 data bits, ; # No parity bit, 1 stop stop bit.) ; # ; # This library requires that the pins {serial_in} and {serial_out} ; # be defined. In addition, the variable {instruction_rate} needs ; # to be defined. Lastly, there needs to be a {delay} procedure ; # with an "exact_delay delay_instructions" clause in it. The {delay} ; # routine should invoke "watch_dog_reset" so that the watch dog time ; # can be set. ; # Define some constants that we will be needing: ; buffer = 'bit_bang' ; line_number = 17 ; constant baud_rate = 2400 baud_rate equ 2400 ; line_number = 18 ; constant instructions_per_bit = instruction_rate / baud_rate instructions_per_bit equ 416 ; line_number = 19 ; constant delays_per_bit = 3 delays_per_bit equ 3 ; line_number = 20 ; constant instructions_per_delay = instructions_per_bit / delays_per_bit instructions_per_delay equ 138 ; line_number = 21 ; constant extra_instructions = 5 extra_instructions equ 5 ; line_number = 22 ; constant delay_instructions = instructions_per_delay - extra_instructions delay_instructions equ 133 ; # The {receiving} bit is sent when data is being received. ; # It gets cleared whenever data gets sent. It is used to ; # determine whether additional delay is needed to turn a ; # line around for slow interpretted chips like the Basic ; # Stamp 2 and the OOPIC. ; line_number = 30 ; global receiving bit receiving___byte equ shared___globals+63 receiving___bit equ 0 ; line_number = 31 ; global waiting bit waiting___byte equ shared___globals+63 waiting___bit equ 1 ; Delaying code generation for procedure byte_get ; Delaying code generation for procedure byte_put ; buffer = 'switch8' ; line_number = 18 ; library bit_bang exited ; line_number = 20 ; package pdip ; line_number = 21 ; pin 1 = power_supply ; line_number = 22 ; pin 2 = gp5_out, name = serial_out serial_out___byte equ _gpio serial_out___bit equ 5 ; line_number = 23 ; pin 3 = gp4_in, name = serial_in serial_in___byte equ _gpio serial_in___bit equ 4 ; line_number = 24 ; pin 4 = gp3_in, name = in3 in3___byte equ _gpio in3___bit equ 4 ; line_number = 25 ; pin 5 = gp2_out, name = out2 out2___byte equ _gpio out2___bit equ 2 ; line_number = 26 ; pin 6 = gp1_out, name = out1 out1___byte equ _gpio out1___bit equ 1 ; line_number = 27 ; pin 7 = gp0_out, name = out0 out0___byte equ _gpio out0___bit equ 0 ; line_number = 28 ; pin 8 = ground ; # Define some globals: ; line_number = 31 ; global inputs byte inputs equ shared___globals+4 ; line_number = 32 ; global complement byte complement equ shared___globals+5 ; # Interrupt masks: ; line_number = 35 ; global interrupt_enable bit interrupt_enable___byte equ shared___globals+63 interrupt_enable___bit equ 2 ; line_number = 36 ; global interrupt_pending bit interrupt_pending___byte equ shared___globals+63 interrupt_pending___bit equ 3 ; line_number = 37 ; global falling byte falling equ shared___globals+6 ; line_number = 38 ; global high byte high equ shared___globals+7 ; line_number = 39 ; global low byte low equ shared___globals+8 ; line_number = 40 ; global raising byte raising equ shared___globals+9 ; line_number = 41 ; global command_previous byte command_previous equ shared___globals+10 ; line_number = 42 ; global command_last byte command_last equ shared___globals+11 ; line_number = 43 ; global sent_previous byte sent_previous equ shared___globals+12 ; line_number = 44 ; global sent_last byte sent_last equ shared___globals+13 ; line_number = 46 ; procedure main main: ; Need to calibrate the oscillator call 1023 bsf __rp0___byte, __rp0___bit movwf _osccal ; Initialize some registers movlw 12 movwf _trisio ; arguments_none ; line_number = 48 ; returns_nothing ; # This is the main program that is responsible for processing commands ; # from the master. ; line_number = 53 ; local command byte main__command equ shared___globals+14 ; line_number = 54 ; local glitch byte main__glitch equ shared___globals+15 ; line_number = 55 ; local id_index byte main__id_index equ shared___globals+16 ; line_number = 56 ; local result byte main__result equ shared___globals+17 ; line_number = 57 ; local temp byte main__temp equ shared___globals+18 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) ; line_number = 59 ; complement := 0 movlw 0 bcf __rp0___byte, __rp0___bit movwf complement ; line_number = 60 ; interrupt_enable := 0 bcf interrupt_enable___byte, interrupt_enable___bit ; line_number = 61 ; interrupt_pending := 0 bcf interrupt_pending___byte, interrupt_pending___bit ; line_number = 62 ; falling := 0 movlw 0 movwf falling ; line_number = 63 ; high := 0 movlw 0 movwf high ; line_number = 64 ; low := 0 movlw 0 movwf low ; line_number = 65 ; raising := 0 movlw 0 movwf raising ; line_number = 66 ; glitch := 0 movlw 0 movwf main__glitch ; line_number = 67 ; id_index := 0 movlw 0 movwf main__id_index ; line_number = 68 ; loop_forever start main__1: ; line_number = 69 ; command := byte_get() call byte_get movwf main__command ; line_number = 70 ; switch command >> 6 start movlw main__57>>8 movwf __pclath main__58 equ shared___globals+23 swapf main__command,w movwf main__58 rrf main__58,f rrf main__58,w andlw 3 addlw main__57 movwf __pcl ; page_group 4 main__57: goto main__54 goto main__55 goto main__55 goto main__56 ; line_number = 71 ; case 0 main__54: ; # Command = 00xx xxxx: ; line_number = 73 ; switch command >> 3 start movlw main__23>>8 movwf __pclath main__24 equ shared___globals+23 rrf main__command,w movwf main__24 rrf main__24,f rrf main__24,w andlw 31 addlw main__23 movwf __pcl ; page_group 8 main__23: goto main__20 goto main__21 goto main__22 goto main__22 goto main__22 goto main__22 goto main__22 goto main__22 ; line_number = 74 ; case 0 main__20: ; # Command = 0000 0xxx: ; line_number = 76 ; switch command & 7 start movlw main__9>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__9 movwf __pcl ; page_group 8 main__9: goto main__2 goto main__3 goto main__4 goto main__5 goto main__6 goto main__7 goto main__8 goto main__8 ; line_number = 77 ; case 0 main__2: ; # Read Inputs (Command = 0000 0000): ; line_number = 79 ; call byte_put(inputs ^ complement) movf inputs,w xorwf complement,w call byte_put goto main__10 ; line_number = 80 ; case 1 main__3: ; # Read Complement Mask (Command = 0000 0001): ; line_number = 82 ; call byte_put(complement) movf complement,w call byte_put goto main__10 ; line_number = 83 ; case 2 main__4: ; # Read Low Mask (Command = 0000 0010): ; line_number = 85 ; call byte_put(low) movf low,w call byte_put goto main__10 ; line_number = 86 ; case 3 main__5: ; # Read High Mask (Command = 0000 0011): ; line_number = 88 ; call byte_put(high) movf high,w call byte_put goto main__10 ; line_number = 89 ; case 4 main__6: ; # Read Raising Mask (Command = 0000 0100): ; line_number = 91 ; call byte_put(raising) movf raising,w call byte_put goto main__10 ; line_number = 92 ; case 5 main__7: ; # Read Falling Mask (Command = 0000 0101): ; line_number = 94 ; call byte_put(falling) movf falling,w call byte_put goto main__10 ; line_number = 95 ; case 6, 7 main__8: ; line_number = 96 ; do_nothing main__10: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 76 ; switch command & 7 done goto main__25 ; line_number = 97 ; case 1 main__21: ; # Command = 0000 1xxx: ; line_number = 99 ; switch command & 7 start movlw main__18>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__18 movwf __pcl ; page_group 8 main__18: goto main__11 goto main__12 goto main__13 goto main__14 goto main__15 goto main__16 goto main__17 goto main__17 ; line_number = 100 ; case 0 main__11: ; # Read Raw (Command = 0000 1000): ; line_number = 102 ; call byte_put(inputs) movf inputs,w call byte_put goto main__19 ; line_number = 103 ; case 1 main__12: ; # Read Complement (Command = 0000 1001): ; line_number = 105 ; complement := byte_get() call byte_get movwf complement goto main__19 ; line_number = 106 ; case 2 main__13: ; # Read Low (Command = 0000 1010): ; line_number = 108 ; low := byte_get() call byte_get movwf low goto main__19 ; line_number = 109 ; case 3 main__14: ; # Read High (Command = 0000 1011): ; line_number = 111 ; high := byte_get() call byte_get movwf high goto main__19 ; line_number = 112 ; case 4 main__15: ; # Read Raising (Command = 0000 1100): ; line_number = 114 ; raising := byte_get() call byte_get movwf raising goto main__19 ; line_number = 115 ; case 5 main__16: ; # Read Falling (Command = 0000 1101): ; line_number = 117 ; falling := byte_get() call byte_get movwf falling goto main__19 ; line_number = 118 ; case 6, 7 main__17: ; line_number = 119 ; do_nothing main__19: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 99 ; switch command & 7 done goto main__25 ; line_number = 120 ; case 2, 3, 4, 5, 6, 7 main__22: ; line_number = 121 ; do_nothing main__25: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 73 ; switch command >> 3 done goto main__59 ; line_number = 123 ; case 1, 2 main__55: ; line_number = 124 ; do_nothing goto main__59 ; line_number = 125 ; case 3 main__56: ; # Command = 11xx xxxx: ; line_number = 127 ; switch (command >> 3) & 7 start movlw main__51>>8 movwf __pclath main__52 equ shared___globals+23 rrf main__command,w movwf main__52 rrf main__52,f rrf main__52,w andlw 7 addlw main__51 movwf __pcl ; page_group 8 main__51: goto main__47 goto main__47 goto main__47 goto main__47 goto main__47 goto main__48 goto main__49 goto main__50 ; line_number = 128 ; case 0, 1, 2, 3, 4 main__47: ; # Command = 1100 xxxx or 1110 0xxx: ; line_number = 130 ; do_nothing goto main__53 ; line_number = 131 ; case 5 main__48: ; # Read Interrupt Bits (Command = 1110 1111): ; line_number = 133 ; if (command & 7) = 7 start ; Left minus Right movlw 7 andwf main__command,w addlw 249 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=8 true_test=true body_code.delay=0 (non-uniform delay) btfss __z___byte, __z___bit goto main__26 ; # Return Interrupt Bits: ; line_number = 135 ; result := 0 movlw 0 movwf main__result ; line_number = 136 ; if interrupt_enable start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc interrupt_enable___byte, interrupt_enable___bit ; line_number = 137 ; result := result | 2 bsf main__result, 1 ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) ; line_number = 136 ; if interrupt_enable done ; line_number = 138 ; if interrupt_pending start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc interrupt_pending___byte, interrupt_pending___bit ; line_number = 139 ; result := result + 1 incf main__result,f ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) ; line_number = 138 ; if interrupt_pending done ; line_number = 140 ; call byte_put(result) movf main__result,w call byte_put ; Recombine size1 = 0 || size2 = 0 main__26: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 133 ; if (command & 7) = 7 done goto main__53 ; line_number = 141 ; case 6 main__49: ; # Shared Interrupt commands (Command = 1111 0xxx): ; line_number = 143 ; switch command & 7 start movlw main__34>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__34 movwf __pcl ; page_group 8 main__34: goto main__31 goto main__31 goto main__31 goto main__31 goto main__32 goto main__32 goto main__33 goto main__33 ; line_number = 144 ; case 0, 1, 2, 3 main__31: ; # Set interrupt bits (Command = 1111 00ep): ; line_number = 146 ; interrupt_enable := command@1 bcf interrupt_enable___byte, interrupt_enable___bit main__select__27___byte equ main__command main__select__27___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__27___byte, main__select__27___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__27 (data:X0=>X0 code:XX=>XX) ; line_number = 147 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__28___byte equ main__command main__select__28___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__28___byte, main__select__28___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__28 (data:X0=>X0 code:XX=>XX) goto main__35 ; line_number = 148 ; case 4, 5 main__32: ; # Set Interrupt Pending (Command = 1111 010p): ; line_number = 150 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__29___byte equ main__command main__select__29___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__29___byte, main__select__29___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__29 (data:X0=>X0 code:XX=>XX) goto main__35 ; line_number = 151 ; case 6, 7 main__33: ; # Set Interrupt Enable (Command = 1110 011e): ; line_number = 153 ; interrupt_enable := command@0 bcf interrupt_enable___byte, interrupt_enable___bit main__select__30___byte equ main__command main__select__30___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__30___byte, main__select__30___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__30 (data:X0=>X0 code:XX=>XX) main__35: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 143 ; switch command & 7 done goto main__53 ; line_number = 154 ; case 7 main__50: ; # Shared commands (Command = 1111 1xxx): ; line_number = 156 ; switch command & 7 start movlw main__45>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__45 movwf __pcl ; page_group 8 main__45: goto main__37 goto main__38 goto main__39 goto main__40 goto main__41 goto main__42 goto main__43 goto main__44 ; line_number = 157 ; case 0 main__37: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Decrement (Command = 1111 1000): ; line_number = 159 ; _osccal := _osccal - _osccal_lsb movlw 252 addwf _osccal,f goto main__46 ; line_number = 160 ; case 1 main__38: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Increment (Command = 1111 1001): ; line_number = 162 ; _osccal := _osccal + _osccal_lsb movlw 4 addwf _osccal,f goto main__46 ; line_number = 163 ; case 2 main__39: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Read (Command = 1111 1010): ; line_number = 165 ; call byte_put(_osccal) movf _osccal,w bcf __rp0___byte, __rp0___bit call byte_put goto main__46 ; line_number = 166 ; case 3 main__40: ; # Clock Pulse (Command = 1111 1011): ; line_number = 168 ; call byte_put(0) movlw 0 call byte_put goto main__46 ; line_number = 169 ; case 4 main__41: ; # ID Next (Command = 1111 1100): ; line_number = 171 ; temp := 0 movlw 0 movwf main__temp ; line_number = 172 ; if id_index < id.size start movlw 49 subwf main__id_index,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=0 (non-uniform delay) btfsc __c___byte, __c___bit goto main__36 ; line_number = 173 ; temp := id[id_index] movf main__id_index,w call id movwf main__temp ; line_number = 174 ; id_index := id_index + 1 incf main__id_index,f main__36: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; line_number = 172 ; if id_index < id.size done ; line_number = 175 ; call byte_put(temp) movf main__temp,w call byte_put goto main__46 ; line_number = 176 ; case 5 main__42: ; # ID Reset (Command = 1111 1101): ; line_number = 178 ; id_index := 0 movlw 0 movwf main__id_index goto main__46 ; line_number = 179 ; case 6 main__43: ; # Glitch Read (Command = 1111 1110): ; line_number = 181 ; call byte_put(glitch) movf main__glitch,w call byte_put ; line_number = 182 ; glitch := 0 movlw 0 movwf main__glitch goto main__46 ; line_number = 183 ; case 7 main__44: ; # Glitch (Command = 1111 1111): ; line_number = 185 ; if glitch != 0xff start ; Left minus Right incf main__glitch,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 186 ; glitch := glitch + 1 incf main__glitch,f ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 185 ; if glitch != 0xff done main__46: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 156 ; switch command & 7 done main__53: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 127 ; switch (command >> 3) & 7 done main__59: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 70 ; switch command >> 6 done ; line_number = 68 ; loop_forever wrap-up ; Need to adjust code banks to match front of loop bcf __rp0___byte, __rp0___bit goto main__1 ; line_number = 68 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 188 ; procedure delay delay: ; arguments_none ; line_number = 190 ; returns_nothing ; line_number = 191 ; exact_delay delay_instructions ; # This procedure delays for 1 third of a bit time. It is responsible ; # for reading the inputs and dealing with interrupts. ; line_number = 196 ; local changed byte delay__changed equ shared___globals+19 ; line_number = 197 ; local previous byte delay__previous equ shared___globals+20 ; line_number = 198 ; local not_inputs byte delay__not_inputs equ shared___globals+21 ; line_number = 199 ; local counter byte delay__counter equ shared___globals+22 ; before procedure statements delay=0, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 201 ; watch_dog_reset done ; Delay at watch_dog_reset is 0 clrwdt ; # Clear the select bits: ; line_number = 204 ; _gpio := _gpio & 0xf8 ; Delay at assignment is 1 movlw 248 andwf _gpio,f ; line_number = 206 ; inputs := 0 ; Delay at assignment is 3 movlw 0 movwf inputs ; line_number = 207 ; if in3 start ; Delay at if is 5 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc in3___byte, in3___bit ; line_number = 208 ; inputs@7 := 1 ; Delay at assignment is 0 delay__select__1___byte equ inputs delay__select__1___bit equ 7 bsf delay__select__1___byte, delay__select__1___bit ; code.delay=7 back_code.delay=0 ; <=bit_code_emit@symbol; sym=in3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=7 ; line_number = 207 ; if in3 done ; line_number = 209 ; out0 := 1 ; Delay at assignment is 7 bsf out0___byte, out0___bit ; line_number = 210 ; if in3 start ; Delay at if is 8 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc in3___byte, in3___bit ; line_number = 211 ; inputs@6 := 1 ; Delay at assignment is 0 delay__select__2___byte equ inputs delay__select__2___bit equ 6 bsf delay__select__2___byte, delay__select__2___bit ; code.delay=10 back_code.delay=0 ; <=bit_code_emit@symbol; sym=in3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=10 ; line_number = 210 ; if in3 done ; line_number = 212 ; out1 := 1 ; Delay at assignment is 10 bsf out1___byte, out1___bit ; line_number = 213 ; if in3 start ; Delay at if is 11 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc in3___byte, in3___bit ; line_number = 214 ; inputs@4 := 1 ; Delay at assignment is 0 delay__select__3___byte equ inputs delay__select__3___bit equ 4 bsf delay__select__3___byte, delay__select__3___bit ; code.delay=13 back_code.delay=0 ; <=bit_code_emit@symbol; sym=in3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=13 ; line_number = 213 ; if in3 done ; line_number = 215 ; out0 := 0 ; Delay at assignment is 13 bcf out0___byte, out0___bit ; line_number = 216 ; if in3 start ; Delay at if is 14 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc in3___byte, in3___bit ; line_number = 217 ; inputs@5 := 1 ; Delay at assignment is 0 delay__select__4___byte equ inputs delay__select__4___bit equ 5 bsf delay__select__4___byte, delay__select__4___bit ; code.delay=16 back_code.delay=0 ; <=bit_code_emit@symbol; sym=in3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=16 ; line_number = 216 ; if in3 done ; line_number = 218 ; out2 := 1 ; Delay at assignment is 16 bsf out2___byte, out2___bit ; line_number = 219 ; if in3 start ; Delay at if is 17 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc in3___byte, in3___bit ; line_number = 220 ; inputs@1 := 1 ; Delay at assignment is 0 delay__select__5___byte equ inputs delay__select__5___bit equ 1 bsf delay__select__5___byte, delay__select__5___bit ; code.delay=19 back_code.delay=0 ; <=bit_code_emit@symbol; sym=in3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=19 ; line_number = 219 ; if in3 done ; line_number = 221 ; out0 := 1 ; Delay at assignment is 19 bsf out0___byte, out0___bit ; line_number = 222 ; if in3 start ; Delay at if is 20 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc in3___byte, in3___bit ; line_number = 223 ; inputs@0 := 1 ; Delay at assignment is 0 delay__select__6___byte equ inputs delay__select__6___bit equ 0 bsf delay__select__6___byte, delay__select__6___bit ; code.delay=22 back_code.delay=0 ; <=bit_code_emit@symbol; sym=in3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=22 ; line_number = 222 ; if in3 done ; line_number = 224 ; out1 := 0 ; Delay at assignment is 22 bcf out1___byte, out1___bit ; line_number = 225 ; if in3 start ; Delay at if is 23 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc in3___byte, in3___bit ; line_number = 226 ; inputs@2 := 1 ; Delay at assignment is 0 delay__select__7___byte equ inputs delay__select__7___bit equ 2 bsf delay__select__7___byte, delay__select__7___bit ; code.delay=25 back_code.delay=0 ; <=bit_code_emit@symbol; sym=in3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=25 ; line_number = 225 ; if in3 done ; line_number = 227 ; out0 := 0 ; Delay at assignment is 25 bcf out0___byte, out0___bit ; line_number = 228 ; if in3 start ; Delay at if is 26 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc in3___byte, in3___bit ; line_number = 229 ; inputs@3 := 1 ; Delay at assignment is 0 delay__select__8___byte equ inputs delay__select__8___bit equ 3 bsf delay__select__8___byte, delay__select__8___bit ; code.delay=28 back_code.delay=0 ; <=bit_code_emit@symbol; sym=in3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=28 ; line_number = 228 ; if in3 done ; line_number = 230 ; out2 := 0 ; Delay at assignment is 28 bcf out2___byte, out2___bit ; # Deal with interrupts: ; line_number = 233 ; not_inputs := inputs ^ 0xff ; Delay at assignment is 29 movlw 255 xorwf inputs,w movwf delay__not_inputs ; line_number = 234 ; changed := inputs ^ previous ; Delay at assignment is 32 movf inputs,w xorwf delay__previous,w movwf delay__changed ; line_number = 235 ; if (low & not_inputs) | (high & inputs) | (changed & inputs & raising) | (changed & not_inputs & falling) != 0 start ; Delay at if is 35 ; Left minus Right delay__9 equ shared___globals+24 movf low,w andwf delay__not_inputs,w movwf delay__9 movf high,w andwf inputs,w iorwf delay__9,f movf delay__changed,w andwf inputs,w andwf raising,w iorwf delay__9,f movf delay__changed,w andwf delay__not_inputs,w andwf falling,w iorwf delay__9,w ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 237 ; interrupt_pending := 1 ; Delay at assignment is 0 bsf interrupt_pending___byte, interrupt_pending___bit ; code.delay=51 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=51 ; line_number = 235 ; if (low & not_inputs) | (high & inputs) | (changed & inputs & raising) | (changed & not_inputs & falling) != 0 done ; # Remember current inputs for next time around: ; line_number = 239 ; previous := inputs ; Delay at assignment is 51 movf inputs,w movwf delay__previous ; # Send an interrupt if interrupts are enabled: ; line_number = 242 ; if interrupt_pending && interrupt_enable start ; Delay at if is 53 ; (after recombine) true_delay=5, false_delay=2 uniform_delay=true ; CASE: true.size>1 false.size=1; false=GOTO ; Uniform delay btfsc interrupt_pending___byte, interrupt_pending___bit goto delay__13 goto delay__10 ; Delay 2 cycles goto delay__15 delay__15: goto delay__14 delay__13: ; &&||: index=1 true_delay=2 false_delay=0 goto_delay=2 ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc interrupt_enable___byte, interrupt_enable___bit goto delay__11 ; Delay 1 cycles nop goto delay__12 delay__11: ; # Shove serial out to low to indicate an interrupt: ; line_number = 244 ; interrupt_enable := 0 ; Delay at assignment is 0 bcf interrupt_enable___byte, interrupt_enable___bit ; line_number = 245 ; serial_out := 0 ; Delay at assignment is 1 bcf serial_out___byte, serial_out___bit delay__12: delay__10: ; code.delay=5 back_code.delay=0 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) ; &&||: index=0 true_delay=2 false_delay=0 goto_delay=2 ; &&||:: index=0 new_delay=5 goto_delay=2 delay__14: ; code.delay=4294967295 back_code.delay=0 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=0 code delay=53 ; line_number = 242 ; if interrupt_pending && interrupt_enable done ; delay after procedure statements=53 ; Delay 78 cycles ; Delay loop takes 19 * 4 = 76 cycles movlw 19 delay__16: addlw 255 btfss __z___byte, __z___bit goto delay__16 goto delay__17 delay__17: ; Implied return retlw 0 ; Final delay = 133 ; line_number = 248 ; constant zero8 = "\0,0,0,0,0,0,0,0\" ; zero8 = '\0,0,0,0,0,0,0,0\' ; line_number = 249 ; constant vendor_name = "\15\Gramlich&Benson" ; vendor_name = '\15\Gramlich&Benson' ; line_number = 250 ; constant module_name = "\8\Switch8A" ; module_name = '\8\Switch8A' ; line_number = 252 ; string id = "\1,0,18,0,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; id = '\1,0,18,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8\Switch8A\15\Gramlich&Benson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 49 id___base: retlw 1 retlw 0 retlw 18 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 8 retlw 83 retlw 119 retlw 105 retlw 116 retlw 99 retlw 104 retlw 56 retlw 65 retlw 15 retlw 71 retlw 114 retlw 97 retlw 109 retlw 108 retlw 105 retlw 99 retlw 104 retlw 38 retlw 66 retlw 101 retlw 110 retlw 115 retlw 111 retlw 110 ; line_number = 252 ; string id = "\1,0,18,0,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; Appending 2 delayed procedures to code bank 0 ; buffer = 'bit_bang' ; line_number = 33 ; procedure byte_get byte_get: ; arguments_none ; line_number = 35 ; returns byte ; # This procedure will wait for a byte to be received from ; # serial_in_bit. It calls the delay procedure for all delays. ; # This procedure will keep calling the {delay} routine until ; # data is received. ; line_number = 42 ; local count byte byte_get__count equ shared___globals ; line_number = 43 ; local byte byte byte_get__byte equ shared___globals+1 ; # Why does the delay procedure wait for a third of bit? Well, it ; # has to do with the loop immediately below. If we catch the ; # start bit at the beginning of a 1/3 bit time, we will be ; # sampling data at approximately 1/3 of the way into each bit. ; # Conversely, if we catch the start near the end of a 1/3 bit ; # bit time, we will be sampling data at approximately 2/3 of the ; # way into each bit. So, what this means is that our bit sample ; # times will be somewhere between 1/3 and 2/3 of bit (i.e. in ; # the middle of the bit. ; # It would be nice to tweak the code to shorter delay times ; # (1/4 bit, 1/5 bit, etc.) but then it gets too hard to get ; # the bookeeping done in the delay routine. A PIC running at ; # 4MHz (=1MIPS), only has 138 instructions available for the ; # delay routine when at 1/3 of bit. ; # Wait for a start bit: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 62 ; waiting := 1 bsf waiting___byte, waiting___bit ; line_number = 63 ; receiving := 1 bsf receiving___byte, receiving___bit ; line_number = 64 ; while serial_in start byte_get__1: ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss serial_in___byte, serial_in___bit goto byte_get__2 ; line_number = 65 ; delay instructions_per_delay - 3 start ; Delay expression evaluates to 135 ; line_number = 66 ; call delay() ; Delay at call is 0 call delay ; line_number = 65 ; delay instructions_per_delay - 3 done goto byte_get__1 ; Recombine size1 = 0 || size2 = 0 byte_get__2: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; line_number = 64 ; while serial_in done ; line_number = 67 ; waiting := 0 bcf waiting___byte, waiting___bit ; # Clear out any preceeding interrupt condition: ; line_number = 70 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; # Skip over start bit: ; line_number = 73 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # There are two instructions of set-up for following loop_exactly: ; line_number = 75 ; call delay() ; Delay at call is 0 call delay ; line_number = 76 ; call delay() ; Delay at call is 135 call delay ; line_number = 77 ; call delay() ; Delay at call is 270 call delay ; line_number = 78 ; byte := 0 ; Delay at assignment is 405 movlw 0 movwf byte_get__byte ; Delay 7 cycles goto byte_get__3 byte_get__3: goto byte_get__4 byte_get__4: goto byte_get__5 byte_get__5: nop ; line_number = 73 ; delay instructions_per_bit - 2 done ; # Read in 8 bits of data: ; line_number = 81 ; loop_exactly 8 start byte_get__6 equ shared___globals+25 movlw 8 movwf byte_get__6 byte_get__7: ; # There are 3 instrucitons of loop_exactly overhead: ; line_number = 83 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 84 ; call delay() ; Delay at call is 0 call delay ; line_number = 85 ; byte := byte >> 1 ; Delay at assignment is 135 ; Assignment of variable to self (no code needed) rrf byte_get__byte,f bcf byte_get__byte, 7 ; line_number = 86 ; if serial_in start ; Delay at if is 137 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc serial_in___byte, serial_in___bit ; line_number = 87 ; byte@7 := 1 ; Delay at assignment is 0 byte_get__select__8___byte equ byte_get__byte byte_get__select__8___bit equ 7 bsf byte_get__select__8___byte, byte_get__select__8___bit ; code.delay=139 back_code.delay=0 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=139 ; line_number = 86 ; if serial_in done ; line_number = 88 ; call delay() ; Delay at call is 139 call delay ; line_number = 89 ; call delay() ; Delay at call is 274 call delay ; Delay 4 cycles goto byte_get__9 byte_get__9: goto byte_get__10 byte_get__10: ; line_number = 83 ; delay instructions_per_bit - 3 done ; line_number = 81 ; loop_exactly 8 wrap-up decfsz byte_get__6,f goto byte_get__7 ; line_number = 81 ; loop_exactly 8 done ; # Skip over 2/3's of stop bit; 3 cycles for return: ; line_number = 92 ; delay instructions_per_delay*2 - 3 start ; Delay expression evaluates to 273 ; line_number = 93 ; call delay() ; Delay at call is 0 call delay ; line_number = 94 ; call delay() ; Delay at call is 135 call delay ; Delay 3 cycles goto byte_get__11 byte_get__11: nop ; line_number = 92 ; delay instructions_per_delay*2 - 3 done ; line_number = 95 ; command_previous := command_last movf command_last,w movwf command_previous ; line_number = 96 ; command_last := byte movf byte_get__byte,w movwf command_last ; line_number = 97 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; line_number = 98 ; return byte start ; line_number = 98 movf byte_get__byte,w return ; line_number = 98 ; return byte done ; delay after procedure statements=non-uniform ; line_number = 101 ; procedure byte_put byte_put: ; Last argument is sitting in W; save into argument variable movwf byte_put__byte ; delay=4294967295 ; line_number = 102 ; argument byte byte byte_put__byte equ shared___globals+3 ; line_number = 103 ; returns_nothing ; # This procedure will send {byte} to {serial_out} pin. The {delay} ; # procedure is called to provide the appropriate bit timing. ; line_number = 108 ; local count byte byte_put__count equ shared___globals+2 ; # {receiving} will be 1 if the last get/put routine was a get. ; # Before we start transmitting a response back, we want to ensure ; # that there has been enough time to turn the line around. ; # We delay the first 1/3 of a bit to pad out the 9-2/3 bits ; # from get_byte to 10 bits. We delay another 3 bits just to ; # ensure that slow interpreters do not get overrun. ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 116 ; sent_previous := sent_last movf sent_last,w movwf sent_previous ; line_number = 117 ; sent_last := byte movf byte_put__byte,w movwf sent_last ; line_number = 118 ; if receiving start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=4 true_test=true body_code.delay=0 (non-uniform delay) btfss receiving___byte, receiving___bit goto byte_put__3 ; line_number = 119 ; receiving := 0 bcf receiving___byte, receiving___bit ; # 10 = 1 + 3*3 = 3-1/3 extra bits of delay: ; line_number = 121 ; loop_exactly 10 start byte_put__1 equ shared___globals+26 movlw 10 movwf byte_put__1 byte_put__2: ; line_number = 122 ; call delay() call delay ; line_number = 121 ; loop_exactly 10 wrap-up decfsz byte_put__1,f goto byte_put__2 ; line_number = 121 ; loop_exactly 10 done ; Recombine size1 = 0 || size2 = 0 byte_put__3: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=receiving (data:X0=>X0 code:XX=>XX) ; line_number = 118 ; if receiving done ; # Send the start bit: ; line_number = 125 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # The loop_exactly setup after this is 2 instructions: ; line_number = 127 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; line_number = 128 ; call delay() ; Delay at call is 1 call delay ; line_number = 129 ; call delay() ; Delay at call is 136 call delay ; line_number = 130 ; call delay() ; Delay at call is 271 call delay ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__4: addlw 255 btfss __z___byte, __z___bit goto byte_put__4 ; line_number = 125 ; delay instructions_per_bit - 2 done ; # Send the data: ; line_number = 133 ; loop_exactly 8 start byte_put__5 equ shared___globals+26 movlw 8 movwf byte_put__5 byte_put__6: ; # Loop_exactly overhead is 3 instructions: ; line_number = 135 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 136 ; if byte@0 start ; Delay at if is 0 byte_put__select__7___byte equ byte_put__byte byte_put__select__7___bit equ 0 ; (after recombine) true_delay=1, false_delay=1 uniform_delay=true ; CASE: true_size=1 && false_size=1 ; SUBCASE: Double test; true, then false btfsc byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 137 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit btfss byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 139 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=byte_put__select__7 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=1 code delay=4 ; line_number = 136 ; if byte@0 done ; line_number = 140 ; byte := byte >> 1 ; Delay at assignment is 4 ; Assignment of variable to self (no code needed) rrf byte_put__byte,f bcf byte_put__byte, 7 ; line_number = 141 ; call delay() ; Delay at call is 6 call delay ; line_number = 142 ; call delay() ; Delay at call is 141 call delay ; line_number = 143 ; call delay() ; Delay at call is 276 call delay ; Delay 2 cycles goto byte_put__8 byte_put__8: ; line_number = 135 ; delay instructions_per_bit - 3 done ; line_number = 133 ; loop_exactly 8 wrap-up decfsz byte_put__5,f goto byte_put__6 ; line_number = 133 ; loop_exactly 8 done ; # Send the stop bit: ; line_number = 146 ; delay instructions_per_bit start ; Delay expression evaluates to 416 ; line_number = 147 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit ; line_number = 148 ; call delay() ; Delay at call is 1 call delay ; line_number = 149 ; call delay() ; Delay at call is 136 call delay ; line_number = 150 ; call delay() ; Delay at call is 271 call delay ; Delay 10 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__9: addlw 255 btfss __z___byte, __z___bit goto byte_put__9 goto byte_put__10 byte_put__10: ; line_number = 146 ; delay instructions_per_bit done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Configuration bits ; fill = 0x0 ; bg = bg11 (0x3000) ; cpd = off (0x100) ; cp = off (0x80) ; boden = off (0x0) ; mclre = off (0x0) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = int_no_clk (0x4) ; 12692 = 0x3194 __config 12692 ; Define start addresses for data regions ; Region="shared___globals" Address=32" Size=64 Bytes=27 Bits=4 Available=36 ; Region="shared___globals" Address=32" Size=64 Bytes=27 Bits=4 Available=36 ; Region="shared___globals" Address=32" Size=64 Bytes=27 Bits=4 Available=36 end