1 radix dec 2 0020 global__variables__bank0 equ 32 3 00a0 global__variables__bank1 equ 160 4 0120 global__variables__bank2 equ 288 5 01f0 global__variables__bank3 equ 496 6 0067 global__bit__variables__bank0 equ 103 7 00a0 global__bit__variables__bank1 equ 160 8 0120 global__bit__variables__bank2 equ 288 9 01f0 global__bit__variables__bank3 equ 496 10 0000 indf___register equ 0 11 0002 pcl___register equ 2 12 0003 c___byte equ 3 13 0000 c___bit equ 0 14 0003 z___byte equ 3 15 0002 z___bit equ 2 16 0003 rp0___byte equ 3 17 0005 rp0___bit equ 5 18 0003 rp1___byte equ 3 19 0006 rp1___bit equ 6 20 0003 irp___byte equ 3 21 0007 irp___bit equ 7 22 0085 trisa___register equ 0x85 23 0086 trisb___register equ 0x86 24 0004 fsr___register equ 4 25 000a pclath___register equ 10 26 org 0 27 start: 28 000 0000 nop 29 001 0000 nop 30 002 0000 nop 31 003 2805 goto skip___interrupt 32 interrupt___vector: 33 004 0009 retfie 34 skip___interrupt: 35 ; Initialize A/D system to allow digital I/O 36 005 3007 movlw 7 37 006 009f movwf 31 38 ; Switch from register bank 0 to register bank 1 (which contains 159) 39 007 1683 bsf rp0___byte,rp0___bit 40 ; Register bank is now 1 41 008 019f clrf 159 42 ; Initialize TRIS registers 43 009 30e0 movlw 224 44 00a 0085 movwf trisa___register 45 00b 300e movlw 14 46 00c 0086 movwf trisb___register 47 00d 018a clrf pclath___register 48 ; Switch from register bank 1 to register bank 0 49 00e 1283 bcf rp0___byte,rp0___bit 50 ; Register bank is now 0 51 00f 2845 goto main 52 ; comment ############################################################################# 53 ; comment {} 54 ; comment {Copyright < c > 2002 by Wayne C . Gramlich .} 55 ; comment {All rights reserved .} 56 ; comment {} 57 ; comment {Permission to use , copy , modify , distribute , and sell this software} 58 ; comment {for any purpose is hereby granted without fee provided that the above} 59 ; comment {copyright notice and this permission are retained . The author makes} 60 ; comment {no representations about the suitability of this software for any purpose .} 61 ; comment {It is provided { as is } without express or implied warranty .} 62 ; comment {} 63 ; comment {This is code for the SonarDT1 RoboBrick at :} 64 ; comment {} 65 ; comment {http : / / web . gramlich . net / projects / robobricks / sonardt1 / rev_c / index . html} 66 ; comment {} 67 ; comment {Some pin assignments :} 68 ; comment {} 69 ; comment {No Name Kind Description} 70 ; comment {= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =} 71 ; comment {1 RA2 / AN2 / VREF Digital Out N2 : 3 TRIG} 72 ; comment {2 RA3 / AN3 / CMP1 Digital Out D5} 73 ; comment {3 RA4 / TOCKI / CMP2 Digital Out D4} 74 ; comment {4 RA5 / MCLR * / THV No Connection} 75 ; comment {5 VSS Ground Ground} 76 ; comment {6 RB0 / INT Digital Out D8} 77 ; comment {7 RB1 / RX / DT Digital In N1 : 4 SIN} 78 ; comment {8 RB2 / TX / CK Digital Out N1 : 5 SOUT} 79 ; comment {9 RB3 / CCP1 Digital In N2 : 4 ECHO} 80 ; comment {10 RB4 / PGM Digital Out N4 : 1 SRV} 81 ; comment {11 RB5 Digital Out D1} 82 ; comment {12 RB6 / T1OSO / TICK1 Digital Out D2} 83 ; comment {13 RB7 / T1OSI Digital Out D3} 84 ; comment {14 VDD Power + 5 Volts} 85 ; comment {15 RA6 / OSC2 / CLKOUT Xtal Resonator} 86 ; comment {16 RA7 / OSC1 / CLKIN Digital In Oscillator In} 87 ; comment {17 RA0 / AN0 Digital Out D6} 88 ; comment {18 RA1 / AN1 Digital Out D7} 89 ; comment {} 90 ; comment ############################################################################# 91 ; processor pic16f628 cp = off cpd = off lvp = off bowden = off mclre = off pwrte = off wdte = off fosc = ec 92 ; 16139=0x3f0b 8199=0x2007 93 __config 16139 94 2007 configuration___address equ 8199 95 ; constant clock_rate 20000000 96 1312d00 clock_rate equ 20000000 97 ; comment {Some register definitions :} 98 0001 tmr0 equ 1 99 0003 status equ 3 100 ; bind c status @ 0 101 0003 c equ status+0 102 0003 c__byte equ status+0 103 0000 c__bit equ 0 104 ; bind z status @ 2 105 0003 z equ status+0 106 0003 z__byte equ status+0 107 0002 z__bit equ 2 108 000b intcon equ 11 109 ; bind gie intcon @ 7 110 000b gie equ intcon+0 111 000b gie__byte equ intcon+0 112 0007 gie__bit equ 7 113 ; bind t0ie intcon @ 5 114 000b t0ie equ intcon+0 115 000b t0ie__byte equ intcon+0 116 0005 t0ie__bit equ 5 117 ; bind inte intcon @ 4 118 000b inte equ intcon+0 119 000b inte__byte equ intcon+0 120 0004 inte__bit equ 4 121 ; bind rbie intcon @ 3 122 000b rbie equ intcon+0 123 000b rbie__byte equ intcon+0 124 0003 rbie__bit equ 3 125 ; bind t0if intcon @ 2 126 000b t0if equ intcon+0 127 000b t0if__byte equ intcon+0 128 0002 t0if__bit equ 2 129 ; bind intf intcon @ 1 130 000b intf equ intcon+0 131 000b intf__byte equ intcon+0 132 0001 intf__bit equ 1 133 ; bind rbif intcon @ 0 134 000b rbif equ intcon+0 135 000b rbif__byte equ intcon+0 136 0000 rbif__bit equ 0 137 000c pir1 equ 12 138 ; bind eeif pir1 @ 7 139 000c eeif equ pir1+0 140 000c eeif__byte equ pir1+0 141 0007 eeif__bit equ 7 142 ; bind cmif pir1 @ 6 143 000c cmif equ pir1+0 144 000c cmif__byte equ pir1+0 145 0006 cmif__bit equ 6 146 ; bind rcif pir1 @ 5 147 000c rcif equ pir1+0 148 000c rcif__byte equ pir1+0 149 0005 rcif__bit equ 5 150 ; bind txif pir1 @ 4 151 000c txif equ pir1+0 152 000c txif__byte equ pir1+0 153 0004 txif__bit equ 4 154 ; bind ccp1if pir1 @ 2 155 000c ccp1if equ pir1+0 156 000c ccp1if__byte equ pir1+0 157 0002 ccp1if__bit equ 2 158 ; bind tmr2if pir1 @ 1 159 000c tmr2if equ pir1+0 160 000c tmr2if__byte equ pir1+0 161 0001 tmr2if__bit equ 1 162 ; bind tmr1if pir1 @ 0 163 000c tmr1if equ pir1+0 164 000c tmr1if__byte equ pir1+0 165 0000 tmr1if__bit equ 0 166 000e tmr1l equ 14 167 000f tmr1h equ 15 168 0010 t1con equ 16 169 ; bind t1ckps1 t1con @ 5 170 0010 t1ckps1 equ t1con+0 171 0010 t1ckps1__byte equ t1con+0 172 0005 t1ckps1__bit equ 5 173 ; bind t1ckps0 t1con @ 4 174 0010 t1ckps0 equ t1con+0 175 0010 t1ckps0__byte equ t1con+0 176 0004 t1ckps0__bit equ 4 177 ; bind t1oscen t1con @ 3 178 0010 t1oscen equ t1con+0 179 0010 t1oscen__byte equ t1con+0 180 0003 t1oscen__bit equ 3 181 ; bind t1sync t1con @ 2 182 0010 t1sync equ t1con+0 183 0010 t1sync__byte equ t1con+0 184 0002 t1sync__bit equ 2 185 ; bind tmr1cs t1con @ 1 186 0010 tmr1cs equ t1con+0 187 0010 tmr1cs__byte equ t1con+0 188 0001 tmr1cs__bit equ 1 189 ; bind tmr1on t1con @ 0 190 0010 tmr1on equ t1con+0 191 0010 tmr1on__byte equ t1con+0 192 0000 tmr1on__bit equ 0 193 0011 tmr2 equ 17 194 0012 t2con equ 18 195 ; bind toutps3 t2con @ 6 196 0012 toutps3 equ t2con+0 197 0012 toutps3__byte equ t2con+0 198 0006 toutps3__bit equ 6 199 ; bind toutps2 t2con @ 5 200 0012 toutps2 equ t2con+0 201 0012 toutps2__byte equ t2con+0 202 0005 toutps2__bit equ 5 203 ; bind toutps1 t2con @ 4 204 0012 toutps1 equ t2con+0 205 0012 toutps1__byte equ t2con+0 206 0004 toutps1__bit equ 4 207 ; bind toutps0 t2con @ 3 208 0012 toutps0 equ t2con+0 209 0012 toutps0__byte equ t2con+0 210 0003 toutps0__bit equ 3 211 ; bind tmr2on t2con @ 2 212 0012 tmr2on equ t2con+0 213 0012 tmr2on__byte equ t2con+0 214 0002 tmr2on__bit equ 2 215 ; bind t2ckps1 t2con @ 1 216 0012 t2ckps1 equ t2con+0 217 0012 t2ckps1__byte equ t2con+0 218 0001 t2ckps1__bit equ 1 219 ; bind t2ckps0 t2con @ 0 220 0012 t2ckps0 equ t2con+0 221 0012 t2ckps0__byte equ t2con+0 222 0000 t2ckps0__bit equ 0 223 0015 ccpr1l equ 21 224 0016 ccpr1h equ 22 225 0017 ccp1con equ 23 226 ; bind ccp1x ccp1con @ 5 227 0017 ccp1x equ ccp1con+0 228 0017 ccp1x__byte equ ccp1con+0 229 0005 ccp1x__bit equ 5 230 ; bind ccp1y ccp1con @ 4 231 0017 ccp1y equ ccp1con+0 232 0017 ccp1y__byte equ ccp1con+0 233 0004 ccp1y__bit equ 4 234 ; bind ccp1m3 ccp1con @ 3 235 0017 ccp1m3 equ ccp1con+0 236 0017 ccp1m3__byte equ ccp1con+0 237 0003 ccp1m3__bit equ 3 238 ; bind ccp1m2 ccp1con @ 2 239 0017 ccp1m2 equ ccp1con+0 240 0017 ccp1m2__byte equ ccp1con+0 241 0002 ccp1m2__bit equ 2 242 ; bind ccp1m1 ccp1con @ 1 243 0017 ccp1m1 equ ccp1con+0 244 0017 ccp1m1__byte equ ccp1con+0 245 0001 ccp1m1__bit equ 1 246 ; bind ccp1m0 ccp1con @ 0 247 0017 ccp1m0 equ ccp1con+0 248 0017 ccp1m0__byte equ ccp1con+0 249 0000 ccp1m0__bit equ 0 250 0018 rcsta equ 24 251 ; bind spen rcsta @ 7 252 0018 spen equ rcsta+0 253 0018 spen__byte equ rcsta+0 254 0007 spen__bit equ 7 255 ; bind rx9 rcsta @ 6 256 0018 rx9 equ rcsta+0 257 0018 rx9__byte equ rcsta+0 258 0006 rx9__bit equ 6 259 ; bind sren rcsta @ 5 260 0018 sren equ rcsta+0 261 0018 sren__byte equ rcsta+0 262 0005 sren__bit equ 5 263 ; bind cren rcsta @ 4 264 0018 cren equ rcsta+0 265 0018 cren__byte equ rcsta+0 266 0004 cren__bit equ 4 267 ; bind aden rcsta @ 3 268 0018 aden equ rcsta+0 269 0018 aden__byte equ rcsta+0 270 0003 aden__bit equ 3 271 ; bind ferr rcsta @ 2 272 0018 ferr equ rcsta+0 273 0018 ferr__byte equ rcsta+0 274 0002 ferr__bit equ 2 275 ; bind oerr rcsta @ 1 276 0018 oerr equ rcsta+0 277 0018 oerr__byte equ rcsta+0 278 0001 oerr__bit equ 1 279 ; bind rx9d rcsta @ 0 280 0018 rx9d equ rcsta+0 281 0018 rx9d__byte equ rcsta+0 282 0000 rx9d__bit equ 0 283 0019 txreg equ 25 284 001a rcreg equ 26 285 ; comment {Comparator module control :} 286 001f cmcon equ 31 287 ; bind c2out cmcon @ 7 288 001f c2out equ cmcon+0 289 001f c2out__byte equ cmcon+0 290 0007 c2out__bit equ 7 291 ; bind c1out cmcon @ 6 292 001f c1out equ cmcon+0 293 001f c1out__byte equ cmcon+0 294 0006 c1out__bit equ 6 295 ; bind c2inv cmcon @ 5 296 001f c2inv equ cmcon+0 297 001f c2inv__byte equ cmcon+0 298 0005 c2inv__bit equ 5 299 ; bind c1inv cmcon @ 4 300 001f c1inv equ cmcon+0 301 001f c1inv__byte equ cmcon+0 302 0004 c1inv__bit equ 4 303 ; bind cis cmcon @ 3 304 001f cis equ cmcon+0 305 001f cis__byte equ cmcon+0 306 0003 cis__bit equ 3 307 ; bind cm2 cmcon @ 2 308 001f cm2 equ cmcon+0 309 001f cm2__byte equ cmcon+0 310 0002 cm2__bit equ 2 311 ; bind cm1 cmcon @ 1 312 001f cm1 equ cmcon+0 313 001f cm1__byte equ cmcon+0 314 0001 cm1__bit equ 1 315 ; bind cm0 cmcon @ 0 316 001f cm0 equ cmcon+0 317 001f cm0__byte equ cmcon+0 318 0000 cm0__bit equ 0 319 0081 option equ 129 320 ; bind t0cs option @ 5 321 0081 t0cs equ option+0 322 0081 t0cs__byte equ option+0 323 0005 t0cs__bit equ 5 324 ; bind t0se option @ 4 325 0081 t0se equ option+0 326 0081 t0se__byte equ option+0 327 0004 t0se__bit equ 4 328 ; bind psa option @ 3 329 0081 psa equ option+0 330 0081 psa__byte equ option+0 331 0003 psa__bit equ 3 332 ; bind ps2 option @ 2 333 0081 ps2 equ option+0 334 0081 ps2__byte equ option+0 335 0002 ps2__bit equ 2 336 ; bind ps1 option @ 1 337 0081 ps1 equ option+0 338 0081 ps1__byte equ option+0 339 0001 ps1__bit equ 1 340 ; bind ps0 option @ 0 341 0081 ps0 equ option+0 342 0081 ps0__byte equ option+0 343 0000 ps0__bit equ 0 344 008c pie1 equ 140 345 ; bind eeie pie1 @ 7 346 008c eeie equ pie1+0 347 008c eeie__byte equ pie1+0 348 0007 eeie__bit equ 7 349 ; bind cmie pie1 @ 6 350 008c cmie equ pie1+0 351 008c cmie__byte equ pie1+0 352 0006 cmie__bit equ 6 353 ; bind rcie pie1 @ 5 354 008c rcie equ pie1+0 355 008c rcie__byte equ pie1+0 356 0005 rcie__bit equ 5 357 ; bind txie pie1 @ 4 358 008c txie equ pie1+0 359 008c txie__byte equ pie1+0 360 0004 txie__bit equ 4 361 ; bind ccp1ie pie1 @ 2 362 008c ccp1ie equ pie1+0 363 008c ccp1ie__byte equ pie1+0 364 0002 ccp1ie__bit equ 2 365 ; bind tmr2ie pie1 @ 1 366 008c tmr2ie equ pie1+0 367 008c tmr2ie__byte equ pie1+0 368 0001 tmr2ie__bit equ 1 369 ; bind tmr1ie pie1 @ 0 370 008c tmr1ie equ pie1+0 371 008c tmr1ie__byte equ pie1+0 372 0000 tmr1ie__bit equ 0 373 0092 pr2 equ 146 374 0098 txsta equ 152 375 ; bind tx9 txsta @ 6 376 0098 tx9 equ txsta+0 377 0098 tx9__byte equ txsta+0 378 0006 tx9__bit equ 6 379 ; bind txen txsta @ 5 380 0098 txen equ txsta+0 381 0098 txen__byte equ txsta+0 382 0005 txen__bit equ 5 383 ; bind sync txsta @ 4 384 0098 sync equ txsta+0 385 0098 sync__byte equ txsta+0 386 0004 sync__bit equ 4 387 ; bind brgh txsta @ 2 388 0098 brgh equ txsta+0 389 0098 brgh__byte equ txsta+0 390 0002 brgh__bit equ 2 391 ; bind trmt txsta @ 1 392 0098 trmt equ txsta+0 393 0098 trmt__byte equ txsta+0 394 0001 trmt__bit equ 1 395 ; bind tx9d txsta @ 0 396 0098 tx9d equ txsta+0 397 0098 tx9d__byte equ txsta+0 398 0000 tx9d__bit equ 0 399 0099 spbrg equ 153 400 ; comment {Some port , bit , and pin definitions :} 401 ; comment {Port A pin assignments :} 402 ; comment {RA0 : D6} 403 ; comment {RA1 : D7} 404 ; comment {RA2 : TRIG} 405 ; comment {RA3 : D5} 406 ; comment {RA4 : D4} 407 ; comment {RA5 : No Connection} 408 ; comment {RA6 : Resonator In} 409 ; comment {RA7 : Oscillator In} 410 ; constant led6_bit 0 411 0000 led6_bit equ 0 412 ; constant led7_bit 1 413 0001 led7_bit equ 1 414 ; constant trigger_bit 2 415 0002 trigger_bit equ 2 416 ; constant led5_bit 3 417 0003 led5_bit equ 3 418 ; constant led4_bit 4 419 0004 led4_bit equ 4 420 ; constant nc1_bit 5 421 0005 nc1_bit equ 5 422 ; constant res_in_bit 6 423 0006 res_in_bit equ 6 424 ; constant osc_in_bit 7 425 0007 osc_in_bit equ 7 426 0005 porta equ 5 427 0005 led6__byte equ 5 428 0000 led6__bit equ 0 429 0005 led7__byte equ 5 430 0001 led7__bit equ 1 431 0005 trigger__byte equ 5 432 0002 trigger__bit equ 2 433 0005 led5__byte equ 5 434 0003 led5__bit equ 3 435 0005 led4__byte equ 5 436 0004 led4__bit equ 4 437 0005 nc1__byte equ 5 438 0005 nc1__bit equ 5 439 0005 res_in__byte equ 5 440 0006 res_in__bit equ 6 441 0005 osc_in__byte equ 5 442 0007 osc_in__bit equ 7 443 ; comment {Port B pin assignments :} 444 ; comment {RB0 : D8} 445 ; comment {RB1 : SIN < RX >} 446 ; comment {RB2 : SOUT < TX >} 447 ; comment {RB3 : ECHO} 448 ; comment {RB4 : SRV} 449 ; comment {RB5 : D1} 450 ; comment {RB6 : D2} 451 ; comment {RB7 : D3} 452 ; constant led8_bit 0 453 0000 led8_bit equ 0 454 ; constant rx_bit 1 455 0001 rx_bit equ 1 456 ; constant tx_bit 2 457 0002 tx_bit equ 2 458 ; constant echo_return_bit 3 459 0003 echo_return_bit equ 3 460 ; constant servo_out_bit 4 461 0004 servo_out_bit equ 4 462 ; constant led1_bit 5 463 0005 led1_bit equ 5 464 ; constant led2_bit 6 465 0006 led2_bit equ 6 466 ; constant led3_bit 7 467 0007 led3_bit equ 7 468 ; constant sweep_maximum 16 469 0010 sweep_maximum equ 16 470 0006 portb equ 6 471 0006 led8__byte equ 6 472 0000 led8__bit equ 0 473 ; comment {When using the USART , both the TX and RX pins must be set to input :} 474 0006 tx_pin__byte equ 6 475 0002 tx_pin__bit equ 2 476 0006 rx_pin__byte equ 6 477 0001 rx_pin__bit equ 1 478 0006 echo_return__byte equ 6 479 0003 echo_return__bit equ 3 480 0006 servo_out__byte equ 6 481 0004 servo_out__bit equ 4 482 0006 led1__byte equ 6 483 0005 led1__bit equ 5 484 0006 led2__byte equ 6 485 0006 led2__bit equ 6 486 0006 led3__byte equ 6 487 0007 led3__bit equ 7 488 0020 send_in_index equ global__variables__bank0+0 489 0021 send_out_index equ global__variables__bank0+1 490 ; constant send_buffer_size 10 491 000a send_buffer_size equ 10 492 0022 send_buffer equ global__variables__bank0+2 493 ; comment {This code basically has to do 3 things :} 494 ; comment {} 495 ; comment {1 > It has to keep listening for commands from the serial input .} 496 ; comment {2 > It has to be able to keep a servo pulse of length . 5 ms to 2 . 0 ms} 497 ; comment {coming out every 20 ms or so .} 498 ; comment {3 > It has to trigger an sonar pulse , and time the resultant period} 499 ; comment {until the echo is heard < 100 uSec to 36 mSec > .} 500 ; comment {} 501 ; comment {Timer 0 is hooked up to the clock / 4 and then run through the 256} 502 ; comment {prescaler . With the clock running at 20 MHz , divided by 4 and again} 503 ; comment {by 256 leaves a clock frequency of 19531 Hz . 20 ms is a refresh rate} 504 ; comment {of 50 Hz . So , 19531 / 50 is 390 . 62 , or 390 . 390 does not quite fit} 505 ; comment {into 8 - bit , so we divide it by 2 to get 195 . So , we wait for the} 506 ; comment {Timer 0 flag to count through 195 twice , before triggering servo} 507 ; comment {pulse .} 508 002c glitch equ global__variables__bank0+12 509 002d id_index equ global__variables__bank0+13 510 ; string_constants Start 511 string___fetch: 512 010 0082 movwf pcl___register 513 ; id = 1 , 0 , 29 , 2 , 0 , 0 , 0 , 0 , 0r'16' , 9 , 0s'SonarDT1C' , 29 , 0s'Gramlich&Benson' 514 0000 id___string equ 0 515 id: 516 011 0782 addwf pcl___register,f 517 ; Length = 50 518 012 3432 retlw 50 519 ; 1 520 013 3401 retlw 1 521 ; 0 522 014 3400 retlw 0 523 ; 29 524 015 341d retlw 29 525 ; 2 526 016 3402 retlw 2 527 ; 0 528 017 3400 retlw 0 529 ; 0 530 018 3400 retlw 0 531 ; 0 532 019 3400 retlw 0 533 ; 0 534 01a 3400 retlw 0 535 ; 0r'16' 536 01b 34e0 retlw 224 ; random number 537 01c 34a8 retlw 168 ; random number 538 01d 3447 retlw 71 ; random number 539 01e 34ed retlw 237 ; random number 540 01f 34e2 retlw 226 ; random number 541 020 34e2 retlw 226 ; random number 542 021 34e1 retlw 225 ; random number 543 022 3454 retlw 84 ; random number 544 023 3426 retlw 38 ; random number 545 024 3434 retlw 52 ; random number 546 025 343a retlw 58 ; random number 547 026 3472 retlw 114 ; random number 548 027 3405 retlw 5 ; random number 549 028 34e7 retlw 231 ; random number 550 029 342d retlw 45 ; random number 551 02a 34ff retlw 255 ; random number 552 ; 9 553 02b 3409 retlw 9 554 ; `SonarDT1C' 555 02c 3453 retlw 83 556 02d 346f retlw 111 557 02e 346e retlw 110 558 02f 3461 retlw 97 559 030 3472 retlw 114 560 031 3444 retlw 68 561 032 3454 retlw 84 562 033 3431 retlw 49 563 034 3443 retlw 67 564 ; 29 565 035 341d retlw 29 566 ; `Gramlich&Benson' 567 036 3447 retlw 71 568 037 3472 retlw 114 569 038 3461 retlw 97 570 039 346d retlw 109 571 03a 346c retlw 108 572 03b 3469 retlw 105 573 03c 3463 retlw 99 574 03d 3468 retlw 104 575 03e 3426 retlw 38 576 03f 3442 retlw 66 577 040 3465 retlw 101 578 041 346e retlw 110 579 042 3473 retlw 115 580 043 346f retlw 111 581 044 346e retlw 110 582 ; string__constants End 583 584 ; procedure main start 585 main: 586 002e main__variables__base equ global__variables__bank0+14 587 002e main__bytes__base equ main__variables__base+0 588 0062 main__bits__base equ main__variables__base+52 589 0036 main__total__bytes equ 54 590 0061 main__395byte0 equ main__bytes__base+51 591 0061 main__471byte0 equ main__bytes__base+51 592 0061 main__597byte0 equ main__bytes__base+51 593 0061 main__663byte1 equ main__bytes__base+51 594 0061 main__655byte1 equ main__bytes__base+51 595 0061 main__475byte1 equ main__bytes__base+51 596 0061 main__398byte0 equ main__bytes__base+51 597 0061 main__614byte1 equ main__bytes__base+51 598 0061 main__355byte0 equ main__bytes__base+51 599 0061 main__614byte2 equ main__bytes__base+51 600 0061 main__329byte0 equ main__bytes__base+51 601 0061 main__330byte0 equ main__bytes__base+51 602 0061 main__484byte0 equ main__bytes__base+51 603 ; arguments_none 604 002e main__command equ main__bytes__base+0 605 002f main__command1 equ main__bytes__base+1 606 0030 main__command2 equ main__bytes__base+2 607 0031 main__command_need equ main__bytes__base+3 608 0032 main__command_have equ main__bytes__base+4 609 0062 main__continuous equ main__bits__base+0 610 0062 main__continuous__byte equ main__bits__base+0 611 0000 main__continuous__bit equ 0 612 0033 main__counter equ main__bytes__base+5 613 0034 main__distance_high equ main__bytes__base+6 614 0035 main__distance_low equ main__bytes__base+7 615 0036 main__leds equ main__bytes__base+8 616 0037 main__temp equ main__bytes__base+9 617 0062 main__phase equ main__bits__base+0 618 0062 main__phase__byte equ main__bits__base+0 619 0002 main__phase__bit equ 2 620 0038 main__result equ main__bytes__base+10 621 0039 main__servo equ main__bytes__base+11 622 0062 main__servo_enable equ main__bits__base+0 623 0062 main__servo_enable__byte equ main__bits__base+0 624 0004 main__servo_enable__bit equ 4 625 003a main__sweep_highs equ main__bytes__base+12 626 004a main__sweep_lows equ main__bytes__base+28 627 005a main__sweep_initial equ main__bytes__base+44 628 005b main__sweep_increment equ main__bytes__base+45 629 005c main__sweep_count equ main__bytes__base+46 630 005d main__sweep_counter equ main__bytes__base+47 631 005e main__sweep_delay equ main__bytes__base+48 632 005f main__sweep_sleep equ main__bytes__base+49 633 0060 main__sweep_index equ main__bytes__base+50 634 0062 main__sweep_enable equ main__bits__base+0 635 0062 main__sweep_enable__byte equ main__bits__base+0 636 0006 main__sweep_enable__bit equ 6 637 0063 main__sweep_direction equ main__bits__base+1 638 0063 main__sweep_direction__byte equ main__bits__base+1 639 0000 main__sweep_direction__bit equ 0 640 ; call initialize {{ }} 641 045 227c call initialize 642 ; Initialize ring buffer : 643 ; sweep_enable := 0 644 046 1362 bcf main__sweep_enable__byte,main__sweep_enable__bit 645 ; send_in_index := 0 646 047 01a0 clrf send_in_index 647 ; send_out_index := 0 648 048 01a1 clrf send_out_index 649 ; command_need := 1 650 049 3001 movlw 1 651 04a 00b1 movwf main__command_need 652 ; command_have := 0 653 04b 01b2 clrf main__command_have 654 ; continuous := 1 655 04c 1462 bsf main__continuous__byte,main__continuous__bit 656 ; servo := 0x80 657 04d 3080 movlw 128 658 04e 00b9 movwf main__servo 659 ; servo_enable := 0 660 04f 1262 bcf main__servo_enable__byte,main__servo_enable__bit 661 ; glitch := 0 662 050 01ac clrf glitch 663 ; id_index := 0 664 051 01ad clrf id_index 665 ; sweep_sleep := 0 666 052 01df clrf main__sweep_sleep 667 ; sweep_direction := 1 668 053 1463 bsf main__sweep_direction__byte,main__sweep_direction__bit 669 ; sweep_index := 1 670 054 3001 movlw 1 671 055 00e0 movwf main__sweep_index 672 ; Main loop 673 ; loop_forever ... start 674 main__303loop__forever: 675 ; Deal with timer 0 : 676 ; if { t0if && servo_enable } start 677 ; expression=`t0if' exp_delay=0 true_delay=-1 false_delay=2 true_size=71 false_size=1 678 056 1d0b btfss t0if__byte,t0if__bit 679 057 28a1 goto and305__0false 680 ; expression=`servo_enable' exp_delay=0 true_delay=-1 false_delay=0 true_size=69 false_size=0 681 058 1e62 btfss main__servo_enable__byte,main__servo_enable__bit 682 059 28a1 goto label305__1end 683 and305__0true: 684 ; if { t0if && servo_enable } body start 685 ; t0if := 0 686 05a 110b bcf t0if__byte,t0if__bit 687 ; counter := counter - 1 688 05b 03b3 decf main__counter,f 689 ; if { c } start 690 ; expression=`{ c }' exp_delay=0 true_delay=-1 false_delay=0 true_size=65 false_size=0 691 05c 1c03 btfss c__byte,c__bit 692 05d 28a1 goto label308__0end 693 ; if { c } body start 694 ; See discussion above to see where 195 comes from : 695 ; counter := 195 696 05e 30c3 movlw 195 697 05f 00b3 movwf main__counter 698 ; if { phase } start 699 ; expression=`{ phase }' exp_delay=0 true_delay=1 false_delay=-1 true_size=1 false_size=59 700 060 1962 btfsc main__phase__byte,main__phase__bit 701 061 28a0 goto label311__0true 702 label311__0false: 703 ; else body start 704 ; phase := 1 705 062 1562 bsf main__phase__byte,main__phase__bit 706 ; Now it is time to squirt out a servo pulse : 707 ; servo_out := 1 708 063 1606 bsf servo_out__byte,servo_out__bit 709 ; Now use Timer2 to control pulse width : 710 ; pr2 := servo 711 064 0839 movf main__servo,w 712 ; Switch from register bank 0 to register bank 1 (which contains pr2) 713 065 1683 bsf rp0___byte,rp0___bit 714 ; Register bank is now 1 715 066 0092 movwf pr2 716 ; tmr2 := 0 717 ; Switch from register bank 1 to register bank 0 (which contains tmr2) 718 067 1283 bcf rp0___byte,rp0___bit 719 ; Register bank is now 0 720 068 0191 clrf tmr2 721 ; tmr2on := 1 722 069 1512 bsf tmr2on__byte,tmr2on__bit 723 ; Now do any sweep processing : 724 ; if { sweep_enable } start 725 ; expression=`{ sweep_enable }' exp_delay=0 true_delay=-1 false_delay=0 true_size=51 false_size=0 726 06a 1f62 btfss main__sweep_enable__byte,main__sweep_enable__bit 727 06b 289f goto label325__0end 728 ; if { sweep_enable } body start 729 ; sweep_sleep := sweep_sleep - 1 730 06c 03df decf main__sweep_sleep,f 731 ; if { z } start 732 ; expression=`{ z }' exp_delay=0 true_delay=-1 false_delay=0 true_size=48 false_size=0 733 06d 1d03 btfss z__byte,z__bit 734 06e 289f goto label327__0end 735 ; if { z } body start 736 ; sweep_sleep := sweep_delay 737 06f 085e movf main__sweep_delay,w 738 070 00df movwf main__sweep_sleep 739 ; sweep_highs ~~ {{ sweep_index }} := distance_high 740 071 0834 movf main__distance_high,w 741 072 00e1 movwf main__329byte0 742 073 303a movlw LOW main__sweep_highs 743 074 0760 addwf main__sweep_index,w 744 075 0084 movwf fsr___register 745 076 0861 movf main__329byte0,w 746 077 1383 bcf irp___register,irp___bit 747 078 0080 movwf indf___register 748 ; sweep_lows ~~ {{ sweep_index }} := distance_low 749 079 0835 movf main__distance_low,w 750 07a 00e1 movwf main__330byte0 751 07b 304a movlw LOW main__sweep_lows 752 07c 0760 addwf main__sweep_index,w 753 07d 0084 movwf fsr___register 754 07e 0861 movf main__330byte0,w 755 07f 1383 bcf irp___register,irp___bit 756 080 0080 movwf indf___register 757 ; See if we need to change sweep direction : 758 ; if { sweep_direction } start 759 ; expression=`{ sweep_direction }' exp_delay=0 true_delay=-1 false_delay=-1 true_size=8 false_size=7 760 081 1c63 btfss main__sweep_direction__byte,main__sweep_direction__bit 761 082 288c goto label333__0false 762 label333__0true: 763 ; if { sweep_direction } body start 764 ; Going up : 765 ; if { sweep_index + 1 >= sweep_count } start 766 083 0a60 incf main__sweep_index,w 767 084 025c subwf main__sweep_count,w 768 085 1903 btfsc z___byte,z___bit 769 086 1003 bcf c___byte,c___bit 770 ; expression=`{ sweep_index + 1 >= sweep_count }' exp_delay=4 true_delay=2 false_delay=0 true_size=2 false_size=0 771 087 1803 btfsc c___byte,c___bit 772 088 288b goto label335__0end 773 ; if { sweep_index + 1 >= sweep_count } body start 774 ; sweep_direction := 0 775 089 1063 bcf main__sweep_direction__byte,main__sweep_direction__bit 776 ; sweep_counter := sweep_counter + 1 777 08a 0add incf main__sweep_counter,f 778 ; if { sweep_index + 1 >= sweep_count } body end 779 label335__0end: 780 ; if exp=` sweep_index + 1 >= sweep_count ' empty false 781 ; Other expression=`{ sweep_index + 1 >= sweep_count }' delay=-1 782 ; if { sweep_index + 1 >= sweep_count } end 783 ; if { sweep_direction } body end 784 08b 2893 goto label333__0end 785 label333__0false: 786 ; else body start 787 ; Going down : 788 ; if { sweep_index = 0 } start 789 08c 0860 movf main__sweep_index,w 790 ; expression=`{ sweep_index = 0 }' exp_delay=1 true_delay=4 false_delay=0 true_size=4 false_size=0 791 08d 1d03 btfss z___byte,z___bit 792 08e 2893 goto label341__0end 793 ; if { sweep_index = 0 } body start 794 ; sweep_direction := 1 795 08f 1463 bsf main__sweep_direction__byte,main__sweep_direction__bit 796 ; servo := sweep_initial 797 090 085a movf main__sweep_initial,w 798 091 00b9 movwf main__servo 799 ; sweep_counter := sweep_counter + 1 800 092 0add incf main__sweep_counter,f 801 ; if { sweep_index = 0 } body end 802 label341__0end: 803 ; if exp=` sweep_index = 0 ' empty false 804 ; Other expression=`{ sweep_index = 0 }' delay=-1 805 ; if { sweep_index = 0 } end 806 ; else body end 807 ; if exp=`sweep_direction' generic 808 label333__0end: 809 ; Other expression=`{ sweep_direction }' delay=-1 810 ; if { sweep_direction } end 811 ; Update the sweep index and corresponding 812 ; servo position : 813 ; if { sweep_direction } start 814 ; expression=`{ sweep_direction }' exp_delay=0 true_delay=3 false_delay=6 true_size=3 false_size=6 815 093 1c63 btfss main__sweep_direction__byte,main__sweep_direction__bit 816 094 2899 goto label350__0false 817 label350__0true: 818 ; if { sweep_direction } body start 819 ; sweep_index := sweep_index + 1 820 095 0ae0 incf main__sweep_index,f 821 ; servo := servo + sweep_increment 822 096 085b movf main__sweep_increment,w 823 097 07b9 addwf main__servo,f 824 ; if { sweep_direction } body end 825 098 289f goto label350__0end 826 label350__0false: 827 ; else body start 828 ; sweep_index := sweep_index - 1 829 099 03e0 decf main__sweep_index,f 830 ; servo := servo - sweep_increment 831 09a 0839 movf main__servo,w 832 09b 00e1 movwf main__355byte0 833 09c 085b movf main__sweep_increment,w 834 09d 0261 subwf main__355byte0,w 835 09e 00b9 movwf main__servo 836 ; else body end 837 ; if exp=`sweep_direction' generic 838 label350__0end: 839 ; Other expression=`{ sweep_direction }' delay=-1 840 ; if { sweep_direction } end 841 ; if { z } body end 842 label327__0end: 843 ; if exp=`z' empty false 844 ; Other expression=`{ z }' delay=-1 845 ; if { z } end 846 ; if { sweep_enable } body end 847 label325__0end: 848 ; if exp=`sweep_enable' empty false 849 ; Other expression=`{ sweep_enable }' delay=-1 850 ; if { sweep_enable } end 851 ; else body end 852 09f 28a1 goto label311__0end 853 label311__0true: 854 ; if { phase } body start 855 ; phase := 0 856 0a0 1162 bcf main__phase__byte,main__phase__bit 857 ; if { phase } body end 858 ; if exp=`phase' generic 859 label311__0end: 860 ; Other expression=`{ phase }' delay=-1 861 ; if { phase } end 862 ; if { c } body end 863 label308__0end: 864 ; if exp=`c' empty false 865 ; Other expression=`{ c }' delay=-1 866 ; if { c } end 867 ; if { t0if && servo_enable } body end 868 label305__1end: 869 ; if exp=`servo_enable' empty false 870 ; Other expression=`servo_enable' delay=-1 871 ; if exp=`t0if' false goto 872 ; Other expression=`t0if' delay=-1 873 and305__0false: 874 and305__0end: 875 ; if { t0if && servo_enable } end 876 ; Deal with turning off servo pulse : 877 ; if { tmr2if } start 878 ; expression=`{ tmr2if }' exp_delay=0 true_delay=3 false_delay=0 true_size=3 false_size=0 879 0a1 1c8c btfss tmr2if__byte,tmr2if__bit 880 0a2 28a6 goto label364__0end 881 ; if { tmr2if } body start 882 ; tmr2if := 0 883 0a3 108c bcf tmr2if__byte,tmr2if__bit 884 ; servo_out := 0 885 0a4 1206 bcf servo_out__byte,servo_out__bit 886 ; tmr2on := 0 887 0a5 1112 bcf tmr2on__byte,tmr2on__bit 888 ; if { tmr2if } body end 889 label364__0end: 890 ; if exp=`tmr2if' empty false 891 ; Other expression=`{ tmr2if }' delay=-1 892 ; if { tmr2if } end 893 ; See whether we can transmit a character : 894 ; if { send_in_index != send_out_index && txif } start 895 0a6 0820 movf send_in_index,w 896 0a7 0221 subwf send_out_index,w 897 ; expression=`send_in_index != send_out_index' exp_delay=2 true_delay=-1 false_delay=2 true_size=13 false_size=1 898 0a8 1903 btfsc z___byte,z___bit 899 0a9 28b7 goto and371__0false 900 ; expression=`txif' exp_delay=0 true_delay=11 false_delay=0 true_size=11 false_size=0 901 0aa 1e0c btfss txif__byte,txif__bit 902 0ab 28b7 goto label371__1end 903 and371__0true: 904 ; if { send_in_index != send_out_index && txif } body start 905 ; txreg := send_buffer ~~ {{ send_out_index }} 906 0ac 3022 movlw LOW send_buffer 907 0ad 0721 addwf send_out_index,w 908 0ae 0084 movwf fsr___register 909 0af 1383 bcf irp___register,irp___bit 910 0b0 0800 movf indf___register,w 911 0b1 0099 movwf txreg 912 ; send_out_index := send_out_index + 1 913 0b2 0aa1 incf send_out_index,f 914 ; if { send_out_index >= send_buffer_size } start 915 0b3 300a movlw 10 916 0b4 0221 subwf send_out_index,w 917 ; expression=`{ send_out_index >= send_buffer_size }' exp_delay=2 true_delay=1 false_delay=0 true_size=1 false_size=0 918 0b5 1803 btfsc c___byte,c___bit 919 ; if { send_out_index >= send_buffer_size } body start 920 ; send_out_index := 0 921 0b6 01a1 clrf send_out_index 922 ; if { send_out_index >= send_buffer_size } body end 923 ; if exp=` send_out_index >= send_buffer_size ' false skip delay=4 924 ; Other expression=`{ send_out_index >= send_buffer_size }' delay=4 925 ; if { send_out_index >= send_buffer_size } end 926 ; if { send_in_index != send_out_index && txif } body end 927 label371__1end: 928 ; if exp=`txif' empty false 929 ; Other expression=`txif' delay=-1 930 ; if exp=`send_in_index != send_out_index' false goto 931 ; Other expression=`send_in_index != send_out_index' delay=-1 932 and371__0false: 933 and371__0end: 934 ; if { send_in_index != send_out_index && txif } end 935 ; See whether we ' ve got a character : 936 ; if { rcif } start 937 ; expression=`{ rcif }' exp_delay=0 true_delay=178 false_delay=0 true_size=347 false_size=0 938 0b7 1e8c btfss rcif__byte,rcif__bit 939 0b8 2a0b goto label380__0end 940 ; if { rcif } body start 941 ; Read the command : 942 ; switch { command_have } 943 0b9 3000 movlw HIGH switch__382block_start 944 0ba 008a movwf pclath___register 945 0bb 0832 movf main__command_have,w 946 ; case 0 947 ; case 1 948 ; case 2 949 switch__382block_start: 950 0bc 0782 addwf pcl___register,f 951 0bd 28c0 goto switch__382block383 952 0be 28c3 goto switch__382block386 953 0bf 28c6 goto switch__382block389 954 switch__382block_end: 955 ; switch_check 382 switch__382block_start switch__382block_end 956 switch__382block383: 957 ; command := rcreg 958 0c0 081a movf rcreg,w 959 0c1 00ae movwf main__command 960 0c2 28c8 goto switch__382end 961 switch__382block386: 962 ; command1 := rcreg 963 0c3 081a movf rcreg,w 964 0c4 00af movwf main__command1 965 0c5 28c8 goto switch__382end 966 switch__382block389: 967 ; command2 := rcreg 968 0c6 081a movf rcreg,w 969 0c7 00b0 movwf main__command2 970 switch__382end: 971 ; command_have := command_have + 1 972 0c8 0ab2 incf main__command_have,f 973 ; switch { command >> 6 } 974 0c9 3000 movlw HIGH switch__395block_start 975 0ca 008a movwf pclath___register 976 0cb 0e2e swapf main__command,w 977 0cc 00e1 movwf main__395byte0 978 0cd 0ce1 rrf main__395byte0,f 979 0ce 0c61 rrf main__395byte0,w 980 0cf 3903 andlw 3 981 ; case 0 982 ; case 1 983 ; case 2 984 ; case 3 985 switch__395block_start: 986 0d0 0782 addwf pcl___register,f 987 0d1 28d5 goto switch__395block396 988 0d2 293d goto switch__395block482 989 0d3 29fd goto switch__395block609 990 0d4 29fe goto switch__395block612 991 switch__395block_end: 992 ; switch_check 395 switch__395block_start switch__395block_end 993 switch__395block396: 994 ; Do Nothing : 995 ; switch { {{ command >> 3 }} & 7 } 996 0d5 3000 movlw HIGH switch__398block_start 997 0d6 008a movwf pclath___register 998 0d7 0c2e rrf main__command,w 999 0d8 00e1 movwf main__398byte0 1000 0d9 0ce1 rrf main__398byte0,f 1001 0da 0c61 rrf main__398byte0,w 1002 0db 3907 andlw 7 1003 ; case 0 1004 ; case 1 1005 ; case 2 3 1006 ; case 4 5 1007 switch__398block_start: 1008 0dc 0782 addwf pcl___register,f 1009 0dd 28e5 goto switch__398block399 1010 0de 290d goto switch__398block439 1011 0df 292c goto switch__398block469 1012 0e0 292c goto switch__398block469 1013 0e1 2934 goto switch__398block473 1014 0e2 2934 goto switch__398block473 1015 0e3 293c goto switch__398default477 1016 0e4 293c goto switch__398default477 1017 switch__398block_end: 1018 ; switch_check 398 switch__398block_start switch__398block_end 1019 switch__398block399: 1020 ; Command = 0000 0 xxx 1021 ; switch { command & 7 } 1022 0e5 3000 movlw HIGH switch__401block_start 1023 0e6 008a movwf pclath___register 1024 0e7 3007 movlw 7 1025 0e8 052e andwf main__command,w 1026 ; case 0 1027 ; case 1 1028 ; case 2 1029 ; case 3 1030 ; case 4 1031 ; case 5 1032 ; case 6 1033 ; case 7 1034 switch__401block_start: 1035 0e9 0782 addwf pcl___register,f 1036 0ea 28f2 goto switch__401block402 1037 0eb 28f6 goto switch__401block406 1038 0ec 28fa goto switch__401block410 1039 0ed 2901 goto switch__401block415 1040 0ee 2903 goto switch__401block419 1041 0ef 2905 goto switch__401block423 1042 0f0 2907 goto switch__401block427 1043 0f1 290a goto switch__401block432 1044 switch__401block_end: 1045 ; switch_check 401 switch__401block_start switch__401block_end 1046 switch__401block402: 1047 ; Read Distance Low < Command = 0000 0000 > : 1048 ; call send_byte {{ distance_low }} 1049 0f2 0835 movf main__distance_low,w 1050 0f3 00e5 movwf send_byte__character 1051 0f4 22bf call send_byte 1052 0f5 290c goto switch__401end 1053 switch__401block406: 1054 ; Read Distance High < Command = 0000 0001 > : 1055 ; call send_byte {{ distance_high }} 1056 0f6 0834 movf main__distance_high,w 1057 0f7 00e5 movwf send_byte__character 1058 0f8 22bf call send_byte 1059 0f9 290c goto switch__401end 1060 switch__401block410: 1061 ; Read Distance Low and High < Command = 0000 0010 > : 1062 ; call send_byte {{ distance_low }} 1063 0fa 0835 movf main__distance_low,w 1064 0fb 00e5 movwf send_byte__character 1065 0fc 22bf call send_byte 1066 ; call send_byte {{ distance_high }} 1067 0fd 0834 movf main__distance_high,w 1068 0fe 00e5 movwf send_byte__character 1069 0ff 22bf call send_byte 1070 100 290c goto switch__401end 1071 switch__401block415: 1072 ; Trigger Distance Measurement < Command 0000 0011 > : 1073 ; tmr1on := 1 1074 101 1410 bsf tmr1on__byte,tmr1on__bit 1075 102 290c goto switch__401end 1076 switch__401block419: 1077 ; Disable Servo < Command 0000 0100 > : 1078 ; servo_enable := 0 1079 103 1262 bcf main__servo_enable__byte,main__servo_enable__bit 1080 104 290c goto switch__401end 1081 switch__401block423: 1082 ; Enable Servo < Command 0000 0101 > : 1083 ; servo_enable := 1 1084 105 1662 bsf main__servo_enable__byte,main__servo_enable__bit 1085 106 290c goto switch__401end 1086 switch__401block427: 1087 ; Disable Continuous Measurement < Command 0000 0110 > : 1088 ; continuous := 0 1089 107 1062 bcf main__continuous__byte,main__continuous__bit 1090 ; tmr1on := 0 1091 108 1010 bcf tmr1on__byte,tmr1on__bit 1092 109 290c goto switch__401end 1093 switch__401block432: 1094 ; Enable Continuous Measurement < Command 0000 0111 > : 1095 ; continuous := 1 1096 10a 1462 bsf main__continuous__byte,main__continuous__bit 1097 ; tmr1on := 1 1098 10b 1410 bsf tmr1on__byte,tmr1on__bit 1099 switch__401end: 1100 10c 293c goto switch__398end 1101 switch__398block439: 1102 ; switch { command & 7 } 1103 10d 3001 movlw HIGH switch__440block_start 1104 10e 008a movwf pclath___register 1105 10f 3007 movlw 7 1106 110 052e andwf main__command,w 1107 ; case 0 1108 ; case 1 1109 ; case 2 1110 ; case 3 1111 switch__440block_start: 1112 111 0782 addwf pcl___register,f 1113 112 291a goto switch__440block441 1114 113 291c goto switch__440block445 1115 114 291e goto switch__440block449 1116 115 2922 goto switch__440block453 1117 116 292b goto switch__440default464 1118 117 292b goto switch__440default464 1119 118 292b goto switch__440default464 1120 119 292b goto switch__440default464 1121 switch__440block_end: 1122 ; switch_check 440 switch__440block_start switch__440block_end 1123 switch__440block441: 1124 ; Increment Servo < Command 0000 1000 > : 1125 ; servo := servo + 1 1126 11a 0ab9 incf main__servo,f 1127 11b 292b goto switch__440end 1128 switch__440block445: 1129 ; Decrement Servo < Command 0000 1001 > : 1130 ; servo := servo - 1 1131 11c 03b9 decf main__servo,f 1132 11d 292b goto switch__440end 1133 switch__440block449: 1134 ; Increment Servo < Command 0000 1010 > : 1135 ; call send_byte {{ servo }} 1136 11e 0839 movf main__servo,w 1137 11f 00e5 movwf send_byte__character 1138 120 22bf call send_byte 1139 121 292b goto switch__440end 1140 switch__440block453: 1141 ; Decrement Servo < Command 0000 1011 > : 1142 ; result := 0 1143 122 01b8 clrf main__result 1144 ; if { servo_enable } start 1145 ; expression=`{ servo_enable }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 1146 123 1a62 btfsc main__servo_enable__byte,main__servo_enable__bit 1147 ; if { servo_enable } body start 1148 ; result @ 0 := 1 1149 ; Select result @ 0 1150 0038 main__result__457select0 equ main__result+0 1151 0038 main__result__457select0__byte equ main__result+0 1152 0000 main__result__457select0__bit equ 0 1153 124 1438 bsf main__result__457select0__byte,main__result__457select0__bit 1154 ; if { servo_enable } body end 1155 ; if exp=`servo_enable' false skip delay=2 1156 ; Other expression=`{ servo_enable }' delay=2 1157 ; if { servo_enable } end 1158 ; if { continuous } start 1159 ; expression=`{ continuous }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 1160 125 1862 btfsc main__continuous__byte,main__continuous__bit 1161 ; if { continuous } body start 1162 ; result @ 1 := 1 1163 ; Select result @ 1 1164 0038 main__result__460select0 equ main__result+0 1165 0038 main__result__460select0__byte equ main__result+0 1166 0001 main__result__460select0__bit equ 1 1167 126 14b8 bsf main__result__460select0__byte,main__result__460select0__bit 1168 ; if { continuous } body end 1169 ; if exp=`continuous' false skip delay=2 1170 ; Other expression=`{ continuous }' delay=2 1171 ; if { continuous } end 1172 ; call send_byte {{ result }} 1173 127 0838 movf main__result,w 1174 128 00e5 movwf send_byte__character 1175 129 22bf call send_byte 1176 12a 292b goto switch__440end 1177 switch__440default464: 1178 ; Do nothing 1179 switch__440end: 1180 12b 293c goto switch__398end 1181 switch__398block469: 1182 ; Set Servo Low < Command 0001 llll > : 1183 ; servo := servo & 0xf0 | command & 0xf 1184 12c 30f0 movlw 240 1185 12d 0539 andwf main__servo,w 1186 12e 00e1 movwf main__471byte0 1187 12f 300f movlw 15 1188 130 052e andwf main__command,w 1189 131 0461 iorwf main__471byte0,w 1190 132 00b9 movwf main__servo 1191 133 293c goto switch__398end 1192 switch__398block473: 1193 ; Set Servo High < Command 0010 hhhh > : 1194 ; servo := servo & 0xf | command << 4 1195 134 300f movlw 15 1196 135 0539 andwf main__servo,w 1197 136 00e1 movwf main__475byte1 1198 137 0e2e swapf main__command,w 1199 138 39f0 andlw 240 1200 139 0461 iorwf main__475byte1,w 1201 13a 00b9 movwf main__servo 1202 13b 293c goto switch__398end 1203 switch__398default477: 1204 ; Do Nothing : 1205 switch__398end: 1206 13c 2a0b goto switch__395end 1207 switch__395block482: 1208 ; Command = 01 xx xxxx : 1209 ; switch { {{ command >> 3 }} & 7 } 1210 13d 3001 movlw HIGH switch__484block_start 1211 13e 008a movwf pclath___register 1212 13f 0c2e rrf main__command,w 1213 140 00e1 movwf main__484byte0 1214 141 0ce1 rrf main__484byte0,f 1215 142 0c61 rrf main__484byte0,w 1216 143 3907 andlw 7 1217 ; case 0 1218 ; case 1 1219 ; case 2 3 1220 ; case 4 5 1221 ; case 6 1222 switch__484block_start: 1223 144 0782 addwf pcl___register,f 1224 145 294d goto switch__484block485 1225 146 299c goto switch__484block546 1226 147 29c5 goto switch__484block582 1227 148 29c5 goto switch__484block582 1228 149 29d7 goto switch__484block588 1229 14a 29d7 goto switch__484block588 1230 14b 29e2 goto switch__484block593 1231 14c 29f0 goto switch__484default600 1232 switch__484block_end: 1233 ; switch_check 484 switch__484block_start switch__484block_end 1234 switch__484block485: 1235 ; Command = 0100 0 xxx : 1236 ; switch { command & 7 } 1237 14d 3001 movlw HIGH switch__487block_start 1238 14e 008a movwf pclath___register 1239 14f 3007 movlw 7 1240 150 052e andwf main__command,w 1241 ; case 0 1242 ; case 1 1243 ; case 2 1244 ; case 3 1245 ; case 4 1246 ; case 5 1247 ; case 6 7 1248 switch__487block_start: 1249 151 0782 addwf pcl___register,f 1250 152 295a goto switch__487block488 1251 153 2963 goto switch__487block495 1252 154 296c goto switch__487block502 1253 155 297b goto switch__487block512 1254 156 2984 goto switch__487block519 1255 157 298d goto switch__487block526 1256 158 298e goto switch__487block529 1257 159 298e goto switch__487block529 1258 switch__487block_end: 1259 ; switch_check 487 switch__487block_start switch__487block_end 1260 switch__487block488: 1261 ; Set Sweep Initial Position < command 0100 0000 > : 1262 ; command_need := 2 1263 15a 3002 movlw 2 1264 15b 00b1 movwf main__command_need 1265 ; if { command_have = command_need } start 1266 15c 0832 movf main__command_have,w 1267 15d 0231 subwf main__command_need,w 1268 ; expression=`{ command_have = command_need }' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 1269 15e 1d03 btfss z___byte,z___bit 1270 15f 2962 goto label491__0end 1271 ; if { command_have = command_need } body start 1272 ; sweep_initial := command1 1273 160 082f movf main__command1,w 1274 161 00da movwf main__sweep_initial 1275 ; if { command_have = command_need } body end 1276 label491__0end: 1277 ; if exp=` command_have = command_need ' empty false 1278 ; Other expression=`{ command_have = command_need }' delay=-1 1279 ; if { command_have = command_need } end 1280 162 299b goto switch__487end 1281 switch__487block495: 1282 ; Set Sweep Increment < command 0100 0001 > : 1283 ; command_need := 2 1284 163 3002 movlw 2 1285 164 00b1 movwf main__command_need 1286 ; if { command_have = command_need } start 1287 165 0832 movf main__command_have,w 1288 166 0231 subwf main__command_need,w 1289 ; expression=`{ command_have = command_need }' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 1290 167 1d03 btfss z___byte,z___bit 1291 168 296b goto label498__0end 1292 ; if { command_have = command_need } body start 1293 ; sweep_increment := command1 1294 169 082f movf main__command1,w 1295 16a 00db movwf main__sweep_increment 1296 ; if { command_have = command_need } body end 1297 label498__0end: 1298 ; if exp=` command_have = command_need ' empty false 1299 ; Other expression=`{ command_have = command_need }' delay=-1 1300 ; if { command_have = command_need } end 1301 16b 299b goto switch__487end 1302 switch__487block502: 1303 ; Set Sweep Count < command 0100 0010 > : 1304 ; command_need := 2 1305 16c 3002 movlw 2 1306 16d 00b1 movwf main__command_need 1307 ; if { command_have = command_need } start 1308 16e 0832 movf main__command_have,w 1309 16f 0231 subwf main__command_need,w 1310 ; expression=`{ command_have = command_need }' exp_delay=2 true_delay=-1 false_delay=0 true_size=8 false_size=0 1311 170 1d03 btfss z___byte,z___bit 1312 171 297a goto label505__0end 1313 ; if { command_have = command_need } body start 1314 ; sweep_count := command1 1315 172 082f movf main__command1,w 1316 173 00dc movwf main__sweep_count 1317 ; if { sweep_count > 16 } start 1318 174 3011 movlw 17 1319 175 025c subwf main__sweep_count,w 1320 ; expression=`{ sweep_count > 16 }' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 1321 176 1c03 btfss c___byte,c___bit 1322 177 297a goto label507__0end 1323 ; if { sweep_count > 16 } body start 1324 ; sweep_count := 16 1325 178 3010 movlw 16 1326 179 00dc movwf main__sweep_count 1327 ; if { sweep_count > 16 } body end 1328 label507__0end: 1329 ; if exp=` sweep_count > 16 ' empty false 1330 ; Other expression=`{ sweep_count > 16 }' delay=-1 1331 ; if { sweep_count > 16 } end 1332 ; if { command_have = command_need } body end 1333 label505__0end: 1334 ; if exp=` command_have = command_need ' empty false 1335 ; Other expression=`{ command_have = command_need }' delay=-1 1336 ; if { command_have = command_need } end 1337 17a 299b goto switch__487end 1338 switch__487block512: 1339 ; Set Sweep Delay < command 0100 0011 > : 1340 ; command_need := 2 1341 17b 3002 movlw 2 1342 17c 00b1 movwf main__command_need 1343 ; if { command_have = command_need } start 1344 17d 0832 movf main__command_have,w 1345 17e 0231 subwf main__command_need,w 1346 ; expression=`{ command_have = command_need }' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 1347 17f 1d03 btfss z___byte,z___bit 1348 180 2983 goto label515__0end 1349 ; if { command_have = command_need } body start 1350 ; sweep_delay := command1 1351 181 082f movf main__command1,w 1352 182 00de movwf main__sweep_delay 1353 ; if { command_have = command_need } body end 1354 label515__0end: 1355 ; if exp=` command_have = command_need ' empty false 1356 ; Other expression=`{ command_have = command_need }' delay=-1 1357 ; if { command_have = command_need } end 1358 183 299b goto switch__487end 1359 switch__487block519: 1360 ; Set Sweep Counter < command 0100 0100 > : 1361 ; command_need := 2 1362 184 3002 movlw 2 1363 185 00b1 movwf main__command_need 1364 ; if { command_have = command_need } start 1365 186 0832 movf main__command_have,w 1366 187 0231 subwf main__command_need,w 1367 ; expression=`{ command_have = command_need }' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 1368 188 1d03 btfss z___byte,z___bit 1369 189 298c goto label522__0end 1370 ; if { command_have = command_need } body start 1371 ; sweep_counter := command1 1372 18a 082f movf main__command1,w 1373 18b 00dd movwf main__sweep_counter 1374 ; if { command_have = command_need } body end 1375 label522__0end: 1376 ; if exp=` command_have = command_need ' empty false 1377 ; Other expression=`{ command_have = command_need }' delay=-1 1378 ; if { command_have = command_need } end 1379 18c 299b goto switch__487end 1380 switch__487block526: 1381 ; Do_nothing < command 0100 0101 > : 1382 18d 299b goto switch__487end 1383 switch__487block529: 1384 ; Set Sweep Enable < command 0100 011 s > : 1385 ; sweep_enable := 0 1386 18e 1362 bcf main__sweep_enable__byte,main__sweep_enable__bit 1387 ; if { command @ 0 } start 1388 ; Alias variable for select command @ 0 1389 002e main__command__532select0 equ main__command+0 1390 002e main__command__532select0__byte equ main__command+0 1391 0000 main__command__532select0__bit equ 0 1392 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=5 false_delay=2 true_size=5 false_size=2 1393 18f 182e btfsc main__command__532select0__byte,main__command__532select0__bit 1394 190 2994 goto label532__1true 1395 label532__1false: 1396 ; else body start 1397 ; sweep_enable := 0 1398 191 1362 bcf main__sweep_enable__byte,main__sweep_enable__bit 1399 ; servo_enable := 0 1400 192 1262 bcf main__servo_enable__byte,main__servo_enable__bit 1401 ; servo := sweep_initial 1402 ; 2 instructions found for sharing 1403 193 2999 goto label532__1end 1404 label532__1true: 1405 ; if { command @ 0 } body start 1406 ; sweep_sleep := 15 1407 194 300f movlw 15 1408 195 00df movwf main__sweep_sleep 1409 ; sweep_enable := 1 1410 196 1762 bsf main__sweep_enable__byte,main__sweep_enable__bit 1411 ; sweep_index := 0 1412 197 01e0 clrf main__sweep_index 1413 ; servo_enable := 1 1414 198 1662 bsf main__servo_enable__byte,main__servo_enable__bit 1415 ; servo := sweep_initial 1416 ; 2 instructions found for sharing 1417 ; if exp=` command @ 0 ' generic 1418 label532__1end: 1419 ; Other expression=`{ command @ 0 }' delay=-1 1420 ; 2 shared instructions follow 1421 199 085a movf main__sweep_initial,w 1422 19a 00b9 movwf main__servo 1423 ; if { command @ 0 } end 1424 switch__487end: 1425 19b 29fc goto switch__484end 1426 switch__484block546: 1427 ; Command = 0100 1 xxx : 1428 ; switch { command & 7 } 1429 19c 3001 movlw HIGH switch__548block_start 1430 19d 008a movwf pclath___register 1431 19e 3007 movlw 7 1432 19f 052e andwf main__command,w 1433 ; case 0 1434 ; case 1 1435 ; case 2 1436 ; case 3 1437 ; case 4 1438 ; case 5 1439 switch__548block_start: 1440 1a0 0782 addwf pcl___register,f 1441 1a1 29a9 goto switch__548block549 1442 1a2 29ad goto switch__548block553 1443 1a3 29b1 goto switch__548block557 1444 1a4 29b5 goto switch__548block561 1445 1a5 29b9 goto switch__548block565 1446 1a6 29bd goto switch__548block569 1447 1a7 29c4 goto switch__548default577 1448 1a8 29c4 goto switch__548default577 1449 switch__548block_end: 1450 ; switch_check 548 switch__548block_start switch__548block_end 1451 switch__548block549: 1452 ; Read Sweep Initial Position < command 0100 1000 > : 1453 ; call send_byte {{ sweep_initial }} 1454 1a9 085a movf main__sweep_initial,w 1455 1aa 00e5 movwf send_byte__character 1456 1ab 22bf call send_byte 1457 1ac 29c4 goto switch__548end 1458 switch__548block553: 1459 ; Read Sweep Increment < command 0100 1001 > : 1460 ; call send_byte {{ sweep_increment }} 1461 1ad 085b movf main__sweep_increment,w 1462 1ae 00e5 movwf send_byte__character 1463 1af 22bf call send_byte 1464 1b0 29c4 goto switch__548end 1465 switch__548block557: 1466 ; Read Sweep Count < command 0100 1010 > : 1467 ; call send_byte {{ sweep_count }} 1468 1b1 085c movf main__sweep_count,w 1469 1b2 00e5 movwf send_byte__character 1470 1b3 22bf call send_byte 1471 1b4 29c4 goto switch__548end 1472 switch__548block561: 1473 ; Read Sweep Delay < command 0100 1011 > : 1474 ; call send_byte {{ sweep_delay }} 1475 1b5 085e movf main__sweep_delay,w 1476 1b6 00e5 movwf send_byte__character 1477 1b7 22bf call send_byte 1478 1b8 29c4 goto switch__548end 1479 switch__548block565: 1480 ; Read Sweep Counter < command 0100 0100 > : 1481 ; call send_byte {{ sweep_counter }} 1482 1b9 085d movf main__sweep_counter,w 1483 1ba 00e5 movwf send_byte__character 1484 1bb 22bf call send_byte 1485 1bc 29c4 goto switch__548end 1486 switch__548block569: 1487 ; Read Sweep Enable < command 0100 0101 > : 1488 ; result := 0 1489 1bd 01b8 clrf main__result 1490 ; if { sweep_enable } start 1491 ; expression=`{ sweep_enable }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 1492 1be 1b62 btfsc main__sweep_enable__byte,main__sweep_enable__bit 1493 ; if { sweep_enable } body start 1494 ; result @ 0 := 1 1495 ; Select result @ 0 1496 0038 main__result__573select0 equ main__result+0 1497 0038 main__result__573select0__byte equ main__result+0 1498 0000 main__result__573select0__bit equ 0 1499 1bf 1438 bsf main__result__573select0__byte,main__result__573select0__bit 1500 ; if { sweep_enable } body end 1501 ; if exp=`sweep_enable' false skip delay=2 1502 ; Other expression=`{ sweep_enable }' delay=2 1503 ; if { sweep_enable } end 1504 ; call send_byte {{ result }} 1505 1c0 0838 movf main__result,w 1506 1c1 00e5 movwf send_byte__character 1507 1c2 22bf call send_byte 1508 1c3 29c4 goto switch__548end 1509 switch__548default577: 1510 ; Do nothing . 1511 switch__548end: 1512 1c4 29fc goto switch__484end 1513 switch__484block582: 1514 ; Read Sweep Index High and Low < command 0101 iiii > : 1515 ; result := command & 0xf 1516 1c5 300f movlw 15 1517 1c6 052e andwf main__command,w 1518 1c7 00b8 movwf main__result 1519 ; call send_byte {{ sweep_highs ~~ {{ result }} }} 1520 1c8 303a movlw LOW main__sweep_highs 1521 1c9 0738 addwf main__result,w 1522 1ca 0084 movwf fsr___register 1523 1cb 1383 bcf irp___register,irp___bit 1524 1cc 0800 movf indf___register,w 1525 1cd 00e5 movwf send_byte__character 1526 1ce 22bf call send_byte 1527 ; call send_byte {{ sweep_lows ~~ {{ result }} }} 1528 1cf 304a movlw LOW main__sweep_lows 1529 1d0 0738 addwf main__result,w 1530 1d1 0084 movwf fsr___register 1531 1d2 1383 bcf irp___register,irp___bit 1532 1d3 0800 movf indf___register,w 1533 1d4 00e5 movwf send_byte__character 1534 1d5 22bf call send_byte 1535 1d6 29fc goto switch__484end 1536 switch__484block588: 1537 ; Read Sweep Index High Only < command 0101 iiii > : 1538 ; result := command & 0xf 1539 1d7 300f movlw 15 1540 1d8 052e andwf main__command,w 1541 1d9 00b8 movwf main__result 1542 ; call send_byte {{ sweep_highs ~~ {{ result }} }} 1543 1da 303a movlw LOW main__sweep_highs 1544 1db 0738 addwf main__result,w 1545 1dc 0084 movwf fsr___register 1546 1dd 1383 bcf irp___register,irp___bit 1547 1de 0800 movf indf___register,w 1548 1df 00e5 movwf send_byte__character 1549 1e0 22bf call send_byte 1550 1e1 29fc goto switch__484end 1551 switch__484block593: 1552 ; Write into memory : 1553 ; command_need := 3 1554 1e2 3003 movlw 3 1555 1e3 00b1 movwf main__command_need 1556 ; if { command_need = command_have } start 1557 1e4 0232 subwf main__command_have,w 1558 ; expression=`{ command_need = command_have }' exp_delay=2 true_delay=8 false_delay=0 true_size=8 false_size=0 1559 1e5 1d03 btfss z___byte,z___bit 1560 1e6 29ef goto label596__0end 1561 ; if { command_need = command_have } body start 1562 ; sweep_highs ~~ {{ command1 }} := command2 1563 1e7 0830 movf main__command2,w 1564 1e8 00e1 movwf main__597byte0 1565 1e9 303a movlw LOW main__sweep_highs 1566 1ea 072f addwf main__command1,w 1567 1eb 0084 movwf fsr___register 1568 1ec 0861 movf main__597byte0,w 1569 1ed 1383 bcf irp___register,irp___bit 1570 1ee 0080 movwf indf___register 1571 ; if { command_need = command_have } body end 1572 label596__0end: 1573 ; if exp=` command_need = command_have ' empty false 1574 ; Other expression=`{ command_need = command_have }' delay=-1 1575 ; if { command_need = command_have } end 1576 1ef 29fc goto switch__484end 1577 switch__484default600: 1578 ; Do nothing : 1579 ; command_need := 2 1580 1f0 3002 movlw 2 1581 1f1 00b1 movwf main__command_need 1582 ; if { command_need = command_have } start 1583 1f2 0232 subwf main__command_have,w 1584 ; expression=`{ command_need = command_have }' exp_delay=2 true_delay=5 false_delay=0 true_size=7 false_size=0 1585 1f3 1d03 btfss z___byte,z___bit 1586 1f4 29fc goto label603__0end 1587 ; if { command_need = command_have } body start 1588 ; call send_byte {{ sweep_highs ~~ {{ command1 }} }} 1589 1f5 303a movlw LOW main__sweep_highs 1590 1f6 072f addwf main__command1,w 1591 1f7 0084 movwf fsr___register 1592 1f8 1383 bcf irp___register,irp___bit 1593 1f9 0800 movf indf___register,w 1594 1fa 00e5 movwf send_byte__character 1595 1fb 22bf call send_byte 1596 ; if { command_need = command_have } body end 1597 label603__0end: 1598 ; if exp=` command_need = command_have ' empty false 1599 ; Other expression=`{ command_need = command_have }' delay=-1 1600 ; if { command_need = command_have } end 1601 switch__484end: 1602 1fc 2a0b goto switch__395end 1603 switch__395block609: 1604 ; Do Nothing : 1605 1fd 2a0b goto switch__395end 1606 switch__395block612: 1607 ; Do shared commands : 1608 ; if { command >> 3 & 7 = 7 } start 1609 1fe 0c2e rrf main__command,w 1610 1ff 00e1 movwf main__614byte2 1611 200 0ce1 rrf main__614byte2,f 1612 201 0c61 rrf main__614byte2,w 1613 202 3907 andlw 7 1614 203 00e1 movwf main__614byte1 1615 204 3007 movlw 7 1616 205 0261 subwf main__614byte1,w 1617 ; expression=`{ command >> 3 & 7 = 7 }' exp_delay=9 true_delay=1 false_delay=0 true_size=3 false_size=0 1618 206 1d03 btfss z___byte,z___bit 1619 207 2a0b goto label614__3end 1620 ; if { command >> 3 & 7 = 7 } body start 1621 ; call do_shared {{ command }} 1622 208 082e movf main__command,w 1623 209 00e4 movwf do_shared__command 1624 20a 2253 call do_shared 1625 ; if { command >> 3 & 7 = 7 } body end 1626 label614__3end: 1627 ; if exp=` command >> 3 & 7 = 7 ' empty false 1628 ; Other expression=`{ command >> 3 & 7 = 7 }' delay=-1 1629 ; if { command >> 3 & 7 = 7 } end 1630 switch__395end: 1631 ; if { rcif } body end 1632 label380__0end: 1633 ; if exp=`rcif' empty false 1634 ; Other expression=`{ rcif }' delay=-1 1635 ; if { rcif } end 1636 ; Reset command reader : 1637 ; if { command_have = command_need } start 1638 20b 0832 movf main__command_have,w 1639 20c 0231 subwf main__command_need,w 1640 ; expression=`{ command_have = command_need }' exp_delay=2 true_delay=3 false_delay=0 true_size=3 false_size=0 1641 20d 1d03 btfss z___byte,z___bit 1642 20e 2a12 goto label622__0end 1643 ; if { command_have = command_need } body start 1644 ; command_need := 1 1645 20f 3001 movlw 1 1646 210 00b1 movwf main__command_need 1647 ; command_have := 0 1648 211 01b2 clrf main__command_have 1649 ; if { command_have = command_need } body end 1650 label622__0end: 1651 ; if exp=` command_have = command_need ' empty false 1652 ; Other expression=`{ command_have = command_need }' delay=-1 1653 ; if { command_have = command_need } end 1654 ; Read the captured distance : 1655 ; if { ccp1if } start 1656 ; expression=`{ ccp1if }' exp_delay=0 true_delay=42 false_delay=0 true_size=42 false_size=0 1657 212 1d0c btfss ccp1if__byte,ccp1if__bit 1658 213 2a3e goto label628__0end 1659 ; if { ccp1if } body start 1660 ; ccp1if := 0 1661 214 110c bcf ccp1if__byte,ccp1if__bit 1662 ; distance_high := ccpr1h 1663 215 0816 movf ccpr1h,w 1664 216 00b4 movwf main__distance_high 1665 ; distance_low := ccpr1l 1666 217 0815 movf ccpr1l,w 1667 218 00b5 movwf main__distance_low 1668 ; Make distance visible in LED ' s : 1669 ; leds := 0xff ^ ccpr1h 1670 219 30ff movlw 255 1671 21a 0616 xorwf ccpr1h,w 1672 21b 00b6 movwf main__leds 1673 ; led1 := leds @ 0 1674 ; Alias variable for select leds @ 0 1675 0036 main__leds__636select0 equ main__leds+0 1676 0036 main__leds__636select0__byte equ main__leds+0 1677 0000 main__leds__636select0__bit equ 0 1678 21c 1c36 btfss main__leds__636select0__byte,main__leds__636select0__bit 1679 21d 1286 bcf led1__byte,led1__bit 1680 21e 1836 btfsc main__leds__636select0__byte,main__leds__636select0__bit 1681 21f 1686 bsf led1__byte,led1__bit 1682 ; led2 := leds @ 1 1683 ; Alias variable for select leds @ 1 1684 0036 main__leds__637select0 equ main__leds+0 1685 0036 main__leds__637select0__byte equ main__leds+0 1686 0001 main__leds__637select0__bit equ 1 1687 220 1cb6 btfss main__leds__637select0__byte,main__leds__637select0__bit 1688 221 1306 bcf led2__byte,led2__bit 1689 222 18b6 btfsc main__leds__637select0__byte,main__leds__637select0__bit 1690 223 1706 bsf led2__byte,led2__bit 1691 ; led3 := leds @ 2 1692 ; Alias variable for select leds @ 2 1693 0036 main__leds__638select0 equ main__leds+0 1694 0036 main__leds__638select0__byte equ main__leds+0 1695 0002 main__leds__638select0__bit equ 2 1696 224 1d36 btfss main__leds__638select0__byte,main__leds__638select0__bit 1697 225 1386 bcf led3__byte,led3__bit 1698 226 1936 btfsc main__leds__638select0__byte,main__leds__638select0__bit 1699 227 1786 bsf led3__byte,led3__bit 1700 ; led4 := leds @ 3 1701 ; Alias variable for select leds @ 3 1702 0036 main__leds__639select0 equ main__leds+0 1703 0036 main__leds__639select0__byte equ main__leds+0 1704 0003 main__leds__639select0__bit equ 3 1705 228 1db6 btfss main__leds__639select0__byte,main__leds__639select0__bit 1706 229 1205 bcf led4__byte,led4__bit 1707 22a 19b6 btfsc main__leds__639select0__byte,main__leds__639select0__bit 1708 22b 1605 bsf led4__byte,led4__bit 1709 ; led5 := leds @ 4 1710 ; Alias variable for select leds @ 4 1711 0036 main__leds__640select0 equ main__leds+0 1712 0036 main__leds__640select0__byte equ main__leds+0 1713 0004 main__leds__640select0__bit equ 4 1714 22c 1e36 btfss main__leds__640select0__byte,main__leds__640select0__bit 1715 22d 1185 bcf led5__byte,led5__bit 1716 22e 1a36 btfsc main__leds__640select0__byte,main__leds__640select0__bit 1717 22f 1585 bsf led5__byte,led5__bit 1718 ; led6 := leds @ 5 1719 ; Alias variable for select leds @ 5 1720 0036 main__leds__641select0 equ main__leds+0 1721 0036 main__leds__641select0__byte equ main__leds+0 1722 0005 main__leds__641select0__bit equ 5 1723 230 1eb6 btfss main__leds__641select0__byte,main__leds__641select0__bit 1724 231 1005 bcf led6__byte,led6__bit 1725 232 1ab6 btfsc main__leds__641select0__byte,main__leds__641select0__bit 1726 233 1405 bsf led6__byte,led6__bit 1727 ; led7 := leds @ 6 1728 ; Alias variable for select leds @ 6 1729 0036 main__leds__642select0 equ main__leds+0 1730 0036 main__leds__642select0__byte equ main__leds+0 1731 0006 main__leds__642select0__bit equ 6 1732 234 1f36 btfss main__leds__642select0__byte,main__leds__642select0__bit 1733 235 1085 bcf led7__byte,led7__bit 1734 236 1b36 btfsc main__leds__642select0__byte,main__leds__642select0__bit 1735 237 1485 bsf led7__byte,led7__bit 1736 ; led8 := leds @ 7 1737 ; Alias variable for select leds @ 7 1738 0036 main__leds__643select0 equ main__leds+0 1739 0036 main__leds__643select0__byte equ main__leds+0 1740 0007 main__leds__643select0__bit equ 7 1741 238 1fb6 btfss main__leds__643select0__byte,main__leds__643select0__bit 1742 239 1006 bcf led8__byte,led8__bit 1743 23a 1bb6 btfsc main__leds__643select0__byte,main__leds__643select0__bit 1744 23b 1406 bsf led8__byte,led8__bit 1745 ; if { ! continuous } start 1746 ; expression=`continuous' exp_delay=0 true_delay=0 false_delay=1 true_size=0 false_size=1 1747 23c 1c62 btfss main__continuous__byte,main__continuous__bit 1748 ; if { ! continuous } body start 1749 ; tmr1on := 0 1750 23d 1010 bcf tmr1on__byte,tmr1on__bit 1751 ; if { ! continuous } body end 1752 ; if exp=`continuous' true skip delay=2 1753 ; Other expression=`continuous' delay=2 1754 ; if { ! continuous } end 1755 ; if { ccp1if } body end 1756 label628__0end: 1757 ; if exp=`ccp1if' empty false 1758 ; Other expression=`{ ccp1if }' delay=-1 1759 ; if { ccp1if } end 1760 ; See whether we need to generate another trigger pulse : 1761 ; if { tmr1if } start 1762 ; expression=`{ tmr1if }' exp_delay=0 true_delay=54 false_delay=0 true_size=18 false_size=0 1763 23e 1c0c btfss tmr1if__byte,tmr1if__bit 1764 23f 2a52 goto label651__0end 1765 ; if { tmr1if } body start 1766 ; Make sure trigger is low for at least 10 uSec : 1767 ; tmr1if := 0 1768 240 100c bcf tmr1if__byte,tmr1if__bit 1769 ; delay 25 ... start 1770 ; optimize 0 1771 ; Uniform delay remaining = 25 Accumulated Delay = 0 1772 ; tmr1on := 0 1773 241 1010 bcf tmr1on__byte,tmr1on__bit 1774 ; Uniform delay remaining = 24 Accumulated Delay = 1 1775 ; tmr1l := 0 1776 242 018e clrf tmr1l 1777 ; Uniform delay remaining = 23 Accumulated Delay = 2 1778 ; tmr1h := 0 1779 243 018f clrf tmr1h 1780 ; Uniform delay remaining = 22 Accumulated Delay = 3 1781 ; Uniform delay remaining = 22 Accumulated Delay = 3 1782 ; Delay 22 cycles 1783 244 3007 movlw 7 1784 245 00e1 movwf main__655byte1 1785 main__655delay0: 1786 246 0be1 decfsz main__655byte1,f 1787 247 2a46 goto main__655delay0 1788 ; optimize 1 1789 ; delay 25 ... end 1790 ; Fire trigger for 10 uSec : 1791 ; trigger := 1 1792 248 1505 bsf trigger__byte,trigger__bit 1793 ; delay 25 ... start 1794 ; optimize 0 1795 ; Uniform delay remaining = 25 Accumulated Delay = 0 1796 ; ccp1if := 0 1797 249 110c bcf ccp1if__byte,ccp1if__bit 1798 ; Uniform delay remaining = 24 Accumulated Delay = 1 1799 ; Uniform delay remaining = 24 Accumulated Delay = 1 1800 ; Delay 24 cycles 1801 24a 3007 movlw 7 1802 24b 00e1 movwf main__663byte1 1803 main__663delay0: 1804 24c 0be1 decfsz main__663byte1,f 1805 24d 2a4c goto main__663delay0 1806 24e 0000 nop 1807 24f 0000 nop 1808 ; optimize 1 1809 ; delay 25 ... end 1810 ; Turn the timer on when trigger goes low : 1811 ; trigger := 0 1812 250 1105 bcf trigger__byte,trigger__bit 1813 ; tmr1on := 1 1814 251 1410 bsf tmr1on__byte,tmr1on__bit 1815 ; if { tmr1if } body end 1816 label651__0end: 1817 ; if exp=`tmr1if' empty false 1818 ; Other expression=`{ tmr1if }' delay=-1 1819 ; if { tmr1if } end 1820 252 2856 goto main__303loop__forever 1821 ; loop_forever ... end 1822 ; procedure main end 1823 1824 ; procedure do_shared start 1825 do_shared: 1826 0064 do_shared__variables__base equ global__variables__bank0+68 1827 0064 do_shared__bytes__base equ do_shared__variables__base+0 1828 0065 do_shared__bits__base equ do_shared__variables__base+1 1829 0001 do_shared__total__bytes equ 1 1830 0064 do_shared__command equ do_shared__bytes__base+0 1831 ; Command 1111 1 xxx : 1832 ; switch { command & 7 } 1833 253 3002 movlw HIGH switch__680block_start 1834 254 008a movwf pclath___register 1835 255 3007 movlw 7 1836 256 0564 andwf do_shared__command,w 1837 ; case 0 1838 ; case 1 1839 ; case 2 1840 ; case 3 1841 ; case 4 1842 ; case 5 1843 ; case 6 1844 ; case 7 1845 switch__680block_start: 1846 257 0782 addwf pcl___register,f 1847 258 2a60 goto switch__680block681 1848 259 2a61 goto switch__680block684 1849 25a 2a62 goto switch__680block687 1850 25b 2a65 goto switch__680block691 1851 25c 2a68 goto switch__680block695 1852 25d 2a73 goto switch__680block703 1853 25e 2a75 goto switch__680block707 1854 25f 2a7a goto switch__680block712 1855 switch__680block_end: 1856 ; switch_check 680 switch__680block_start switch__680block_end 1857 switch__680block681: 1858 ; Clock Decrement < Command 1111 1 xxx > : 1859 260 2a7b goto switch__680end 1860 switch__680block684: 1861 ; Clock Increment < Command 1111 1 xxx > : 1862 261 2a7b goto switch__680end 1863 switch__680block687: 1864 ; Clock Read < Command 1111 1 xxx > : 1865 ; call send_byte {{ 0 }} 1866 262 01e5 clrf send_byte__character 1867 263 22bf call send_byte 1868 264 2a7b goto switch__680end 1869 switch__680block691: 1870 ; Clock Pulse < Command 1111 1 xxx > : 1871 ; call send_byte {{ 0 }} 1872 265 01e5 clrf send_byte__character 1873 266 22bf call send_byte 1874 267 2a7b goto switch__680end 1875 switch__680block695: 1876 ; Id Next < Command 1111 1 xxx > : 1877 ; call send_byte {{ id ~~ {{ id_index }} }} 1878 268 0a2d incf id_index,w 1879 269 018a clrf pclath___register 1880 26a 2011 call id 1881 26b 00e5 movwf send_byte__character 1882 26c 22bf call send_byte 1883 ; id_index := id_index + 1 1884 26d 0aad incf id_index,f 1885 ; if { id_index >= id . size } start 1886 26e 3032 movlw 50 1887 26f 022d subwf id_index,w 1888 ; expression=`{ id_index >= id . size }' exp_delay=2 true_delay=1 false_delay=0 true_size=1 false_size=0 1889 270 1803 btfsc c___byte,c___bit 1890 ; if { id_index >= id . size } body start 1891 ; id_index := 0 1892 271 01ad clrf id_index 1893 ; if { id_index >= id . size } body end 1894 ; if exp=` id_index >= id . size ' false skip delay=4 1895 ; Other expression=`{ id_index >= id . size }' delay=4 1896 ; if { id_index >= id . size } end 1897 272 2a7b goto switch__680end 1898 switch__680block703: 1899 ; Id Reset < Command 1111 1 xxx > : 1900 ; id_index := 0 1901 273 01ad clrf id_index 1902 274 2a7b goto switch__680end 1903 switch__680block707: 1904 ; Glitch Read < Command 1111 1110 > : 1905 ; call send_byte {{ glitch }} 1906 275 082c movf glitch,w 1907 276 00e5 movwf send_byte__character 1908 277 22bf call send_byte 1909 ; glitch := 0 1910 278 01ac clrf glitch 1911 279 2a7b goto switch__680end 1912 switch__680block712: 1913 ; Glitch < Command 1111 1111 > : 1914 ; glitch := glitch + 1 1915 27a 0aac incf glitch,f 1916 switch__680end: 1917 ; procedure do_shared end 1918 27b 3400 retlw 0 1919 1920 ; procedure initialize start 1921 initialize: 1922 0065 initialize__variables__base equ global__variables__bank0+69 1923 0065 initialize__bytes__base equ initialize__variables__base+0 1924 0065 initialize__bits__base equ initialize__variables__base+0 1925 0000 initialize__total__bytes equ 0 1926 ; arguments_none 1927 ; Get all interrupts turned off : 1928 ; intcon := 0 1929 27c 018b clrf intcon 1930 ; pie1 := 0 1931 ; Switch from register bank 0 to register bank 1 (which contains pie1) 1932 27d 1683 bsf rp0___byte,rp0___bit 1933 ; Register bank is now 1 1934 27e 018c clrf pie1 1935 ; pir1 := 0 1936 ; Switch from register bank 1 to register bank 0 (which contains pir1) 1937 27f 1283 bcf rp0___byte,rp0___bit 1938 ; Register bank is now 0 1939 280 018c clrf pir1 1940 ; Initialize UART : 1941 ; Prescaler = low : 1942 ; brgh := 0 1943 ; Switch from register bank 0 to register bank 1 (which contains brgh__byte) 1944 281 1683 bsf rp0___byte,rp0___bit 1945 ; Register bank is now 1 1946 282 1118 bcf brgh__byte,brgh__bit 1947 ; Baud rate = 2400 baud : 1948 ; spbrg := 129 1949 283 3081 movlw 129 1950 284 0099 movwf spbrg 1951 ; Asynchronous mode : 1952 ; sync := 0 1953 285 1218 bcf sync__byte,sync__bit 1954 ; 8 - bit mode : 1955 ; tx9 := 0 1956 286 1318 bcf tx9__byte,tx9__bit 1957 ; Serial Port Enable : 1958 ; spen := 1 1959 ; Switch from register bank 1 to register bank 0 (which contains spen__byte) 1960 287 1283 bcf rp0___byte,rp0___bit 1961 ; Register bank is now 0 1962 288 1798 bsf spen__byte,spen__bit 1963 ; Keep interrupts off : 1964 ; txie := 0 1965 ; Switch from register bank 0 to register bank 1 (which contains txie__byte) 1966 289 1683 bsf rp0___byte,rp0___bit 1967 ; Register bank is now 1 1968 28a 120c bcf txie__byte,txie__bit 1969 ; Clear out an previous character . 1970 ; txif := 0 1971 ; Switch from register bank 1 to register bank 0 (which contains txif__byte) 1972 28b 1283 bcf rp0___byte,rp0___bit 1973 ; Register bank is now 0 1974 28c 120c bcf txif__byte,txif__bit 1975 ; Enable the transmitter : 1976 ; txen := 1 1977 ; Switch from register bank 0 to register bank 1 (which contains txen__byte) 1978 28d 1683 bsf rp0___byte,rp0___bit 1979 ; Register bank is now 1 1980 28e 1698 bsf txen__byte,txen__bit 1981 ; Enable the receiver : 1982 ; Keep inerrupts off : 1983 ; rcie := 0 1984 28f 128c bcf rcie__byte,rcie__bit 1985 ; Enable continuous reception : 1986 ; cren := 1 1987 ; Switch from register bank 1 to register bank 0 (which contains cren__byte) 1988 290 1283 bcf rp0___byte,rp0___bit 1989 ; Register bank is now 0 1990 291 1618 bsf cren__byte,cren__bit 1991 ; Enable single receptions : 1992 ; sren := 1 1993 292 1698 bsf sren__byte,sren__bit 1994 ; Disable address 1995 ; aden := 0 1996 293 1198 bcf aden__byte,aden__bit 1997 ; Initialize the timer 0 module : 1998 ; t0cs := 0 1999 ; Switch from register bank 0 to register bank 1 (which contains t0cs__byte) 2000 294 1683 bsf rp0___byte,rp0___bit 2001 ; Register bank is now 1 2002 295 1281 bcf t0cs__byte,t0cs__bit 2003 ; psa := 0 2004 296 1181 bcf psa__byte,psa__bit 2005 ; ps2 := 1 2006 297 1501 bsf ps2__byte,ps2__bit 2007 ; ps1 := 1 2008 298 1481 bsf ps1__byte,ps1__bit 2009 ; ps0 := 1 2010 299 1401 bsf ps0__byte,ps0__bit 2011 ; Initialize the timer 1 module : 2012 ; Prescale = 1 : 2 2013 ; t1ckps1 := 0 2014 ; Switch from register bank 1 to register bank 0 (which contains t1ckps1__byte) 2015 29a 1283 bcf rp0___byte,rp0___bit 2016 ; Register bank is now 0 2017 29b 1290 bcf t1ckps1__byte,t1ckps1__bit 2018 ; t1ckps0 := 1 2019 29c 1610 bsf t1ckps0__byte,t1ckps0__bit 2020 ; Disable oscillator : 2021 ; t1oscen := 0 2022 29d 1190 bcf t1oscen__byte,t1oscen__bit 2023 ; T1SYNC not used when TMR1CS = 0 : 2024 ; t1sync := 0 2025 ; Internal clock : 2026 ; tmr1cs := 0 2027 29e 1090 bcf tmr1cs__byte,tmr1cs__bit 2028 ; Turn timer off : 2029 ; tmr1on := 1 2030 29f 1410 bsf tmr1on__byte,tmr1on__bit 2031 ; Clear interrupt flags : 2032 ; tmr1ie := 0 2033 ; Switch from register bank 0 to register bank 1 (which contains tmr1ie__byte) 2034 2a0 1683 bsf rp0___byte,rp0___bit 2035 ; Register bank is now 1 2036 2a1 100c bcf tmr1ie__byte,tmr1ie__bit 2037 ; tmr1if := 0 2038 ; Switch from register bank 1 to register bank 0 (which contains tmr1if__byte) 2039 2a2 1283 bcf rp0___byte,rp0___bit 2040 ; Register bank is now 0 2041 2a3 100c bcf tmr1if__byte,tmr1if__bit 2042 ; Initialize the timer 2 module : 2043 ; tmr2ie := 0 2044 ; Switch from register bank 0 to register bank 1 (which contains tmr2ie__byte) 2045 2a4 1683 bsf rp0___byte,rp0___bit 2046 ; Register bank is now 1 2047 2a5 108c bcf tmr2ie__byte,tmr2ie__bit 2048 ; tmr2on := 0 2049 ; Switch from register bank 1 to register bank 0 (which contains tmr2on__byte) 2050 2a6 1283 bcf rp0___byte,rp0___bit 2051 ; Register bank is now 0 2052 2a7 1112 bcf tmr2on__byte,tmr2on__bit 2053 ; Postscale is 1 : 14 2054 ; toutps3 := 1 2055 2a8 1712 bsf toutps3__byte,toutps3__bit 2056 ; toutps2 := 1 2057 2a9 1692 bsf toutps2__byte,toutps2__bit 2058 ; toutps1 := 0 2059 2aa 1212 bcf toutps1__byte,toutps1__bit 2060 ; toutps0 := 1 2061 2ab 1592 bsf toutps0__byte,toutps0__bit 2062 ; Prescale is 1 : 4 2063 ; t2ckps1 := 0 2064 2ac 1092 bcf t2ckps1__byte,t2ckps1__bit 2065 ; t2ckps0 := 1 2066 2ad 1412 bsf t2ckps0__byte,t2ckps0__bit 2067 ; Initialize the Capture / Compare / PWM < CCP > module : 2068 ; CCP1X and CCP1Y are unused : 2069 ; Capture mode every falling edge : 2070 ; ccp1m3 := 0 2071 2ae 1197 bcf ccp1m3__byte,ccp1m3__bit 2072 ; ccp1m2 := 1 2073 2af 1517 bsf ccp1m2__byte,ccp1m2__bit 2074 ; ccp1m1 := 0 2075 2b0 1097 bcf ccp1m1__byte,ccp1m1__bit 2076 ; ccp1m0 := 0 2077 2b1 1017 bcf ccp1m0__byte,ccp1m0__bit 2078 ; Turn off CCP module : 2079 ; ccp1ie := 0 2080 ; Switch from register bank 0 to register bank 1 (which contains ccp1ie__byte) 2081 2b2 1683 bsf rp0___byte,rp0___bit 2082 ; Register bank is now 1 2083 2b3 110c bcf ccp1ie__byte,ccp1ie__bit 2084 ; ccp1if := 0 2085 ; Switch from register bank 1 to register bank 0 (which contains ccp1if__byte) 2086 2b4 1283 bcf rp0___byte,rp0___bit 2087 ; Register bank is now 0 2088 2b5 110c bcf ccp1if__byte,ccp1if__bit 2089 ; Initialize the comparator module : 2090 ; c2out := 0 2091 2b6 139f bcf c2out__byte,c2out__bit 2092 ; c1out := 0 2093 2b7 131f bcf c1out__byte,c1out__bit 2094 ; c2inv := 0 2095 2b8 129f bcf c2inv__byte,c2inv__bit 2096 ; c1inv := 0 2097 2b9 121f bcf c1inv__byte,c1inv__bit 2098 ; cis := 0 2099 2ba 119f bcf cis__byte,cis__bit 2100 ; cm2 := 1 2101 2bb 151f bsf cm2__byte,cm2__bit 2102 ; cm1 := 1 2103 2bc 149f bsf cm1__byte,cm1__bit 2104 ; cm0 := 1 2105 2bd 141f bsf cm0__byte,cm0__bit 2106 ; procedure initialize end 2107 2be 3400 retlw 0 2108 ; comment {The following procedures are used to send data back to the master :} 2109 2110 ; procedure send_byte start 2111 send_byte: 2112 0065 send_byte__variables__base equ global__variables__bank0+69 2113 0065 send_byte__bytes__base equ send_byte__variables__base+0 2114 0067 send_byte__bits__base equ send_byte__variables__base+2 2115 0002 send_byte__total__bytes equ 2 2116 0066 send_byte__826byte0 equ send_byte__bytes__base+1 2117 0065 send_byte__character equ send_byte__bytes__base+0 2118 ; This procedure will cause < character > to placed into 2119 ; a ring buffer for transmission . 2120 ; send_buffer ~~ {{ send_in_index }} := character 2121 2bf 0865 movf send_byte__character,w 2122 2c0 00e6 movwf send_byte__826byte0 2123 2c1 3022 movlw LOW send_buffer 2124 2c2 0720 addwf send_in_index,w 2125 2c3 0084 movwf fsr___register 2126 2c4 0866 movf send_byte__826byte0,w 2127 2c5 1383 bcf irp___register,irp___bit 2128 2c6 0080 movwf indf___register 2129 ; send_in_index := send_in_index + 1 2130 2c7 0aa0 incf send_in_index,f 2131 ; if { send_in_index >= send_buffer_size } start 2132 2c8 300a movlw 10 2133 2c9 0220 subwf send_in_index,w 2134 ; expression=`{ send_in_index >= send_buffer_size }' exp_delay=2 true_delay=1 false_delay=0 true_size=1 false_size=0 2135 2ca 1803 btfsc c___byte,c___bit 2136 ; if { send_in_index >= send_buffer_size } body start 2137 ; send_in_index := 0 2138 2cb 01a0 clrf send_in_index 2139 ; if { send_in_index >= send_buffer_size } body end 2140 ; if exp=` send_in_index >= send_buffer_size ' false skip delay=4 2141 ; Other expression=`{ send_in_index >= send_buffer_size }' delay=4 2142 ; if { send_in_index >= send_buffer_size } end 2143 ; procedure send_byte end 2144 2cc 3400 retlw 0 2145 2146 ; Register bank 0 used 71 bytes of 96 available bytes 2147 ; Register bank 1 used 0 bytes of 80 available bytes 2148 ; Register bank 2 used 0 bytes of 48 available bytes 2149 ; Register bank 3 used 0 bytes of 0 available bytes 2150 2151 end