radix dec global__variables__bank0 equ 32 global__variables__bank1 equ 160 global__variables__bank2 equ 288 global__variables__bank3 equ 496 global__bit__variables__bank0 equ 57 global__bit__variables__bank1 equ 160 global__bit__variables__bank2 equ 288 global__bit__variables__bank3 equ 496 indf___register equ 0 pcl___register equ 2 c___byte equ 3 c___bit equ 0 z___byte equ 3 z___bit equ 2 rp0___byte equ 3 rp0___bit equ 5 rp1___byte equ 3 rp1___bit equ 6 irp___byte equ 3 irp___bit equ 7 trisa___register equ 0x85 trisb___register equ 0x86 fsr___register equ 4 pclath___register equ 10 org 0 start: nop nop nop goto skip___interrupt interrupt___vector: retfie skip___interrupt: ; Initialize A/D system to allow digital I/O movlw 7 movwf 31 ; Switch from register bank 0 to register bank 1 (which contains 159) bsf rp0___byte,rp0___bit ; Register bank is now 1 clrf 159 ; Initialize TRIS registers movlw 192 movwf trisa___register movlw 207 movwf trisb___register clrf pclath___register ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 goto main ; comment ############################################################################# ; comment {} ; comment {Copyright < c > 2002 by Wayne C . Gramlich .} ; comment {All rights reserved .} ; comment {} ; comment {Permission to use , copy , modify , distribute , and sell this software} ; comment {for any purpose is hereby granted without fee provided that the above} ; comment {copyright notice and this permission are retained . The author makes} ; comment {no representations about the suitability of this software for any purpose .} ; comment {It is provided { as is } without express or implied warranty .} ; comment {} ; comment {This is code for the SonarDT1 RoboBrick at :} ; comment {} ; comment {http : / / web . gramlich . net / projects / robobricks / sonardt1 / index . html} ; comment {} ; comment {Some pin assignments :} ; comment {} ; comment {No Name Kind Description} ; comment {= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =} ; comment {1 RA2 / AN2 / VREF Digital Out LED D4} ; comment {2 RA3 / AN3 / CMP1 Digital Out LED D3} ; comment {3 RA4 / TOCKI / CMP2 Digital Out LED D2} ; comment {4 RA5 / MCLR * / THV Digital Out LED D1} ; comment {5 VSS Ground Ground} ; comment {6 RB0 / INT No Connection} ; comment {7 RB1 / RX / DT Digital In Serial In} ; comment {8 RB2 / TX / CK Digital Out Serial Out} ; comment {9 RB3 / CCP1 Digital In Echo Return} ; comment {10 RB4 / PGM Digital Out Trigger} ; comment {11 RB5 Digital Out Servo Out} ; comment {12 RB6 / T1OSO / TICK1 No Connection} ; comment {13 RB7 / T1OSI No Connection} ; comment {14 VDD Power + 5 Volts} ; comment {15 RA6 / OSC2 / CLKOUT No Connection} ; comment {16 RA7 / OSC1 / CLKIN Digital In Oscillator In} ; comment {17 RA0 / AN0 Digital Out LED D6} ; comment {18 RA1 / AN1 Digital Out LED D5} ; comment {} ; comment ############################################################################# ; processor pic16f628 cp = off cpd = off lvp = off bowden = off mclre = off pwrte = off wdte = off fosc = ec ; 16139=0x3f0b 8199=0x2007 __config 16139 configuration___address equ 8199 ; constant clock_rate 20000000 clock_rate equ 20000000 ; comment {Some character constants :} ; constant sp 32 sp equ 32 ; constant cr 13 cr equ 13 ; constant lf 10 lf equ 10 ; comment {Some register definitions :} tmr0 equ 1 status equ 3 ; bind c status @ 0 c equ status+0 c__byte equ status+0 c__bit equ 0 ; bind z status @ 2 z equ status+0 z__byte equ status+0 z__bit equ 2 intcon equ 11 ; bind gie intcon @ 7 gie equ intcon+0 gie__byte equ intcon+0 gie__bit equ 7 ; bind t0ie intcon @ 5 t0ie equ intcon+0 t0ie__byte equ intcon+0 t0ie__bit equ 5 ; bind inte intcon @ 4 inte equ intcon+0 inte__byte equ intcon+0 inte__bit equ 4 ; bind rbie intcon @ 3 rbie equ intcon+0 rbie__byte equ intcon+0 rbie__bit equ 3 ; bind t0if intcon @ 2 t0if equ intcon+0 t0if__byte equ intcon+0 t0if__bit equ 2 ; bind intf intcon @ 1 intf equ intcon+0 intf__byte equ intcon+0 intf__bit equ 1 ; bind rbif intcon @ 0 rbif equ intcon+0 rbif__byte equ intcon+0 rbif__bit equ 0 pir1 equ 12 ; bind eeif pir1 @ 7 eeif equ pir1+0 eeif__byte equ pir1+0 eeif__bit equ 7 ; bind cmif pir1 @ 6 cmif equ pir1+0 cmif__byte equ pir1+0 cmif__bit equ 6 ; bind rcif pir1 @ 5 rcif equ pir1+0 rcif__byte equ pir1+0 rcif__bit equ 5 ; bind txif pir1 @ 4 txif equ pir1+0 txif__byte equ pir1+0 txif__bit equ 4 ; bind ccp1if pir1 @ 2 ccp1if equ pir1+0 ccp1if__byte equ pir1+0 ccp1if__bit equ 2 ; bind tmr2if pir1 @ 1 tmr2if equ pir1+0 tmr2if__byte equ pir1+0 tmr2if__bit equ 1 ; bind tmr1if pir1 @ 0 tmr1if equ pir1+0 tmr1if__byte equ pir1+0 tmr1if__bit equ 0 tmr1l equ 14 tmr1h equ 15 t1con equ 16 ; bind t1ckps1 t1con @ 5 t1ckps1 equ t1con+0 t1ckps1__byte equ t1con+0 t1ckps1__bit equ 5 ; bind t1ckps0 t1con @ 4 t1ckps0 equ t1con+0 t1ckps0__byte equ t1con+0 t1ckps0__bit equ 4 ; bind t1oscen t1con @ 3 t1oscen equ t1con+0 t1oscen__byte equ t1con+0 t1oscen__bit equ 3 ; bind t1sync t1con @ 2 t1sync equ t1con+0 t1sync__byte equ t1con+0 t1sync__bit equ 2 ; bind tmr1cs t1con @ 1 tmr1cs equ t1con+0 tmr1cs__byte equ t1con+0 tmr1cs__bit equ 1 ; bind tmr1on t1con @ 0 tmr1on equ t1con+0 tmr1on__byte equ t1con+0 tmr1on__bit equ 0 tmr2 equ 17 t2con equ 18 ; bind toutps3 t2con @ 6 toutps3 equ t2con+0 toutps3__byte equ t2con+0 toutps3__bit equ 6 ; bind toutps2 t2con @ 5 toutps2 equ t2con+0 toutps2__byte equ t2con+0 toutps2__bit equ 5 ; bind toutps1 t2con @ 4 toutps1 equ t2con+0 toutps1__byte equ t2con+0 toutps1__bit equ 4 ; bind toutps0 t2con @ 3 toutps0 equ t2con+0 toutps0__byte equ t2con+0 toutps0__bit equ 3 ; bind tmr2on t2con @ 2 tmr2on equ t2con+0 tmr2on__byte equ t2con+0 tmr2on__bit equ 2 ; bind t2ckps1 t2con @ 1 t2ckps1 equ t2con+0 t2ckps1__byte equ t2con+0 t2ckps1__bit equ 1 ; bind t2ckps0 t2con @ 0 t2ckps0 equ t2con+0 t2ckps0__byte equ t2con+0 t2ckps0__bit equ 0 ccpr1l equ 21 ccpr1h equ 22 ccp1con equ 23 ; bind ccp1x ccp1con @ 5 ccp1x equ ccp1con+0 ccp1x__byte equ ccp1con+0 ccp1x__bit equ 5 ; bind ccp1y ccp1con @ 4 ccp1y equ ccp1con+0 ccp1y__byte equ ccp1con+0 ccp1y__bit equ 4 ; bind ccp1m3 ccp1con @ 3 ccp1m3 equ ccp1con+0 ccp1m3__byte equ ccp1con+0 ccp1m3__bit equ 3 ; bind ccp1m2 ccp1con @ 2 ccp1m2 equ ccp1con+0 ccp1m2__byte equ ccp1con+0 ccp1m2__bit equ 2 ; bind ccp1m1 ccp1con @ 1 ccp1m1 equ ccp1con+0 ccp1m1__byte equ ccp1con+0 ccp1m1__bit equ 1 ; bind ccp1m0 ccp1con @ 0 ccp1m0 equ ccp1con+0 ccp1m0__byte equ ccp1con+0 ccp1m0__bit equ 0 rcsta equ 24 ; bind spen rcsta @ 7 spen equ rcsta+0 spen__byte equ rcsta+0 spen__bit equ 7 ; bind rx9 rcsta @ 6 rx9 equ rcsta+0 rx9__byte equ rcsta+0 rx9__bit equ 6 ; bind sren rcsta @ 5 sren equ rcsta+0 sren__byte equ rcsta+0 sren__bit equ 5 ; bind cren rcsta @ 4 cren equ rcsta+0 cren__byte equ rcsta+0 cren__bit equ 4 ; bind aden rcsta @ 3 aden equ rcsta+0 aden__byte equ rcsta+0 aden__bit equ 3 ; bind ferr rcsta @ 2 ferr equ rcsta+0 ferr__byte equ rcsta+0 ferr__bit equ 2 ; bind oerr rcsta @ 1 oerr equ rcsta+0 oerr__byte equ rcsta+0 oerr__bit equ 1 ; bind rx9d rcsta @ 0 rx9d equ rcsta+0 rx9d__byte equ rcsta+0 rx9d__bit equ 0 txreg equ 25 rcreg equ 26 ; comment {Comparator module control :} cmcon equ 31 ; bind c2out cmcon @ 7 c2out equ cmcon+0 c2out__byte equ cmcon+0 c2out__bit equ 7 ; bind c1out cmcon @ 6 c1out equ cmcon+0 c1out__byte equ cmcon+0 c1out__bit equ 6 ; bind c2inv cmcon @ 5 c2inv equ cmcon+0 c2inv__byte equ cmcon+0 c2inv__bit equ 5 ; bind c1inv cmcon @ 4 c1inv equ cmcon+0 c1inv__byte equ cmcon+0 c1inv__bit equ 4 ; bind cis cmcon @ 3 cis equ cmcon+0 cis__byte equ cmcon+0 cis__bit equ 3 ; bind cm2 cmcon @ 2 cm2 equ cmcon+0 cm2__byte equ cmcon+0 cm2__bit equ 2 ; bind cm1 cmcon @ 1 cm1 equ cmcon+0 cm1__byte equ cmcon+0 cm1__bit equ 1 ; bind cm0 cmcon @ 0 cm0 equ cmcon+0 cm0__byte equ cmcon+0 cm0__bit equ 0 option equ 129 ; bind t0cs option @ 5 t0cs equ option+0 t0cs__byte equ option+0 t0cs__bit equ 5 ; bind t0se option @ 4 t0se equ option+0 t0se__byte equ option+0 t0se__bit equ 4 ; bind psa option @ 3 psa equ option+0 psa__byte equ option+0 psa__bit equ 3 ; bind ps2 option @ 2 ps2 equ option+0 ps2__byte equ option+0 ps2__bit equ 2 ; bind ps1 option @ 1 ps1 equ option+0 ps1__byte equ option+0 ps1__bit equ 1 ; bind ps0 option @ 0 ps0 equ option+0 ps0__byte equ option+0 ps0__bit equ 0 pie1 equ 140 ; bind eeie pie1 @ 7 eeie equ pie1+0 eeie__byte equ pie1+0 eeie__bit equ 7 ; bind cmie pie1 @ 6 cmie equ pie1+0 cmie__byte equ pie1+0 cmie__bit equ 6 ; bind rcie pie1 @ 5 rcie equ pie1+0 rcie__byte equ pie1+0 rcie__bit equ 5 ; bind txie pie1 @ 4 txie equ pie1+0 txie__byte equ pie1+0 txie__bit equ 4 ; bind ccp1ie pie1 @ 2 ccp1ie equ pie1+0 ccp1ie__byte equ pie1+0 ccp1ie__bit equ 2 ; bind tmr2ie pie1 @ 1 tmr2ie equ pie1+0 tmr2ie__byte equ pie1+0 tmr2ie__bit equ 1 ; bind tmr1ie pie1 @ 0 tmr1ie equ pie1+0 tmr1ie__byte equ pie1+0 tmr1ie__bit equ 0 pr2 equ 146 txsta equ 152 ; bind tx9 txsta @ 6 tx9 equ txsta+0 tx9__byte equ txsta+0 tx9__bit equ 6 ; bind txen txsta @ 5 txen equ txsta+0 txen__byte equ txsta+0 txen__bit equ 5 ; bind sync txsta @ 4 sync equ txsta+0 sync__byte equ txsta+0 sync__bit equ 4 ; bind brgh txsta @ 2 brgh equ txsta+0 brgh__byte equ txsta+0 brgh__bit equ 2 ; bind trmt txsta @ 1 trmt equ txsta+0 trmt__byte equ txsta+0 trmt__bit equ 1 ; bind tx9d txsta @ 0 tx9d equ txsta+0 tx9d__byte equ txsta+0 tx9d__bit equ 0 spbrg equ 153 ; comment {Some port , bit , and pin definitions :} ; comment {Port A pin assignments :} ; comment {RA0 : LED D6} ; comment {RA1 : LED D5} ; comment {RA2 : LED D4} ; comment {RA3 : LED D3} ; comment {RA4 : LED D2} ; comment {RA5 : LED D1} ; comment {RA6 : No / Connection} ; comment {RA7 : Oscillator In} ; constant led6_bit 0 led6_bit equ 0 ; constant led5_bit 1 led5_bit equ 1 ; constant led4_bit 2 led4_bit equ 2 ; constant led3_bit 3 led3_bit equ 3 ; constant led2_bit 4 led2_bit equ 4 ; constant led1_bit 5 led1_bit equ 5 ; constant nc1_bit 6 nc1_bit equ 6 ; constant osc_in_bit 7 osc_in_bit equ 7 porta equ 5 led6__byte equ 5 led6__bit equ 0 led5__byte equ 5 led5__bit equ 1 led4__byte equ 5 led4__bit equ 2 led3__byte equ 5 led3__bit equ 3 led2__byte equ 5 led2__bit equ 4 led1__byte equ 5 led1__bit equ 5 nc1__byte equ 5 nc1__bit equ 6 osc_in__byte equ 5 osc_in__bit equ 7 ; comment {Port B pin assignments :} ; comment {RB0 : No Connection} ; comment {RB1 : Serial Input < RX >} ; comment {RB2 : Serial Output < TX >} ; comment {RB3 : Echo Return} ; comment {RB4 : Trigger} ; comment {RB5 : Servo Out} ; comment {RB6 : No_Connection} ; comment {RB7 : No_Connection} ; constant nc2_bit 0 nc2_bit equ 0 ; constant rx_bit 1 rx_bit equ 1 ; constant tx_bit 2 tx_bit equ 2 ; constant echo_return_bit 3 echo_return_bit equ 3 ; constant trigger_bit 4 trigger_bit equ 4 ; constant servo_out_bit 5 servo_out_bit equ 5 ; constant nc3_bit 6 nc3_bit equ 6 ; constant nc4_bit 7 nc4_bit equ 7 portb equ 6 nc2__byte equ 6 nc2__bit equ 0 ; comment {When using the USART , both the TX and RX pins must be set to input :} tx_pin__byte equ 6 tx_pin__bit equ 2 rx_pin__byte equ 6 rx_pin__bit equ 1 echo_return__byte equ 6 echo_return__bit equ 3 trigger__byte equ 6 trigger__bit equ 4 servo_out__byte equ 6 servo_out__bit equ 5 nc3__byte equ 6 nc3__bit equ 6 nc4__byte equ 6 nc4__bit equ 7 send_in_index equ global__variables__bank0+0 send_out_index equ global__variables__bank0+1 ; constant send_buffer_size 10 send_buffer_size equ 10 send_buffer equ global__variables__bank0+2 ; comment {This code basically has to do 3 things :} ; comment {} ; comment {1 > It has to keep listening for commands from the serial input .} ; comment {2 > It has to be able to keep a servo pulse of length . 5 ms to 2 . 0 ms} ; comment {coming out every 20 ms or so .} ; comment {3 > It has to trigger an sonar pulse , and time the resultant period} ; comment {until the echo is heard < 100 uSec to 36 mSec > .} ; comment {} ; comment {Timer 0 is hooked up to the clock / 4 and then run through the 256} ; comment {prescaler . With the clock running at 20 MHz , divided by 4 and again} ; comment {by 256 leaves a clock frequency of 19531 Hz . 20 ms is a refresh rate} ; comment {of 50 Hz . So , 19531 / 50 is 390 . 62 , or 390 . 390 does not quite fit} ; comment {into 8 - bit , so we divide it by 2 to get 195 . So , we wait for the} ; comment {Timer 0 flag to count through 195 twice , before triggering servo} ; comment {pulse .} glitch equ global__variables__bank0+12 id_index equ global__variables__bank0+13 ; string_constants Start string___fetch: movwf pcl___register ; id = 1 , 0 , 29 , 0 , 0 , 0 , 0 , 0 , 0r'16' , 8 , 0s'SonarDT1' , 15 , 0s'Gramlich&Benson' id___string equ 0 id: addwf pcl___register,f ; Length = 49 retlw 49 ; 1 retlw 1 ; 0 retlw 0 ; 29 retlw 29 ; 0 retlw 0 ; 0 retlw 0 ; 0 retlw 0 ; 0 retlw 0 ; 0 retlw 0 ; 0r'16' retlw 142 ; random number retlw 102 ; random number retlw 243 ; random number retlw 250 ; random number retlw 234 ; random number retlw 100 ; random number retlw 157 ; random number retlw 93 ; random number retlw 91 ; random number retlw 23 ; random number retlw 100 ; random number retlw 215 ; random number retlw 235 ; random number retlw 52 ; random number retlw 41 ; random number retlw 151 ; random number ; 8 retlw 8 ; `SonarDT1' retlw 83 retlw 111 retlw 110 retlw 97 retlw 114 retlw 68 retlw 84 retlw 49 ; 15 retlw 15 ; `Gramlich&Benson' retlw 71 retlw 114 retlw 97 retlw 109 retlw 108 retlw 105 retlw 99 retlw 104 retlw 38 retlw 66 retlw 101 retlw 110 retlw 115 retlw 111 retlw 110 ; string__constants End ; procedure main start main: main__variables__base equ global__variables__bank0+14 main__bytes__base equ main__variables__base+0 main__bits__base equ main__variables__base+7 main__total__bytes equ 8 main__453byte1 equ main__bytes__base+6 main__404byte1 equ main__bytes__base+6 main__324byte0 equ main__bytes__base+6 main__445byte1 equ main__bytes__base+6 main__419byte1 equ main__bytes__base+6 main__419byte2 equ main__bytes__base+6 main__400byte0 equ main__bytes__base+6 main__327byte0 equ main__bytes__base+6 ; arguments_none main__command equ main__bytes__base+0 main__continuous equ main__bits__base+0 main__continuous__byte equ main__bits__base+0 main__continuous__bit equ 0 main__counter equ main__bytes__base+1 main__distance_high equ main__bytes__base+2 main__distance_low equ main__bytes__base+3 main__phase equ main__bits__base+0 main__phase__byte equ main__bits__base+0 main__phase__bit equ 2 main__result equ main__bytes__base+4 main__servo equ main__bytes__base+5 main__servo_enable equ main__bits__base+0 main__servo_enable__byte equ main__bits__base+0 main__servo_enable__bit equ 4 ; call initialize {{ }} call initialize ; Initialize ring buffer : ; send_in_index := 0 clrf send_in_index ; send_out_index := 0 clrf send_out_index ; continuous := 1 bsf main__continuous__byte,main__continuous__bit ; servo := 0x80 movlw 128 movwf main__servo ; servo_enable := 1 bsf main__servo_enable__byte,main__servo_enable__bit ; glitch := 0 clrf glitch ; id_index := 0 clrf id_index ; Main loop ; loop_forever ... start main__281loop__forever: ; Deal with timer 0 : ; if { t0if && servo_enable } start ; expression=`t0if' exp_delay=0 true_delay=-1 false_delay=2 true_size=18 false_size=1 btfss t0if__byte,t0if__bit goto and283__0false ; expression=`servo_enable' exp_delay=0 true_delay=-1 false_delay=0 true_size=16 false_size=0 btfss main__servo_enable__byte,main__servo_enable__bit goto label283__1end and283__0true: ; if { t0if && servo_enable } body start ; t0if := 0 bcf t0if__byte,t0if__bit ; counter := counter - 1 decf main__counter,f ; if { c } start ; expression=`{ c }' exp_delay=0 true_delay=-1 false_delay=0 true_size=12 false_size=0 btfss c__byte,c__bit goto label286__0end ; if { c } body start ; See discussion above to see where 195 comes from : ; counter := 195 movlw 195 movwf main__counter ; if { phase } start ; expression=`{ phase }' exp_delay=0 true_delay=1 false_delay=6 true_size=1 false_size=6 btfss main__phase__byte,main__phase__bit goto label289__0false label289__0true: ; if { phase } body start ; phase := 0 bcf main__phase__byte,main__phase__bit ; if { phase } body end goto label289__0end label289__0false: ; else body start ; phase := 1 bsf main__phase__byte,main__phase__bit ; Now it is time to squirt out a servo pulse : ; servo_out := 1 bsf servo_out__byte,servo_out__bit ; Now use Timer2 to control pulse width : ; pr2 := servo movf main__servo,w ; Switch from register bank 0 to register bank 1 (which contains pr2) bsf rp0___byte,rp0___bit ; Register bank is now 1 movwf pr2 ; tmr2 := 0 ; Switch from register bank 1 to register bank 0 (which contains tmr2) bcf rp0___byte,rp0___bit ; Register bank is now 0 clrf tmr2 ; tmr2on := 1 bsf tmr2on__byte,tmr2on__bit ; else body end ; if exp=`phase' generic label289__0end: ; Other expression=`{ phase }' delay=-1 ; if { phase } end ; if { c } body end label286__0end: ; if exp=`c' empty false ; Other expression=`{ c }' delay=-1 ; if { c } end ; if { t0if && servo_enable } body end label283__1end: ; if exp=`servo_enable' empty false ; Other expression=`servo_enable' delay=-1 ; if exp=`t0if' false goto ; Other expression=`t0if' delay=-1 and283__0false: and283__0end: ; if { t0if && servo_enable } end ; Deal with turning off servo pulse : ; if { tmr2if } start ; expression=`{ tmr2if }' exp_delay=0 true_delay=3 false_delay=0 true_size=3 false_size=0 btfss tmr2if__byte,tmr2if__bit goto label306__0end ; if { tmr2if } body start ; tmr2if := 0 bcf tmr2if__byte,tmr2if__bit ; servo_out := 0 bcf servo_out__byte,servo_out__bit ; tmr2on := 0 bcf tmr2on__byte,tmr2on__bit ; if { tmr2if } body end label306__0end: ; if exp=`tmr2if' empty false ; Other expression=`{ tmr2if }' delay=-1 ; if { tmr2if } end ; See whether we can transmit a character : ; if { send_in_index != send_out_index && txif } start movf send_in_index,w subwf send_out_index,w ; expression=`send_in_index != send_out_index' exp_delay=2 true_delay=-1 false_delay=2 true_size=13 false_size=1 btfsc z___byte,z___bit goto and313__0false ; expression=`txif' exp_delay=0 true_delay=11 false_delay=0 true_size=11 false_size=0 btfss txif__byte,txif__bit goto label313__1end and313__0true: ; if { send_in_index != send_out_index && txif } body start ; txreg := send_buffer ~~ {{ send_out_index }} movlw LOW send_buffer addwf send_out_index,w movwf fsr___register bcf irp___register,irp___bit movf indf___register,w movwf txreg ; send_out_index := send_out_index + 1 incf send_out_index,f ; if { send_out_index >= send_buffer_size } start movlw 10 subwf send_out_index,w ; expression=`{ send_out_index >= send_buffer_size }' exp_delay=2 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc c___byte,c___bit ; if { send_out_index >= send_buffer_size } body start ; send_out_index := 0 clrf send_out_index ; if { send_out_index >= send_buffer_size } body end ; if exp=` send_out_index >= send_buffer_size ' false skip delay=4 ; Other expression=`{ send_out_index >= send_buffer_size }' delay=4 ; if { send_out_index >= send_buffer_size } end ; if { send_in_index != send_out_index && txif } body end label313__1end: ; if exp=`txif' empty false ; Other expression=`txif' delay=-1 ; if exp=`send_in_index != send_out_index' false goto ; Other expression=`send_in_index != send_out_index' delay=-1 and313__0false: and313__0end: ; if { send_in_index != send_out_index && txif } end ; See whether we ' ve got a character : ; if { rcif } start ; expression=`{ rcif }' exp_delay=0 true_delay=158 false_delay=0 true_size=137 false_size=0 btfss rcif__byte,rcif__bit goto label322__0end ; if { rcif } body start ; command := rcreg movf rcreg,w movwf main__command ; switch { command >> 6 } movlw HIGH switch__324block_start movwf pclath___register swapf main__command,w movwf main__324byte0 rrf main__324byte0,f rrf main__324byte0,w andlw 3 ; case 0 ; case 1 ; case 2 ; case 3 switch__324block_start: addwf pcl___register,f goto switch__324block325 goto switch__324block411 goto switch__324block414 goto switch__324block417 switch__324block_end: ; switch_check 324 switch__324block_start switch__324block_end switch__324block325: ; Do Nothing : ; switch { {{ command >> 3 }} & 7 } movlw HIGH switch__327block_start movwf pclath___register rrf main__command,w movwf main__327byte0 rrf main__327byte0,f rrf main__327byte0,w andlw 7 ; case 0 ; case 1 ; case 2 3 ; case 4 5 switch__327block_start: addwf pcl___register,f goto switch__327block328 goto switch__327block368 goto switch__327block398 goto switch__327block398 goto switch__327block402 goto switch__327block402 goto switch__327default406 goto switch__327default406 switch__327block_end: ; switch_check 327 switch__327block_start switch__327block_end switch__327block328: ; Command = 0000 0 xxx ; switch { command & 7 } movlw HIGH switch__330block_start movwf pclath___register movlw 7 andwf main__command,w ; case 0 ; case 1 ; case 2 ; case 3 ; case 4 ; case 5 ; case 6 ; case 7 switch__330block_start: addwf pcl___register,f goto switch__330block331 goto switch__330block335 goto switch__330block339 goto switch__330block344 goto switch__330block348 goto switch__330block352 goto switch__330block356 goto switch__330block361 switch__330block_end: ; switch_check 330 switch__330block_start switch__330block_end switch__330block331: ; Read Distance Low < Command = 0000 0000 > : ; call send_byte {{ distance_low }} movf main__distance_low,w movwf send_byte__character call send_byte goto switch__330end switch__330block335: ; Read Distance High < Command = 0000 0001 > : ; call send_byte {{ distance_high }} movf main__distance_high,w movwf send_byte__character call send_byte goto switch__330end switch__330block339: ; Read Distance Low and High < Command = 0000 0010 > : ; call send_byte {{ distance_low }} movf main__distance_low,w movwf send_byte__character call send_byte ; call send_byte {{ distance_high }} movf main__distance_high,w movwf send_byte__character call send_byte goto switch__330end switch__330block344: ; Trigger Distance Measurement < Command 0000 0011 > : ; tmr1on := 1 bsf tmr1on__byte,tmr1on__bit goto switch__330end switch__330block348: ; Disable Servo < Command 0000 0100 > : ; servo_enable := 0 bcf main__servo_enable__byte,main__servo_enable__bit goto switch__330end switch__330block352: ; Enable Servo < Command 0000 0101 > : ; servo_enable := 1 bsf main__servo_enable__byte,main__servo_enable__bit goto switch__330end switch__330block356: ; Disable Continuous Measurement < Command 0000 0110 > : ; continuous := 0 bcf main__continuous__byte,main__continuous__bit ; tmr1on := 0 bcf tmr1on__byte,tmr1on__bit goto switch__330end switch__330block361: ; Enable Continuous Measurement < Command 0000 0111 > : ; continuous := 1 bsf main__continuous__byte,main__continuous__bit ; tmr1on := 1 bsf tmr1on__byte,tmr1on__bit switch__330end: goto switch__327end switch__327block368: ; switch { command & 7 } movlw HIGH switch__369block_start movwf pclath___register movlw 7 andwf main__command,w ; case 0 ; case 1 ; case 2 ; case 3 switch__369block_start: addwf pcl___register,f goto switch__369block370 goto switch__369block374 goto switch__369block378 goto switch__369block382 goto switch__369default393 goto switch__369default393 goto switch__369default393 goto switch__369default393 switch__369block_end: ; switch_check 369 switch__369block_start switch__369block_end switch__369block370: ; Increment Servo < Command 0000 1000 > : ; servo := servo + 1 incf main__servo,f goto switch__369end switch__369block374: ; Decrement Servo < Command 0000 1001 > : ; servo := servo - 1 decf main__servo,f goto switch__369end switch__369block378: ; Increment Servo < Command 0000 1010 > : ; call send_byte {{ servo }} movf main__servo,w movwf send_byte__character call send_byte goto switch__369end switch__369block382: ; Decrement Servo < Command 0000 1011 > : ; result := 0 clrf main__result ; if { servo_enable } start ; expression=`{ servo_enable }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc main__servo_enable__byte,main__servo_enable__bit ; if { servo_enable } body start ; result @ 0 := 1 ; Select result @ 0 main__result__386select0 equ main__result+0 main__result__386select0__byte equ main__result+0 main__result__386select0__bit equ 0 bsf main__result__386select0__byte,main__result__386select0__bit ; if { servo_enable } body end ; if exp=`servo_enable' false skip delay=2 ; Other expression=`{ servo_enable }' delay=2 ; if { servo_enable } end ; if { continuous } start ; expression=`{ continuous }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc main__continuous__byte,main__continuous__bit ; if { continuous } body start ; result @ 1 := 1 ; Select result @ 1 main__result__389select0 equ main__result+0 main__result__389select0__byte equ main__result+0 main__result__389select0__bit equ 1 bsf main__result__389select0__byte,main__result__389select0__bit ; if { continuous } body end ; if exp=`continuous' false skip delay=2 ; Other expression=`{ continuous }' delay=2 ; if { continuous } end ; call send_byte {{ result }} movf main__result,w movwf send_byte__character call send_byte goto switch__369end switch__369default393: ; Do nothing switch__369end: goto switch__327end switch__327block398: ; Set Servo Low < Command 0001 llll > : ; servo := servo & 0xf0 | command & 0xf movlw 240 andwf main__servo,w movwf main__400byte0 movlw 15 andwf main__command,w iorwf main__400byte0,w movwf main__servo goto switch__327end switch__327block402: ; Set Servo High < Command 0010 hhhh > : ; servo := servo & 0xf | command << 4 movlw 15 andwf main__servo,w movwf main__404byte1 swapf main__command,w andlw 240 iorwf main__404byte1,w movwf main__servo goto switch__327end switch__327default406: ; Do Nothing : switch__327end: goto switch__324end switch__324block411: ; Do Nothing : goto switch__324end switch__324block414: ; Do Nothing : goto switch__324end switch__324block417: ; Do shared commands : ; if { command >> 3 & 7 = 7 } start rrf main__command,w movwf main__419byte2 rrf main__419byte2,f rrf main__419byte2,w andlw 7 movwf main__419byte1 movlw 7 subwf main__419byte1,w ; expression=`{ command >> 3 & 7 = 7 }' exp_delay=9 true_delay=1 false_delay=0 true_size=3 false_size=0 btfss z___byte,z___bit goto label419__3end ; if { command >> 3 & 7 = 7 } body start ; call do_shared {{ command }} movf main__command,w movwf do_shared__command call do_shared ; if { command >> 3 & 7 = 7 } body end label419__3end: ; if exp=` command >> 3 & 7 = 7 ' empty false ; Other expression=`{ command >> 3 & 7 = 7 }' delay=-1 ; if { command >> 3 & 7 = 7 } end switch__324end: ; if { rcif } body end label322__0end: ; if exp=`rcif' empty false ; Other expression=`{ rcif }' delay=-1 ; if { rcif } end ; Read the captured distance : ; if { ccp1if } start ; expression=`{ ccp1if }' exp_delay=0 true_delay=10 false_delay=0 true_size=10 false_size=0 btfss ccp1if__byte,ccp1if__bit goto label427__0end ; if { ccp1if } body start ; ccp1if := 0 bcf ccp1if__byte,ccp1if__bit ; distance_high := ccpr1h movf ccpr1h,w movwf main__distance_high ; distance_low := ccpr1l movf ccpr1l,w movwf main__distance_low ; Make distance visible in LED ' s : ; porta := 0xff ^ ccpr1h movlw 255 xorwf ccpr1h,w movwf porta ; if { ! continuous } start ; expression=`continuous' exp_delay=0 true_delay=0 false_delay=1 true_size=0 false_size=1 btfss main__continuous__byte,main__continuous__bit ; if { ! continuous } body start ; tmr1on := 0 bcf tmr1on__byte,tmr1on__bit ; if { ! continuous } body end ; if exp=`continuous' true skip delay=2 ; Other expression=`continuous' delay=2 ; if { ! continuous } end ; if { ccp1if } body end label427__0end: ; if exp=`ccp1if' empty false ; Other expression=`{ ccp1if }' delay=-1 ; if { ccp1if } end ; See whether we need to generate another trigger pulse : ; if { tmr1if } start ; expression=`{ tmr1if }' exp_delay=0 true_delay=54 false_delay=0 true_size=18 false_size=0 btfss tmr1if__byte,tmr1if__bit goto label441__0end ; if { tmr1if } body start ; Make sure trigger is low for at least 10 uSec : ; tmr1if := 0 bcf tmr1if__byte,tmr1if__bit ; delay 25 ... start ; optimize 0 ; Uniform delay remaining = 25 Accumulated Delay = 0 ; tmr1on := 0 bcf tmr1on__byte,tmr1on__bit ; Uniform delay remaining = 24 Accumulated Delay = 1 ; tmr1l := 0 clrf tmr1l ; Uniform delay remaining = 23 Accumulated Delay = 2 ; tmr1h := 0 clrf tmr1h ; Uniform delay remaining = 22 Accumulated Delay = 3 ; Uniform delay remaining = 22 Accumulated Delay = 3 ; Delay 22 cycles movlw 7 movwf main__445byte1 main__445delay0: decfsz main__445byte1,f goto main__445delay0 ; optimize 1 ; delay 25 ... end ; Fire trigger for 10 uSec : ; trigger := 1 bsf trigger__byte,trigger__bit ; delay 25 ... start ; optimize 0 ; Uniform delay remaining = 25 Accumulated Delay = 0 ; ccp1if := 0 bcf ccp1if__byte,ccp1if__bit ; Uniform delay remaining = 24 Accumulated Delay = 1 ; Uniform delay remaining = 24 Accumulated Delay = 1 ; Delay 24 cycles movlw 7 movwf main__453byte1 main__453delay0: decfsz main__453byte1,f goto main__453delay0 nop nop ; optimize 1 ; delay 25 ... end ; Turn the timer on when trigger goes low : ; trigger := 0 bcf trigger__byte,trigger__bit ; tmr1on := 1 bsf tmr1on__byte,tmr1on__bit ; if { tmr1if } body end label441__0end: ; if exp=`tmr1if' empty false ; Other expression=`{ tmr1if }' delay=-1 ; if { tmr1if } end goto main__281loop__forever ; loop_forever ... end ; procedure main end ; procedure do_shared start do_shared: do_shared__variables__base equ global__variables__bank0+22 do_shared__bytes__base equ do_shared__variables__base+0 do_shared__bits__base equ do_shared__variables__base+1 do_shared__total__bytes equ 1 do_shared__command equ do_shared__bytes__base+0 ; Command 1111 1 xxx : ; switch { command & 7 } movlw HIGH switch__470block_start movwf pclath___register movlw 7 andwf do_shared__command,w ; case 0 ; case 1 ; case 2 ; case 3 ; case 4 ; case 5 ; case 6 ; case 7 switch__470block_start: addwf pcl___register,f goto switch__470block471 goto switch__470block474 goto switch__470block477 goto switch__470block481 goto switch__470block485 goto switch__470block493 goto switch__470block497 goto switch__470block502 switch__470block_end: ; switch_check 470 switch__470block_start switch__470block_end switch__470block471: ; Clock Decrement < Command 1111 1 xxx > : goto switch__470end switch__470block474: ; Clock Increment < Command 1111 1 xxx > : goto switch__470end switch__470block477: ; Clock Read < Command 1111 1 xxx > : ; call send_byte {{ 0 }} clrf send_byte__character call send_byte goto switch__470end switch__470block481: ; Clock Pulse < Command 1111 1 xxx > : ; call send_byte {{ 0 }} clrf send_byte__character call send_byte goto switch__470end switch__470block485: ; Id Next < Command 1111 1 xxx > : ; call send_byte {{ id ~~ {{ id_index }} }} incf id_index,w clrf pclath___register call id movwf send_byte__character call send_byte ; id_index := id_index + 1 incf id_index,f ; if { id_index >= id . size } start movlw 49 subwf id_index,w ; expression=`{ id_index >= id . size }' exp_delay=2 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc c___byte,c___bit ; if { id_index >= id . size } body start ; id_index := 0 clrf id_index ; if { id_index >= id . size } body end ; if exp=` id_index >= id . size ' false skip delay=4 ; Other expression=`{ id_index >= id . size }' delay=4 ; if { id_index >= id . size } end goto switch__470end switch__470block493: ; Id Reset < Command 1111 1 xxx > : ; id_index := 0 clrf id_index goto switch__470end switch__470block497: ; Glitch Read < Command 1111 1110 > : ; call send_byte {{ glitch }} movf glitch,w movwf send_byte__character call send_byte ; glitch := 0 clrf glitch goto switch__470end switch__470block502: ; Glitch < Command 1111 1111 > : ; glitch := glitch + 1 incf glitch,f switch__470end: ; procedure do_shared end retlw 0 ; procedure initialize start initialize: initialize__variables__base equ global__variables__bank0+23 initialize__bytes__base equ initialize__variables__base+0 initialize__bits__base equ initialize__variables__base+0 initialize__total__bytes equ 0 ; arguments_none ; Get all interrupts turned off : ; intcon := 0 clrf intcon ; pie1 := 0 ; Switch from register bank 0 to register bank 1 (which contains pie1) bsf rp0___byte,rp0___bit ; Register bank is now 1 clrf pie1 ; pir1 := 0 ; Switch from register bank 1 to register bank 0 (which contains pir1) bcf rp0___byte,rp0___bit ; Register bank is now 0 clrf pir1 ; Initialize UART : ; Prescaler = low : ; brgh := 0 ; Switch from register bank 0 to register bank 1 (which contains brgh__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf brgh__byte,brgh__bit ; Baud rate = 2400 baud : ; spbrg := 129 movlw 129 movwf spbrg ; Asynchronous mode : ; sync := 0 bcf sync__byte,sync__bit ; 8 - bit mode : ; tx9 := 0 bcf tx9__byte,tx9__bit ; Serial Port Enable : ; spen := 1 ; Switch from register bank 1 to register bank 0 (which contains spen__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bsf spen__byte,spen__bit ; Keep interrupts off : ; txie := 0 ; Switch from register bank 0 to register bank 1 (which contains txie__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf txie__byte,txie__bit ; Clear out an previous character . ; txif := 0 ; Switch from register bank 1 to register bank 0 (which contains txif__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf txif__byte,txif__bit ; Enable the transmitter : ; txen := 1 ; Switch from register bank 0 to register bank 1 (which contains txen__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bsf txen__byte,txen__bit ; Enable the receiver : ; Keep inerrupts off : ; rcie := 0 bcf rcie__byte,rcie__bit ; Enable continuous reception : ; cren := 1 ; Switch from register bank 1 to register bank 0 (which contains cren__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bsf cren__byte,cren__bit ; Enable single receptions : ; sren := 1 bsf sren__byte,sren__bit ; Disable address ; aden := 0 bcf aden__byte,aden__bit ; Initialize the timer 0 module : ; t0cs := 0 ; Switch from register bank 0 to register bank 1 (which contains t0cs__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf t0cs__byte,t0cs__bit ; psa := 0 bcf psa__byte,psa__bit ; ps2 := 1 bsf ps2__byte,ps2__bit ; ps1 := 1 bsf ps1__byte,ps1__bit ; ps0 := 1 bsf ps0__byte,ps0__bit ; Initialize the timer 1 module : ; Prescale = 1 : 2 ; t1ckps1 := 0 ; Switch from register bank 1 to register bank 0 (which contains t1ckps1__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf t1ckps1__byte,t1ckps1__bit ; t1ckps0 := 1 bsf t1ckps0__byte,t1ckps0__bit ; Disable oscillator : ; t1oscen := 0 bcf t1oscen__byte,t1oscen__bit ; T1SYNC not used when TMR1CS = 0 : ; t1sync := 0 ; Internal clock : ; tmr1cs := 0 bcf tmr1cs__byte,tmr1cs__bit ; Turn timer off : ; tmr1on := 1 bsf tmr1on__byte,tmr1on__bit ; Clear interrupt flags : ; tmr1ie := 0 ; Switch from register bank 0 to register bank 1 (which contains tmr1ie__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf tmr1ie__byte,tmr1ie__bit ; tmr1if := 0 ; Switch from register bank 1 to register bank 0 (which contains tmr1if__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf tmr1if__byte,tmr1if__bit ; Initialize the timer 2 module : ; tmr2ie := 0 ; Switch from register bank 0 to register bank 1 (which contains tmr2ie__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf tmr2ie__byte,tmr2ie__bit ; tmr2on := 0 ; Switch from register bank 1 to register bank 0 (which contains tmr2on__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf tmr2on__byte,tmr2on__bit ; Postscale is 1 : 14 ; toutps3 := 1 bsf toutps3__byte,toutps3__bit ; toutps2 := 1 bsf toutps2__byte,toutps2__bit ; toutps1 := 0 bcf toutps1__byte,toutps1__bit ; toutps0 := 1 bsf toutps0__byte,toutps0__bit ; Prescale is 1 : 4 ; t2ckps1 := 0 bcf t2ckps1__byte,t2ckps1__bit ; t2ckps0 := 1 bsf t2ckps0__byte,t2ckps0__bit ; Initialize the Capture / Compare / PWM < CCP > module : ; CCP1X and CCP1Y are unused : ; Capture mode every falling edge : ; ccp1m3 := 0 bcf ccp1m3__byte,ccp1m3__bit ; ccp1m2 := 1 bsf ccp1m2__byte,ccp1m2__bit ; ccp1m1 := 0 bcf ccp1m1__byte,ccp1m1__bit ; ccp1m0 := 0 bcf ccp1m0__byte,ccp1m0__bit ; Turn off CCP module : ; ccp1ie := 0 ; Switch from register bank 0 to register bank 1 (which contains ccp1ie__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf ccp1ie__byte,ccp1ie__bit ; ccp1if := 0 ; Switch from register bank 1 to register bank 0 (which contains ccp1if__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf ccp1if__byte,ccp1if__bit ; procedure initialize end retlw 0 ; comment {The following procedures are used to send data back to the master :} ; procedure send_byte start send_byte: send_byte__variables__base equ global__variables__bank0+23 send_byte__bytes__base equ send_byte__variables__base+0 send_byte__bits__base equ send_byte__variables__base+2 send_byte__total__bytes equ 2 send_byte__605byte0 equ send_byte__bytes__base+1 send_byte__character equ send_byte__bytes__base+0 ; This procedure will cause < character > to placed into ; a ring buffer for transmission . ; send_buffer ~~ {{ send_in_index }} := character movf send_byte__character,w movwf send_byte__605byte0 movlw LOW send_buffer addwf send_in_index,w movwf fsr___register movf send_byte__605byte0,w bcf irp___register,irp___bit movwf indf___register ; send_in_index := send_in_index + 1 incf send_in_index,f ; if { send_in_index >= send_buffer_size } start movlw 10 subwf send_in_index,w ; expression=`{ send_in_index >= send_buffer_size }' exp_delay=2 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc c___byte,c___bit ; if { send_in_index >= send_buffer_size } body start ; send_in_index := 0 clrf send_in_index ; if { send_in_index >= send_buffer_size } body end ; if exp=` send_in_index >= send_buffer_size ' false skip delay=4 ; Other expression=`{ send_in_index >= send_buffer_size }' delay=4 ; if { send_in_index >= send_buffer_size } end ; procedure send_byte end retlw 0 ; Register bank 0 used 25 bytes of 96 available bytes ; Register bank 1 used 0 bytes of 80 available bytes ; Register bank 2 used 0 bytes of 48 available bytes ; Register bank 3 used 0 bytes of 0 available bytes end