radix dec ; Code bank 0; Start address: 0; End address: 1023 org 0 ; Define start addresses for data regions shared___globals equ 32 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # ***************************************************************************** ; # ; # Copyright (c) 2000-2004 by Wayne Gramlich ; # All rights reserved. ; # ; # This is the code that implements the Servo4 module. Basically ; # it just waits for commands that come in at 2400 baud and responds ; # to them. See: ; # ; # http://web.gramlich.net/projects/robobricks/servo4/index.html ; # ; # for more details. ; # ; # ***************************************************************************** ; # ***************************************************************************** ; # ; # This code is pretty complicated. It has the goals of properly responding ; # to commands sent 2400 baud and keeping up to 4 servos on position without ; # any sevro chatter. ; # ; # The output waveforms from the chip look basically as follows: ; # ; # servo0 __[XX]____________________________[XX]__________________________ ; # servo1 __________[XX]____________________________[XX]__________________ ; # servo2 __________________[XX]____________________________[XX]__________ ; # servo3 __________________________[XX]____________________________[XX]__ ; # ; # The basic unit of timing is the "tick", which is definded as 1/3 of ; # a bit time at 2400 baud, or 1/(3*2400), or .138ms or 138us. The code ; # uses 32 ticks to service one servo, 32/(3*2400) = 4.44ms. Since there ; # are 4 servos, the total cycle time is (4*32*)/(3*2400) = 17.7ms. This ; # is called the "frame rate" and is just a tiny bit shorter than the ; # target of 20ms. ; # ; # Initially, the servo4 code was carefully crafted to generate ; # pulses that went from 1ms-2ms for each servo. Unfortunately, ; # most servos only go from +60 to -60 degrees with 1-2ms input ; # pulse width. In order, to get a full range of motion out of ; # most servos, the range has been extended from .2ms to 2.3ms. ; # This means that some values may cause the servo to push ; # against its mechanical stops. ; # ; # During the 32 ticks (numbered from 0 to 31) that are used to ; # service a particular servo. The ticks are divided up as follows: ; # ; # Servo Tick 0: ; # This tick is used to figure out which servo line to turn ; # on (if enabled.) ; # Servo Tick 1: ; # This tick just leaves the servos alone. ; # Servo Ticks 2-17 (17-2+1=16 ticks total): ; # These ticks are used to figure out when when to turn ; # the servo off. 17/(3*2400) = 2.3ms. ; # Servo Tick 18: ; # This is fail safe code that just turns off off the servo ; # just in case something goes wrong. ; # Servo Ticks 19-31: ; # These ticks are used to decode any commands that have ; # come in from the serial line. ; # ; # For Ticks 2-17, the first "half" is spent checking against the ; # position variable. The second "half" is allocated to serial I/O ; # service. Bit 3 of the position variable specifies which tick ; # "half", the servo off needs to occur in. If bit 3 is a 1, ; # we generate a "long" pulse by turning on the servo at the ; # beginning of tick 0. If bit 3 is a 0, we generate a "short" ; # pulse by turning on the servo halfway through tick 0. By ; # adjusting the start of the pulse on bit 3 in tick 0, it is ; # ensured that the off pulse will always occur in the first ; # half of ticks 2-17. Here is some drawings: ; # ; # Position=0: ________[XXXXXXXXXXXXXXXXXXXXXXX]________________________________ ; # Position=7: ________[XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX]________________________ ; # Position=8: [XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX]________________________________ ; # Position=15: [XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX]________________________ ; # Position=16: _________[XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX]________________ ; # Position=23: _________[XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX]________ ; # Position=24: [XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX]________________ ; # Position=31: [XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX]________ ; # ; # Tick: |<------0------>|<------1------>|<------2------>|<------3------>| ; # ; # Since bit 3 is used to adjust the beginning and end of the ; # pulse start, it is no longer used in the counting process. ; # This is done by clearing bit 3 at the end of every servo ; # service tick. ; # ; # The fine grain positioning of the servo off signal is done with ; # some timing loops. These loops have been carefully hand tweaked ; # to provide approximately 8 instructions of delay for each position ; # increment. It was necessary to unroll the loop a little to ; # smooth out the increments. ; # ; # The serial I/O is done using a state machine using the variable ; # "state" . The state variable can range from 0 through 61. ; # The states are as follows: ; # ; # Serial State 0: ; # Wait for start bit. ; # Serial State 1-29: ; # Receive byte. ; # Serial State 31-61: ; # Send byte. ; # ; # The state machine stays in state 0 until it receives a start bit. ; # It then spends the next 29 ticks receiving a byte of data before ; # returning to state 0. Right before it returns to state 0, it ; # sets the decode_requested bit. During servo ticks 19-31, the ; # decode_requested bit is tested to see whether the command decode ; # procedure needs to be called. ; # ; # The decode procedure is separate from everything only because ; # not everything can be crammed into a single code bank of the ; # PIC12C509. Instead, the decode routine is in code bank 0 ; # and the main routine is in code bank 1. The decode takes the ; # received byte and dispatches appropriately. If it needs to ; # send a response byte, it crams the byte into the "buffer" ; # variable and sets state to 31. The next 30 ticks, will cause ; # buffer to be emptied out to the serial port. ; # ; # Since decoding is always deferred to servo ticks 19-31, it ; # is quite possible that command decoding will not commence ; # until well after a second byte of data is being received. ; # That is OK, since a byte takes at least 29 ticks to receive ; # whereas the longest it takes to process a servo is 20 ticks. ; # Thus, there will never be a buffer overrun. ; # ; # ***************************************************************************** ; buffer = 'servo4' ; line_number = 133 ; library _pic12f629 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic12f629' ; line_number = 6 ; processor pic12f675 ; line_number = 7 ; configure_address 0x2007 ; line_number = 8 ; configure_fill 0x0 ; line_number = 9 ; configure_option bg: bg11 = 0x3000 ; line_number = 10 ; configure_option bg: bg00 = 0x0000 ; line_number = 11 ; configure_option cpd: on = 0x000 ; line_number = 12 ; configure_option cpd: off = 0x100 ; line_number = 13 ; configure_option cp: on = 0x00 ; line_number = 14 ; configure_option cp: off = 0x80 ; line_number = 15 ; configure_option boden: on = 0x40 ; line_number = 16 ; configure_option boden: off = 0x00 ; line_number = 17 ; configure_option mclre: on = 0x20 ; line_number = 18 ; configure_option mclre: off = 0x00 ; line_number = 19 ; configure_option pwrte: on = 0x00 ; line_number = 20 ; configure_option pwrte: off = 0x10 ; line_number = 21 ; configure_option wdte: on = 8 ; line_number = 22 ; configure_option wdte: off = 0 ; line_number = 23 ; configure_option fosc: rc_clk = 7 ; line_number = 24 ; configure_option fosc: rc_no_clk = 6 ; line_number = 25 ; configure_option fosc: int_clk = 5 ; line_number = 26 ; configure_option fosc: int_no_clk = 4 ; line_number = 27 ; configure_option fosc: ec = 3 ; line_number = 28 ; configure_option fosc: hs = 2 ; line_number = 29 ; configure_option fosc: xt = 1 ; line_number = 30 ; configure_option fosc: lp = 0 ; line_number = 31 ; code_bank 0x0 : 0x3ff ; line_number = 32 ; data_bank 0x0 : 0x7f ; line_number = 33 ; data_bank 0x80 : 0xff ; line_number = 34 ; shared_region 0x20 : 0x5f ; line_number = 35 ; interrupts_possible ; line_number = 36 ; osccal_register_symbol _osccal ; line_number = 37 ; osccal_at_address 0x3ff ; line_number = 38 ; packages pdip=8, soic=8, dfn_s=8 ; line_number = 39 ; pin vdd, power_supply ; line_number = 40 ; pin_bindings pdip=1, soic=1, dfn_s=1 ; line_number = 41 ; pin gp5_in, gp5_out, t1cki, osc1, clkin, gp5_unused ; line_number = 42 ; pin_bindings pdip=2, soic=2, dfn_s=2 ; line_number = 43 ; bind_to _gpio@5 ; line_number = 44 ; or_if gp5_in _trisio 16 ; line_number = 45 ; or_if gp5_out _trisio 0 ; line_number = 46 ; pin gp4_in, gp4_out, t1g, osc2, clkout, gp4_unused ; line_number = 47 ; pin_bindings pdip=3, soic=3, dfn_s=3 ; line_number = 48 ; bind_to _gpio@4 ; line_number = 49 ; or_if gp4_in _trisio 8 ; line_number = 50 ; or_if gp4_out _trisio 0 ; line_number = 51 ; pin gp3_in, mclr, vpp, rp3_unused ; line_number = 52 ; pin_bindings pdip=4, soic=4, dfn_s=4 ; line_number = 53 ; bind_to _gpio@4 ; line_number = 54 ; or_if gp3_in _trisio 4 ; line_number = 55 ; pin gp2_in, gp2_out, t0cki, int, cout, gp2_unused ; line_number = 56 ; pin_bindings pdip=5, soic=5, dfn_s=5 ; line_number = 57 ; bind_to _gpio@2 ; line_number = 58 ; or_if gp2_in _trisio 4 ; line_number = 59 ; or_if gp2_out _trisio 0 ; line_number = 60 ; pin gp1_in, gp1_out, cin_minus, gp1_unused ; line_number = 61 ; pin_bindings pdip=6, soic=6, dfn_s=6 ; line_number = 62 ; bind_to _gpio@1 ; line_number = 63 ; or_if gp1_in _trisio 2 ; line_number = 64 ; or_if gp1_out _trisio 0 ; line_number = 65 ; pin gp0_in, gp0_out, gp0_unused ; line_number = 66 ; pin_bindings pdip=7, soic=7, dfn_s=7 ; line_number = 67 ; bind_to _gpio@0 ; line_number = 68 ; or_if gp0_in _trisio 1 ; line_number = 69 ; or_if gp0_out _trisio 0 ; line_number = 70 ; pin vss, ground ; line_number = 71 ; pin_bindings pdip=8, soic=8, dfn_s=8 ; line_number = 76 ; library _pic12f629_675 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # Shared register definitions for the PIC12F629 and PIC12F675. ; buffer = '_pic12f629_675' ; line_number = 7 ; register _indf = _indf equ 0 ; line_number = 9 ; register _tmr0 = _tmr0 equ 1 ; line_number = 11 ; register _pcl = _pcl equ 2 ; line_number = 13 ; register _status = _status equ 3 ; line_number = 14 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 15 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 16 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 17 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 18 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 19 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 21 ; register _fsr = _fsr equ 4 ; line_number = 23 ; register _gpio = _gpio equ 5 ; line_number = 24 ; bind _gpio5 = _gpio@5 _gpio5___byte equ _gpio _gpio5___bit equ 5 ; line_number = 25 ; bind _gpio4 = _gpio@4 _gpio4___byte equ _gpio _gpio4___bit equ 4 ; line_number = 26 ; bind _gpio3 = _gpio@3 _gpio3___byte equ _gpio _gpio3___bit equ 3 ; line_number = 27 ; bind _gpio2 = _gpio@2 _gpio2___byte equ _gpio _gpio2___bit equ 2 ; line_number = 28 ; bind _gpio1 = _gpio@1 _gpio1___byte equ _gpio _gpio1___bit equ 1 ; line_number = 29 ; bind _gpio0 = _gpio@0 _gpio0___byte equ _gpio _gpio0___bit equ 0 ; line_number = 31 ; register _pclath = _pclath equ 10 ; line_number = 33 ; register _intcon = _intcon equ 11 ; line_number = 34 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 35 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 36 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 37 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 38 ; bind _gpie = _intcon@3 _gpie___byte equ _intcon _gpie___bit equ 3 ; line_number = 39 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 40 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 41 ; bind _gpif = _intcon@0 _gpif___byte equ _intcon _gpif___bit equ 0 ; line_number = 43 ; register _pir1 = _pir1 equ 12 ; line_number = 44 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 45 ; bind _cmif = _pir1@3 _cmif___byte equ _pir1 _cmif___bit equ 3 ; line_number = 46 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 48 ; register _tmr1l = _tmr1l equ 14 ; line_number = 50 ; register _tmr1h = _tmr1h equ 15 ; line_number = 52 ; register _t1con = _t1con equ 16 ; line_number = 53 ; bind _t1ge = _t1con@6 _t1ge___byte equ _t1con _t1ge___bit equ 6 ; line_number = 54 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 55 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 56 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 57 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 58 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 59 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 61 ; register _cmcon = _cmcon equ 25 ; line_number = 62 ; bind _cout = _cmcon@6 _cout___byte equ _cmcon _cout___bit equ 6 ; line_number = 63 ; bind _cinv = _cmcon@4 _cinv___byte equ _cmcon _cinv___bit equ 4 ; line_number = 64 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 65 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 66 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 67 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; line_number = 69 ; register _adcon0 = _adcon0 equ 31 ; line_number = 70 ; bind _adfm = _adcon0@7 _adfm___byte equ _adcon0 _adfm___bit equ 7 ; line_number = 71 ; bind _vcfg = _adcon0@6 _vcfg___byte equ _adcon0 _vcfg___bit equ 6 ; line_number = 72 ; bind _csh1 = _adcon0@3 _csh1___byte equ _adcon0 _csh1___bit equ 3 ; line_number = 73 ; bind _csh0 = _adcon0@2 _csh0___byte equ _adcon0 _csh0___bit equ 2 ; line_number = 74 ; bind _go = _adcon0@1 _go___byte equ _adcon0 _go___bit equ 1 ; line_number = 75 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 79 ; register _option_reg = _option_reg equ 129 ; line_number = 80 ; bind _gppu = _option_reg@7 _gppu___byte equ _option_reg _gppu___bit equ 7 ; line_number = 81 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 82 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 83 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 84 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 85 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 86 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 87 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 89 ; register _trisio = _trisio equ 133 ; line_number = 90 ; bind _trisio5 = _trisio@5 _trisio5___byte equ _trisio _trisio5___bit equ 5 ; line_number = 91 ; bind _trisio4 = _trisio@4 _trisio4___byte equ _trisio _trisio4___bit equ 4 ; line_number = 92 ; bind _trisio3 = _trisio@3 _trisio3___byte equ _trisio _trisio3___bit equ 3 ; line_number = 93 ; bind _trisio2 = _trisio@2 _trisio2___byte equ _trisio _trisio2___bit equ 2 ; line_number = 94 ; bind _trisio1 = _trisio@1 _trisio1___byte equ _trisio _trisio1___bit equ 1 ; line_number = 95 ; bind _trisio0 = _trisio@0 _trisio0___byte equ _trisio _trisio0___bit equ 0 ; line_number = 97 ; register _pie1 = _pie1 equ 140 ; line_number = 98 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 99 ; bind _cmie = _pie1@3 _cmie___byte equ _pie1 _cmie___bit equ 3 ; line_number = 100 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 102 ; register _pcon = _pcon equ 142 ; line_number = 103 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 104 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 106 ; register _osccal = _osccal equ 144 ; line_number = 107 ; bind _cal5 = _osccal@7 _cal5___byte equ _osccal _cal5___bit equ 7 ; line_number = 108 ; bind _cal4 = _osccal@6 _cal4___byte equ _osccal _cal4___bit equ 6 ; line_number = 109 ; bind _cal3 = _osccal@5 _cal3___byte equ _osccal _cal3___bit equ 5 ; line_number = 110 ; bind _cal2 = _osccal@4 _cal2___byte equ _osccal _cal2___bit equ 4 ; line_number = 111 ; bind _cal1 = _osccal@3 _cal1___byte equ _osccal _cal1___bit equ 3 ; line_number = 112 ; bind _cal0 = _osccal@2 _cal0___byte equ _osccal _cal0___bit equ 2 ; line_number = 113 ; constant _osccal_lsb = 4 _osccal_lsb equ 4 ; line_number = 115 ; register _wpua = _wpua equ 149 ; line_number = 116 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 117 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 118 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 119 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 120 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 122 ; register _ioca = _ioca equ 150 ; line_number = 123 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 124 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 125 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 126 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 127 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 128 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 130 ; register _vrcon = _vrcon equ 153 ; line_number = 131 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 132 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 133 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 134 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 135 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 136 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 138 ; register _eedata = _eedata equ 154 ; line_number = 140 ; register _eeadr = _eeadr equ 155 ; line_number = 142 ; register _eecon1 = _eecon1 equ 156 ; line_number = 143 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 144 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 145 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 146 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 148 ; register _eecon2 = _eecon2 equ 157 ; buffer = '_pic12f629' ; line_number = 76 ; library _pic12f629_675 exited ; buffer = 'servo4' ; line_number = 133 ; library _pic12f629 exited ; line_number = 134 ; library clock4mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock4mhz' ; line_number = 9 ; constant clock_rate = 4000000 clock_rate equ 4000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 1000000 ; buffer = 'servo4' ; line_number = 134 ; library clock4mhz exited ; line_number = 136 ; package pdip ; line_number = 137 ; pin 1 = power_supply ; line_number = 138 ; pin 2 = gp5_out, name = serial_out, mask = serial_out_mask serial_out___byte equ _gpio serial_out___bit equ 5 serial_out_mask equ 32 ; line_number = 139 ; pin 3 = gp4_out, name = servo3, bit = servo3_bit servo3___byte equ _gpio servo3___bit equ 4 servo3_bit equ 4 ; line_number = 140 ; pin 4 = gp3_in, name = serial_in, mask = serial_in_mask serial_in___byte equ _gpio serial_in___bit equ 4 serial_in_mask equ 16 ; line_number = 141 ; pin 5 = gp2_out, name = servo2, bit = servo2_bit servo2___byte equ _gpio servo2___bit equ 2 servo2_bit equ 2 ; line_number = 142 ; pin 6 = gp1_out, name = servo1, bit = servo1_bit servo1___byte equ _gpio servo1___bit equ 1 servo1_bit equ 1 ; line_number = 143 ; pin 7 = gp0_out, name = servo0, bit = servo0_bit servo0___byte equ _gpio servo0___bit equ 0 servo0_bit equ 0 ; line_number = 144 ; pin 8 = ground ; # Define serial communication control constants: ; line_number = 149 ; constant baud_rate = 2400 baud_rate equ 2400 ; line_number = 150 ; constant instructions_per_bit = instruction_rate / baud_rate instructions_per_bit equ 416 ; line_number = 151 ; constant delays_per_bit = 3 delays_per_bit equ 3 ; line_number = 152 ; constant instructions_per_delay = instructions_per_bit / delays_per_bit instructions_per_delay equ 138 ; # Number of servos (changed only during debugging): ; line_number = 155 ; constant servos_power = 2 servos_power equ 2 ; line_number = 156 ; constant servos = (1 << servos_power) servos equ 4 ; line_number = 157 ; constant servos_maximum = (servos - 1) servos_maximum equ 3 ; line_number = 158 ; constant servos_index_mask = servos_maximum servos_index_mask equ 3 ; # Register definitions: ; line_number = 162 ; global counter byte counter equ shared___globals ; line_number = 163 ; global positions[servos] array[byte] positions equ shared___globals+1 ; line_number = 164 ; global enable_mask byte enable_mask equ shared___globals+5 ; line_number = 165 ; global servo byte servo equ shared___globals+6 ; line_number = 166 ; global glitch byte glitch equ shared___globals+7 ; line_number = 167 ; global id_index byte id_index equ shared___globals+8 ; line_number = 168 ; global state byte state equ shared___globals+9 ; line_number = 169 ; global received byte received equ shared___globals+10 ; line_number = 170 ; global buffer byte buffer equ shared___globals+11 ; line_number = 171 ; global decode_state byte decode_state equ shared___globals+12 ; line_number = 172 ; global position byte position equ shared___globals+13 ; line_number = 173 ; global previous byte previous equ shared___globals+14 ; line_number = 174 ; global amount byte amount equ shared___globals+15 ; line_number = 176 ; global decode_request bit decode_request___byte equ shared___globals+63 decode_request___bit equ 0 ; line_number = 178 ; procedure main main: ; Need to calibrate the oscillator call 1023 bsf __rp0___byte, __rp0___bit movwf _osccal ; Initialize some registers movlw 4 movwf _trisio ; arguments_none ; line_number = 180 ; returns_nothing ; # This procedure waits for commands and keeps the servo pulses going: ; line_number = 184 ; local temp byte main__temp equ shared___globals+16 ; # Initialize everything: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) ; line_number = 187 ; servo := 0 movlw 0 bcf __rp0___byte, __rp0___bit movwf servo ; line_number = 188 ; loop_exactly servos start main__1 equ shared___globals+18 movlw 4 movwf main__1 main__2: ; line_number = 189 ; positions[servo] := 0x80 ; index_fsr_first movf servo,w addlw positions movwf __fsr movlw 128 movwf __indf ; line_number = 190 ; servo := servo + 1 incf servo,f ; line_number = 188 ; loop_exactly servos wrap-up decfsz main__1,f goto main__2 ; line_number = 188 ; loop_exactly servos done ; line_number = 191 ; buffer := 0 movlw 0 movwf buffer ; line_number = 192 ; counter := 0 movlw 0 movwf counter ; line_number = 193 ; decode_request := 0 bcf decode_request___byte, decode_request___bit ; line_number = 194 ; decode_state := 0 movlw 0 movwf decode_state ; line_number = 195 ; enable_mask := 0 movlw 0 movwf enable_mask ; line_number = 196 ; glitch := 0 movlw 0 movwf glitch ; line_number = 197 ; id_index := 0 movlw 0 movwf id_index ; line_number = 198 ; position := 0 movlw 0 movwf position ; line_number = 199 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; line_number = 200 ; servo := 0 movlw 0 movwf servo ; line_number = 201 ; state := 0 movlw 0 movwf state ; # Wait for commands: ; line_number = 204 ; loop_forever start main__3: ; # Loop_forever has an overhead of 2 instructions per cycle: ; line_number = 206 ; delay instructions_per_delay - 2 start ; Delay expression evaluates to 136 ; # This is the servo maintenence portion of the code: ; line_number = 208 ; counter := counter + 1 ; Delay at assignment is 0 incf counter,f ; line_number = 210 ; switch counter & 0x1f start ; line_number = 211 ; case_maximum 31 movlw main__71>>8 movwf __pclath movlw 31 andwf counter,w addlw main__71 movwf __pcl ; page_group 32 main__71: goto main__66 goto main__67 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__68 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 goto main__70 ; case_data[0] delay=82{0 } ; case_data[1] delay=1{1 } ; case_data[2] delay=5{18 } ; case_data[3] delay=78{2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 } ; case_data[4] delay=81 ; Maximum Case Delay = 82 ; line_number = 212 ; case 0 main__66: ; # Counter = xss0 0000 (Turn on Servo Pulse): ; line_number = 214 ; servo := (counter >> 5) & servos_index_mask ; Delay at assignment is 0 main__4 equ shared___globals+18 swapf counter,w movwf main__4 rrf main__4,w andlw 3 movwf servo ; line_number = 215 ; position := positions[servo] ; Delay at assignment is 5 movf servo,w addlw positions movwf __fsr movf __indf,w movwf position ; line_number = 216 ; if position@3 start ; Delay at if is 10 main__select__31___byte equ position main__select__31___bit equ 3 ; (after recombine) true_delay=13, false_delay=69 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=14 false_code_size=22 btfss main__select__31___byte, main__select__31___bit goto main__32 ; # Long pulse -- turn on immediately: ; line_number = 218 ; switch servo start movlw main__28>>8 movwf __pclath movf servo,w addlw main__28 movwf __pcl ; page_group 4 main__28: goto main__24 goto main__25 goto main__26 goto main__27 ; case_data[0] delay=2{0 } ; case_data[1] delay=2{1 } ; case_data[2] delay=2{2 } ; case_data[3] delay=2{3 } ; Maximum Case Delay = 2 ; line_number = 219 ; case 0 main__24: ; # Servo 0: ; line_number = 221 ; if enable_mask@0 start ; Delay at if is 0 main__select__20___byte equ enable_mask main__select__20___bit equ 0 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__20___byte, main__select__20___bit ; line_number = 222 ; servo0 := 1 ; Delay at assignment is 0 bsf servo0___byte, servo0___bit ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__20 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 221 ; if enable_mask@0 done goto main__29 ; line_number = 223 ; case 1 main__25: ; # Servo 1: ; line_number = 225 ; if enable_mask@1 start ; Delay at if is 0 main__select__21___byte equ enable_mask main__select__21___bit equ 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__21___byte, main__select__21___bit ; line_number = 226 ; servo1 := 1 ; Delay at assignment is 0 bsf servo1___byte, servo1___bit ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__21 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 225 ; if enable_mask@1 done goto main__29 ; line_number = 227 ; case 2 main__26: ; # Servo 2: ; line_number = 229 ; if enable_mask@2 start ; Delay at if is 0 main__select__22___byte equ enable_mask main__select__22___bit equ 2 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__22___byte, main__select__22___bit ; line_number = 230 ; servo2 := 1 ; Delay at assignment is 0 bsf servo2___byte, servo2___bit ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__22 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 229 ; if enable_mask@2 done goto main__29 ; line_number = 231 ; case 3 main__27: ; # Servo 3: ; line_number = 233 ; if enable_mask@3 start ; Delay at if is 0 main__select__23___byte equ enable_mask main__select__23___bit equ 3 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__23___byte, main__select__23___bit ; line_number = 234 ; servo3 := 1 ; Delay at assignment is 0 bsf servo3___byte, servo3___bit ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__23 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 233 ; if enable_mask@3 done goto main__29 main__29: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 218 ; switch servo done ; line_number = 235 ; position@3 := 0 ; Delay at assignment is 12 main__select__30___byte equ position main__select__30___bit equ 3 bcf main__select__30___byte, main__select__30___bit ; Delay 55 cycles ; Delay loop takes 13 * 4 = 52 cycles movlw 13 main__34: addlw 255 btfss __z___byte, __z___bit goto main__34 goto main__35 main__35: nop goto main__33 main__32: ; # Short pulse turn on after approximately half a tick: ; Delay at delay is 0 ; line_number = 238 ; delay 67 start ; Delay expression evaluates to 67 ; # We've got plenty of time to set things up during ; # this delay, but not much time after that. ; line_number = 241 ; temp := _gpio & (serial_in_mask | serial_out_mask) ; Delay at assignment is 0 movlw 48 andwf _gpio,w movwf main__temp ; line_number = 242 ; switch servo start movlw main__17>>8 movwf __pclath movf servo,w addlw main__17 movwf __pcl ; page_group 4 main__17: goto main__13 goto main__14 goto main__15 goto main__16 ; case_data[0] delay=2{0 } ; case_data[1] delay=2{1 } ; case_data[2] delay=2{2 } ; case_data[3] delay=2{3 } ; Maximum Case Delay = 2 ; line_number = 243 ; case 0 main__13: ; # Servo 0: ; line_number = 245 ; if enable_mask@0 start ; Delay at if is 0 main__select__6___byte equ enable_mask main__select__6___bit equ 0 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__6___byte, main__select__6___bit ; line_number = 246 ; temp@servo0_bit := 1 ; Delay at assignment is 0 main__select__5___byte equ main__temp main__select__5___bit equ 0 bsf main__select__5___byte, main__select__5___bit ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__6 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 245 ; if enable_mask@0 done goto main__18 ; line_number = 247 ; case 1 main__14: ; # Servo 1: ; line_number = 249 ; if enable_mask@1 start ; Delay at if is 0 main__select__8___byte equ enable_mask main__select__8___bit equ 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__8___byte, main__select__8___bit ; line_number = 250 ; temp@servo1_bit := 1 ; Delay at assignment is 0 main__select__7___byte equ main__temp main__select__7___bit equ 1 bsf main__select__7___byte, main__select__7___bit ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__8 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 249 ; if enable_mask@1 done goto main__18 ; line_number = 251 ; case 2 main__15: ; # Servo 2: ; line_number = 253 ; if enable_mask@2 start ; Delay at if is 0 main__select__10___byte equ enable_mask main__select__10___bit equ 2 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__10___byte, main__select__10___bit ; line_number = 254 ; temp@servo2_bit := 1 ; Delay at assignment is 0 main__select__9___byte equ main__temp main__select__9___bit equ 2 bsf main__select__9___byte, main__select__9___bit ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__10 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 253 ; if enable_mask@2 done goto main__18 ; line_number = 255 ; case 3 main__16: ; # Servo 3: ; line_number = 257 ; if enable_mask@3 start ; Delay at if is 0 main__select__12___byte equ enable_mask main__select__12___bit equ 3 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__12___byte, main__select__12___bit ; line_number = 258 ; temp@servo3_bit := 1 ; Delay at assignment is 0 main__select__11___byte equ main__temp main__select__11___bit equ 4 bsf main__select__11___byte, main__select__11___bit ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__12 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 257 ; if enable_mask@3 done goto main__18 main__18: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 242 ; switch servo done ; Delay 52 cycles ; Delay loop takes 13 * 4 = 52 cycles movlw 13 main__19: addlw 255 btfss __z___byte, __z___bit goto main__19 ; line_number = 238 ; delay 67 done ; # Now just store the the result into {_gpio}: ; line_number = 260 ; _gpio := temp ; Delay at assignment is 67 movf main__temp,w movwf _gpio main__33: ; code.delay=82 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__31 (data:X0=>X0 code:XX=>XX) ; if final true delay=13 false delay=69 code delay=82 ; line_number = 216 ; if position@3 done goto main__72 ; line_number = 261 ; case 1 main__67: ; # Do nothing. (Leave pulse on): ; line_number = 263 ; watch_dog_reset done ; Delay at watch_dog_reset is 0 clrwdt ; Delay 81 cycles ; Delay loop takes 20 * 4 = 80 cycles movlw 20 main__73: addlw 255 btfss __z___byte, __z___bit goto main__73 nop goto main__72 ; line_number = 264 ; case 18 main__68: ; # Fail safe. Turn all servos off: ; line_number = 266 ; watch_dog_reset done ; Delay at watch_dog_reset is 0 clrwdt ; line_number = 267 ; servo0 := 0 ; Delay at assignment is 1 bcf servo0___byte, servo0___bit ; line_number = 268 ; servo1 := 0 ; Delay at assignment is 2 bcf servo1___byte, servo1___bit ; line_number = 269 ; servo2 := 0 ; Delay at assignment is 3 bcf servo2___byte, servo2___bit ; line_number = 270 ; servo3 := 0 ; Delay at assignment is 4 bcf servo3___byte, servo3___bit ; Delay 77 cycles ; Delay loop takes 19 * 4 = 76 cycles movlw 19 main__74: addlw 255 btfss __z___byte, __z___bit goto main__74 nop goto main__72 ; line_number = 271 ; case 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 main__69: ; # Servo service: ; line_number = 273 ; position := position + 1 ; Delay at assignment is 0 incf position,f ; line_number = 274 ; switch servo start movlw main__60>>8 movwf __pclath movf servo,w addlw main__60 movwf __pcl ; page_group 4 main__60: goto main__56 goto main__57 goto main__58 goto main__59 ; case_data[0] delay=65{0 } ; case_data[1] delay=65{1 } ; case_data[2] delay=65{2 } ; case_data[3] delay=65{3 } ; Maximum Case Delay = 65 ; line_number = 275 ; case 0 main__56: ; Delay at delay is 0 ; line_number = 276 ; delay 65 start ; Delay expression evaluates to 65 ; line_number = 277 ; loop_exactly 4 start ; Delay at loop_exactly is 0 main__36 equ shared___globals+18 movlw 4 movwf main__36 main__37: ; line_number = 278 ; position := position - 1 ; Delay at assignment is 0 decf position,f ; line_number = 279 ; if _z start ; Delay at if is 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 280 ; servo0 := 0 ; Delay at assignment is 0 bcf servo0___byte, servo0___bit ; code.delay=3 back_code.delay=0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=3 ; line_number = 279 ; if _z done ; Delay at delay is 3 ; line_number = 281 ; delay 5 start ; Delay expression evaluates to 5 ; line_number = 282 ; do_nothing ; Delay 5 cycles goto main__38 main__38: goto main__39 main__39: nop ; line_number = 281 ; delay 5 done ; line_number = 283 ; position := position - 1 ; Delay at assignment is 8 decf position,f ; line_number = 284 ; if _z start ; Delay at if is 9 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 285 ; servo0 := 0 ; Delay at assignment is 0 bcf servo0___byte, servo0___bit ; code.delay=11 back_code.delay=0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=11 ; line_number = 284 ; if _z done ; Delay at delay is 11 ; line_number = 286 ; delay 2 start ; Delay expression evaluates to 2 ; line_number = 287 ; do_nothing ; Delay 2 cycles goto main__40 main__40: ; line_number = 286 ; delay 2 done ; line_number = 277 ; loop_exactly 4 wrap-up decfsz main__36,f goto main__37 ; loop_exactly delay after all=65 ; line_number = 277 ; loop_exactly 4 done ; line_number = 276 ; delay 65 done goto main__61 ; line_number = 288 ; case 1 main__57: ; line_number = 289 ; loop_exactly 4 start ; Delay at loop_exactly is 0 main__41 equ shared___globals+18 movlw 4 movwf main__41 main__42: ; line_number = 290 ; position := position - 1 ; Delay at assignment is 0 decf position,f ; line_number = 291 ; if _z start ; Delay at if is 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 292 ; servo1 := 0 ; Delay at assignment is 0 bcf servo1___byte, servo1___bit ; code.delay=3 back_code.delay=0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=3 ; line_number = 291 ; if _z done ; Delay at delay is 3 ; line_number = 293 ; delay 5 start ; Delay expression evaluates to 5 ; line_number = 294 ; do_nothing ; Delay 5 cycles goto main__43 main__43: goto main__44 main__44: nop ; line_number = 293 ; delay 5 done ; line_number = 295 ; position := position - 1 ; Delay at assignment is 8 decf position,f ; line_number = 296 ; if _z start ; Delay at if is 9 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 297 ; servo1 := 0 ; Delay at assignment is 0 bcf servo1___byte, servo1___bit ; code.delay=11 back_code.delay=0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=11 ; line_number = 296 ; if _z done ; Delay at delay is 11 ; line_number = 298 ; delay 2 start ; Delay expression evaluates to 2 ; line_number = 299 ; do_nothing ; Delay 2 cycles goto main__45 main__45: ; line_number = 298 ; delay 2 done ; line_number = 289 ; loop_exactly 4 wrap-up decfsz main__41,f goto main__42 ; loop_exactly delay after all=65 ; line_number = 289 ; loop_exactly 4 done goto main__61 ; line_number = 300 ; case 2 main__58: ; line_number = 301 ; loop_exactly 4 start ; Delay at loop_exactly is 0 main__46 equ shared___globals+18 movlw 4 movwf main__46 main__47: ; line_number = 302 ; position := position - 1 ; Delay at assignment is 0 decf position,f ; line_number = 303 ; if _z start ; Delay at if is 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 304 ; servo2 := 0 ; Delay at assignment is 0 bcf servo2___byte, servo2___bit ; code.delay=3 back_code.delay=0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=3 ; line_number = 303 ; if _z done ; Delay at delay is 3 ; line_number = 305 ; delay 5 start ; Delay expression evaluates to 5 ; line_number = 306 ; do_nothing ; Delay 5 cycles goto main__48 main__48: goto main__49 main__49: nop ; line_number = 305 ; delay 5 done ; line_number = 307 ; position := position - 1 ; Delay at assignment is 8 decf position,f ; line_number = 308 ; if _z start ; Delay at if is 9 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 309 ; servo2 := 0 ; Delay at assignment is 0 bcf servo2___byte, servo2___bit ; code.delay=11 back_code.delay=0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=11 ; line_number = 308 ; if _z done ; Delay at delay is 11 ; line_number = 310 ; delay 2 start ; Delay expression evaluates to 2 ; line_number = 311 ; do_nothing ; Delay 2 cycles goto main__50 main__50: ; line_number = 310 ; delay 2 done ; line_number = 301 ; loop_exactly 4 wrap-up decfsz main__46,f goto main__47 ; loop_exactly delay after all=65 ; line_number = 301 ; loop_exactly 4 done goto main__61 ; line_number = 312 ; case 3 main__59: ; line_number = 313 ; loop_exactly 4 start ; Delay at loop_exactly is 0 main__51 equ shared___globals+18 movlw 4 movwf main__51 main__52: ; line_number = 314 ; position := position - 1 ; Delay at assignment is 0 decf position,f ; line_number = 315 ; if _z start ; Delay at if is 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 316 ; servo3 := 0 ; Delay at assignment is 0 bcf servo3___byte, servo3___bit ; code.delay=3 back_code.delay=0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=3 ; line_number = 315 ; if _z done ; Delay at delay is 3 ; line_number = 317 ; delay 5 start ; Delay expression evaluates to 5 ; line_number = 318 ; do_nothing ; Delay 5 cycles goto main__53 main__53: goto main__54 main__54: nop ; line_number = 317 ; delay 5 done ; line_number = 319 ; position := position - 1 ; Delay at assignment is 8 decf position,f ; line_number = 320 ; if _z start ; Delay at if is 9 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 321 ; servo3 := 0 ; Delay at assignment is 0 bcf servo3___byte, servo3___bit ; code.delay=11 back_code.delay=0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=11 ; line_number = 320 ; if _z done ; Delay at delay is 11 ; line_number = 322 ; delay 2 start ; Delay expression evaluates to 2 ; line_number = 323 ; do_nothing ; Delay 2 cycles goto main__55 main__55: ; line_number = 322 ; delay 2 done ; line_number = 313 ; loop_exactly 4 wrap-up decfsz main__51,f goto main__52 ; loop_exactly delay after all=65 ; line_number = 313 ; loop_exactly 4 done goto main__61 main__61: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 274 ; switch servo done ; line_number = 324 ; position := position - 1 ; Delay at assignment is 76 decf position,f ; line_number = 325 ; position@3 := 0 ; Delay at assignment is 77 main__select__62___byte equ position main__select__62___bit equ 3 bcf main__select__62___byte, main__select__62___bit ; Delay 4 cycles goto main__75 main__75: goto main__76 main__76: goto main__72 ; line_number = 326 ; default main__70: ; # Do decode when we are not busy servicing the servos: ; line_number = 328 ; if decode_request start ; Delay at if is 0 ; (after recombine) true_delay=78, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=78 (uniform delay) btfsc decode_request___byte, decode_request___bit goto main__63 ; Delay 77 cycles ; Delay loop takes 19 * 4 = 76 cycles movlw 19 main__65: addlw 255 btfss __z___byte, __z___bit goto main__65 nop goto main__64 main__63: ; line_number = 329 ; decode_request := 0 ; Delay at assignment is 0 bcf decode_request___byte, decode_request___bit ; line_number = 330 ; call decode() ; Delay at call is 1 call decode main__64: ; code.delay=81 back_code.delay=0 ; <=bit_code_emit@symbol; sym=decode_request (data:X0=>X0 code:XX=>XX) ; if final true delay=78 false delay=0 code delay=81 ; line_number = 328 ; if decode_request done ; Delay 1 cycles nop goto main__72 main__72: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 210 ; switch counter & 0x1f done ; # This is the serial I/O state machine. It is very ; # carefully coded to take as few cycles as possible. ; line_number = 334 ; switch state start ; line_number = 335 ; case_maximum 61 movlw main__89>>8 movwf __pclath bcf __rp0___byte, __rp0___bit movf state,w addlw main__89 movwf __pcl ; page_group 62 main__89: goto main__79 goto main__88 goto main__88 goto main__80 goto main__81 goto main__88 goto main__80 goto main__81 goto main__88 goto main__80 goto main__81 goto main__88 goto main__80 goto main__81 goto main__88 goto main__80 goto main__81 goto main__88 goto main__80 goto main__81 goto main__88 goto main__80 goto main__81 goto main__88 goto main__80 goto main__81 goto main__88 goto main__88 goto main__88 goto main__82 goto main__88 goto main__83 goto main__88 goto main__88 goto main__84 goto main__85 goto main__88 goto main__84 goto main__85 goto main__88 goto main__84 goto main__85 goto main__88 goto main__84 goto main__85 goto main__88 goto main__84 goto main__85 goto main__88 goto main__84 goto main__85 goto main__88 goto main__84 goto main__85 goto main__88 goto main__84 goto main__88 goto main__88 goto main__86 goto main__88 goto main__87 goto main__88 ; case_data[0] delay=2{0 } ; case_data[1] delay=3{3 6 9 12 15 18 21 24 } ; case_data[2] delay=3{4 7 10 13 16 19 22 25 } ; case_data[3] delay=5{29 } ; case_data[4] delay=2{31 } ; case_data[5] delay=4{34 37 40 43 46 49 52 55 } ; case_data[6] delay=3{35 38 41 44 47 50 53 } ; case_data[7] delay=2{58 } ; case_data[8] delay=2{60 } ; case_data[9] delay=1 ; Maximum Case Delay = 5 ; line_number = 336 ; case 0 main__79: ; # This is the wait for next byte state: ; # We test for the start bit: ; line_number = 340 ; if !serial_in start ; Delay at if is 0 ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss serial_in___byte, serial_in___bit ; # We have a start bit! Now sequence through the ; # remaining states: ; line_number = 343 ; state := state + 1 ; Delay at assignment is 0 incf state,f ; code.delay=2 back_code.delay=0 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=2 ; line_number = 340 ; if !serial_in done ; Delay 3 cycles goto main__91 main__91: nop goto main__90 ; line_number = 344 ; case 3, 6, 9, 12, 15, 18, 21, 24 main__80: ; # Shift the buffer byte over by one bit: ; line_number = 346 ; state := state + 1 ; Delay at assignment is 0 incf state,f ; line_number = 347 ; buffer := buffer >> 1 ; Delay at assignment is 1 ; Assignment of variable to self (no code needed) rrf buffer,f bcf buffer, 7 ; Delay 2 cycles goto main__92 main__92: goto main__90 ; line_number = 348 ; case 4, 7, 10, 13, 16, 19, 22, 25 main__81: ; # Test to see whether we have a bit or not: ; line_number = 350 ; state := state + 1 ; Delay at assignment is 0 incf state,f ; line_number = 351 ; if serial_in start ; Delay at if is 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc serial_in___byte, serial_in___bit ; line_number = 352 ; buffer@7 := 1 ; Delay at assignment is 0 main__select__77___byte equ buffer main__select__77___bit equ 7 bsf main__select__77___byte, main__select__77___bit ; code.delay=3 back_code.delay=0 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=3 ; line_number = 351 ; if serial_in done ; Delay 2 cycles goto main__93 main__93: goto main__90 ; line_number = 353 ; case 29 main__82: ; # We are done receiving. We stop 2/3's of the way ; # through the stop bit: ; line_number = 356 ; state := 0 ; Delay at assignment is 0 movlw 0 movwf state ; line_number = 357 ; received := buffer ; Delay at assignment is 2 movf buffer,w movwf received ; line_number = 358 ; decode_request := 1 ; Delay at assignment is 4 bsf decode_request___byte, decode_request___bit goto main__90 ; line_number = 359 ; case 31 main__83: ; # Send start bit: ; line_number = 361 ; state := state + 1 ; Delay at assignment is 0 incf state,f ; line_number = 362 ; serial_out := 0 ; Delay at assignment is 1 bcf serial_out___byte, serial_out___bit ; Delay 3 cycles goto main__94 main__94: nop goto main__90 ; line_number = 363 ; case 34, 37, 40, 43, 46, 49, 52, 55 main__84: ; # Send data bit: ; line_number = 365 ; state := state + 1 ; Delay at assignment is 0 incf state,f ; line_number = 366 ; serial_out := buffer@0 ; Delay at assignment is 1 bcf serial_out___byte, serial_out___bit main__select__78___byte equ buffer main__select__78___bit equ 0 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc main__select__78___byte, main__select__78___bit bsf serial_out___byte, serial_out___bit ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=main__select__78 (data:X0=>X0 code:XX=>XX) ; Delay 1 cycles nop goto main__90 ; line_number = 367 ; case 35, 38, 41, 44, 47, 50, 53 main__85: ; # Shift sending byte: ; line_number = 369 ; state := state + 1 ; Delay at assignment is 0 incf state,f ; line_number = 370 ; buffer := buffer >> 1 ; Delay at assignment is 1 ; Assignment of variable to self (no code needed) rrf buffer,f bcf buffer, 7 ; Delay 2 cycles goto main__95 main__95: goto main__90 ; line_number = 371 ; case 58 main__86: ; # Send stop bit ; line_number = 373 ; state := state + 1 ; Delay at assignment is 0 incf state,f ; line_number = 374 ; serial_out := 1 ; Delay at assignment is 1 bsf serial_out___byte, serial_out___bit ; Delay 3 cycles goto main__96 main__96: nop goto main__90 ; line_number = 375 ; case 60 main__87: ; # Done sending: ; line_number = 377 ; state := 0 ; Delay at assignment is 0 movlw 0 movwf state ; Delay 3 cycles goto main__97 main__97: nop goto main__90 ; line_number = 378 ; default main__88: ; # All other states do nothing except increment state variable: ; line_number = 380 ; state := state + 1 ; Delay at assignment is 0 incf state,f ; Delay 4 cycles goto main__98 main__98: goto main__99 main__99: goto main__90 main__90: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 334 ; switch state done ; Delay 26 cycles ; Delay loop takes 6 * 4 = 24 cycles movlw 6 main__100: addlw 255 btfss __z___byte, __z___bit goto main__100 goto main__101 main__101: ; line_number = 206 ; delay instructions_per_delay - 2 done ; line_number = 204 ; loop_forever wrap-up goto main__3 ; line_number = 204 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 383 ; procedure decode decode: ; arguments_none ; line_number = 385 ; returns_nothing ; # 75 was found by trail and error: ; line_number = 387 ; exact_delay 75 ; line_number = 389 ; local temp byte decode__temp equ shared___globals+17 ; before procedure statements delay=0, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 391 ; switch decode_state start movlw decode__82>>8 movwf __pclath movf decode_state,w addlw decode__82 movwf __pcl ; page_group 3 decode__82: goto decode__79 goto decode__80 goto decode__81 ; case_data[0] delay=62{0 } ; case_data[1] delay=29{1 } ; case_data[2] delay=5{2 } ; Maximum Case Delay = 62 ; line_number = 392 ; case 0 decode__79: ; # Main decode: ; line_number = 394 ; switch received >> 6 start movlw decode__69>>8 movwf __pclath decode__70 equ shared___globals+20 swapf received,w movwf decode__70 rrf decode__70,f rrf decode__70,w andlw 3 addlw decode__69 movwf __pcl ; page_group 4 decode__69: goto decode__65 goto decode__66 goto decode__67 goto decode__68 ; case_data[0] delay=11{0 } ; case_data[1] delay=20{1 } ; case_data[2] delay=25{2 } ; case_data[3] delay=48{3 } ; Maximum Case Delay = 48 ; line_number = 395 ; case 0 decode__65: ; # Received = 00hh hhss (Set High): ; line_number = 397 ; temp := received & servos_index_mask ; Delay at assignment is 0 movlw 3 andwf received,w movwf decode__temp ; line_number = 398 ; positions[temp] := (received << 2) & 0xf0 ; Delay at assignment is 3 ; index_fsr_first movf decode__temp,w addlw positions movwf __fsr decode__1 equ shared___globals+19 rlf received,w movwf decode__1 rlf decode__1,w andlw 240 movwf __indf ; Delay 37 cycles ; Delay loop takes 9 * 4 = 36 cycles movlw 9 decode__72: addlw 255 btfss __z___byte, __z___bit goto decode__72 nop goto decode__71 ; line_number = 399 ; case 1 decode__66: ; # Received = 01ll llss (Set Low): ; line_number = 401 ; temp := received & servos_index_mask ; Delay at assignment is 0 movlw 3 andwf received,w movwf decode__temp ; line_number = 402 ; positions[temp] := positions[temp] & 0xf0 | (received >> 2) & 0xf ; Delay at assignment is 3 ; right_temporary_first decode__2 equ shared___globals+19 decode__3 equ shared___globals+20 movf decode__temp,w addlw positions movwf __fsr movf __indf,w andlw 240 movwf decode__3 decode__4 equ shared___globals+21 rrf received,w movwf decode__4 rrf decode__4,w andlw 15 iorwf decode__3,w movwf decode__2 movf decode__temp,w addlw positions movwf __fsr movf decode__2,w movwf __indf ; Delay 28 cycles ; Delay loop takes 7 * 4 = 28 cycles movlw 7 decode__73: addlw 255 btfss __z___byte, __z___bit goto decode__73 goto decode__71 ; line_number = 403 ; case 2 decode__67: ; # Received = 10xx xxxx: ; line_number = 405 ; temp := received & servos_index_mask ; Delay at assignment is 0 movlw 3 andwf received,w movwf decode__temp ; line_number = 406 ; amount := (received >> 2) & 7 ; Delay at assignment is 3 decode__5 equ shared___globals+20 rrf received,w movwf decode__5 rrf decode__5,w andlw 7 movwf amount ; line_number = 407 ; if received@5 start ; Delay at if is 8 decode__select__6___byte equ received decode__select__6___bit equ 5 ; (after recombine) true_delay=3, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=3 true_test=true body_code.delay=3 (uniform delay) btfsc decode__select__6___byte, decode__select__6___bit goto decode__7 ; Delay 2 cycles goto decode__9 decode__9: goto decode__8 decode__7: ; # Decrement (Received = 101s sddd): ; line_number = 409 ; amount := 0 - amount ; Delay at assignment is 0 comf amount,w addlw 1 movwf amount decode__8: ; code.delay=14 back_code.delay=0 ; <=bit_code_emit@symbol; sym=decode__select__6 (data:X0=>X0 code:XX=>XX) ; if final true delay=3 false delay=0 code delay=14 ; line_number = 407 ; if received@5 done ; # else Increment (Received = 100s siii) do nothing: ; line_number = 411 ; positions[temp] := positions[temp] + amount ; Delay at assignment is 14 ; right_temporary_first decode__10 equ shared___globals+20 movf decode__temp,w addlw positions movwf __fsr movf __indf,w addwf amount,w movwf decode__10 movf decode__temp,w addlw positions movwf __fsr movf decode__10,w movwf __indf ; Delay 23 cycles ; Delay loop takes 5 * 4 = 20 cycles movlw 5 decode__74: addlw 255 btfss __z___byte, __z___bit goto decode__74 goto decode__75 decode__75: nop goto decode__71 ; line_number = 412 ; case 3 decode__68: ; # Received = 11xx xxxx: ; line_number = 414 ; switch (received >> 3) & 7 start movlw decode__54>>8 movwf __pclath decode__55 equ shared___globals+20 rrf received,w movwf decode__55 rrf decode__55,f rrf decode__55,w andlw 7 addlw decode__54 movwf __pcl ; page_group 8 decode__54: goto decode__48 goto decode__49 goto decode__50 goto decode__51 goto decode__52 goto decode__52 goto decode__52 goto decode__53 ; case_data[0] delay=4{0 } ; case_data[1] delay=22{1 } ; case_data[2] delay=13{2 } ; case_data[3] delay=15{3 } ; case_data[4] delay=0{4 5 6 } ; case_data[5] delay=34{7 } ; Maximum Case Delay = 34 ; line_number = 415 ; case 0 decode__48: ; # Set Position/Enable (Received = 1100 0ess): ; line_number = 417 ; previous := received ; Delay at assignment is 0 movf received,w movwf previous ; line_number = 418 ; decode_state := 1 ; Delay at assignment is 2 movlw 1 movwf decode_state ; Delay 30 cycles ; Delay loop takes 7 * 4 = 28 cycles movlw 7 decode__57: addlw 255 btfss __z___byte, __z___bit goto decode__57 goto decode__58 decode__58: goto decode__56 ; line_number = 419 ; case 1 decode__49: ; # Set Enable (Received = 1100 1ess): ; line_number = 421 ; temp := received & servos_index_mask ; Delay at assignment is 0 movlw 3 andwf received,w movwf decode__temp ; line_number = 422 ; temp := masks[temp] ; Delay at assignment is 3 movf decode__temp,w call masks movwf decode__temp ; line_number = 423 ; if received@2 start ; Delay at if is 16 decode__select__11___byte equ received decode__select__11___bit equ 2 ; (after recombine) true_delay=2, false_delay=3 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=2 false_code_size=3 btfss decode__select__11___byte, decode__select__11___bit goto decode__12 ; line_number = 424 ; enable_mask := enable_mask | temp ; Delay at assignment is 0 movf decode__temp,w iorwf enable_mask,f ; Delay 0 cycles goto decode__13 decode__12: ; line_number = 426 ; enable_mask := enable_mask & (0xff ^ temp) ; Delay at assignment is 0 movlw 255 xorwf decode__temp,w andwf enable_mask,f decode__13: ; code.delay=22 back_code.delay=0 ; <=bit_code_emit@symbol; sym=decode__select__11 (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=3 code delay=22 ; line_number = 423 ; if received@2 done ; Delay 12 cycles ; Delay loop takes 3 * 4 = 12 cycles movlw 3 decode__59: addlw 255 btfss __z___byte, __z___bit goto decode__59 goto decode__56 ; line_number = 427 ; case 2 decode__50: ; # Received = 1101 0xxx: ; line_number = 429 ; temp := received & servos_index_mask ; Delay at assignment is 0 movlw 3 andwf received,w movwf decode__temp ; line_number = 430 ; if received@2 start ; Delay at if is 3 decode__select__14___byte equ received decode__select__14___bit equ 2 ; (after recombine) true_delay=17, false_delay=5 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=7 false_code_size=5 btfsc decode__select__14___byte, decode__select__14___bit goto decode__15 ; Delay 11 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 decode__17: addlw 255 btfss __z___byte, __z___bit goto decode__17 goto decode__18 decode__18: nop ; # Read Position (Received = 1101 00ss): ; line_number = 437 ; buffer := positions[temp] ; Delay at assignment is 0 movf decode__temp,w addlw positions movwf __fsr movf __indf,w movwf buffer goto decode__16 decode__15: ; # Read Enable (Received = 1101 01ss): ; line_number = 432 ; buffer := 0 ; Delay at assignment is 0 movlw 0 movwf buffer ; line_number = 433 ; if enable_mask & masks[temp] != 0 start ; Delay at if is 2 ; Left minus Right movf decode__temp,w call masks andwf enable_mask,w ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 434 ; buffer := buffer + 1 ; Delay at assignment is 0 incf buffer,f ; code.delay=17 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=17 ; line_number = 433 ; if enable_mask & masks[temp] != 0 done decode__16: ; code.delay=11 back_code.delay=0 ; <=bit_code_emit@symbol; sym=decode__select__14 (data:X0=>X0 code:XX=>XX) ; if final true delay=17 false delay=5 code delay=11 ; line_number = 430 ; if received@2 done ; line_number = 438 ; state := 31 ; Delay at assignment is 11 movlw 31 movwf state ; Delay 21 cycles ; Delay loop takes 5 * 4 = 20 cycles movlw 5 decode__60: addlw 255 btfss __z___byte, __z___bit goto decode__60 nop goto decode__56 ; line_number = 439 ; case 3 decode__51: ; # Received = 1101 1xxx: ; line_number = 441 ; switch received & 7 start movlw decode__22>>8 movwf __pclath movlw 7 andwf received,w addlw decode__22 movwf __pcl ; page_group 8 decode__22: goto decode__19 goto decode__20 goto decode__21 goto decode__21 goto decode__21 goto decode__21 goto decode__21 goto decode__21 ; case_data[0] delay=4{0 } ; case_data[1] delay=2{1 } ; case_data[2] delay=0{2 3 4 5 6 7 } ; Maximum Case Delay = 4 ; line_number = 442 ; case 0 decode__19: ; # Read Enables (Received = 1101 1000): ; line_number = 444 ; buffer := enable_mask ; Delay at assignment is 0 movf enable_mask,w movwf buffer ; line_number = 445 ; state := 31 ; Delay at assignment is 2 movlw 31 movwf state goto decode__23 ; line_number = 446 ; case 1 decode__20: ; # Set Enables (Received = 1101 1001): ; line_number = 448 ; decode_state := 2 ; Delay at assignment is 0 movlw 2 movwf decode_state ; Delay 2 cycles goto decode__24 decode__24: goto decode__23 ; line_number = 449 ; case 2, 3, 4, 5, 6, 7 decode__21: ; line_number = 450 ; do_nothing ; Delay 4 cycles goto decode__25 decode__25: goto decode__26 decode__26: goto decode__23 decode__23: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 441 ; switch received & 7 done ; Delay 19 cycles ; Delay loop takes 4 * 4 = 16 cycles movlw 4 decode__61: addlw 255 bcf __rp0___byte, __rp0___bit btfss __z___byte, __z___bit goto decode__61 goto decode__62 decode__62: nop goto decode__56 ; line_number = 451 ; case 4, 5, 6 decode__52: ; # Received = 1110 0xxx, 1110 1xxx, or 1111 0xxx: ; # Do nothing: ; Delay 34 cycles ; Delay loop takes 8 * 4 = 32 cycles movlw 8 decode__63: addlw 255 btfss __z___byte, __z___bit goto decode__63 goto decode__64 decode__64: goto decode__56 ; line_number = 454 ; case 7 decode__53: ; # Shared Commands (Received = 1111 1xxx): ; line_number = 456 ; switch received & 7 start movlw decode__38>>8 movwf __pclath movlw 7 andwf received,w addlw decode__38 movwf __pcl ; page_group 8 decode__38: goto decode__30 goto decode__31 goto decode__32 goto decode__33 goto decode__34 goto decode__35 goto decode__36 goto decode__37 ; case_data[0] delay=3{0 } ; case_data[1] delay=3{1 } ; case_data[2] delay=6{2 } ; case_data[3] delay=4{3 } ; case_data[4] delay=23{4 } ; case_data[5] delay=2{5 } ; case_data[6] delay=6{6 } ; case_data[7] delay=3{7 } ; Maximum Case Delay = 23 ; line_number = 457 ; case 0 decode__30: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Decrement (Received = 1111 1000): ; line_number = 459 ; _osccal := _osccal - _osccal_lsb ; Delay at assignment is 0 movlw 252 addwf _osccal,f ; Delay 20 cycles ; Delay loop takes 5 * 4 = 20 cycles movlw 5 decode__40: addlw 255 bcf __rp0___byte, __rp0___bit btfss __z___byte, __z___bit goto decode__40 goto decode__39 ; line_number = 460 ; case 1 decode__31: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Increment (Received = 1111 1001): ; line_number = 462 ; _osccal := _osccal + _osccal_lsb ; Delay at assignment is 0 movlw 4 addwf _osccal,f ; Delay 20 cycles ; Delay loop takes 5 * 4 = 20 cycles movlw 5 decode__41: addlw 255 bcf __rp0___byte, __rp0___bit btfss __z___byte, __z___bit goto decode__41 goto decode__39 ; line_number = 463 ; case 2 decode__32: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Read (Received = 1111 1010): ; line_number = 465 ; buffer := _osccal ; Delay at assignment is 0 movf _osccal,w bcf __rp0___byte, __rp0___bit movwf buffer ; line_number = 466 ; state := 31 ; Delay at assignment is 3 movlw 31 movwf state ; Delay 17 cycles ; Delay loop takes 4 * 4 = 16 cycles movlw 4 decode__42: addlw 255 btfss __z___byte, __z___bit goto decode__42 nop goto decode__39 ; line_number = 467 ; case 3 decode__33: ; # Clock Pulse (Received = 1111 1011): ; line_number = 469 ; buffer := 0 ; Delay at assignment is 0 movlw 0 movwf buffer ; line_number = 470 ; state := 31 ; Delay at assignment is 2 movlw 31 movwf state ; Delay 19 cycles ; Delay loop takes 4 * 4 = 16 cycles movlw 4 decode__43: addlw 255 btfss __z___byte, __z___bit goto decode__43 goto decode__44 decode__44: nop goto decode__39 ; line_number = 471 ; case 4 decode__34: ; # ID Next (Received = 1111 1100): ; line_number = 473 ; buffer := 0 ; Delay at assignment is 0 movlw 0 movwf buffer ; line_number = 474 ; if id_index < id.size start ; Delay at if is 2 movlw 48 subwf id_index,w ; (after recombine) true_delay=0, false_delay=14 uniform_delay=true ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=14 (uniform delay) btfss __c___byte, __c___bit goto decode__27 ; Delay 13 cycles ; Delay loop takes 3 * 4 = 12 cycles movlw 3 decode__29: addlw 255 btfss __z___byte, __z___bit goto decode__29 nop goto decode__28 decode__27: ; line_number = 475 ; buffer := id[id_index] ; Delay at assignment is 0 movf id_index,w call id movwf buffer ; line_number = 476 ; id_index := id_index + 1 ; Delay at assignment is 13 incf id_index,f decode__28: ; code.delay=21 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=14 false delay=0 code delay=21 ; line_number = 474 ; if id_index < id.size done ; line_number = 477 ; state := 31 ; Delay at assignment is 21 movlw 31 movwf state goto decode__39 ; line_number = 478 ; case 5 decode__35: ; # ID Reset (Received = 1111 1101): ; line_number = 480 ; id_index := 0 ; Delay at assignment is 0 movlw 0 movwf id_index ; Delay 21 cycles ; Delay loop takes 5 * 4 = 20 cycles movlw 5 decode__45: addlw 255 btfss __z___byte, __z___bit goto decode__45 nop goto decode__39 ; line_number = 481 ; case 6 decode__36: ; # Glitch Read (Received = 1111 1110): ; line_number = 483 ; buffer := glitch ; Delay at assignment is 0 movf glitch,w movwf buffer ; line_number = 484 ; state := 31 ; Delay at assignment is 2 movlw 31 movwf state ; line_number = 485 ; glitch := 0 ; Delay at assignment is 4 movlw 0 movwf glitch ; Delay 17 cycles ; Delay loop takes 4 * 4 = 16 cycles movlw 4 decode__46: addlw 255 btfss __z___byte, __z___bit goto decode__46 nop goto decode__39 ; line_number = 486 ; case 7 decode__37: ; # Glitch (Received = 1111 1111): ; line_number = 488 ; if glitch != 0xff start ; Delay at if is 0 ; Left minus Right incf glitch,w ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 489 ; glitch := glitch + 1 ; Delay at assignment is 0 incf glitch,f ; code.delay=3 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=3 ; line_number = 488 ; if glitch != 0xff done ; Delay 20 cycles ; Delay loop takes 5 * 4 = 20 cycles movlw 5 decode__47: addlw 255 btfss __z___byte, __z___bit goto decode__47 goto decode__39 decode__39: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 456 ; switch received & 7 done goto decode__56 decode__56: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 414 ; switch (received >> 3) & 7 done goto decode__71 decode__71: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 394 ; switch received >> 6 done goto decode__83 ; line_number = 490 ; case 1 decode__80: ; # Set Position/Enable (2nd byte = pppp pppp): ; line_number = 492 ; decode_state := 0 ; Delay at assignment is 0 movlw 0 movwf decode_state ; line_number = 493 ; temp := previous & servos_index_mask ; Delay at assignment is 2 movlw 3 andwf previous,w movwf decode__temp ; line_number = 494 ; positions[temp] := received ; Delay at assignment is 5 ; index_fsr_first movf decode__temp,w addlw positions movwf __fsr movf received,w movwf __indf ; line_number = 495 ; temp := masks[temp] ; Delay at assignment is 10 movf decode__temp,w call masks movwf decode__temp ; line_number = 496 ; if previous@2 start ; Delay at if is 23 decode__select__76___byte equ previous decode__select__76___bit equ 2 ; (after recombine) true_delay=2, false_delay=3 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=2 false_code_size=3 btfss decode__select__76___byte, decode__select__76___bit goto decode__77 ; line_number = 497 ; enable_mask := enable_mask | temp ; Delay at assignment is 0 movf decode__temp,w iorwf enable_mask,f ; Delay 0 cycles goto decode__78 decode__77: ; line_number = 499 ; enable_mask := enable_mask & (0xff ^ temp) ; Delay at assignment is 0 movlw 255 xorwf decode__temp,w andwf enable_mask,f decode__78: ; code.delay=29 back_code.delay=0 ; <=bit_code_emit@symbol; sym=decode__select__76 (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=3 code delay=29 ; line_number = 496 ; if previous@2 done ; Delay 33 cycles ; Delay loop takes 8 * 4 = 32 cycles movlw 8 decode__84: addlw 255 btfss __z___byte, __z___bit goto decode__84 nop goto decode__83 ; line_number = 500 ; case 2 decode__81: ; # Set Enables (2nd byte = 0000 eeee): ; line_number = 502 ; decode_state := 0 ; Delay at assignment is 0 movlw 0 movwf decode_state ; line_number = 503 ; enable_mask := received & 0xf ; Delay at assignment is 2 movlw 15 andwf received,w movwf enable_mask ; Delay 57 cycles ; Delay loop takes 14 * 4 = 56 cycles movlw 14 decode__85: addlw 255 btfss __z___byte, __z___bit goto decode__85 nop goto decode__83 decode__83: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 391 ; switch decode_state done ; delay after procedure statements=72 bcf __rp0___byte, __rp0___bit ; Delay 0 cycles ; Implied return retlw 0 ; Final delay = 75 ; line_number = 506 ; constant zero8 = "\0,0,0,0,0,0,0,0\" ; zero8 = '\0,0,0,0,0,0,0,0\' ; line_number = 507 ; constant module_name = "\7\Servo4E" ; module_name = '\7\Servo4E' ; line_number = 508 ; constant vendor_name = "\15\Gramlich&Benson" ; vendor_name = '\15\Gramlich&Benson' ; line_number = 510 ; string id = "\1,0,15,4,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; id = '\1,0,15,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,7\Servo4E\15\Gramlich&Benson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 48 ; Add 24 NOP's until start of new page nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop id___base: retlw 1 retlw 0 retlw 15 retlw 4 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 7 retlw 83 retlw 101 retlw 114 retlw 118 retlw 111 retlw 52 retlw 69 retlw 15 retlw 71 retlw 114 retlw 97 retlw 109 retlw 108 retlw 105 retlw 99 retlw 104 retlw 38 retlw 66 retlw 101 retlw 110 retlw 115 retlw 111 retlw 110 ; line_number = 510 ; string id = "\1,0,15,4,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; line_number = 511 ; string masks = "\1,2,4,8\" start ; masks = '\1,2,4,8\' masks: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw masks___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw masks___base ; Index to the correct return value movwf __pcl ; page_group 4 masks___base: retlw 1 retlw 2 retlw 4 retlw 8 ; line_number = 511 ; string masks = "\1,2,4,8\" start ; Configuration bits ; fill = 0x0 ; bg = bg11 (0x3000) ; cpd = off (0x100) ; cp = on (0x0) ; boden = off (0x0) ; mclre = off (0x0) ; pwrte = off (0x10) ; wdte = on (0x8) ; fosc = rc_no_clk (0x6) ; 12574 = 0x311e __config 12574 ; Define start addresses for data regions ; Region="shared___globals" Address=32" Size=64 Bytes=22 Bits=1 Available=41 ; Region="shared___globals" Address=32" Size=64 Bytes=22 Bits=1 Available=41 ; Region="shared___globals" Address=32" Size=64 Bytes=22 Bits=1 Available=41 end