radix dec ; Code bank 0; Start address: 0; End address: 1023 org 0 ; Define start addresses for data regions shared___globals equ 32 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2000-2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = 'rotation2' ; line_number = 6 ; library _pic16f630 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f630' ; line_number = 5 ; processor pic16f630 ; line_number = 6 ; configure_address 0x2007 ; line_number = 7 ; configure_fill 0x0000 ; line_number = 8 ; configure_option bg: bg11 = 0x3000 ; line_number = 9 ; configure_option bg: bg10 = 0x2000 ; line_number = 10 ; configure_option bg: bg01 = 0x1000 ; line_number = 11 ; configure_option bg: bg00 = 0x0000 ; line_number = 12 ; configure_option cpd: on = 0x000 ; line_number = 13 ; configure_option cpd: off = 0x100 ; line_number = 14 ; configure_option cp: on = 0x00 ; line_number = 15 ; configure_option cp: off = 0x80 ; line_number = 16 ; configure_option boden: on = 0x40 ; line_number = 17 ; configure_option boden: off = 0x00 ; line_number = 18 ; configure_option mclre: on = 0x20 ; line_number = 19 ; configure_option mclre: off = 0x00 ; line_number = 20 ; configure_option pwrte: on = 0x00 ; line_number = 21 ; configure_option pwrte: off = 0x10 ; line_number = 22 ; configure_option wdte: on = 8 ; line_number = 23 ; configure_option wdte: off = 0 ; line_number = 24 ; configure_option fosc: rc_clk = 7 ; line_number = 25 ; configure_option fosc: rc_no_clk = 6 ; line_number = 26 ; configure_option fosc: int_clk = 5 ; line_number = 27 ; configure_option fosc: int_no_clk = 4 ; line_number = 28 ; configure_option fosc: ec = 3 ; line_number = 29 ; configure_option fosc: hs = 2 ; line_number = 30 ; configure_option fosc: xt = 1 ; line_number = 31 ; configure_option fosc: lp = 0 ; line_number = 32 ; code_bank 0x0 : 0x3ff ; line_number = 33 ; data_bank 0x0 : 0x7f ; line_number = 34 ; data_bank 0x80 : 0xff ; line_number = 35 ; shared_region 0x20 : 0x5f ; line_number = 36 ; interrupts_possible ; line_number = 37 ; osccal_register_symbol _osccal ; line_number = 38 ; osccal_at_address 0x3ff ; line_number = 39 ; packages pdip=14, soic=14, tssop=14 ; line_number = 40 ; pin vdd, power_supply ; line_number = 41 ; pin_bindings pdip=1, soic=1, tssop=1 ; line_number = 42 ; pin ra5_in, ra5_out, t1cki, osc1, clkin, ra5_unused ; line_number = 43 ; pin_bindings pdip=2, soic=2, tssop=2 ; line_number = 44 ; bind_to _porta@5 ; line_number = 45 ; or_if ra5_in _trisa 16 ; line_number = 46 ; or_if ra5_out _trisa 0 ; line_number = 47 ; pin ra4_in, ra4_out, t1g, osc2, clkout, ra4_unused ; line_number = 48 ; pin_bindings pdip=3, soic=3, tssop=3 ; line_number = 49 ; bind_to _porta@4 ; line_number = 50 ; or_if ra4_in _trisa 8 ; line_number = 51 ; or_if ra4_out _trisa 0 ; line_number = 52 ; pin ra3_in, mclr, vpp, ra3_unused ; line_number = 53 ; pin_bindings pdip=4, soic=4, tssop=4 ; line_number = 54 ; bind_to _porta@3 ; line_number = 55 ; or_if ra3_in _trisa 4 ; line_number = 56 ; pin rc5_in, rc5_out, rc5_unused ; line_number = 57 ; pin_bindings pdip=5, soic=5, tssop=5 ; line_number = 58 ; bind_to _portc@5 ; line_number = 59 ; or_if rc5_in _trisc 32 ; line_number = 60 ; or_if rc5_out _trisc 0 ; line_number = 61 ; pin rc4_in, rc4_out, rc4_unused ; line_number = 62 ; pin_bindings pdip=6, soic=6, tssop=6 ; line_number = 63 ; bind_to _portc@4 ; line_number = 64 ; or_if rc4_in _trisc 16 ; line_number = 65 ; or_if rc4_out _trisc 0 ; line_number = 66 ; pin rc3_in, rc3_out, r3_unused ; line_number = 67 ; pin_bindings pdip=7, soic=7, tssop=7 ; line_number = 68 ; bind_to _portc@3 ; line_number = 69 ; or_if rc3_in _trisc 8 ; line_number = 70 ; or_if rc3_out _trisc 0 ; line_number = 71 ; pin rc2_in, rc2_out, rc2_unused ; line_number = 72 ; pin_bindings pdip=8, soic=8, tssop=8 ; line_number = 73 ; bind_to _portc@2 ; line_number = 74 ; or_if rc2_in _trisc 4 ; line_number = 75 ; or_if rc2_out _trisc 0 ; line_number = 76 ; pin rc1_in, rc1_out, rc1_unused ; line_number = 77 ; pin_bindings pdip=9, soic=9, tssop=9 ; line_number = 78 ; bind_to _portc@1 ; line_number = 79 ; or_if rc1_in _trisc 2 ; line_number = 80 ; or_if rc1_out _trisc 0 ; line_number = 81 ; pin rc0_in, rc0_out, rc0_unused ; line_number = 82 ; pin_bindings pdip=10, soic=10, tssop=10 ; line_number = 83 ; bind_to _portc@0 ; line_number = 84 ; or_if rc0_in _trisc 1 ; line_number = 85 ; or_if rc0_out _trisc 0 ; line_number = 86 ; pin ra2_in, ra2_out, cout, t0cki, int, ra2_unused ; line_number = 87 ; pin_bindings pdip=11, soic=11, tssop=11 ; line_number = 88 ; bind_to _porta@2 ; line_number = 89 ; or_if ra2_in _trisa 4 ; line_number = 90 ; or_if ra2_out _trisa 0 ; line_number = 91 ; pin ra1_in, ra1_out, cin_minus, vref, icspclk, ra1_unused ; line_number = 92 ; pin_bindings pdip=12, soic=12, tssop=12 ; line_number = 93 ; bind_to _porta@1 ; line_number = 94 ; or_if ra1_in _trisa 2 ; line_number = 95 ; or_if ra1_out _trisa 0 ; line_number = 96 ; pin ra0_in, ra0_out, cin_plus, icspdat, ra0_unused ; line_number = 97 ; pin_bindings pdip=13, soic=13, tssop=13 ; line_number = 98 ; bind_to _porta@0 ; line_number = 99 ; or_if ra0_in _trisa 1 ; line_number = 100 ; or_if ra0_out _trisa 0 ; line_number = 101 ; pin vss, ground ; line_number = 102 ; pin_bindings pdip=14, soic=14, tssop=14 ; line_number = 107 ; library _pic16f630_676 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # Shared register definitions for the PIC16F630 and PIC16F676. ; buffer = '_pic16f630_676' ; line_number = 7 ; register _indf = _indf equ 0 ; line_number = 9 ; register _tmr0 = _tmr0 equ 1 ; line_number = 11 ; register _pcl = _pcl equ 2 ; line_number = 13 ; register _status = _status equ 3 ; line_number = 14 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 15 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 16 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 17 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 18 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 19 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 21 ; register _fsr = _fsr equ 4 ; line_number = 23 ; register _porta = _porta equ 5 ; line_number = 24 ; register _ra = _ra equ 5 ; line_number = 25 ; bind _ra5 = _porta@5 _ra5___byte equ _porta _ra5___bit equ 5 ; line_number = 26 ; bind _ra4 = _porta@4 _ra4___byte equ _porta _ra4___bit equ 4 ; line_number = 27 ; bind _ra3 = _porta@3 _ra3___byte equ _porta _ra3___bit equ 3 ; line_number = 28 ; bind _ra2 = _porta@2 _ra2___byte equ _porta _ra2___bit equ 2 ; line_number = 29 ; bind _ra1 = _porta@1 _ra1___byte equ _porta _ra1___bit equ 1 ; line_number = 30 ; bind _ra0 = _porta@0 _ra0___byte equ _porta _ra0___bit equ 0 ; line_number = 32 ; register _portc = _portc equ 7 ; line_number = 33 ; register _rc = _rc equ 7 ; line_number = 34 ; bind _rc5 = _portc@5 _rc5___byte equ _portc _rc5___bit equ 5 ; line_number = 35 ; bind _rc4 = _portc@4 _rc4___byte equ _portc _rc4___bit equ 4 ; line_number = 36 ; bind _rc3 = _portc@3 _rc3___byte equ _portc _rc3___bit equ 3 ; line_number = 37 ; bind _rc2 = _portc@2 _rc2___byte equ _portc _rc2___bit equ 2 ; line_number = 38 ; bind _rc1 = _portc@1 _rc1___byte equ _portc _rc1___bit equ 1 ; line_number = 39 ; bind _rc0 = _portc@0 _rc0___byte equ _portc _rc0___bit equ 0 ; line_number = 41 ; register _pclath = _pclath equ 10 ; line_number = 43 ; register _intcon = _intcon equ 11 ; line_number = 44 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 45 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 46 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 47 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 48 ; bind _raie = _intcon@3 _raie___byte equ _intcon _raie___bit equ 3 ; line_number = 49 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 50 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 51 ; bind _raif = _intcon@0 _raif___byte equ _intcon _raif___bit equ 0 ; line_number = 53 ; register _pir1 = _pir1 equ 12 ; line_number = 54 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 55 ; bind _cmif = _pir1@3 _cmif___byte equ _pir1 _cmif___bit equ 3 ; line_number = 56 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 58 ; register _tmr1l = _tmr1l equ 14 ; line_number = 60 ; register _tmr1h = _tmr1h equ 15 ; line_number = 62 ; register _t1con = _t1con equ 16 ; line_number = 63 ; bind _t1ge = _t1con@6 _t1ge___byte equ _t1con _t1ge___bit equ 6 ; line_number = 64 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 65 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 66 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 67 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 68 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 69 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 71 ; register _cmcon = _cmcon equ 25 ; line_number = 72 ; bind _cout = _cmcon@6 _cout___byte equ _cmcon _cout___bit equ 6 ; line_number = 73 ; bind _cinv = _cmcon@4 _cinv___byte equ _cmcon _cinv___bit equ 4 ; line_number = 74 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 75 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 76 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 77 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 81 ; register _option_reg = _option_reg equ 128 ; line_number = 82 ; bind _rapu = _option_reg@7 _rapu___byte equ _option_reg _rapu___bit equ 7 ; line_number = 83 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 84 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 85 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 86 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 87 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 88 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 89 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 91 ; register _trisa = _trisa equ 133 ; line_number = 92 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 93 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 94 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 95 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 96 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 97 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 99 ; register _trisc = _trisc equ 135 ; line_number = 100 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 101 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 102 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 103 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 104 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 105 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 107 ; register _pie1 = _pie1 equ 140 ; line_number = 108 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 109 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 110 ; bind _cmie = _pie1@3 _cmie___byte equ _pie1 _cmie___bit equ 3 ; line_number = 111 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 113 ; register _pcon = _pcon equ 142 ; line_number = 114 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 115 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 117 ; register _osccal = _osccal equ 144 ; line_number = 118 ; bind _cal5 = _osccal@7 _cal5___byte equ _osccal _cal5___bit equ 7 ; line_number = 119 ; bind _cal4 = _osccal@6 _cal4___byte equ _osccal _cal4___bit equ 6 ; line_number = 120 ; bind _cal3 = _osccal@5 _cal3___byte equ _osccal _cal3___bit equ 5 ; line_number = 121 ; bind _cal2 = _osccal@4 _cal2___byte equ _osccal _cal2___bit equ 4 ; line_number = 122 ; bind _cal1 = _osccal@3 _cal1___byte equ _osccal _cal1___bit equ 3 ; line_number = 123 ; bind _cal0 = _osccal@2 _cal0___byte equ _osccal _cal0___bit equ 2 ; line_number = 124 ; constant _osccal_lsb = 4 _osccal_lsb equ 4 ; line_number = 126 ; register _wpua = _wpua equ 149 ; line_number = 127 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 128 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 129 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 130 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 131 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 133 ; register _ioca = _ioca equ 150 ; line_number = 134 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 135 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 136 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 137 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 138 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 139 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 141 ; register _vrcon = _vrcon equ 153 ; line_number = 142 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 143 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 144 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 145 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 146 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 147 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 149 ; register _eedata = _eedata equ 154 ; line_number = 151 ; register _eeadr = _eeadr equ 155 ; line_number = 153 ; register _eecon1 = _eecon1 equ 156 ; line_number = 154 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 155 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 156 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 157 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 159 ; register _eecon2 = _eecon2 equ 157 ; buffer = '_pic16f630' ; line_number = 107 ; library _pic16f630_676 exited ; buffer = 'rotation2' ; line_number = 6 ; library _pic16f630 exited ; line_number = 7 ; library clock4mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock4mhz' ; line_number = 9 ; constant clock_rate = 4000000 clock_rate equ 4000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 1000000 ; buffer = 'rotation2' ; line_number = 7 ; library clock4mhz exited ; line_number = 8 ; library bit_bang entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library provides bit bang routines for sending and receiving ; # serial data at 2400 baud in 8N1 format (1 start bit, 8 data bits, ; # No parity bit, 1 stop stop bit.) ; # ; # This library requires that the pins {serial_in} and {serial_out} ; # be defined. In addition, the variable {instruction_rate} needs ; # to be defined. Lastly, there needs to be a {delay} procedure ; # with an "exact_delay delay_instructions" clause in it. The {delay} ; # routine should invoke "watch_dog_reset" so that the watch dog time ; # can be set. ; # Define some constants that we will be needing: ; buffer = 'bit_bang' ; line_number = 17 ; constant baud_rate = 2400 baud_rate equ 2400 ; line_number = 18 ; constant instructions_per_bit = instruction_rate / baud_rate instructions_per_bit equ 416 ; line_number = 19 ; constant delays_per_bit = 3 delays_per_bit equ 3 ; line_number = 20 ; constant instructions_per_delay = instructions_per_bit / delays_per_bit instructions_per_delay equ 138 ; line_number = 21 ; constant extra_instructions = 5 extra_instructions equ 5 ; line_number = 22 ; constant delay_instructions = instructions_per_delay - extra_instructions delay_instructions equ 133 ; # The {receiving} bit is sent when data is being received. ; # It gets cleared whenever data gets sent. It is used to ; # determine whether additional delay is needed to turn a ; # line around for slow interpretted chips like the Basic ; # Stamp 2 and the OOPIC. ; line_number = 30 ; global receiving bit receiving___byte equ shared___globals+63 receiving___bit equ 0 ; line_number = 31 ; global waiting bit waiting___byte equ shared___globals+63 waiting___bit equ 1 ; Delaying code generation for procedure byte_get ; Delaying code generation for procedure byte_put ; buffer = 'rotation2' ; line_number = 8 ; library bit_bang exited ; line_number = 10 ; package pdip ; line_number = 11 ; pin 1 = power_supply ; line_number = 12 ; pin 2 = ra5_unused ; line_number = 13 ; pin 3 = ra4_in, name = in3 in3___byte equ _porta in3___bit equ 4 ; line_number = 14 ; pin 4 = ra3_in, name = in2 in2___byte equ _porta in2___bit equ 3 ; line_number = 15 ; pin 5 = rc5_in, name = serial_in serial_in___byte equ _portc serial_in___bit equ 5 ; line_number = 16 ; pin 6 = rc4_out, name = serial_out serial_out___byte equ _portc serial_out___bit equ 4 ; line_number = 17 ; pin 7 = rc3_out, name = led3 led3___byte equ _portc led3___bit equ 3 ; line_number = 18 ; pin 8 = rc2_out, name = led2 led2___byte equ _portc led2___bit equ 2 ; line_number = 19 ; pin 9 = rc1_out, name = led1 led1___byte equ _portc led1___bit equ 1 ; line_number = 20 ; pin 10 = rc0_out, name = led0 led0___byte equ _portc led0___bit equ 0 ; line_number = 21 ; pin 11 = ra2_in, name = pullups pullups___byte equ _porta pullups___bit equ 2 ; line_number = 22 ; pin 12 = ra1_in, name = in1 in1___byte equ _porta in1___bit equ 1 ; line_number = 23 ; pin 13 = ra0_in, name = in0 in0___byte equ _porta in0___bit equ 0 ; line_number = 24 ; pin 14 = ground ; # Shaft state variables: ; line_number = 27 ; global shaft0 byte shaft0 equ shared___globals+4 ; line_number = 28 ; global shaft1 byte shaft1 equ shared___globals+5 ; # Shaft counters: ; line_number = 31 ; global shaft0_high byte shaft0_high equ shared___globals+6 ; line_number = 32 ; global shaft0_low byte shaft0_low equ shared___globals+7 ; line_number = 33 ; global shaft1_high byte shaft1_high equ shared___globals+8 ; line_number = 34 ; global shaft1_low byte shaft1_low equ shared___globals+9 ; # Shaft low threshold counters: ; line_number = 37 ; global shaft0_low_high byte shaft0_low_high equ shared___globals+10 ; line_number = 38 ; global shaft0_low_low byte shaft0_low_low equ shared___globals+11 ; line_number = 39 ; global shaft1_low_high byte shaft1_low_high equ shared___globals+12 ; line_number = 40 ; global shaft1_low_low byte shaft1_low_low equ shared___globals+13 ; # Shaft high threshold counters: ; line_number = 43 ; global shaft0_high_high byte shaft0_high_high equ shared___globals+14 ; line_number = 44 ; global shaft0_high_low byte shaft0_high_low equ shared___globals+15 ; line_number = 45 ; global shaft1_high_high byte shaft1_high_high equ shared___globals+16 ; line_number = 46 ; global shaft1_high_low byte shaft1_high_low equ shared___globals+17 ; # Interrupt and shaft direction bits: ; line_number = 49 ; global interrupt_pending bit interrupt_pending___byte equ shared___globals+63 interrupt_pending___bit equ 2 ; line_number = 50 ; global interrupt_enable bit interrupt_enable___byte equ shared___globals+63 interrupt_enable___bit equ 3 ; line_number = 51 ; global shaft0_direction bit shaft0_direction___byte equ shared___globals+63 shaft0_direction___bit equ 4 ; line_number = 52 ; global shaft1_direction bit shaft1_direction___byte equ shared___globals+63 shaft1_direction___bit equ 5 ; line_number = 54 ; global command_previous byte command_previous equ shared___globals+18 ; line_number = 55 ; global command_last byte command_last equ shared___globals+19 ; line_number = 56 ; global sent_previous byte sent_previous equ shared___globals+20 ; line_number = 57 ; global sent_last byte sent_last equ shared___globals+21 ; line_number = 59 ; procedure main main: ; Need to calibrate the oscillator call 1023 bsf __rp0___byte, __rp0___bit movwf _osccal ; Initialize some registers movlw 15 movwf _trisa movlw 32 movwf _trisc ; arguments_none ; line_number = 61 ; returns_nothing ; line_number = 63 ; local command byte main__command equ shared___globals+22 ; line_number = 64 ; local glitch byte main__glitch equ shared___globals+23 ; line_number = 65 ; local id_index byte main__id_index equ shared___globals+24 ; line_number = 66 ; local high byte main__high equ shared___globals+25 ; line_number = 67 ; local index byte main__index equ shared___globals+26 ; line_number = 68 ; local result byte main__result equ shared___globals+27 ; line_number = 69 ; local temp byte main__temp equ shared___globals+28 ; # Initialize everything: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) ; line_number = 72 ; shaft0 := 0 movlw 0 bcf __rp0___byte, __rp0___bit movwf shaft0 ; line_number = 73 ; shaft0_direction := 0 bcf shaft0_direction___byte, shaft0_direction___bit ; line_number = 74 ; shaft0_high := 0 movlw 0 movwf shaft0_high ; line_number = 75 ; shaft0_low := 0 movlw 0 movwf shaft0_low ; line_number = 76 ; shaft1 := 0 movlw 0 movwf shaft1 ; line_number = 77 ; shaft1_high := 0 movlw 0 movwf shaft1_high ; line_number = 78 ; shaft1_low := 0 movlw 0 movwf shaft1_low ; line_number = 79 ; shaft1_direction := 0 bcf shaft1_direction___byte, shaft1_direction___bit ; line_number = 80 ; interrupt_enable := 0 bcf interrupt_enable___byte, interrupt_enable___bit ; line_number = 81 ; interrupt_pending := 0 bcf interrupt_pending___byte, interrupt_pending___bit ; line_number = 82 ; glitch := 0 movlw 0 movwf main__glitch ; line_number = 83 ; id_index := 0 movlw 0 movwf main__id_index ; # Set up pull-ups: ; line_number = 86 ; command := 0xff movlw 255 movwf main__command ; line_number = 87 ; if pullups start ; =>bit_code_emit@symbol(): sym=pullups ; CASE: True.size=1 False.size=0 btfsc pullups___byte, pullups___bit ; line_number = 88 ; command@6 := 0 main__select__1___byte equ main__command main__select__1___bit equ 6 bcf main__select__1___byte, main__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=pullups (data:X0=>X0 code:XX=>XX) ; line_number = 87 ; if pullups done ; line_number = 89 ; assemble ; line_number = 90 movf main__command,w ; line_number = 91 option ; # Loop waiting for commands: ; line_number = 94 ; loop_forever start main__2: ; # Get a command byte: ; line_number = 96 ; command := byte_get() call byte_get movwf main__command ; # Dispatch on command: ; line_number = 99 ; switch command >> 6 start movlw main__70>>8 movwf __pclath main__71 equ shared___globals+30 swapf main__command,w movwf main__71 rrf main__71,f rrf main__71,w andlw 3 addlw main__70 movwf __pcl ; page_group 4 main__70: goto main__67 goto main__68 goto main__68 goto main__69 ; line_number = 100 ; case 0 main__67: ; # Command = 00xx xxxx: ; line_number = 102 ; switch (command >> 3) & 7 start movlw main__36>>8 movwf __pclath main__37 equ shared___globals+30 rrf main__command,w movwf main__37 rrf main__37,f rrf main__37,w andlw 7 addlw main__36 movwf __pcl ; page_group 8 main__36: goto main__32 goto main__33 goto main__34 goto main__35 goto main__35 goto main__35 goto main__35 goto main__35 ; line_number = 103 ; case 0 main__32: ; # Command = 0000 0xxx: ; line_number = 105 ; switch command & 7 start movlw main__11>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__11 movwf __pcl ; page_group 8 main__11: goto main__3 goto main__4 goto main__5 goto main__6 goto main__7 goto main__8 goto main__9 goto main__10 ; line_number = 106 ; case 0 main__3: ; # Read Shaft 0 (Command = 0000 0000): ; line_number = 108 ; call byte_put(shaft0_high) movf shaft0_high,w call byte_put ; line_number = 109 ; call byte_put(shaft0_low) movf shaft0_low,w call byte_put goto main__12 ; line_number = 110 ; case 1 main__4: ; # Read Shaft 1 (Command = 0000 0001): ; line_number = 112 ; call byte_put(shaft1_high) movf shaft1_high,w call byte_put ; line_number = 113 ; call byte_put(shaft1_low) movf shaft1_low,w call byte_put goto main__12 ; line_number = 114 ; case 2 main__5: ; # Read Shaft Low 0 (Command = 0000 0010): ; line_number = 116 ; call byte_put(shaft0_low) movf shaft0_low,w call byte_put goto main__12 ; line_number = 117 ; case 3 main__6: ; # Read Shaft Low 1 (Command = 0000 0011): ; line_number = 119 ; call byte_put(shaft1_low) movf shaft1_low,w call byte_put goto main__12 ; line_number = 120 ; case 4 main__7: ; # Set Shaft 0 (Command = 0000 0100): ; line_number = 122 ; high := byte_get() call byte_get movwf main__high ; line_number = 123 ; shaft0_low := byte_get() call byte_get movwf shaft0_low ; line_number = 124 ; shaft0_high := high movf main__high,w movwf shaft0_high goto main__12 ; line_number = 125 ; case 5 main__8: ; # Set Shaft 1 (Command = 0000 0101): ; line_number = 127 ; high := byte_get() call byte_get movwf main__high ; line_number = 128 ; shaft1_low := byte_get() call byte_get movwf shaft1_low ; line_number = 129 ; shaft1_high := high movf main__high,w movwf shaft1_high goto main__12 ; line_number = 130 ; case 6 main__9: ; # Set Shaft Low 0 (Command = 0000 0110): ; line_number = 132 ; shaft0_low := byte_get() call byte_get movwf shaft0_low goto main__12 ; line_number = 133 ; case 7 main__10: ; # Set Shaft Low 1 (Command = 0000 0111): ; line_number = 135 ; shaft1_low := byte_get() call byte_get movwf shaft1_low main__12: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 105 ; switch command & 7 done goto main__38 ; line_number = 136 ; case 1 main__33: ; # Command = 0000 1xxx: ; line_number = 138 ; switch command & 7 start movlw main__20>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__20 movwf __pcl ; page_group 8 main__20: goto main__13 goto main__14 goto main__15 goto main__16 goto main__17 goto main__18 goto main__19 goto main__19 ; line_number = 139 ; case 0 main__13: ; # Increment Shaft 0 (Command = 0000 1000): ; line_number = 141 ; shaft0_low := shaft0_low + 1 incf shaft0_low,f ; line_number = 142 ; if _z start ; =>bit_code_emit@symbol(): sym=_z ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 143 ; shaft0_high := shaft0_high + 1 incf shaft0_high,f ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; line_number = 142 ; if _z done goto main__21 ; line_number = 144 ; case 1 main__14: ; # Increment Shaft 1 (Command = 0000 1001): ; line_number = 146 ; shaft1_low := shaft1_low + 1 incf shaft1_low,f ; line_number = 147 ; if _z start ; =>bit_code_emit@symbol(): sym=_z ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 148 ; shaft1_high := shaft1_high + 1 incf shaft1_high,f ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; line_number = 147 ; if _z done goto main__21 ; line_number = 149 ; case 2 main__15: ; # Decrement Shaft 0 (Command = 0000 1010): ; line_number = 151 ; if shaft0_low = 0 start ; Left minus Right movf shaft0_low,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: True.size=1 False.size=0 btfsc __z___byte, __z___bit ; line_number = 152 ; shaft0_high := shaft0_high - 1 decf shaft0_high,f ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 151 ; if shaft0_low = 0 done ; line_number = 153 ; shaft0_low := shaft0_low - 1 decf shaft0_low,f goto main__21 ; line_number = 154 ; case 3 main__16: ; # Decrement Shaft 1 (Command = 0000 1011): ; line_number = 156 ; if shaft1_low = 0 start ; Left minus Right movf shaft1_low,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: True.size=1 False.size=0 btfsc __z___byte, __z___bit ; line_number = 157 ; shaft1_high := shaft1_high - 1 decf shaft1_high,f ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 156 ; if shaft1_low = 0 done ; line_number = 158 ; shaft1_low := shaft1_low - 1 decf shaft1_low,f goto main__21 ; line_number = 159 ; case 4 main__17: ; # Clear Shaft 0 (Command = 0000 1100): ; line_number = 161 ; shaft0_low := 0 movlw 0 movwf shaft0_low ; line_number = 162 ; shaft0_high := 0 movlw 0 movwf shaft0_high goto main__21 ; line_number = 163 ; case 5 main__18: ; # Clear Shaft 1 (Command = 0000 1101): ; line_number = 165 ; shaft1_low := 0 movlw 0 movwf shaft1_low ; line_number = 166 ; shaft1_high := 0 movlw 0 movwf shaft1_high goto main__21 ; line_number = 167 ; case 6, 7 main__19: ; # Command = 0000 111x: ; line_number = 169 ; do_nothing main__21: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 138 ; switch command & 7 done goto main__38 ; line_number = 170 ; case 2 main__34: ; # Command = 0001 0xxx: ; line_number = 172 ; switch command & 7 start movlw main__30>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__30 movwf __pcl ; page_group 8 main__30: goto main__22 goto main__23 goto main__24 goto main__25 goto main__26 goto main__27 goto main__28 goto main__29 ; line_number = 173 ; case 0 main__22: ; # Set High Threshold 0 (Command = 0001 0000): ; line_number = 175 ; high := byte_get() call byte_get movwf main__high ; line_number = 176 ; shaft0_high_low := byte_get() call byte_get movwf shaft0_high_low ; line_number = 177 ; shaft0_high_high := high movf main__high,w movwf shaft0_high_high goto main__31 ; line_number = 178 ; case 1 main__23: ; # Set High Threshold 1 (Command = 0001 0001): ; line_number = 180 ; high := byte_get() call byte_get movwf main__high ; line_number = 181 ; shaft1_high_low := byte_get() call byte_get movwf shaft1_high_low ; line_number = 182 ; shaft1_high_high := high movf main__high,w movwf shaft1_high_high goto main__31 ; line_number = 183 ; case 2 main__24: ; # Set Low Threshold 0 (Command = 0001 0010): ; line_number = 185 ; high := byte_get() call byte_get movwf main__high ; line_number = 186 ; shaft0_low_low := byte_get() call byte_get movwf shaft0_low_low ; line_number = 187 ; shaft0_low_high := high movf main__high,w movwf shaft0_low_high goto main__31 ; line_number = 188 ; case 3 main__25: ; # Set Low Threshold 1 (Command = 0001 0011): ; line_number = 190 ; high := byte_get() call byte_get movwf main__high ; line_number = 191 ; shaft1_low_low := byte_get() call byte_get movwf shaft1_low_low ; line_number = 192 ; shaft1_low_high := high movf main__high,w movwf shaft1_low_high goto main__31 ; line_number = 193 ; case 4 main__26: ; # Read High Threshold 0 (Command = 0001 0100): ; line_number = 195 ; call byte_put(shaft0_high_high) movf shaft0_high_high,w call byte_put ; line_number = 196 ; call byte_put(shaft0_high_low) movf shaft0_high_low,w call byte_put goto main__31 ; line_number = 197 ; case 5 main__27: ; # Read High Threshold 1 (Command = 0001 0101): ; line_number = 199 ; call byte_put(shaft1_high_high) movf shaft1_high_high,w call byte_put ; line_number = 200 ; call byte_put(shaft1_high_low) movf shaft1_high_low,w call byte_put goto main__31 ; line_number = 201 ; case 6 main__28: ; # Read Low Threshold 0 (Command = 0001 0110): ; line_number = 203 ; call byte_put(shaft0_low_high) movf shaft0_low_high,w call byte_put ; line_number = 204 ; call byte_put(shaft0_low_low) movf shaft0_low_low,w call byte_put goto main__31 ; line_number = 205 ; case 7 main__29: ; # Read Low Threshold 1 (Command = 0001 0111): ; line_number = 207 ; call byte_put(shaft1_low_high) movf shaft1_low_high,w call byte_put ; line_number = 208 ; call byte_put(shaft1_low_low) movf shaft1_low_low,w call byte_put main__31: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 172 ; switch command & 7 done goto main__38 ; line_number = 209 ; case 3, 4, 5, 6, 7 main__35: ; # Command = 001x xxxx: ; line_number = 211 ; do_nothing main__38: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 102 ; switch (command >> 3) & 7 done goto main__72 ; line_number = 212 ; case 1, 2 main__68: ; # Command = 01xx xxxx or10xx xxxx: ; line_number = 214 ; do_nothing goto main__72 ; line_number = 215 ; case 3 main__69: ; # Command = 11xx xxxx: ; line_number = 217 ; switch (command >> 3) & 7 start movlw main__64>>8 movwf __pclath main__65 equ shared___globals+30 rrf main__command,w movwf main__65 rrf main__65,f rrf main__65,w andlw 7 addlw main__64 movwf __pcl ; page_group 8 main__64: goto main__66 goto main__66 goto main__66 goto main__66 goto main__66 goto main__61 goto main__62 goto main__63 ; line_number = 218 ; case 5 main__61: ; # Command = 1110 1xxx: ; line_number = 220 ; if (command & 7) = 7 start ; Left minus Right movlw 7 andwf main__command,w addlw 249 ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code.size = 0 && false_code.size > 1 btfss __z___byte, __z___bit goto main__39 ; # Return Interrupt Bits (Command = 1110 1111): ; line_number = 222 ; result := 0 movlw 0 movwf main__result ; line_number = 223 ; if interrupt_enable start ; =>bit_code_emit@symbol(): sym=interrupt_enable ; CASE: True.size=1 False.size=0 btfsc interrupt_enable___byte, interrupt_enable___bit ; line_number = 224 ; result := result | 2 bsf main__result, 1 ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) ; line_number = 223 ; if interrupt_enable done ; line_number = 225 ; if interrupt_pending start ; =>bit_code_emit@symbol(): sym=interrupt_pending ; CASE: True.size=1 False.size=0 btfsc interrupt_pending___byte, interrupt_pending___bit ; line_number = 226 ; result := result | 1 bsf main__result, 0 ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) ; line_number = 225 ; if interrupt_pending done ; line_number = 227 ; call byte_put(result) movf main__result,w call byte_put ; Recombine size1 = 0 || size2 = 0 main__39: ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 220 ; if (command & 7) = 7 done goto main__66 ; line_number = 228 ; case 6 main__62: ; # Shared Interrupt commands. ; line_number = 230 ; switch (command >> 1) & 3 start movlw main__47>>8 movwf __pclath main__48 equ shared___globals+30 rrf main__command,w andlw 3 addlw main__47 movwf __pcl ; page_group 4 main__47: goto main__44 goto main__44 goto main__45 goto main__46 ; line_number = 231 ; case 0, 1 main__44: ; # Set Interrupt Bits (Command = 1110 00ep): ; line_number = 233 ; interrupt_enable := command@1 bcf interrupt_enable___byte, interrupt_enable___bit main__select__40___byte equ main__command main__select__40___bit equ 1 ; =>bit_code_emit@symbol(): sym=main__select__40 ; CASE: True.size=1 False.size=0 btfsc main__select__40___byte, main__select__40___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=main__select__40 (data:X0=>X0 code:XX=>XX) ; line_number = 234 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__41___byte equ main__command main__select__41___bit equ 0 ; =>bit_code_emit@symbol(): sym=main__select__41 ; CASE: True.size=1 False.size=0 btfsc main__select__41___byte, main__select__41___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=main__select__41 (data:X0=>X0 code:XX=>XX) goto main__49 ; line_number = 235 ; case 2 main__45: ; # Set Interrupt Pending (Command = 1110 010p): ; line_number = 237 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__42___byte equ main__command main__select__42___bit equ 0 ; =>bit_code_emit@symbol(): sym=main__select__42 ; CASE: True.size=1 False.size=0 btfsc main__select__42___byte, main__select__42___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=main__select__42 (data:X0=>X0 code:XX=>XX) goto main__49 ; line_number = 238 ; case 3 main__46: ; # Set Interrupt Enable (Command = 1110 011e): ; line_number = 240 ; interrupt_enable := command@0 bcf interrupt_enable___byte, interrupt_enable___bit main__select__43___byte equ main__command main__select__43___bit equ 0 ; =>bit_code_emit@symbol(): sym=main__select__43 ; CASE: True.size=1 False.size=0 btfsc main__select__43___byte, main__select__43___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=main__select__43 (data:X0=>X0 code:XX=>XX) main__49: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 230 ; switch (command >> 1) & 3 done goto main__66 ; line_number = 241 ; case 7 main__63: ; # Shared commands (Command = 1111 1ccc): ; line_number = 243 ; switch command & 7 start movlw main__59>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__59 movwf __pcl ; page_group 8 main__59: goto main__51 goto main__52 goto main__53 goto main__54 goto main__55 goto main__56 goto main__57 goto main__58 ; line_number = 244 ; case 0 main__51: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Decrement (Command = 1111 1000): ; line_number = 246 ; _osccal := _osccal - _osccal_lsb movlw 252 addwf _osccal,f goto main__60 ; line_number = 247 ; case 1 main__52: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Increment (Command = 1111 1001): ; line_number = 249 ; _osccal := _osccal + _osccal_lsb movlw 4 addwf _osccal,f goto main__60 ; line_number = 250 ; case 2 main__53: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Read (Command = 1111 1010): ; line_number = 252 ; call byte_put(_osccal) movf _osccal,w bcf __rp0___byte, __rp0___bit call byte_put goto main__60 ; line_number = 253 ; case 3 main__54: ; # Clock Pulse (Command = 1111 1011): ; line_number = 255 ; call byte_put(0) movlw 0 call byte_put goto main__60 ; line_number = 256 ; case 4 main__55: ; # ID Next (Command = 1111 1100): ; line_number = 258 ; temp := 0 movlw 0 movwf main__temp ; line_number = 259 ; if id_index < id.size start movlw 51 subwf main__id_index,w ; =>bit_code_emit@symbol(): sym=__c ; CASE: true.size=0 && false.size>1 btfsc __c___byte, __c___bit goto main__50 ; line_number = 260 ; temp := id[id_index] movf main__id_index,w call id movwf main__temp ; line_number = 261 ; id_index := id_index + 1 incf main__id_index,f main__50: ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; line_number = 259 ; if id_index < id.size done ; line_number = 262 ; call byte_put(temp) movf main__temp,w call byte_put goto main__60 ; line_number = 263 ; case 5 main__56: ; # ID Reset (Command = 1111 1101): ; line_number = 265 ; id_index := 0 movlw 0 movwf main__id_index goto main__60 ; line_number = 266 ; case 6 main__57: ; # Glitch Read (Command = 1111 1110): ; line_number = 268 ; call byte_put(glitch) movf main__glitch,w call byte_put ; line_number = 269 ; glitch := 0 movlw 0 movwf main__glitch goto main__60 ; line_number = 270 ; case 7 main__58: ; # Glitch (Command = 1111 1111): ; line_number = 272 ; if glitch != 0xff start ; Left minus Right incf main__glitch,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 273 ; glitch := glitch + 1 incf main__glitch,f ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 272 ; if glitch != 0xff done main__60: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 243 ; switch command & 7 done main__66: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 217 ; switch (command >> 3) & 7 done main__72: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 99 ; switch command >> 6 done ; line_number = 94 ; loop_forever wrap-up ; Need to adjust code banks to match front of loop bcf __rp0___byte, __rp0___bit goto main__2 ; line_number = 94 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 276 ; procedure delay delay: ; arguments_none ; line_number = 278 ; returns_nothing ; line_number = 279 ; exact_delay delay_instructions ; # This procedure will delay for 1/3 of a bit time. ; line_number = 283 ; local temp byte delay__temp equ shared___globals+29 ; line_number = 284 ; local alternate bit delay__alternate___byte equ shared___globals+63 delay__alternate___bit equ 6 ; # Kick the dog: ; before procedure statements delay=0, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 287 ; watch_dog_reset done ; Delay at watch_dog_reset is 0 clrwdt ; # Process shaft 0: ; line_number = 290 ; temp := _porta & 3 ; Delay at assignment is 1 movlw 3 andwf _porta,w movwf delay__temp ; # Convert 2-bit grey code into 2-bit binary: ; line_number = 292 ; if temp@1 start ; Delay at if is 4 delay__select__1___byte equ delay__temp delay__select__1___bit equ 1 ; =>bit_code_emit@symbol(): sym=delay__select__1 ; CASE: true_code.size = 0 && false_code.size > 1 btfsc delay__select__1___byte, delay__select__1___bit goto delay__2 ; Delay 1 cycles nop goto delay__3 delay__2: ; line_number = 293 ; temp := temp ^ 1 ; Delay at assignment is 0 movlw 1 xorwf delay__temp,f delay__3: ; <=bit_code_emit@symbol; sym=delay__select__1 (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=0 code delay=9 ; line_number = 292 ; if temp@1 done ; line_number = 294 ; switch (shaft0 - temp) & 3 start movlw delay__10>>8 movwf __pclath movf delay__temp,w subwf shaft0,w andlw 3 addlw delay__10 movwf __pcl ; page_group 4 delay__10: goto delay__6 goto delay__7 goto delay__8 goto delay__9 ; case_data[0] delay=0{0 } ; case_data[1] delay=4{1 } ; case_data[2] delay=8{2 } ; case_data[3] delay=5{3 } ; Maximum Case Delay = 8 ; line_number = 295 ; case 0 delay__6: ; line_number = 296 ; do_nothing ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 delay__12: addlw 255 btfss __z___byte, __z___bit goto delay__12 goto delay__11 ; line_number = 297 ; case 1 delay__7: ; # Increment: ; line_number = 299 ; shaft0_direction := 0 ; Delay at assignment is 0 bcf shaft0_direction___byte, shaft0_direction___bit ; line_number = 300 ; shaft0_low := shaft0_low + 1 ; Delay at assignment is 1 incf shaft0_low,f ; line_number = 301 ; if _z start ; Delay at if is 2 ; =>bit_code_emit@symbol(): sym=_z ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 302 ; shaft0_high := shaft0_high + 1 ; Delay at assignment is 0 incf shaft0_high,f ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=4 ; line_number = 301 ; if _z done ; Delay 4 cycles goto delay__13 delay__13: goto delay__14 delay__14: goto delay__11 ; line_number = 303 ; case 2 delay__8: ; # Double increment/decrement: ; line_number = 305 ; if shaft0_direction start ; Delay at if is 0 ; =>bit_code_emit@symbol(): sym=shaft0_direction ; CASE: true_code_size > 1 && false_code_size > 1 btfss shaft0_direction___byte, shaft0_direction___bit goto delay__4 ; # Double increment: ; line_number = 307 ; shaft0_low := shaft0_low - 2 ; Delay at assignment is 0 movlw 254 addwf shaft0_low,f ; line_number = 308 ; if !_c start ; Delay at if is 2 ; =>bit_code_emit@symbol(): sym=_c ; CASE: true_code.size=0 && false_code.size=1 btfss _c___byte, _c___bit ; line_number = 309 ; shaft0_high := shaft0_high - 1 ; Delay at assignment is 0 decf shaft0_high,f ; <=bit_code_emit@symbol; sym=_c (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=4 ; line_number = 308 ; if !_c done goto delay__5 delay__4: ; # Double decrement: ; line_number = 312 ; shaft0_low := shaft0_low + 2 ; Delay at assignment is 0 movlw 2 addwf shaft0_low,f ; line_number = 313 ; if _c start ; Delay at if is 2 ; =>bit_code_emit@symbol(): sym=_c ; CASE: True.size=1 False.size=0 btfsc _c___byte, _c___bit ; line_number = 314 ; shaft0_high := shaft0_high + 1 ; Delay at assignment is 0 incf shaft0_high,f ; <=bit_code_emit@symbol; sym=_c (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=4 ; line_number = 313 ; if _c done nop delay__5: ; <=bit_code_emit@symbol; sym=shaft0_direction (data:X0=>X0 code:XX=>XX) ; if final true delay=4 false delay=4 code delay=8 ; line_number = 305 ; if shaft0_direction done goto delay__11 ; line_number = 315 ; case 3 delay__9: ; # Decrement: ; line_number = 317 ; shaft0_direction := 1 ; Delay at assignment is 0 bsf shaft0_direction___byte, shaft0_direction___bit ; line_number = 318 ; if shaft0_low = 0 start ; Delay at if is 1 ; Left minus Right movf shaft0_low,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: True.size=1 False.size=0 btfsc __z___byte, __z___bit ; line_number = 319 ; shaft0_high := shaft0_high - 1 ; Delay at assignment is 0 decf shaft0_high,f ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=4 ; line_number = 318 ; if shaft0_low = 0 done ; line_number = 320 ; shaft0_low := shaft0_low - 1 ; Delay at assignment is 4 decf shaft0_low,f ; Delay 3 cycles goto delay__15 delay__15: nop goto delay__11 delay__11: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 294 ; switch (shaft0 - temp) & 3 done ; line_number = 321 ; shaft0 := temp ; Delay at assignment is 29 bcf __rp0___byte, __rp0___bit movf delay__temp,w movwf shaft0 ; # Process shaft 1: ; line_number = 324 ; temp := (_porta >> 3) & 3 ; Delay at assignment is 32 delay__16 equ shared___globals+31 rrf _porta,w movwf delay__16 rrf delay__16,f rrf delay__16,w andlw 3 movwf delay__temp ; # Convert 2-bit grey code into 2-bit binary: ; line_number = 326 ; if temp@1 start ; Delay at if is 38 delay__select__17___byte equ delay__temp delay__select__17___bit equ 1 ; =>bit_code_emit@symbol(): sym=delay__select__17 ; CASE: true_code.size = 0 && false_code.size > 1 btfsc delay__select__17___byte, delay__select__17___bit goto delay__18 ; Delay 1 cycles nop goto delay__19 delay__18: ; line_number = 327 ; temp := temp ^ 1 ; Delay at assignment is 0 movlw 1 xorwf delay__temp,f delay__19: ; <=bit_code_emit@symbol; sym=delay__select__17 (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=0 code delay=43 ; line_number = 326 ; if temp@1 done ; line_number = 328 ; switch (shaft1 - temp) & 3 start movlw delay__26>>8 movwf __pclath movf delay__temp,w subwf shaft1,w andlw 3 addlw delay__26 movwf __pcl ; page_group 4 delay__26: goto delay__22 goto delay__23 goto delay__24 goto delay__25 ; case_data[0] delay=0{0 } ; case_data[1] delay=4{1 } ; case_data[2] delay=8{2 } ; case_data[3] delay=5{3 } ; Maximum Case Delay = 8 ; line_number = 329 ; case 0 delay__22: ; line_number = 330 ; do_nothing ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 delay__28: addlw 255 btfss __z___byte, __z___bit goto delay__28 goto delay__27 ; line_number = 331 ; case 1 delay__23: ; # Increment: ; line_number = 333 ; shaft1_direction := 0 ; Delay at assignment is 0 bcf shaft1_direction___byte, shaft1_direction___bit ; line_number = 334 ; shaft1_low := shaft1_low + 1 ; Delay at assignment is 1 incf shaft1_low,f ; line_number = 335 ; if _z start ; Delay at if is 2 ; =>bit_code_emit@symbol(): sym=_z ; CASE: True.size=1 False.size=0 btfsc _z___byte, _z___bit ; line_number = 336 ; shaft1_high := shaft1_high + 1 ; Delay at assignment is 0 incf shaft1_high,f ; <=bit_code_emit@symbol; sym=_z (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=4 ; line_number = 335 ; if _z done ; Delay 4 cycles goto delay__29 delay__29: goto delay__30 delay__30: goto delay__27 ; line_number = 337 ; case 2 delay__24: ; # Double increment/decrement: ; line_number = 339 ; if shaft1_direction start ; Delay at if is 0 ; =>bit_code_emit@symbol(): sym=shaft1_direction ; CASE: true_code_size > 1 && false_code_size > 1 btfss shaft1_direction___byte, shaft1_direction___bit goto delay__20 ; # Double increment: ; line_number = 341 ; shaft1_low := shaft1_low - 2 ; Delay at assignment is 0 movlw 254 addwf shaft1_low,f ; line_number = 342 ; if !_c start ; Delay at if is 2 ; =>bit_code_emit@symbol(): sym=_c ; CASE: true_code.size=0 && false_code.size=1 btfss _c___byte, _c___bit ; line_number = 343 ; shaft1_high := shaft1_high - 1 ; Delay at assignment is 0 decf shaft1_high,f ; <=bit_code_emit@symbol; sym=_c (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=4 ; line_number = 342 ; if !_c done goto delay__21 delay__20: ; # Double decrement: ; line_number = 346 ; shaft1_low := shaft1_low + 2 ; Delay at assignment is 0 movlw 2 addwf shaft1_low,f ; line_number = 347 ; if _c start ; Delay at if is 2 ; =>bit_code_emit@symbol(): sym=_c ; CASE: True.size=1 False.size=0 btfsc _c___byte, _c___bit ; line_number = 348 ; shaft1_high := shaft1_high + 1 ; Delay at assignment is 0 incf shaft1_high,f ; <=bit_code_emit@symbol; sym=_c (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=4 ; line_number = 347 ; if _c done nop delay__21: ; <=bit_code_emit@symbol; sym=shaft1_direction (data:X0=>X0 code:XX=>XX) ; if final true delay=4 false delay=4 code delay=8 ; line_number = 339 ; if shaft1_direction done goto delay__27 ; line_number = 349 ; case 3 delay__25: ; # Decrement: ; line_number = 351 ; shaft1_direction := 1 ; Delay at assignment is 0 bsf shaft1_direction___byte, shaft1_direction___bit ; line_number = 352 ; if shaft1_low = 0 start ; Delay at if is 1 ; Left minus Right movf shaft1_low,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: True.size=1 False.size=0 btfsc __z___byte, __z___bit ; line_number = 353 ; shaft1_high := shaft1_high - 1 ; Delay at assignment is 0 decf shaft1_high,f ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=4 ; line_number = 352 ; if shaft1_low = 0 done ; line_number = 354 ; shaft1_low := shaft1_low - 1 ; Delay at assignment is 4 decf shaft1_low,f ; Delay 3 cycles goto delay__31 delay__31: nop goto delay__27 delay__27: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 328 ; switch (shaft1 - temp) & 3 done ; line_number = 355 ; shaft1 := temp ; Delay at assignment is 63 bcf __rp0___byte, __rp0___bit movf delay__temp,w movwf shaft1 ; delay after procedure statements=66 ; Delay 65 cycles ; Delay loop takes 16 * 4 = 64 cycles movlw 16 delay__32: addlw 255 btfss __z___byte, __z___bit goto delay__32 nop ; Implied return retlw 0 ; Final delay = 133 ; # This code is currently broken: ; # if alternate ; # # This code is currently broken! ; # do_nothing ; # # Now do range checks: ; # alternate := 0 ; # #if shaft0_high < shaft0_low_high || ; # # (shaft0_high = shaft0_low_high && shaft0_low < shaft0_low_low) ; # # interrupt_pending := 1 ; # #if shaft0_high > shaft0_high_high || ; # # (shaft0_high = shaft0_high_high && shaft0_low > shaft0_high_low) ; # # interrupt_pending := 1 ; # #if shaft1_high < shaft1_low_high || ; # # (shaft1_high = shaft1_low_high && shaft1_low < shaft1_low_low) ; # # interrupt_pending := 1 ; # #if shaft1_high > shaft1_high_high || ; # # (shaft1_high = shaft1_high_high && shaft1_low > shaft1_high_low) ; # # interrupt_pending := 1 ; # else ; # # Copy the bits over: ; # led0 := in0 ; # led1 := in1 ; # led2 := in2 ; # led3 := in3 ; # ; # # Perform any interrupt: ; # alternate := 1 ; # if interrupt_pending && interrupt_enable ; # serial_out := 0 ; # interrupt_enable := 0 ; line_number = 390 ; constant zero8 = "\0,0,0,0,0,0,0,0\" ; zero8 = '\0,0,0,0,0,0,0,0\' ; line_number = 391 ; constant module_name = "\10\Rotation2A" ; module_name = '\10\Rotation2A' ; line_number = 392 ; constant vendor_name = "\15\Gramlich&Benson" ; vendor_name = '\15\Gramlich&Benson' ; line_number = 394 ; string id = "\1,0,16,1,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; id = '\1,0,16,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,10\Rotation2A\15\Gramlich&Benson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 51 ; Add 49 NOP's until start of new page nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop id___base: retlw 1 retlw 0 retlw 16 retlw 1 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 10 retlw 82 retlw 111 retlw 116 retlw 97 retlw 116 retlw 105 retlw 111 retlw 110 retlw 50 retlw 65 retlw 15 retlw 71 retlw 114 retlw 97 retlw 109 retlw 108 retlw 105 retlw 99 retlw 104 retlw 38 retlw 66 retlw 101 retlw 110 retlw 115 retlw 111 retlw 110 ; line_number = 394 ; string id = "\1,0,16,1,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; Appending 2 delayed procedures to code bank 0 ; buffer = 'bit_bang' ; line_number = 33 ; procedure byte_get byte_get: ; arguments_none ; line_number = 35 ; returns byte ; # This procedure will wait for a byte to be received from ; # serial_in_bit. It calls the delay procedure for all delays. ; # This procedure will keep calling the {delay} routine until ; # data is received. ; line_number = 42 ; local count byte byte_get__count equ shared___globals ; line_number = 43 ; local byte byte byte_get__byte equ shared___globals+1 ; # Why does the delay procedure wait for a third of bit? Well, it ; # has to do with the loop immediately below. If we catch the ; # start bit at the beginning of a 1/3 bit time, we will be ; # sampling data at approximately 1/3 of the way into each bit. ; # Conversely, if we catch the start near the end of a 1/3 bit ; # bit time, we will be sampling data at approximately 2/3 of the ; # way into each bit. So, what this means is that our bit sample ; # times will be somewhere between 1/3 and 2/3 of bit (i.e. in ; # the middle of the bit. ; # It would be nice to tweak the code to shorter delay times ; # (1/4 bit, 1/5 bit, etc.) but then it gets too hard to get ; # the bookeeping done in the delay routine. A PIC running at ; # 4MHz (=1MIPS), only has 138 instructions available for the ; # delay routine when at 1/3 of bit. ; # Wait for a start bit: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 62 ; waiting := 1 bsf waiting___byte, waiting___bit ; line_number = 63 ; receiving := 1 bsf receiving___byte, receiving___bit ; line_number = 64 ; while serial_in start byte_get__1: ; =>bit_code_emit@symbol(): sym=serial_in ; CASE: true_code.size = 0 && false_code.size > 1 btfss serial_in___byte, serial_in___bit goto byte_get__2 ; line_number = 65 ; delay instructions_per_delay - 3 start ; Delay expression evaluates to 135 ; line_number = 66 ; call delay() ; Delay at call is 0 call delay ; line_number = 65 ; delay instructions_per_delay - 3 done goto byte_get__1 ; Recombine size1 = 0 || size2 = 0 byte_get__2: ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; line_number = 64 ; while serial_in done ; line_number = 67 ; waiting := 0 bcf waiting___byte, waiting___bit ; # Clear out any preceeding interrupt condition: ; line_number = 70 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; # Skip over start bit: ; line_number = 73 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # There are two instructions of set-up for following loop_exactly: ; line_number = 75 ; call delay() ; Delay at call is 0 call delay ; line_number = 76 ; call delay() ; Delay at call is 135 call delay ; line_number = 77 ; call delay() ; Delay at call is 270 call delay ; line_number = 78 ; byte := 0 ; Delay at assignment is 405 movlw 0 movwf byte_get__byte ; Delay 7 cycles goto byte_get__3 byte_get__3: goto byte_get__4 byte_get__4: goto byte_get__5 byte_get__5: nop ; line_number = 73 ; delay instructions_per_bit - 2 done ; # Read in 8 bits of data: ; line_number = 81 ; loop_exactly 8 start byte_get__6 equ shared___globals+32 movlw 8 movwf byte_get__6 byte_get__7: ; # There are 3 instrucitons of loop_exactly overhead: ; line_number = 83 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 84 ; call delay() ; Delay at call is 0 call delay ; line_number = 85 ; byte := byte >> 1 ; Delay at assignment is 135 ; Assignment of variable to self (no code needed) rrf byte_get__byte,f bcf byte_get__byte, 7 ; line_number = 86 ; if serial_in start ; Delay at if is 137 ; =>bit_code_emit@symbol(): sym=serial_in ; CASE: True.size=1 False.size=0 btfsc serial_in___byte, serial_in___bit ; line_number = 87 ; byte@7 := 1 ; Delay at assignment is 0 byte_get__select__8___byte equ byte_get__byte byte_get__select__8___bit equ 7 bsf byte_get__select__8___byte, byte_get__select__8___bit ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=139 ; line_number = 86 ; if serial_in done ; line_number = 88 ; call delay() ; Delay at call is 139 call delay ; line_number = 89 ; call delay() ; Delay at call is 274 call delay ; Delay 4 cycles goto byte_get__9 byte_get__9: goto byte_get__10 byte_get__10: ; line_number = 83 ; delay instructions_per_bit - 3 done ; line_number = 81 ; loop_exactly 8 wrap-up decfsz byte_get__6,f goto byte_get__7 ; line_number = 81 ; loop_exactly 8 done ; # Skip over 2/3's of stop bit; 3 cycles for return: ; line_number = 92 ; delay instructions_per_delay*2 - 3 start ; Delay expression evaluates to 273 ; line_number = 93 ; call delay() ; Delay at call is 0 call delay ; line_number = 94 ; call delay() ; Delay at call is 135 call delay ; Delay 3 cycles goto byte_get__11 byte_get__11: nop ; line_number = 92 ; delay instructions_per_delay*2 - 3 done ; line_number = 95 ; command_previous := command_last movf command_last,w movwf command_previous ; line_number = 96 ; command_last := byte movf byte_get__byte,w movwf command_last ; line_number = 97 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; line_number = 98 ; return byte start ; line_number = 98 movf byte_get__byte,w return ; line_number = 98 ; return byte done ; delay after procedure statements=non-uniform ; line_number = 101 ; procedure byte_put byte_put: ; Last argument is sitting in W; save into argument variable movwf byte_put__byte ; delay=4294967295 ; line_number = 102 ; argument byte byte byte_put__byte equ shared___globals+3 ; line_number = 103 ; returns_nothing ; # This procedure will send {byte} to {serial_out} pin. The {delay} ; # procedure is called to provide the appropriate bit timing. ; line_number = 108 ; local count byte byte_put__count equ shared___globals+2 ; # {receiving} will be 1 if the last get/put routine was a get. ; # Before we start transmitting a response back, we want to ensure ; # that there has been enough time to turn the line around. ; # We delay the first 1/3 of a bit to pad out the 9-2/3 bits ; # from get_byte to 10 bits. We delay another 3 bits just to ; # ensure that slow interpreters do not get overrun. ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 116 ; sent_previous := sent_last movf sent_last,w movwf sent_previous ; line_number = 117 ; sent_last := byte movf byte_put__byte,w movwf sent_last ; line_number = 118 ; if receiving start ; =>bit_code_emit@symbol(): sym=receiving ; CASE: true_code.size = 0 && false_code.size > 1 btfss receiving___byte, receiving___bit goto byte_put__3 ; line_number = 119 ; receiving := 0 bcf receiving___byte, receiving___bit ; # 10 = 1 + 3*3 = 3-1/3 extra bits of delay: ; line_number = 121 ; loop_exactly 10 start byte_put__1 equ shared___globals+33 movlw 10 movwf byte_put__1 byte_put__2: ; line_number = 122 ; call delay() call delay ; line_number = 121 ; loop_exactly 10 wrap-up decfsz byte_put__1,f goto byte_put__2 ; line_number = 121 ; loop_exactly 10 done ; Recombine size1 = 0 || size2 = 0 byte_put__3: ; <=bit_code_emit@symbol; sym=receiving (data:X0=>X0 code:XX=>XX) ; line_number = 118 ; if receiving done ; # Send the start bit: ; line_number = 125 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # The loop_exactly setup after this is 2 instructions: ; line_number = 127 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; line_number = 128 ; call delay() ; Delay at call is 1 call delay ; line_number = 129 ; call delay() ; Delay at call is 136 call delay ; line_number = 130 ; call delay() ; Delay at call is 271 call delay ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__4: addlw 255 btfss __z___byte, __z___bit goto byte_put__4 ; line_number = 125 ; delay instructions_per_bit - 2 done ; # Send the data: ; line_number = 133 ; loop_exactly 8 start byte_put__5 equ shared___globals+33 movlw 8 movwf byte_put__5 byte_put__6: ; # Loop_exactly overhead is 3 instructions: ; line_number = 135 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 136 ; if byte@0 start ; Delay at if is 0 byte_put__select__7___byte equ byte_put__byte byte_put__select__7___bit equ 0 ; =>bit_code_emit@symbol(): sym=byte_put__select__7 ; CASE: true_size=1 && false_size=1 ; SUBCASE: Double test; true, then false btfsc byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 137 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit btfss byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 139 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; <=bit_code_emit@symbol; sym=byte_put__select__7 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=1 code delay=4 ; line_number = 136 ; if byte@0 done ; line_number = 140 ; byte := byte >> 1 ; Delay at assignment is 4 ; Assignment of variable to self (no code needed) rrf byte_put__byte,f bcf byte_put__byte, 7 ; line_number = 141 ; call delay() ; Delay at call is 6 call delay ; line_number = 142 ; call delay() ; Delay at call is 141 call delay ; line_number = 143 ; call delay() ; Delay at call is 276 call delay ; Delay 2 cycles goto byte_put__8 byte_put__8: ; line_number = 135 ; delay instructions_per_bit - 3 done ; line_number = 133 ; loop_exactly 8 wrap-up decfsz byte_put__5,f goto byte_put__6 ; line_number = 133 ; loop_exactly 8 done ; # Send the stop bit: ; line_number = 146 ; delay instructions_per_bit start ; Delay expression evaluates to 416 ; line_number = 147 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit ; line_number = 148 ; call delay() ; Delay at call is 1 call delay ; line_number = 149 ; call delay() ; Delay at call is 136 call delay ; line_number = 150 ; call delay() ; Delay at call is 271 call delay ; Delay 10 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__9: addlw 255 btfss __z___byte, __z___bit goto byte_put__9 goto byte_put__10 byte_put__10: ; line_number = 146 ; delay instructions_per_bit done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Configuration bits ; fill = 0x0 ; bg = bg11 (0x3000) ; cpd = off (0x100) ; cp = off (0x80) ; boden = off (0x0) ; mclre = off (0x0) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = int_no_clk (0x4) ; 12692 = 0x3194 __config 12692 ; Define start addresses for data regions ; Region="shared___globals" Address=32" Size=64 Bytes=34 Bits=7 Available=29 ; Region="shared___globals" Address=32" Size=64 Bytes=34 Bits=7 Available=29 ; Region="shared___globals" Address=32" Size=64 Bytes=34 Bits=7 Available=29 end