1 radix dec 2 0020 global__variables__bank0 equ 32 3 00a0 global__variables__bank1 equ 160 4 0110 global__variables__bank2 equ 272 5 0190 global__variables__bank3 equ 400 6 0022 global__bit__variables__bank0 equ 34 7 00a0 global__bit__variables__bank1 equ 160 8 0110 global__bit__variables__bank2 equ 272 9 01c3 global__bit__variables__bank3 equ 451 10 0000 indf___register equ 0 11 0002 pcl___register equ 2 12 0003 c___byte equ 3 13 0000 c___bit equ 0 14 0003 z___byte equ 3 15 0002 z___bit equ 2 16 0003 rp0___byte equ 3 17 0005 rp0___bit equ 5 18 0003 rp1___byte equ 3 19 0006 rp1___bit equ 6 20 0003 irp___byte equ 3 21 0007 irp___bit equ 7 22 0085 trisa___register equ 0x85 23 0086 trisb___register equ 0x86 24 0004 fsr___register equ 4 25 000a pclath___register equ 10 26 org 0 27 start: 28 000 0000 nop 29 001 0000 nop 30 002 0000 nop 31 003 2805 goto skip___interrupt 32 interrupt___vector: 33 004 0009 retfie 34 skip___interrupt: 35 ; Initialize A/D system to allow digital I/O 36 005 3007 movlw 7 37 ; Switch from register bank 0 to register bank 1 (which contains 159) 38 006 1683 bsf rp0___byte,rp0___bit 39 ; Register bank is now 1 40 007 009f movwf 159 41 ; Switch from register bank 1 to register bank 0 (which contains 31) 42 008 1283 bcf rp0___byte,rp0___bit 43 ; Register bank is now 0 44 009 019f clrf 31 45 ; Initialize TRIS registers 46 00a 30c7 movlw 199 47 00b 0065 tris 5 48 00c 3000 movlw 0 49 00d 0066 tris 6 50 00e 30bf movlw 191 51 00f 0067 tris 7 52 010 018a clrf pclath___register 53 ; Switch from register bank 0 to register bank 3 54 011 1683 bsf rp0___byte,rp0___bit 55 012 1703 bsf rp1___byte,rp1___bit 56 013 1783 bsf irp___byte,irp___bit 57 ; Register bank is now 3 58 ; Switch from code bank 0 to code bank 3 before possible transfer (goto) 59 014 158a bsf pclath___register,3 60 015 160a bsf pclath___register,4 61 016 2822 goto main 62 ; comment ############################################################################# 63 ; comment {} 64 ; comment {Copyright < c > 2000 - 2001 by Wayne C . Gramlich .} 65 ; comment {All rights reserved .} 66 ; comment {} 67 ; comment {Permission to use , copy , modify , distribute , and sell this software} 68 ; comment {for any purpose is hereby granted without fee provided that the above} 69 ; comment {copyright notice and this permission are retained . The author makes} 70 ; comment {no representations about the suitability of this software for any purpose .} 71 ; comment {It is provided { as is } without express or implied warranty .} 72 ; comment {} 73 ; comment ############################################################################# 74 ; comment {This is a test boot loader that resides in high memory for} 75 ; comment {loading programs into low memory .} 76 ; processor pic16f876 cp = off debug = off cpd = off pwrte = off wdte = on boden = off lvp = off wrt = on fosc = xt 77 ; 16189=0x3f3d 8199=0x2007 78 __config 16189 79 2007 configuration___address equ 8199 80 ; comment {Port and pin definitions :} 81 0005 porta equ 5 82 0005 pri0__byte equ 5 83 0000 pri0__bit equ 0 84 0005 pri1__byte equ 5 85 0001 pri1__bit equ 1 86 0005 pri2__byte equ 5 87 0002 pri2__bit equ 2 88 0005 unused1a__byte equ 5 89 0003 unused1a__bit equ 3 90 0005 unused2a__byte equ 5 91 0004 unused2a__bit equ 4 92 0005 unused3a__byte equ 5 93 0005 unused3a__bit equ 5 94 0006 portb equ 6 95 0006 int__byte equ 6 96 0000 int__bit equ 0 97 0006 sel0__byte equ 6 98 0001 sel0__bit equ 1 99 0006 sel1__byte equ 6 100 0002 sel1__bit equ 2 101 0006 sel2__byte equ 6 102 0003 sel2__bit equ 3 103 0006 sel3__byte equ 6 104 0004 sel3__bit equ 4 105 0006 sel4__byte equ 6 106 0005 sel4__bit equ 5 107 0006 sel5__byte equ 6 108 0006 sel5__bit equ 6 109 0006 en__byte equ 6 110 0007 en__bit equ 7 111 0007 portc equ 7 112 0007 tx__byte equ 7 113 0006 tx__bit equ 6 114 0007 rx__byte equ 7 115 0007 rx__bit equ 7 116 0006 unused1c__byte equ 6 117 0000 unused1c__bit equ 0 118 0006 unused2c__byte equ 6 119 0001 unused2c__bit equ 1 120 0006 unused3c__byte equ 6 121 0002 unused3c__bit equ 2 122 0006 unused4c__byte equ 6 123 0003 unused4c__bit equ 3 124 0006 unused5c__byte equ 6 125 0004 unused5c__bit equ 4 126 0006 unused6c__byte equ 6 127 0005 unused6c__bit equ 5 128 ; comment {Bank 0 registers :} 129 ; comment {IND register} 130 0000 ind equ 0 131 ; comment {PCL register} 132 0002 pcl equ 2 133 ; comment {Status register} 134 0003 status equ 3 135 ; bind c status @ 0 136 0003 c equ status+0 137 0003 c__byte equ status+0 138 0000 c__bit equ 0 139 ; bind dc status @ 1 140 0003 dc equ status+0 141 0003 dc__byte equ status+0 142 0001 dc__bit equ 1 143 ; bind z status @ 2 144 0003 z equ status+0 145 0003 z__byte equ status+0 146 0002 z__bit equ 2 147 ; bind pd status @ 3 148 0003 pd equ status+0 149 0003 pd__byte equ status+0 150 0003 pd__bit equ 3 151 ; bind to status @ 4 152 0003 to equ status+0 153 0003 to__byte equ status+0 154 0004 to__bit equ 4 155 ; bind rp0 status @ 5 156 0003 rp0 equ status+0 157 0003 rp0__byte equ status+0 158 0005 rp0__bit equ 5 159 ; bind rp1 status @ 6 160 0003 rp1 equ status+0 161 0003 rp1__byte equ status+0 162 0006 rp1__bit equ 6 163 ; bind irp status @ 7 164 0003 irp equ status+0 165 0003 irp__byte equ status+0 166 0007 irp__bit equ 7 167 ; comment {FSR register} 168 0004 fsr equ 4 169 ; comment {PCLATH register} 170 000a pclath equ 10 171 ; comment {Interrupt Control register :} 172 000b intcon equ 11 173 ; bind gie intcon @ 7 174 000b gie equ intcon+0 175 000b gie__byte equ intcon+0 176 0007 gie__bit equ 7 177 ; bind peie intcon @ 6 178 000b peie equ intcon+0 179 000b peie__byte equ intcon+0 180 0006 peie__bit equ 6 181 ; bind toie intcon @ 5 182 000b toie equ intcon+0 183 000b toie__byte equ intcon+0 184 0005 toie__bit equ 5 185 ; bind inte intcon @ 4 186 000b inte equ intcon+0 187 000b inte__byte equ intcon+0 188 0004 inte__bit equ 4 189 ; bind rbie intcon @ 3 190 000b rbie equ intcon+0 191 000b rbie__byte equ intcon+0 192 0003 rbie__bit equ 3 193 ; bind toif intcon @ 2 194 000b toif equ intcon+0 195 000b toif__byte equ intcon+0 196 0002 toif__bit equ 2 197 ; bind intf intcon @ 1 198 000b intf equ intcon+0 199 000b intf__byte equ intcon+0 200 0001 intf__bit equ 1 201 ; bind rbif intcon @ 0 202 000b rbif equ intcon+0 203 000b rbif__byte equ intcon+0 204 0000 rbif__bit equ 0 205 ; comment {PIR1 registers < whatever PIR means > :} 206 000c pir1 equ 12 207 ; bind pspif pir1 @ 7 208 000c pspif equ pir1+0 209 000c pspif__byte equ pir1+0 210 0007 pspif__bit equ 7 211 ; bind adif pir1 @ 6 212 000c adif equ pir1+0 213 000c adif__byte equ pir1+0 214 0006 adif__bit equ 6 215 ; bind rcif pir1 @ 5 216 000c rcif equ pir1+0 217 000c rcif__byte equ pir1+0 218 0005 rcif__bit equ 5 219 ; bind txif pir1 @ 4 220 000c txif equ pir1+0 221 000c txif__byte equ pir1+0 222 0004 txif__bit equ 4 223 ; bind sspif pir1 @ 3 224 000c sspif equ pir1+0 225 000c sspif__byte equ pir1+0 226 0003 sspif__bit equ 3 227 ; bind ccp1if pir1 @ 2 228 000c ccp1if equ pir1+0 229 000c ccp1if__byte equ pir1+0 230 0002 ccp1if__bit equ 2 231 ; bind tmr2if pir1 @ 1 232 000c tmr2if equ pir1+0 233 000c tmr2if__byte equ pir1+0 234 0001 tmr2if__bit equ 1 235 ; bind tmr1if pir1 @ 0 236 000c tmr1if equ pir1+0 237 000c tmr1if__byte equ pir1+0 238 0000 tmr1if__bit equ 0 239 ; comment {Receive status register :} 240 0018 rcsta equ 24 241 ; bind spen rcsta @ 7 242 0018 spen equ rcsta+0 243 0018 spen__byte equ rcsta+0 244 0007 spen__bit equ 7 245 ; bind rx9 rcsta @ 6 246 0018 rx9 equ rcsta+0 247 0018 rx9__byte equ rcsta+0 248 0006 rx9__bit equ 6 249 ; bind sren rcsta @ 5 250 0018 sren equ rcsta+0 251 0018 sren__byte equ rcsta+0 252 0005 sren__bit equ 5 253 ; bind cren rcsta @ 4 254 0018 cren equ rcsta+0 255 0018 cren__byte equ rcsta+0 256 0004 cren__bit equ 4 257 ; bind adden rcsta @ 3 258 0018 adden equ rcsta+0 259 0018 adden__byte equ rcsta+0 260 0003 adden__bit equ 3 261 ; bind ferr rcsta @ 2 262 0018 ferr equ rcsta+0 263 0018 ferr__byte equ rcsta+0 264 0002 ferr__bit equ 2 265 ; bind oerr rcsta @ 1 266 0018 oerr equ rcsta+0 267 0018 oerr__byte equ rcsta+0 268 0001 oerr__bit equ 1 269 ; bind rx9d rcsta @ 0 270 0018 rx9d equ rcsta+0 271 0018 rx9d__byte equ rcsta+0 272 0000 rx9d__bit equ 0 273 ; comment {Transmit register :} 274 0019 txreg equ 25 275 ; comment {Receive register :} 276 001a rcreg equ 26 277 ; comment {A / D Control register 0 :} 278 001f adcon0 equ 31 279 ; bind adon adcon0 @ 0 280 001f adon equ adcon0+0 281 001f adon__byte equ adcon0+0 282 0000 adon__bit equ 0 283 ; bind go_done adcon0 @ 2 284 001f go_done equ adcon0+0 285 001f go_done__byte equ adcon0+0 286 0002 go_done__bit equ 2 287 ; bind chs0 adcon0 @ 3 288 001f chs0 equ adcon0+0 289 001f chs0__byte equ adcon0+0 290 0003 chs0__bit equ 3 291 ; bind chs1 adcon0 @ 4 292 001f chs1 equ adcon0+0 293 001f chs1__byte equ adcon0+0 294 0004 chs1__bit equ 4 295 ; bind adcs0 adcon0 @ 6 296 001f adcs0 equ adcon0+0 297 001f adcs0__byte equ adcon0+0 298 0006 adcs0__bit equ 6 299 ; bind adcs1 adcon0 @ 7 300 001f adcs1 equ adcon0+0 301 001f adcs1__byte equ adcon0+0 302 0007 adcs1__bit equ 7 303 ; comment {Bank 1 registers :} 304 008c pie1 equ 140 305 ; bind pspie pie1 @ 7 306 008c pspie equ pie1+0 307 008c pspie__byte equ pie1+0 308 0007 pspie__bit equ 7 309 ; bind adie pie1 @ 6 310 008c adie equ pie1+0 311 008c adie__byte equ pie1+0 312 0006 adie__bit equ 6 313 ; bind rcie pie1 @ 5 314 008c rcie equ pie1+0 315 008c rcie__byte equ pie1+0 316 0005 rcie__bit equ 5 317 ; bind txie pie1 @ 4 318 008c txie equ pie1+0 319 008c txie__byte equ pie1+0 320 0004 txie__bit equ 4 321 ; bind sspie pie1 @ 3 322 008c sspie equ pie1+0 323 008c sspie__byte equ pie1+0 324 0003 sspie__bit equ 3 325 ; bind ccp1ie pie1 @ 2 326 008c ccp1ie equ pie1+0 327 008c ccp1ie__byte equ pie1+0 328 0002 ccp1ie__bit equ 2 329 ; bind tmr2ie pie1 @ 1 330 008c tmr2ie equ pie1+0 331 008c tmr2ie__byte equ pie1+0 332 0001 tmr2ie__bit equ 1 333 ; bind tmr1ie pie1 @ 0 334 008c tmr1ie equ pie1+0 335 008c tmr1ie__byte equ pie1+0 336 0000 tmr1ie__bit equ 0 337 0098 txsta equ 152 338 ; bind csr txsta @ 7 339 0098 csr equ txsta+0 340 0098 csr__byte equ txsta+0 341 0007 csr__bit equ 7 342 ; bind tx9 txsta @ 6 343 0098 tx9 equ txsta+0 344 0098 tx9__byte equ txsta+0 345 0006 tx9__bit equ 6 346 ; bind txen txsta @ 5 347 0098 txen equ txsta+0 348 0098 txen__byte equ txsta+0 349 0005 txen__bit equ 5 350 ; bind sync txsta @ 4 351 0098 sync equ txsta+0 352 0098 sync__byte equ txsta+0 353 0004 sync__bit equ 4 354 ; bind brgh txsta @ 2 355 0098 brgh equ txsta+0 356 0098 brgh__byte equ txsta+0 357 0002 brgh__bit equ 2 358 ; bind trmt txsta @ 1 359 0098 trmt equ txsta+0 360 0098 trmt__byte equ txsta+0 361 0001 trmt__bit equ 1 362 ; bind tx9d txsta @ 0 363 0098 tx9d equ txsta+0 364 0098 tx9d__byte equ txsta+0 365 0000 tx9d__bit equ 0 366 ; comment {Baud rate generator :} 367 0099 spbrg equ 153 368 ; comment {A / D Control register 1 :} 369 009f adcon1 equ 159 370 ; bind pcfg0 adcon1 @ 0 371 009f pcfg0 equ adcon1+0 372 009f pcfg0__byte equ adcon1+0 373 0000 pcfg0__bit equ 0 374 ; bind pcfg1 adcon1 @ 1 375 009f pcfg1 equ adcon1+0 376 009f pcfg1__byte equ adcon1+0 377 0001 pcfg1__bit equ 1 378 ; bind pcfg2 adcon1 @ 2 379 009f pcfg2 equ adcon1+0 380 009f pcfg2__byte equ adcon1+0 381 0002 pcfg2__bit equ 2 382 ; comment {Bank 2 registers :} 383 ; comment {EEPROM access registers :} 384 010c eedata equ 268 385 010d eeadr equ 269 386 010e eedath equ 270 387 010f eeadrh equ 271 388 ; comment {Bank 3 registers :} 389 018c eecon1 equ 396 390 ; bind eepgd eecon1 @ 7 391 018c eepgd equ eecon1+0 392 018c eepgd__byte equ eecon1+0 393 0007 eepgd__bit equ 7 394 ; bind eezlich eecon1 @ 6 395 018c eezlich equ eecon1+0 396 018c eezlich__byte equ eecon1+0 397 0006 eezlich__bit equ 6 398 ; bind wrerr eecon1 @ 3 399 018c wrerr equ eecon1+0 400 018c wrerr__byte equ eecon1+0 401 0003 wrerr__bit equ 3 402 ; bind wren eecon1 @ 2 403 018c wren equ eecon1+0 404 018c wren__byte equ eecon1+0 405 0002 wren__bit equ 2 406 ; bind wr eecon1 @ 1 407 018c wr equ eecon1+0 408 018c wr__byte equ eecon1+0 409 0001 wr__bit equ 1 410 ; bind rd eecon1 @ 0 411 018c rd equ eecon1+0 412 018c rd__byte equ eecon1+0 413 0000 rd__bit equ 0 414 018d eecon2 equ 397 415 ; comment {Some general constants :} 416 ; constant ascii_mask 0x7f 417 007f ascii_mask equ 127 418 ; constant tab 8 419 0008 tab equ 8 420 ; constant line_feed 10 421 000a line_feed equ 10 422 ; constant carriage_return 13 423 000d carriage_return equ 13 424 ; constant space 32 425 0020 space equ 32 426 ; constant register_mask 0x7f 427 007f register_mask equ 127 428 ; constant clock_rate 20000000 429 1312d00 clock_rate equ 20000000 430 ; constant instruction_rate clock_rate / 4 431 4c4b40 instruction_rate equ 5000000 432 ; constant baud_rate 2400 433 0960 baud_rate equ 2400 434 ; constant instructions_per_bit instruction_rate / baud_rate 435 0823 instructions_per_bit equ 2083 436 ; constant delays_per_bit 3 437 0003 delays_per_bit equ 3 438 ; constant instructions_per_delay instructions_per_bit / delays_per_bit 439 02b6 instructions_per_delay equ 694 440 ; constant delay_count instructions_per_delay / 6 441 0073 delay_count equ 115 442 ; origin 0x100 443 org 256 444 445 ; procedure program start 446 ; Switch from register bank 3 to register bank 0 447 100 1283 bcf rp0___byte,rp0___bit 448 101 1303 bcf rp1___byte,rp1___bit 449 102 1383 bcf irp___byte,irp___bit 450 ; Register bank is now 0 451 program: 452 ; Procedure must be called with RP0, RP1, and IRP set to register bank 0 453 ; Procedure must be called with PCLATH set to code bank 0 454 0020 program__variables__base equ global__variables__bank0+0 455 0020 program__bytes__base equ program__variables__base+0 456 0021 program__bits__base equ program__variables__base+1 457 0001 program__total__bytes equ 1 458 ; arguments_none 459 0020 program__count equ program__bytes__base+0 460 ; `count_down count 15 ...' start 461 103 300f movlw 15 462 104 00a0 movwf program__count 463 program__196_loop: 464 ; call put_char {{ 0c'H' }} 465 105 3048 movlw 72 466 106 00a1 movwf put_char__character 467 107 2117 call put_char 468 ; call put_char {{ 0c'i' }} 469 108 3069 movlw 105 470 109 00a1 movwf put_char__character 471 10a 2117 call put_char 472 ; call put_char {{ 0c'!' }} 473 10b 3021 movlw 33 474 10c 00a1 movwf put_char__character 475 10d 2117 call put_char 476 ; call put_char {{ carriage_return }} 477 10e 300d movlw 13 478 10f 00a1 movwf put_char__character 479 110 2117 call put_char 480 ; call put_char {{ line_feed }} 481 111 300a movlw 10 482 112 00a1 movwf put_char__character 483 113 2117 call put_char 484 114 0ba0 decfsz program__count,f 485 115 2905 goto program__196_loop 486 program__196_done: 487 ; `count_down count 15 ...' end 488 ; procedure program end 489 116 3400 retlw 0 490 491 ; procedure put_char start 492 put_char: 493 ; Procedure must be called with RP0, RP1, and IRP set to register bank 0 494 ; Procedure must be called with PCLATH set to code bank 0 495 0021 put_char__variables__base equ global__variables__bank0+1 496 0021 put_char__bytes__base equ put_char__variables__base+0 497 0022 put_char__bits__base equ put_char__variables__base+1 498 0001 put_char__total__bytes equ 1 499 0021 put_char__character equ put_char__bytes__base+0 500 ; This procedure will send < character > out to TX - pin of port C . 501 ; `while ! txif ...' start 502 put_char__211while__continue: 503 ; expression=`txif' exp_delay=0 true_delay=2 false_delay=2 true_size=1 false_size=1 504 117 1a0c btfsc txif__byte,txif__bit 505 118 291a goto put_char__211while__break 506 ; Wait for transmit buffer to empty . 507 119 2917 goto put_char__211while__continue 508 ; if exp=`txif' true goto small true 509 ; Other expression=`txif' delay=-1 510 put_char__211while__break: 511 ; `while ! txif ...' end 512 ; Send the character : 513 ; txreg := character 514 11a 0821 movf put_char__character,w 515 11b 0099 movwf txreg 516 ; watch_dog_reset 517 11c 0064 clrwdt 518 ; Now wait for it to be fully sent : 519 ; `while ! txif ...' start 520 put_char__219while__continue: 521 ; expression=`txif' exp_delay=0 true_delay=2 false_delay=2 true_size=1 false_size=1 522 11d 1a0c btfsc txif__byte,txif__bit 523 11e 2920 goto put_char__219while__break 524 ; Wait for transmit buffer to empty . 525 11f 291d goto put_char__219while__continue 526 ; if exp=`txif' true goto small true 527 ; Other expression=`txif' delay=-1 528 put_char__219while__break: 529 ; `while ! txif ...' end 530 ; procedure put_char end 531 120 3400 retlw 0 532 ; origin 0x1800 533 org 6144 534 ; bank 3 535 ; Default register bank is now 3 536 ; comment {String constants :} 537 ; string_constants Start 538 string___fetch: 539 1800 0082 movwf pcl___register 540 ; hello = 0s'PIC16F876-A RoboBrick Rev. 11' , carriage_return , line_feed 541 0000 hello___string equ 0 542 hello: 543 1801 0782 addwf pcl___register,f 544 ; Length = 31 545 1802 341f retlw 31 546 ; `PIC16F876-A RoboBrick Rev. 11' 547 1803 3450 retlw 80 548 1804 3449 retlw 73 549 1805 3443 retlw 67 550 1806 3431 retlw 49 551 1807 3436 retlw 54 552 1808 3446 retlw 70 553 1809 3438 retlw 56 554 180a 3437 retlw 55 555 180b 3436 retlw 54 556 180c 342d retlw 45 557 180d 3441 retlw 65 558 180e 3420 retlw 32 559 180f 3452 retlw 82 560 1810 346f retlw 111 561 1811 3462 retlw 98 562 1812 346f retlw 111 563 1813 3442 retlw 66 564 1814 3472 retlw 114 565 1815 3469 retlw 105 566 1816 3463 retlw 99 567 1817 346b retlw 107 568 1818 3420 retlw 32 569 1819 3452 retlw 82 570 181a 3465 retlw 101 571 181b 3476 retlw 118 572 181c 342e retlw 46 573 181d 3420 retlw 32 574 181e 3431 retlw 49 575 181f 3431 retlw 49 576 ; carriage_return 577 1820 340d retlw 13 578 ; line_feed 579 1821 340a retlw 10 580 ; string__constants End 581 ; comment {Global variables :} 582 ; comment {In general , I don ' t like gobal error registers , but for this} 583 ; comment {application , I think a global one works best :} 584 0190 error equ global__variables__bank3+0 585 ; constant ok 0 586 0000 ok equ 0 587 ; constant none 1 588 0001 none equ 1 589 ; constant bad 0xff 590 00ff bad equ 255 591 ; comment {One - character look ahead :} 592 0191 look_ahead equ global__variables__bank3+1 593 01c3 have_look_ahead equ global__bit__variables__bank3+0 594 01c3 have_look_ahead__byte equ global__bit__variables__bank3+0 595 0000 have_look_ahead__bit equ 0 596 01c3 zilch_bit equ global__bit__variables__bank3+0 597 01c3 zilch_bit__byte equ global__bit__variables__bank3+0 598 0001 zilch_bit__bit equ 1 599 600 ; procedure main start 601 main: 602 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 603 ; Procedure must be called with PCLATH set to code bank 0 604 0192 main__variables__base equ global__variables__bank3+2 605 0192 main__bytes__base equ main__variables__base+0 606 01a6 main__bits__base equ main__variables__base+20 607 0015 main__total__bytes equ 21 608 01a5 main__409byte0 equ main__bytes__base+19 609 01a5 main__377byte0 equ main__bytes__base+19 610 01a5 main__456byte0 equ main__bytes__base+19 611 01a5 main__379byte0 equ main__bytes__base+19 612 01a5 main__453byte0 equ main__bytes__base+19 613 ; arguments_none 614 0192 main__byte equ main__bytes__base+0 615 0193 main__chr equ main__bytes__base+1 616 0194 main__command equ main__bytes__base+2 617 0195 main__count equ main__bytes__base+3 618 01a6 main__crlf_last equ main__bits__base+0 619 01a6 main__crlf_last__byte equ main__bits__base+0 620 0002 main__crlf_last__bit equ 2 621 0196 main__end equ main__bytes__base+4 622 01a6 main__first equ main__bits__base+0 623 01a6 main__first__byte equ main__bits__base+0 624 0004 main__first__bit equ 4 625 0197 main__from_address equ main__bytes__base+5 626 0198 main__from_address_high equ main__bytes__base+6 627 0199 main__from_address_low equ main__bytes__base+7 628 019a main__hex_command equ main__bytes__base+8 629 019b main__high equ main__bytes__base+9 630 019c main__high_byte equ main__bytes__base+10 631 019d main__index equ main__bytes__base+11 632 019e main__length equ main__bytes__base+12 633 019f main__low equ main__bytes__base+13 634 01a0 main__low_byte equ main__bytes__base+14 635 01a1 main__start equ main__bytes__base+15 636 01a2 main__to_address equ main__bytes__base+16 637 01a3 main__to_address_high equ main__bytes__base+17 638 01a4 main__to_address_low equ main__bytes__base+18 639 ; Turn of general interrupts : 640 ; gie := 0 641 1822 138b bcf gie__byte,gie__bit 642 ; Initilize serial port : 643 ; Do Baud Rate selection and asynch . serial port enable : 644 ; Prescaler = low : 645 ; brgh := 0 646 ; Switch from register bank 3 to register bank 1 (which contains brgh__byte) 647 1823 1303 bcf rp1___byte,rp1___bit 648 1824 1383 bcf irp___byte,irp___bit 649 ; Register bank is now 1 650 1825 1118 bcf brgh__byte,brgh__bit 651 ; Baud rate = 2400 baud : 652 ; spbrg := 129 653 1826 3081 movlw 129 654 1827 0099 movwf spbrg 655 ; Asynchronous mode : 656 ; sync := 0 657 1828 1218 bcf sync__byte,sync__bit 658 ; Serial port enable : 659 ; spen := 1 660 ; Switch from register bank 1 to register bank 0 (which contains spen__byte) 661 1829 1283 bcf rp0___byte,rp0___bit 662 ; Register bank is now 0 663 182a 1798 bsf spen__byte,spen__bit 664 ; txif := 0 665 182b 120c bcf txif__byte,txif__bit 666 ; Enable the transmitter : 667 ; 8 - bit mode : 668 ; tx9 := 0 669 ; Switch from register bank 0 to register bank 1 (which contains tx9__byte) 670 182c 1683 bsf rp0___byte,rp0___bit 671 ; Register bank is now 1 672 182d 1318 bcf tx9__byte,tx9__bit 673 ; Enable transmitter : 674 ; txen := 1 675 182e 1698 bsf txen__byte,txen__bit 676 ; Enable the receiver : 677 ; 8 - bit mode : 678 ; rx9 := 0 679 ; Switch from register bank 1 to register bank 0 (which contains rx9__byte) 680 182f 1283 bcf rp0___byte,rp0___bit 681 ; Register bank is now 0 682 1830 1318 bcf rx9__byte,rx9__bit 683 ; Disable address : 684 ; adden := 0 685 1831 1198 bcf adden__byte,adden__bit 686 ; Enable continuous recepition : 687 ; cren := 1 688 1832 1618 bsf cren__byte,cren__bit 689 ; Enable single reception : 690 ; sren := 1 691 1833 1698 bsf sren__byte,sren__bit 692 ; Configure A / D to make all pins of port A digital : 693 ; pcfg0 := 1 694 ; Switch from register bank 0 to register bank 1 (which contains pcfg0__byte) 695 1834 1683 bsf rp0___byte,rp0___bit 696 ; Register bank is now 1 697 1835 141f bsf pcfg0__byte,pcfg0__bit 698 ; pcfg1 := 1 699 1836 149f bsf pcfg1__byte,pcfg1__bit 700 ; pcfg2 := 1 701 1837 151f bsf pcfg2__byte,pcfg2__bit 702 ; Turn off A / D module : 703 ; adon := 0 704 ; Switch from register bank 1 to register bank 0 (which contains adon__byte) 705 1838 1283 bcf rp0___byte,rp0___bit 706 ; Register bank is now 0 707 1839 101f bcf adon__byte,adon__bit 708 ; Select 1 : 709 ; portb := 2 710 ; sel0 := 1 711 183a 1486 bsf sel0__byte,sel0__bit 712 ; sel1 := 0 713 183b 1106 bcf sel1__byte,sel1__bit 714 ; sel2 := 0 715 183c 1186 bcf sel2__byte,sel2__bit 716 ; sel3 := 0 717 183d 1206 bcf sel3__byte,sel3__bit 718 ; sel4 := 0 719 183e 1286 bcf sel4__byte,sel4__bit 720 ; sel5 := 0 721 183f 1306 bcf sel5__byte,sel5__bit 722 ; Squirt out first characters : 723 ; index := 0 724 ; Switch from register bank 0 to register bank 3 (which contains main__index) 725 1840 1683 bsf rp0___byte,rp0___bit 726 1841 1703 bsf rp1___byte,rp1___bit 727 1842 1783 bsf irp___byte,irp___bit 728 ; Register bank is now 3 729 1843 019d clrf main__index 730 ; `while index < hello . size ...' start 731 main__323while__continue: 732 1844 301f movlw 31 733 1845 021d subwf main__index,w 734 ; expression=` index < hello . size ' exp_delay=2 true_delay=8 false_delay=2 true_size=9 false_size=1 735 1846 1803 btfsc c___byte,c___bit 736 1847 2851 goto main__323while__break 737 ; call put_character {{ hello ~~ {{ index }} }} 738 1848 0a1d incf main__index,w 739 1849 018a clrf pclath___register 740 184a 158a bsf pclath___register,3 741 184b 160a bsf pclath___register,4 742 184c 2001 call hello 743 184d 00bb movwf put_character__character 744 184e 2253 call put_character 745 ; index := index + 1 746 184f 0a9d incf main__index,f 747 1850 2844 goto main__323while__continue 748 ; if exp=` index < hello . size ' false goto 749 ; Other expression=` index < hello . size ' delay=-1 750 main__323while__break: 751 ; `while index < hello . size ...' end 752 ; Command loop : 753 ; have_look_ahead := 0 754 1851 1043 bcf have_look_ahead__byte,have_look_ahead__bit 755 ; loop_forever ... start 756 main__330loop__forever: 757 ; Get command character : 758 ; call put_character {{ 0c'>' }} 759 1852 303e movlw 62 760 1853 00bb movwf put_character__character 761 1854 2253 call put_character 762 ; command := get_character {{ }} 763 1855 21e0 call get_character 764 1856 082e movf get_character__0return__byte,w 765 1857 0094 movwf main__command 766 ; call put_character < command > 767 ; Convert any upper case command into a lower case one : 768 ; if { 0c'a' <= command && command <= 0c'z' } start 769 1858 3061 movlw 97 770 1859 0214 subwf main__command,w 771 ; expression=`0c'a' <= command' exp_delay=2 true_delay=-1 false_delay=2 true_size=6 false_size=1 772 185a 1c03 btfss c___byte,c___bit 773 185b 2862 goto and337__0false 774 185c 307b movlw 123 775 185d 0214 subwf main__command,w 776 ; expression=`command <= 0c'z'' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 777 185e 1803 btfsc c___byte,c___bit 778 185f 2862 goto label337__1end 779 and337__0true: 780 ; if { 0c'a' <= command && command <= 0c'z' } body start 781 ; command := command - 0c'a' + 0c'A' 782 1860 30e0 movlw 224 783 1861 0794 addwf main__command,f 784 ; if { 0c'a' <= command && command <= 0c'z' } body end 785 label337__1end: 786 ; if exp=`command <= 0c'z'' empty false 787 ; Other expression=`command <= 0c'z'' delay=-1 788 ; if exp=`0c'a' <= command' false goto 789 ; Other expression=`0c'a' <= command' delay=-1 790 and337__0false: 791 and337__0end: 792 ; if { 0c'a' <= command && command <= 0c'z' } end 793 ; if { command = 0c'E' } start 794 1862 3045 movlw 69 795 1863 0214 subwf main__command,w 796 ; expression=`{ command = 0c'E' }' exp_delay=2 true_delay=-1 false_delay=-1 true_size=34 false_size=241 797 1864 1d03 btfss z___byte,z___bit 798 1865 2888 goto label340__0false 799 label340__0true: 800 ; if { command = 0c'E' } body start 801 ; Examine data memory command : 802 ; Get < from_address > : 803 ; from_address := get_hex_byte {{ }} & register_mask 804 1866 21f6 call get_hex_byte 805 1867 0833 movf get_hex_byte__0return__byte,w 806 1868 397f andlw 127 807 1869 0097 movwf main__from_address 808 ; if { get_white_space {{ }} } start 809 186a 2239 call get_white_space 810 ; expression=`{ get_white_space {{ }} }' exp_delay=-1 true_delay=1 false_delay=1 true_size=3 false_size=1 811 186b 1c39 btfss get_white_space__0return__bit__byte,get_white_space__0return__bit__bit 812 186c 2871 goto label346__0false 813 label346__0true: 814 ; if { get_white_space {{ }} } body start 815 ; Get to_address : 816 ; to_address := get_hex_byte {{ }} & register_mask 817 186d 21f6 call get_hex_byte 818 186e 0833 movf get_hex_byte__0return__byte,w 819 186f 397f andlw 127 820 ; 1 instructions found for sharing 821 1870 2872 goto label346__0end 822 label346__0false: 823 ; else body start 824 ; to_address := from_address 825 1871 0817 movf main__from_address,w 826 ; 1 instructions found for sharing 827 ; if exp=` get_white_space ## {{ }} ' generic 828 label346__0end: 829 ; Other expression=`{ get_white_space {{ }} }' delay=-1 830 ; 1 shared instructions follow 831 1872 00a2 movwf main__to_address 832 ; if { get_white_space {{ }} } end 833 ; For debugging : 834 ; call put_character < 0c'F' > 835 ; call put_character < 0c'm' > 836 ; call put_hex_byte < from_address > 837 ; call put_character < 0c'T' > 838 ; call put_character < 0c'o' > 839 ; call put_hex_byte < to_address > 840 ; Get confirming carriage return : 841 ; if { get_carriage_return {{ }} && error = ok } start 842 1873 21c7 call get_carriage_return 843 ; expression=`get_carriage_return ## {{ }}' exp_delay=-1 true_delay=-1 false_delay=2 true_size=18 false_size=1 844 1874 1c2d btfss get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 845 1875 2887 goto and362__0false 846 1876 0810 movf error,w 847 ; expression=`error = ok' exp_delay=1 true_delay=-1 false_delay=0 true_size=15 false_size=0 848 1877 1d03 btfss z___byte,z___bit 849 1878 2887 goto label362__1end 850 and362__0true: 851 ; if { get_carriage_return {{ }} && error = ok } body start 852 ; Print out each one : 853 ; `while from_address <= to_address ...' start 854 main__364while__continue: 855 1879 0817 movf main__from_address,w 856 187a 0222 subwf main__to_address,w 857 ; expression=` from_address <= to_address ' exp_delay=2 true_delay=1 false_delay=2 true_size=10 false_size=1 858 187b 1c03 btfss c___byte,c___bit 859 187c 2886 goto main__364while__break 860 ; fsr := from_address 861 187d 0817 movf main__from_address,w 862 187e 0084 movwf fsr 863 ; byte := ind 864 187f 0800 movf ind,w 865 1880 0092 movwf main__byte 866 ; call put_hex_byte {{ byte }} 867 1881 00c0 movwf put_hex_byte__byte 868 1882 2284 call put_hex_byte 869 ; call put_space {{ }} 870 1883 229f call put_space 871 ; from_address := from_address + 1 872 1884 0a97 incf main__from_address,f 873 1885 2879 goto main__364while__continue 874 ; if exp=` from_address <= to_address ' false goto 875 ; Other expression=` from_address <= to_address ' delay=-1 876 main__364while__break: 877 ; `while from_address <= to_address ...' end 878 ; call put_new_line {{ }} 879 1886 2298 call put_new_line 880 ; if { get_carriage_return {{ }} && error = ok } body end 881 label362__1end: 882 ; if exp=`error = ok' empty false 883 ; Other expression=`error = ok' delay=-1 884 ; if exp=`get_carriage_return ## {{ }}' false goto 885 ; Other expression=`get_carriage_return ## {{ }}' delay=-1 886 and362__0false: 887 and362__0end: 888 ; if { get_carriage_return {{ }} && error = ok } end 889 ; if { command = 0c'E' } body end 890 1887 2999 goto label340__0end 891 label340__0false: 892 1888 3056 movlw 86 893 1889 0214 subwf main__command,w 894 ; expression=`{ command = 0c'V' }' exp_delay=2 true_delay=-1 false_delay=-1 true_size=109 false_size=127 895 188a 1d03 btfss z___byte,z___bit 896 188b 2902 goto label373__0false 897 label373__0true: 898 ; else_if { command = 0c'V' } body start 899 ; View program memory command : 900 ; Get from address : 901 ; from_address_high , from_address_low := get_hex_address {{ }} 902 188c 21e7 call get_hex_address 903 188d 082f movf get_hex_address__0return__byte,w 904 188e 00a5 movwf main__377byte0 905 188f 0830 movf get_hex_address__1return__byte,w 906 1890 0099 movwf main__from_address_low 907 1891 0825 movf main__377byte0,w 908 1892 0098 movwf main__from_address_high 909 ; if { get_white_space {{ }} } start 910 1893 2239 call get_white_space 911 ; expression=`{ get_white_space {{ }} }' exp_delay=-1 true_delay=5 false_delay=4 true_size=7 false_size=4 912 1894 1839 btfsc get_white_space__0return__bit__byte,get_white_space__0return__bit__bit 913 1895 289b goto label378__0true 914 label378__0false: 915 ; else body start 916 ; to_address_high := from_address_high 917 1896 0818 movf main__from_address_high,w 918 1897 00a3 movwf main__to_address_high 919 ; to_address_low := from_address_low 920 1898 0819 movf main__from_address_low,w 921 1899 00a4 movwf main__to_address_low 922 ; else body end 923 189a 28a2 goto label378__0end 924 label378__0true: 925 ; if { get_white_space {{ }} } body start 926 ; to_address_high , to_address_low := get_hex_address {{ }} 927 189b 21e7 call get_hex_address 928 189c 082f movf get_hex_address__0return__byte,w 929 189d 00a5 movwf main__379byte0 930 189e 0830 movf get_hex_address__1return__byte,w 931 189f 00a4 movwf main__to_address_low 932 18a0 0825 movf main__379byte0,w 933 18a1 00a3 movwf main__to_address_high 934 ; if { get_white_space {{ }} } body end 935 ; if exp=` get_white_space ## {{ }} ' generic 936 label378__0end: 937 ; Other expression=`{ get_white_space {{ }} }' delay=-1 938 ; if { get_white_space {{ }} } end 939 ; For debugging : 940 ; call put_character < 0c'F' > 941 ; call put_character < 0c'm' > 942 ; call put_hex_address < from_address_high , from_address_low > 943 ; call put_character < 0c'T' > 944 ; call put_character < 0c'o' > 945 ; call put_hex_address < to_address_high , to_address_low > 946 ; if { get_carriage_return {{ }} && error = ok } start 947 18a2 21c7 call get_carriage_return 948 ; expression=`get_carriage_return ## {{ }}' exp_delay=-1 true_delay=-1 false_delay=2 true_size=84 false_size=1 949 18a3 1c2d btfss get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 950 18a4 2901 goto and393__0false 951 18a5 0810 movf error,w 952 ; expression=`error = ok' exp_delay=1 true_delay=-1 false_delay=0 true_size=81 false_size=0 953 18a6 1d03 btfss z___byte,z___bit 954 18a7 2901 goto label393__1end 955 and393__0true: 956 ; if { get_carriage_return {{ }} && error = ok } body start 957 ; first := 1 958 18a8 1626 bsf main__first__byte,main__first__bit 959 ; crlf_last := 0 960 18a9 1126 bcf main__crlf_last__byte,main__crlf_last__bit 961 ; high := from_address_high 962 18aa 0818 movf main__from_address_high,w 963 18ab 009b movwf main__high 964 ; `while high <= to_address_high ...' start 965 main__397while__continue: 966 18ac 081b movf main__high,w 967 18ad 0223 subwf main__to_address_high,w 968 ; expression=` high <= to_address_high ' exp_delay=2 true_delay=1 false_delay=2 true_size=71 false_size=1 969 18ae 1c03 btfss c___byte,c___bit 970 18af 28ff goto main__397while__break 971 ; if { high = from_address_high } start 972 18b0 081b movf main__high,w 973 18b1 0218 subwf main__from_address_high,w 974 ; expression=`{ high = from_address_high }' exp_delay=2 true_delay=2 false_delay=1 true_size=2 false_size=1 975 18b2 1903 btfsc z___byte,z___bit 976 18b3 28b6 goto label398__0true 977 label398__0false: 978 ; else body start 979 ; start := 0 980 18b4 01a1 clrf main__start 981 ; else body end 982 18b5 28b8 goto label398__0end 983 label398__0true: 984 ; if { high = from_address_high } body start 985 ; start := from_address_low 986 18b6 0819 movf main__from_address_low,w 987 18b7 00a1 movwf main__start 988 ; if { high = from_address_high } body end 989 ; if exp=` high = from_address_high ' generic 990 label398__0end: 991 ; Other expression=`{ high = from_address_high }' delay=-1 992 ; if { high = from_address_high } end 993 ; if { high = to_address_high } start 994 18b8 081b movf main__high,w 995 18b9 0223 subwf main__to_address_high,w 996 ; expression=`{ high = to_address_high }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 997 18ba 1903 btfsc z___byte,z___bit 998 ; if { high = to_address_high } body start 999 ; end := to_address_low 1000 18bb 0824 movf main__to_address_low,w 1001 ; 1 instructions found for sharing 1002 18bc 1d03 btfss z___byte,z___bit 1003 ; else body start 1004 ; end := 0xff 1005 18bd 30ff movlw 255 1006 ; 1 instructions found for sharing 1007 ; if exp=` high = to_address_high ' single true and false skip delay=6 1008 ; Other expression=`{ high = to_address_high }' delay=6 1009 ; 1 shared instructions follow 1010 18be 0096 movwf main__end 1011 ; if { high = to_address_high } end 1012 ; low := start 1013 18bf 0821 movf main__start,w 1014 18c0 009f movwf main__low 1015 ; `count_down count end - start + 1 ...' start 1016 18c1 0816 movf main__end,w 1017 18c2 00a5 movwf main__409byte0 1018 18c3 0821 movf main__start,w 1019 18c4 0225 subwf main__409byte0,w 1020 18c5 3e01 addlw 1 1021 18c6 0095 movwf main__count 1022 main__409_loop: 1023 ; if { first || {{ low & 7 }} = 0 } start 1024 ; expression=`first' exp_delay=0 true_delay=6 false_delay=-1 true_size=1 false_size=12 1025 18c7 1a26 btfsc main__first__byte,main__first__bit 1026 18c8 28cd goto or410__0true 1027 18c9 3007 movlw 7 1028 18ca 051f andwf main__low,w 1029 ; expression=`{{ low & 7 }} = 0' exp_delay=2 true_delay=4 false_delay=0 true_size=8 false_size=0 1030 18cb 1d03 btfss z___byte,z___bit 1031 18cc 28d5 goto label410__1end 1032 or410__0true: 1033 ; if { first || {{ low & 7 }} = 0 } body start 1034 ; call put_hex_address {{ high , low }} 1035 18cd 081b movf main__high,w 1036 18ce 00be movwf put_hex_address__high_byte 1037 18cf 081f movf main__low,w 1038 18d0 00bf movwf put_hex_address__low_byte 1039 18d1 227d call put_hex_address 1040 ; call put_character {{ 0c':' }} 1041 18d2 303a movlw 58 1042 18d3 00bb movwf put_character__character 1043 18d4 2253 call put_character 1044 ; if { first || {{ low & 7 }} = 0 } body end 1045 label410__1end: 1046 ; if exp=`{{ low & 7 }} = 0' empty false 1047 ; Other expression=`{{ low & 7 }} = 0' delay=-1 1048 ; if exp=`first' true goto 1049 ; Other expression=`first' delay=-1 1050 or410__0false: 1051 or410__0end: 1052 ; if { first || {{ low & 7 }} = 0 } end 1053 ; first := 0 1054 18d5 1226 bcf main__first__byte,main__first__bit 1055 ; Read the byte : 1056 ; eeadrh := high 1057 18d6 081b movf main__high,w 1058 ; Switch from register bank 3 to register bank 2 (which contains eeadrh) 1059 18d7 1283 bcf rp0___byte,rp0___bit 1060 ; Register bank is now 2 1061 18d8 008f movwf eeadrh 1062 ; eeadr := low 1063 ; Switch from register bank 2 to register bank 3 (which contains main__low) 1064 18d9 1683 bsf rp0___byte,rp0___bit 1065 ; Register bank is now 3 1066 18da 081f movf main__low,w 1067 ; Switch from register bank 3 to register bank 2 (which contains eeadr) 1068 18db 1283 bcf rp0___byte,rp0___bit 1069 ; Register bank is now 2 1070 18dc 008d movwf eeadr 1071 ; eepgd := 1 1072 ; Switch from register bank 2 to register bank 3 (which contains eepgd__byte) 1073 18dd 1683 bsf rp0___byte,rp0___bit 1074 ; Register bank is now 3 1075 18de 178c bsf eepgd__byte,eepgd__bit 1076 ; rd := 1 1077 18df 140c bsf rd__byte,rd__bit 1078 ; The next two instructions are * ignored * ! ! ! 1079 ; eezlich := 0 1080 18e0 130c bcf eezlich__byte,eezlich__bit 1081 ; eezlich := 1 1082 18e1 170c bsf eezlich__byte,eezlich__bit 1083 ; high_byte := eedath 1084 ; Switch from register bank 3 to register bank 2 (which contains eedath) 1085 18e2 1283 bcf rp0___byte,rp0___bit 1086 ; Register bank is now 2 1087 18e3 080e movf eedath,w 1088 ; Switch from register bank 2 to register bank 3 (which contains main__high_byte) 1089 18e4 1683 bsf rp0___byte,rp0___bit 1090 ; Register bank is now 3 1091 18e5 009c movwf main__high_byte 1092 ; low_byte := eedata 1093 ; Switch from register bank 3 to register bank 2 (which contains eedata) 1094 18e6 1283 bcf rp0___byte,rp0___bit 1095 ; Register bank is now 2 1096 18e7 080c movf eedata,w 1097 ; Switch from register bank 2 to register bank 3 (which contains main__low_byte) 1098 18e8 1683 bsf rp0___byte,rp0___bit 1099 ; Register bank is now 3 1100 18e9 00a0 movwf main__low_byte 1101 ; call put_character {{ space }} 1102 18ea 3020 movlw 32 1103 18eb 00bb movwf put_character__character 1104 18ec 2253 call put_character 1105 ; call put_hex_address {{ high_byte , low_byte }} 1106 18ed 081c movf main__high_byte,w 1107 18ee 00be movwf put_hex_address__high_byte 1108 18ef 0820 movf main__low_byte,w 1109 18f0 00bf movwf put_hex_address__low_byte 1110 18f1 227d call put_hex_address 1111 ; Move to next instruction : 1112 ; low := low + 1 1113 18f2 0a9f incf main__low,f 1114 ; if { {{ low & 7 }} = 0 } start 1115 18f3 3007 movlw 7 1116 18f4 051f andwf main__low,w 1117 ; expression=`{ {{ low & 7 }} = 0 }' exp_delay=2 true_delay=-1 false_delay=1 true_size=2 false_size=1 1118 18f5 1d03 btfss z___byte,z___bit 1119 18f6 28fa goto label432__0false 1120 label432__0true: 1121 ; if { {{ low & 7 }} = 0 } body start 1122 ; call put_new_line {{ }} 1123 18f7 2298 call put_new_line 1124 ; crlf_last := 1 1125 18f8 1526 bsf main__crlf_last__byte,main__crlf_last__bit 1126 ; if { {{ low & 7 }} = 0 } body end 1127 18f9 28fb goto label432__0end 1128 label432__0false: 1129 ; else body start 1130 ; crlf_last := 0 1131 18fa 1126 bcf main__crlf_last__byte,main__crlf_last__bit 1132 ; else body end 1133 ; if exp=` {{ low & 7 }} = 0 ' generic 1134 label432__0end: 1135 ; Other expression=`{ {{ low & 7 }} = 0 }' delay=-1 1136 ; if { {{ low & 7 }} = 0 } end 1137 18fb 0b95 decfsz main__count,f 1138 18fc 28c7 goto main__409_loop 1139 main__409_done: 1140 ; `count_down count end - start + 1 ...' end 1141 ; high := high + 1 1142 18fd 0a9b incf main__high,f 1143 18fe 28ac goto main__397while__continue 1144 ; if exp=` high <= to_address_high ' false goto 1145 ; Other expression=` high <= to_address_high ' delay=-1 1146 main__397while__break: 1147 ; `while high <= to_address_high ...' end 1148 ; if { ! crlf_last } start 1149 ; expression=`crlf_last' exp_delay=0 true_delay=0 false_delay=-1 true_size=0 false_size=1 1150 18ff 1d26 btfss main__crlf_last__byte,main__crlf_last__bit 1151 ; if { ! crlf_last } body start 1152 ; call put_new_line {{ }} 1153 1900 2298 call put_new_line 1154 ; if { ! crlf_last } body end 1155 ; if exp=`crlf_last' true skip delay=2 1156 ; Other expression=`crlf_last' delay=2 1157 ; if { ! crlf_last } end 1158 ; if { get_carriage_return {{ }} && error = ok } body end 1159 label393__1end: 1160 ; if exp=`error = ok' empty false 1161 ; Other expression=`error = ok' delay=-1 1162 ; if exp=`get_carriage_return ## {{ }}' false goto 1163 ; Other expression=`get_carriage_return ## {{ }}' delay=-1 1164 and393__0false: 1165 and393__0end: 1166 ; if { get_carriage_return {{ }} && error = ok } end 1167 ; else_if { command = 0c'V' } body end 1168 1901 2999 goto label373__0end 1169 label373__0false: 1170 1902 3053 movlw 83 1171 1903 0214 subwf main__command,w 1172 ; expression=`{ command = 0c'S' }' exp_delay=2 true_delay=2 false_delay=-1 true_size=4 false_size=118 1173 1904 1903 btfsc z___byte,z___bit 1174 1905 2995 goto label445__0true 1175 label445__0false: 1176 1906 3052 movlw 82 1177 1907 0214 subwf main__command,w 1178 ; expression=`{ command = 0c'R' }' exp_delay=2 true_delay=2 false_delay=-1 true_size=4 false_size=109 1179 1908 1903 btfsc z___byte,z___bit 1180 1909 2990 goto label448__0true 1181 label448__0false: 1182 190a 3057 movlw 87 1183 190b 0214 subwf main__command,w 1184 ; expression=`{ command = 0c'W' }' exp_delay=2 true_delay=-1 false_delay=-1 true_size=94 false_size=10 1185 190c 1d03 btfss z___byte,z___bit 1186 190d 2985 goto label451__0false 1187 label451__0true: 1188 ; else_if { command = 0c'W' } body start 1189 ; Program a hex file : 1190 ; to_address_high , to_address_low := get_hex_address {{ }} 1191 190e 21e7 call get_hex_address 1192 190f 082f movf get_hex_address__0return__byte,w 1193 1910 00a5 movwf main__453byte0 1194 1911 0830 movf get_hex_address__1return__byte,w 1195 1912 00a4 movwf main__to_address_low 1196 1913 0825 movf main__453byte0,w 1197 1914 00a3 movwf main__to_address_high 1198 ; `while get_white_space ## {{ }} ...' start 1199 main__454while__continue: 1200 1915 2239 call get_white_space 1201 ; expression=` get_white_space ## {{ }} ' exp_delay=-1 true_delay=1 false_delay=2 true_size=80 false_size=1 1202 1916 1c39 btfss get_white_space__0return__bit__byte,get_white_space__0return__bit__bit 1203 1917 2980 goto main__454while__break 1204 ; Read the data bytes : 1205 ; high , low := get_hex_address {{ }} 1206 1918 21e7 call get_hex_address 1207 1919 082f movf get_hex_address__0return__byte,w 1208 191a 00a5 movwf main__456byte0 1209 191b 0830 movf get_hex_address__1return__byte,w 1210 191c 009f movwf main__low 1211 191d 0825 movf main__456byte0,w 1212 191e 009b movwf main__high 1213 ; Restrict ourselves between 1214 ; Write the data out : 1215 ; chr := 0c'-' 1216 191f 302d movlw 45 1217 1920 0093 movwf main__chr 1218 ; if { to_address_high != 0 && to_address_high < 0x20 } start 1219 1921 0823 movf main__to_address_high,w 1220 ; expression=`to_address_high != 0' exp_delay=1 true_delay=-1 false_delay=2 true_size=60 false_size=1 1221 1922 1903 btfsc z___byte,z___bit 1222 1923 2978 goto and461__0false 1223 1924 3020 movlw 32 1224 1925 0223 subwf main__to_address_high,w 1225 ; expression=`to_address_high < 0x20' exp_delay=2 true_delay=-1 false_delay=0 true_size=56 false_size=0 1226 1926 1803 btfsc c___byte,c___bit 1227 1927 2978 goto label461__1end 1228 and461__0true: 1229 ; if { to_address_high != 0 && to_address_high < 0x20 } body start 1230 ; Read before write : 1231 ; eeadrh := to_address_high 1232 1928 0823 movf main__to_address_high,w 1233 ; Switch from register bank 3 to register bank 2 (which contains eeadrh) 1234 1929 1283 bcf rp0___byte,rp0___bit 1235 ; Register bank is now 2 1236 192a 008f movwf eeadrh 1237 ; eeadr := to_address_low 1238 ; Switch from register bank 2 to register bank 3 (which contains main__to_address_low) 1239 192b 1683 bsf rp0___byte,rp0___bit 1240 ; Register bank is now 3 1241 192c 0824 movf main__to_address_low,w 1242 ; Switch from register bank 3 to register bank 2 (which contains eeadr) 1243 192d 1283 bcf rp0___byte,rp0___bit 1244 ; Register bank is now 2 1245 192e 008d movwf eeadr 1246 ; eepgd := 1 1247 ; Switch from register bank 2 to register bank 3 (which contains eepgd__byte) 1248 192f 1683 bsf rp0___byte,rp0___bit 1249 ; Register bank is now 3 1250 1930 178c bsf eepgd__byte,eepgd__bit 1251 ; rd := 1 1252 1931 140c bsf rd__byte,rd__bit 1253 ; The next two instructions are not executed : 1254 ; dc := 0 1255 1932 1083 bcf dc__byte,dc__bit 1256 ; dc := 1 1257 1933 1483 bsf dc__byte,dc__bit 1258 ; Only write if it does not match : 1259 ; if { eedath = high && eedata = low } start 1260 ; Switch from register bank 3 to register bank 2 (which contains eedath) 1261 1934 1283 bcf rp0___byte,rp0___bit 1262 ; Register bank is now 2 1263 1935 080e movf eedath,w 1264 ; Switch from register bank 2 to register bank 3 (which contains main__high) 1265 1936 1683 bsf rp0___byte,rp0___bit 1266 ; Register bank is now 3 1267 1937 021b subwf main__high,w 1268 ; expression=`eedath = high' exp_delay=2 true_delay=-1 false_delay=1 true_size=44 false_size=1 1269 1938 1d03 btfss z___byte,z___bit 1270 1939 2943 goto and472__0false 1271 ; Switch from register bank 3 to register bank 2 (which contains eedata) 1272 193a 1283 bcf rp0___byte,rp0___bit 1273 ; Register bank is now 2 1274 193b 080c movf eedata,w 1275 ; Switch from register bank 2 to register bank 3 (which contains main__low) 1276 193c 1683 bsf rp0___byte,rp0___bit 1277 ; Register bank is now 3 1278 193d 021f subwf main__low,w 1279 ; expression=`eedata = low' exp_delay=2 true_delay=2 false_delay=-1 true_size=2 false_size=37 1280 193e 1d03 btfss z___byte,z___bit 1281 193f 2943 goto label472__1false 1282 label472__1true: 1283 and472__0true: 1284 ; if { eedath = high && eedata = low } body start 1285 ; chr := 0c'+' 1286 1940 302b movlw 43 1287 1941 0093 movwf main__chr 1288 ; if { eedath = high && eedata = low } body end 1289 1942 2978 goto label472__1end 1290 label472__1false: 1291 and472__0false: 1292 ; else body start 1293 ; Do the write : 1294 ; eeadrh := to_address_high 1295 1943 0823 movf main__to_address_high,w 1296 ; Switch from register bank 3 to register bank 2 (which contains eeadrh) 1297 1944 1283 bcf rp0___byte,rp0___bit 1298 ; Register bank is now 2 1299 1945 008f movwf eeadrh 1300 ; eeadr := to_address_low 1301 ; Switch from register bank 2 to register bank 3 (which contains main__to_address_low) 1302 1946 1683 bsf rp0___byte,rp0___bit 1303 ; Register bank is now 3 1304 1947 0824 movf main__to_address_low,w 1305 ; Switch from register bank 3 to register bank 2 (which contains eeadr) 1306 1948 1283 bcf rp0___byte,rp0___bit 1307 ; Register bank is now 2 1308 1949 008d movwf eeadr 1309 ; eedath := high 1310 ; Switch from register bank 2 to register bank 3 (which contains main__high) 1311 194a 1683 bsf rp0___byte,rp0___bit 1312 ; Register bank is now 3 1313 194b 081b movf main__high,w 1314 ; Switch from register bank 3 to register bank 2 (which contains eedath) 1315 194c 1283 bcf rp0___byte,rp0___bit 1316 ; Register bank is now 2 1317 194d 008e movwf eedath 1318 ; eedata := low 1319 ; Switch from register bank 2 to register bank 3 (which contains main__low) 1320 194e 1683 bsf rp0___byte,rp0___bit 1321 ; Register bank is now 3 1322 194f 081f movf main__low,w 1323 ; Switch from register bank 3 to register bank 2 (which contains eedata) 1324 1950 1283 bcf rp0___byte,rp0___bit 1325 ; Register bank is now 2 1326 1951 008c movwf eedata 1327 ; eepgd := 1 1328 ; Switch from register bank 2 to register bank 3 (which contains eepgd__byte) 1329 1952 1683 bsf rp0___byte,rp0___bit 1330 ; Register bank is now 3 1331 1953 178c bsf eepgd__byte,eepgd__bit 1332 ; wren := 1 1333 1954 150c bsf wren__byte,wren__bit 1334 ; gie := 0 1335 1955 138b bcf gie__byte,gie__bit 1336 ; eecon2 := 0x55 1337 1956 3055 movlw 85 1338 1957 008d movwf eecon2 1339 ; eecon2 := 0xaa 1340 1958 30aa movlw 170 1341 1959 008d movwf eecon2 1342 ; wr := 1 1343 195a 148c bsf wr__byte,wr__bit 1344 ; The next two instructions are not executed : 1345 ; dc := 0 1346 195b 1083 bcf dc__byte,dc__bit 1347 ; dc := 1 1348 195c 1483 bsf dc__byte,dc__bit 1349 ; wren := 0 1350 195d 110c bcf wren__byte,wren__bit 1351 ; Now verify the write : 1352 ; eeadrh := to_address_high 1353 195e 0823 movf main__to_address_high,w 1354 ; Switch from register bank 3 to register bank 2 (which contains eeadrh) 1355 195f 1283 bcf rp0___byte,rp0___bit 1356 ; Register bank is now 2 1357 1960 008f movwf eeadrh 1358 ; eeadr := to_address_low 1359 ; Switch from register bank 2 to register bank 3 (which contains main__to_address_low) 1360 1961 1683 bsf rp0___byte,rp0___bit 1361 ; Register bank is now 3 1362 1962 0824 movf main__to_address_low,w 1363 ; Switch from register bank 3 to register bank 2 (which contains eeadr) 1364 1963 1283 bcf rp0___byte,rp0___bit 1365 ; Register bank is now 2 1366 1964 008d movwf eeadr 1367 ; eepgd := 1 1368 ; Switch from register bank 2 to register bank 3 (which contains eepgd__byte) 1369 1965 1683 bsf rp0___byte,rp0___bit 1370 ; Register bank is now 3 1371 1966 178c bsf eepgd__byte,eepgd__bit 1372 ; rd := 1 1373 1967 140c bsf rd__byte,rd__bit 1374 ; The next two instructions are not executed : 1375 ; dc := 0 1376 1968 1083 bcf dc__byte,dc__bit 1377 ; dc := 1 1378 1969 1483 bsf dc__byte,dc__bit 1379 ; Provide some feedback : 1380 ; if { eedath = high && eedata = low } start 1381 ; Switch from register bank 3 to register bank 2 (which contains eedath) 1382 196a 1283 bcf rp0___byte,rp0___bit 1383 ; Register bank is now 2 1384 196b 080e movf eedath,w 1385 ; Switch from register bank 2 to register bank 3 (which contains main__high) 1386 196c 1683 bsf rp0___byte,rp0___bit 1387 ; Register bank is now 3 1388 196d 021b subwf main__high,w 1389 ; expression=`eedath = high' exp_delay=2 true_delay=-1 false_delay=2 true_size=6 false_size=1 1390 196e 1d03 btfss z___byte,z___bit 1391 196f 2978 goto and501__0false 1392 ; Switch from register bank 3 to register bank 2 (which contains eedata) 1393 1970 1283 bcf rp0___byte,rp0___bit 1394 ; Register bank is now 2 1395 1971 080c movf eedata,w 1396 ; Switch from register bank 2 to register bank 3 (which contains main__low) 1397 1972 1683 bsf rp0___byte,rp0___bit 1398 ; Register bank is now 3 1399 1973 021f subwf main__low,w 1400 ; expression=`eedata = low' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 1401 1974 1d03 btfss z___byte,z___bit 1402 1975 2978 goto label501__1end 1403 and501__0true: 1404 ; if { eedath = high && eedata = low } body start 1405 ; chr := 0c'+' 1406 1976 302b movlw 43 1407 1977 0093 movwf main__chr 1408 ; if { eedath = high && eedata = low } body end 1409 label501__1end: 1410 ; if exp=`eedata = low' empty false 1411 ; Other expression=`eedata = low' delay=-1 1412 ; if exp=`eedath = high' false goto 1413 ; Other expression=`eedath = high' delay=-1 1414 and501__0false: 1415 and501__0end: 1416 ; if { eedath = high && eedata = low } end 1417 ; else body end 1418 ; if exp=`eedata = low' generic 1419 label472__1end: 1420 ; Other expression=`eedata = low' delay=-1 1421 ; if exp=`eedath = high' false goto 1422 ; Other expression=`eedath = high' delay=-1 1423 and472__0end: 1424 ; if { eedath = high && eedata = low } end 1425 ; if { to_address_high != 0 && to_address_high < 0x20 } body end 1426 label461__1end: 1427 ; if exp=`to_address_high < 0x20' empty false 1428 ; Other expression=`to_address_high < 0x20' delay=-1 1429 ; if exp=`to_address_high != 0' false goto 1430 ; Other expression=`to_address_high != 0' delay=-1 1431 and461__0false: 1432 and461__0end: 1433 ; if { to_address_high != 0 && to_address_high < 0x20 } end 1434 ; call put_character {{ chr }} 1435 1978 0813 movf main__chr,w 1436 1979 00bb movwf put_character__character 1437 197a 2253 call put_character 1438 ; increment to next address : 1439 ; to_address_low := to_address_low + 1 1440 197b 0aa4 incf main__to_address_low,f 1441 ; if { to_address_low = 0 } start 1442 197c 0824 movf main__to_address_low,w 1443 ; expression=`{ to_address_low = 0 }' exp_delay=1 true_delay=1 false_delay=0 true_size=1 false_size=0 1444 197d 1903 btfsc z___byte,z___bit 1445 ; if { to_address_low = 0 } body start 1446 ; to_address_high := to_address_high + 1 1447 197e 0aa3 incf main__to_address_high,f 1448 ; if { to_address_low = 0 } body end 1449 ; if exp=` to_address_low = 0 ' false skip delay=3 1450 ; Other expression=`{ to_address_low = 0 }' delay=3 1451 ; if { to_address_low = 0 } end 1452 197f 2915 goto main__454while__continue 1453 ; if exp=` get_white_space ## {{ }} ' false goto 1454 ; Other expression=` get_white_space ## {{ }} ' delay=-1 1455 main__454while__break: 1456 ; `while get_white_space ## {{ }} ...' end 1457 ; zilch_bit := get_carriage_return {{ }} 1458 1980 21c7 call get_carriage_return 1459 1981 10c3 bcf zilch_bit__byte,zilch_bit__bit 1460 1982 182d btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 1461 1983 14c3 bsf zilch_bit__byte,zilch_bit__bit 1462 ; else_if { command = 0c'W' } body end 1463 1984 298f goto label451__0end 1464 label451__0false: 1465 1985 3047 movlw 71 1466 1986 0214 subwf main__command,w 1467 ; expression=`{ command = 0c'G' }' exp_delay=2 true_delay=-1 false_delay=2 true_size=1 false_size=4 1468 1987 1d03 btfss z___byte,z___bit 1469 1988 298b goto label515__0false 1470 label515__0true: 1471 ; else_if { command = 0c'G' } body start 1472 ; call goto_command {{ }} 1473 1989 219a call goto_command 1474 ; else_if { command = 0c'G' } body end 1475 198a 298f goto label515__0end 1476 label515__0false: 1477 ; else body start 1478 ; Unrecognized command : 1479 ; zilch_bit := get_carriage_return {{ }} 1480 198b 21c7 call get_carriage_return 1481 198c 10c3 bcf zilch_bit__byte,zilch_bit__bit 1482 198d 182d btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 1483 198e 14c3 bsf zilch_bit__byte,zilch_bit__bit 1484 ; else body end 1485 ; if exp=` command = 0c'G' ' generic 1486 label515__0end: 1487 ; Other expression=`{ command = 0c'G' }' delay=-1 1488 ; if exp=` command = 0c'W' ' generic 1489 label451__0end: 1490 ; Other expression=`{ command = 0c'W' }' delay=-1 1491 198f 2994 goto label448__0end 1492 label448__0true: 1493 ; else_if { command = 0c'R' } body start 1494 ; Run command 1495 ; zilch_bit := get_carriage_return {{ }} 1496 1990 21c7 call get_carriage_return 1497 1991 10c3 bcf zilch_bit__byte,zilch_bit__bit 1498 1992 182d btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 1499 1993 14c3 bsf zilch_bit__byte,zilch_bit__bit 1500 ; else_if { command = 0c'R' } body end 1501 ; if exp=` command = 0c'R' ' generic 1502 label448__0end: 1503 ; Other expression=`{ command = 0c'R' }' delay=-1 1504 1994 2999 goto label445__0end 1505 label445__0true: 1506 ; else_if { command = 0c'S' } body start 1507 ; Store data memory command : 1508 ; zilch_bit := get_carriage_return {{ }} 1509 1995 21c7 call get_carriage_return 1510 1996 10c3 bcf zilch_bit__byte,zilch_bit__bit 1511 1997 182d btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 1512 1998 14c3 bsf zilch_bit__byte,zilch_bit__bit 1513 ; else_if { command = 0c'S' } body end 1514 ; if exp=` command = 0c'S' ' generic 1515 label445__0end: 1516 ; Other expression=`{ command = 0c'S' }' delay=-1 1517 ; if exp=` command = 0c'V' ' generic 1518 label373__0end: 1519 ; Other expression=`{ command = 0c'V' }' delay=-1 1520 ; if exp=` command = 0c'E' ' generic 1521 label340__0end: 1522 ; Other expression=`{ command = 0c'E' }' delay=-1 1523 ; if { command = 0c'E' } end 1524 1999 2852 goto main__330loop__forever 1525 ; loop_forever ... end 1526 ; procedure main end 1527 1528 ; procedure goto_command start 1529 goto_command: 1530 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 1531 ; Procedure must be called with PCLATH set to code bank 0 1532 01a7 goto_command__variables__base equ global__variables__bank3+23 1533 01a7 goto_command__bytes__base equ goto_command__variables__base+0 1534 01aa goto_command__bits__base equ goto_command__variables__base+3 1535 0003 goto_command__total__bytes equ 3 1536 01a9 goto_command__530byte0 equ goto_command__bytes__base+2 1537 ; arguments_none 1538 01a7 goto_command__address_low equ goto_command__bytes__base+0 1539 01a8 goto_command__address_high equ goto_command__bytes__base+1 1540 ; address_high , address_low := get_hex_address {{ }} 1541 199a 21e7 call get_hex_address 1542 199b 082f movf get_hex_address__0return__byte,w 1543 199c 00a9 movwf goto_command__530byte0 1544 199d 0830 movf get_hex_address__1return__byte,w 1545 199e 00a7 movwf goto_command__address_low 1546 199f 0829 movf goto_command__530byte0,w 1547 19a0 00a8 movwf goto_command__address_high 1548 ; zilch_bit := get_carriage_return {{ }} 1549 19a1 21c7 call get_carriage_return 1550 19a2 10c3 bcf zilch_bit__byte,zilch_bit__bit 1551 19a3 182d btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 1552 19a4 14c3 bsf zilch_bit__byte,zilch_bit__bit 1553 ; pclath := address_high 1554 19a5 0828 movf goto_command__address_high,w 1555 19a6 008a movwf pclath 1556 ; pcl := address_low 1557 19a7 0827 movf goto_command__address_low,w 1558 19a8 0082 movwf pcl 1559 ; procedure goto_command end 1560 19a9 3400 retlw 0 1561 ; comment {The ` get ' procedures are below :} 1562 1563 ; procedure get_byte start 1564 get_byte: 1565 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 1566 ; Procedure must be called with PCLATH set to code bank 0 1567 01aa get_byte__variables__base equ global__variables__bank3+26 1568 01aa get_byte__bytes__base equ get_byte__variables__base+0 1569 01ac get_byte__bits__base equ get_byte__variables__base+2 1570 0002 get_byte__total__bytes equ 2 1571 ; arguments_none 1572 01aa get_byte__0return__byte equ get_byte__bytes__base+0 1573 ; Get an 8 - bit byte the RX pin of port C . 1574 ; Compiler kludge : Compiler can ' t bit test outside of the current data 1575 ; bank yet . So read the entire register into a temporary and test second . 1576 01ab get_byte__pir1_copy equ get_byte__bytes__base+1 1577 ; pir1_copy := pir1 1578 ; Switch from register bank 3 to register bank 0 (which contains pir1) 1579 19aa 1283 bcf rp0___byte,rp0___bit 1580 19ab 1303 bcf rp1___byte,rp1___bit 1581 19ac 1383 bcf irp___byte,irp___bit 1582 ; Register bank is now 0 1583 19ad 080c movf pir1,w 1584 ; Switch from register bank 0 to register bank 3 (which contains get_byte__pir1_copy) 1585 19ae 1683 bsf rp0___byte,rp0___bit 1586 19af 1703 bsf rp1___byte,rp1___bit 1587 19b0 1783 bsf irp___byte,irp___bit 1588 ; Register bank is now 3 1589 19b1 00ab movwf get_byte__pir1_copy 1590 ; `while ! {{ pir1_copy @ 5 }} ...' start 1591 get_byte__550while__continue: 1592 ; Alias variable for select pir1_copy @ 5 1593 01ab get_byte__pir1_copy__550select0 equ get_byte__pir1_copy+0 1594 01ab get_byte__pir1_copy__550select0__byte equ get_byte__pir1_copy+0 1595 0005 get_byte__pir1_copy__550select0__bit equ 5 1596 ; expression=`{{ pir1_copy @ 5 }}' exp_delay=0 true_delay=2 false_delay=5 true_size=1 false_size=4 1597 19b2 1aab btfsc get_byte__pir1_copy__550select0__byte,get_byte__pir1_copy__550select0__bit 1598 19b3 29be goto get_byte__550while__break 1599 ; Wait for character : 1600 ; watch_dog_reset 1601 19b4 0064 clrwdt 1602 ; pir1_copy := pir1 1603 ; Switch from register bank 3 to register bank 0 (which contains pir1) 1604 19b5 1283 bcf rp0___byte,rp0___bit 1605 19b6 1303 bcf rp1___byte,rp1___bit 1606 19b7 1383 bcf irp___byte,irp___bit 1607 ; Register bank is now 0 1608 19b8 080c movf pir1,w 1609 ; Switch from register bank 0 to register bank 3 (which contains get_byte__pir1_copy) 1610 19b9 1683 bsf rp0___byte,rp0___bit 1611 19ba 1703 bsf rp1___byte,rp1___bit 1612 19bb 1783 bsf irp___byte,irp___bit 1613 ; Register bank is now 3 1614 19bc 00ab movwf get_byte__pir1_copy 1615 19bd 29b2 goto get_byte__550while__continue 1616 ; if exp=` pir1_copy @ 5 ' true goto 1617 ; Other expression=`{{ pir1_copy @ 5 }}' delay=-1 1618 get_byte__550while__break: 1619 ; `while ! {{ pir1_copy @ 5 }} ...' end 1620 ; return rcreg 1621 ; Switch from register bank 3 to register bank 0 (which contains rcreg) 1622 19be 1283 bcf rp0___byte,rp0___bit 1623 19bf 1303 bcf rp1___byte,rp1___bit 1624 19c0 1383 bcf irp___byte,irp___bit 1625 ; Register bank is now 0 1626 19c1 081a movf rcreg,w 1627 ; Switch from register bank 0 to register bank 3 (which contains get_byte__0return__byte) 1628 19c2 1683 bsf rp0___byte,rp0___bit 1629 19c3 1703 bsf rp1___byte,rp1___bit 1630 19c4 1783 bsf irp___byte,irp___bit 1631 ; Register bank is now 3 1632 19c5 00aa movwf get_byte__0return__byte 1633 19c6 3400 retlw 0 1634 ; procedure get_byte end 1635 1636 ; procedure get_carriage_return start 1637 get_carriage_return: 1638 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 1639 ; Procedure must be called with PCLATH set to code bank 0 1640 01ac get_carriage_return__variables__base equ global__variables__bank3+28 1641 01ac get_carriage_return__bytes__base equ get_carriage_return__variables__base+0 1642 01ad get_carriage_return__bits__base equ get_carriage_return__variables__base+1 1643 0002 get_carriage_return__total__bytes equ 2 1644 ; arguments_none 1645 01ad get_carriage_return__0return__bit equ get_carriage_return__bits__base+0 1646 01ad get_carriage_return__0return__bit__byte equ get_carriage_return__bits__base+0 1647 0000 get_carriage_return__0return__bit__bit equ 0 1648 ; This procedure will verify that the next character is 1649 ; a carriage return . If the next character is a carriage 1650 ; return a 1 is returned . Otherwise , characters are read 1651 ; until a carriage return is encountered and 0 is returned . 1652 01ac get_carriage_return__character equ get_carriage_return__bytes__base+0 1653 ; character := get_character {{ }} 1654 19c7 21e0 call get_character 1655 19c8 082e movf get_character__0return__byte,w 1656 19c9 00ac movwf get_carriage_return__character 1657 ; if { character = carriage_return } start 1658 19ca 300d movlw 13 1659 19cb 022c subwf get_carriage_return__character,w 1660 ; expression=`{ character = carriage_return }' exp_delay=2 true_delay=3 false_delay=0 true_size=5 false_size=0 1661 19cc 1d03 btfss z___byte,z___bit 1662 19cd 29d3 goto label570__0end 1663 ; if { character = carriage_return } body start 1664 ; call put_character {{ line_feed }} 1665 19ce 300a movlw 10 1666 19cf 00bb movwf put_character__character 1667 19d0 2253 call put_character 1668 ; return 1 1669 19d1 142d bsf get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 1670 19d2 3400 retlw 0 1671 ; if { character = carriage_return } body end 1672 label570__0end: 1673 ; if exp=` character = carriage_return ' empty false 1674 ; Other expression=`{ character = carriage_return }' delay=-1 1675 ; if { character = carriage_return } end 1676 ; `while character != carriage_return ...' start 1677 get_carriage_return__574while__continue: 1678 19d3 300d movlw 13 1679 19d4 022c subwf get_carriage_return__character,w 1680 ; expression=` character != carriage_return ' exp_delay=2 true_delay=3 false_delay=2 true_size=4 false_size=1 1681 19d5 1903 btfsc z___byte,z___bit 1682 19d6 29db goto get_carriage_return__574while__break 1683 ; character := get_character {{ }} 1684 19d7 21e0 call get_character 1685 19d8 082e movf get_character__0return__byte,w 1686 19d9 00ac movwf get_carriage_return__character 1687 19da 29d3 goto get_carriage_return__574while__continue 1688 ; if exp=` character != carriage_return ' false goto 1689 ; Other expression=` character != carriage_return ' delay=-1 1690 get_carriage_return__574while__break: 1691 ; `while character != carriage_return ...' end 1692 ; call put_character {{ line_feed }} 1693 19db 300a movlw 10 1694 19dc 00bb movwf put_character__character 1695 19dd 2253 call put_character 1696 ; return 0 1697 19de 102d bcf get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit 1698 19df 3400 retlw 0 1699 ; procedure get_carriage_return end 1700 1701 ; procedure get_character start 1702 get_character: 1703 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 1704 ; Procedure must be called with PCLATH set to code bank 0 1705 01ae get_character__variables__base equ global__variables__bank3+30 1706 01ae get_character__bytes__base equ get_character__variables__base+0 1707 01af get_character__bits__base equ get_character__variables__base+1 1708 0001 get_character__total__bytes equ 1 1709 ; arguments_none 1710 01ae get_character__0return__byte equ get_character__bytes__base+0 1711 ; This procedure will get and return a 7 - bit ASCII character . 1712 ; One character of look ahead is supported . 1713 ; call put_character < 0c'G' > 1714 ; call put_character < 0c'C' > 1715 ; call put_character < 0c'<' > 1716 ; call show_look_ahead < 0c'c' > 1717 ; look_ahead := peek_character {{ }} 1718 19e0 2247 call peek_character 1719 19e1 083a movf peek_character__0return__byte,w 1720 19e2 0091 movwf look_ahead 1721 ; have_look_ahead := 0 1722 19e3 1043 bcf have_look_ahead__byte,have_look_ahead__bit 1723 ; call show_look_ahead < 0c'd' > 1724 ; call put_character < 0c'>' > 1725 ; call put_character < 0c'=' > 1726 ; call put_character < look_ahead > 1727 ; call put_character < space > 1728 ; return look_ahead 1729 19e4 0811 movf look_ahead,w 1730 19e5 00ae movwf get_character__0return__byte 1731 19e6 3400 retlw 0 1732 ; procedure get_character end 1733 1734 ; procedure get_hex_address start 1735 get_hex_address: 1736 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 1737 ; Procedure must be called with PCLATH set to code bank 0 1738 01af get_hex_address__variables__base equ global__variables__bank3+31 1739 01af get_hex_address__bytes__base equ get_hex_address__variables__base+0 1740 01b3 get_hex_address__bits__base equ get_hex_address__variables__base+4 1741 0004 get_hex_address__total__bytes equ 4 1742 ; arguments_none 1743 01af get_hex_address__0return__byte equ get_hex_address__bytes__base+0 1744 01b0 get_hex_address__1return__byte equ get_hex_address__bytes__base+1 1745 ; This procedure will read 4 - digit hexadecimal address : 1746 01b1 get_hex_address__high equ get_hex_address__bytes__base+2 1747 01b2 get_hex_address__low equ get_hex_address__bytes__base+3 1748 ; error := ok 1749 19e7 0190 clrf error 1750 ; high := get_hex_byte {{ }} 1751 19e8 21f6 call get_hex_byte 1752 19e9 0833 movf get_hex_byte__0return__byte,w 1753 19ea 00b1 movwf get_hex_address__high 1754 ; if { error = ok } start 1755 19eb 0810 movf error,w 1756 ; expression=`{ error = ok }' exp_delay=1 true_delay=1 false_delay=0 true_size=3 false_size=0 1757 19ec 1d03 btfss z___byte,z___bit 1758 19ed 29f1 goto label613__0end 1759 ; if { error = ok } body start 1760 ; low := get_hex_byte {{ }} 1761 19ee 21f6 call get_hex_byte 1762 19ef 0833 movf get_hex_byte__0return__byte,w 1763 19f0 00b2 movwf get_hex_address__low 1764 ; if { error = ok } body end 1765 label613__0end: 1766 ; if exp=` error = ok ' empty false 1767 ; Other expression=`{ error = ok }' delay=-1 1768 ; if { error = ok } end 1769 ; return high , low 1770 19f1 0831 movf get_hex_address__high,w 1771 19f2 00af movwf get_hex_address__0return__byte 1772 19f3 0832 movf get_hex_address__low,w 1773 19f4 00b0 movwf get_hex_address__1return__byte 1774 19f5 3400 retlw 0 1775 ; procedure get_hex_address end 1776 1777 ; procedure get_hex_byte start 1778 get_hex_byte: 1779 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 1780 ; Procedure must be called with PCLATH set to code bank 0 1781 01b3 get_hex_byte__variables__base equ global__variables__bank3+35 1782 01b3 get_hex_byte__bytes__base equ get_hex_byte__variables__base+0 1783 01b6 get_hex_byte__bits__base equ get_hex_byte__variables__base+3 1784 0003 get_hex_byte__total__bytes equ 3 1785 01b5 get_hex_byte__637byte1 equ get_hex_byte__bytes__base+2 1786 ; arguments_none 1787 01b3 get_hex_byte__0return__byte equ get_hex_byte__bytes__base+0 1788 ; This procedure will read one hexadecimal byte : 1789 01b4 get_hex_byte__result equ get_hex_byte__bytes__base+1 1790 ; variable nibble1 byte 1791 ; variable nibble2 byte 1792 ; call put_character < 0c'G' > 1793 ; call put_character < 0c'H' > 1794 ; call put_character < 0c'B' > 1795 ; call put_character < 0c'<' > 1796 ; error := ok 1797 19f6 0190 clrf error 1798 ; result := get_hex_nibble {{ }} 1799 19f7 2207 call get_hex_nibble 1800 19f8 0836 movf get_hex_nibble__0return__byte,w 1801 19f9 00b4 movwf get_hex_byte__result 1802 ; if { error = ok } start 1803 19fa 0810 movf error,w 1804 ; expression=`{ error = ok }' exp_delay=1 true_delay=5 false_delay=0 true_size=7 false_size=0 1805 19fb 1d03 btfss z___byte,z___bit 1806 19fc 2a04 goto label635__0end 1807 ; if { error = ok } body start 1808 ; nibble2 := get_hex_nibble < > 1809 ; result := result << 4 | get_hex_nibble {{ }} 1810 19fd 0e34 swapf get_hex_byte__result,w 1811 19fe 39f0 andlw 240 1812 19ff 00b5 movwf get_hex_byte__637byte1 1813 1a00 2207 call get_hex_nibble 1814 1a01 0836 movf get_hex_nibble__0return__byte,w 1815 1a02 0435 iorwf get_hex_byte__637byte1,w 1816 1a03 00b4 movwf get_hex_byte__result 1817 ; if { error = ok } body end 1818 label635__0end: 1819 ; if exp=` error = ok ' empty false 1820 ; Other expression=`{ error = ok }' delay=-1 1821 ; if { error = ok } end 1822 ; call put_character < 0c'>' > 1823 ; call put_character < 0c'=' > 1824 ; call put_hex_nibble < nibble1 > 1825 ; call put_hex_nibble < nibble2 > 1826 ; call put_character < space > 1827 ; return result 1828 1a04 0834 movf get_hex_byte__result,w 1829 1a05 00b3 movwf get_hex_byte__0return__byte 1830 1a06 3400 retlw 0 1831 ; procedure get_hex_byte end 1832 1833 ; procedure get_hex_nibble start 1834 get_hex_nibble: 1835 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 1836 ; Procedure must be called with PCLATH set to code bank 0 1837 01b6 get_hex_nibble__variables__base equ global__variables__bank3+38 1838 01b6 get_hex_nibble__bytes__base equ get_hex_nibble__variables__base+0 1839 01b8 get_hex_nibble__bits__base equ get_hex_nibble__variables__base+2 1840 0002 get_hex_nibble__total__bytes equ 2 1841 ; arguments_none 1842 01b6 get_hex_nibble__0return__byte equ get_hex_nibble__bytes__base+0 1843 ; This procedure will get and return one hexadecimal digit worth 1844 ; of number . 1845 01b7 get_hex_nibble__character equ get_hex_nibble__bytes__base+1 1846 ; call put_character < 0c'G' > 1847 ; call put_character < 0c'H' > 1848 ; call put_character < 0c'N' > 1849 ; call put_character < 0c'<' > 1850 ; character := peek_character {{ }} 1851 1a07 2247 call peek_character 1852 1a08 083a movf peek_character__0return__byte,w 1853 1a09 00b7 movwf get_hex_nibble__character 1854 ; error := ok 1855 1a0a 0190 clrf error 1856 ; if { 0c'0' <= character && character <= 0c'9' } start 1857 1a0b 3030 movlw 48 1858 1a0c 0237 subwf get_hex_nibble__character,w 1859 ; expression=`0c'0' <= character' exp_delay=2 true_delay=-1 false_delay=1 true_size=33 false_size=1 1860 1a0d 1c03 btfss c___byte,c___bit 1861 1a0e 2a16 goto and662__0false 1862 1a0f 303a movlw 58 1863 1a10 0237 subwf get_hex_nibble__character,w 1864 ; expression=`character <= 0c'9'' exp_delay=2 true_delay=2 false_delay=-1 true_size=2 false_size=26 1865 1a11 1803 btfsc c___byte,c___bit 1866 1a12 2a16 goto label662__1false 1867 label662__1true: 1868 and662__0true: 1869 ; if { 0c'0' <= character && character <= 0c'9' } body start 1870 ; character := character - 0c'0' 1871 1a13 30d0 movlw 208 1872 1a14 07b7 addwf get_hex_nibble__character,f 1873 ; if { 0c'0' <= character && character <= 0c'9' } body end 1874 1a15 2a30 goto label662__1end 1875 label662__1false: 1876 and662__0false: 1877 1a16 3061 movlw 97 1878 1a17 0237 subwf get_hex_nibble__character,w 1879 ; expression=`0c'a' <= character' exp_delay=2 true_delay=-1 false_delay=1 true_size=22 false_size=1 1880 1a18 1c03 btfss c___byte,c___bit 1881 1a19 2a21 goto and664__0false 1882 1a1a 3067 movlw 103 1883 1a1b 0237 subwf get_hex_nibble__character,w 1884 ; expression=`character <= 0c'f'' exp_delay=2 true_delay=2 false_delay=-1 true_size=2 false_size=15 1885 1a1c 1803 btfsc c___byte,c___bit 1886 1a1d 2a21 goto label664__1false 1887 label664__1true: 1888 and664__0true: 1889 ; else_if { 0c'a' <= character && character <= 0c'f' } body start 1890 ; character := character - 0c'a' + 10 1891 1a1e 30a9 movlw 169 1892 1a1f 07b7 addwf get_hex_nibble__character,f 1893 ; else_if { 0c'a' <= character && character <= 0c'f' } body end 1894 1a20 2a30 goto label664__1end 1895 label664__1false: 1896 and664__0false: 1897 1a21 3041 movlw 65 1898 1a22 0237 subwf get_hex_nibble__character,w 1899 ; expression=`0c'A' <= character' exp_delay=2 true_delay=-1 false_delay=6 true_size=11 false_size=1 1900 1a23 1c03 btfss c___byte,c___bit 1901 1a24 2a2c goto and666__0false 1902 1a25 3047 movlw 71 1903 1a26 0237 subwf get_hex_nibble__character,w 1904 ; expression=`character <= 0c'F'' exp_delay=2 true_delay=2 false_delay=4 true_size=2 false_size=4 1905 1a27 1803 btfsc c___byte,c___bit 1906 1a28 2a2c goto label666__1false 1907 label666__1true: 1908 and666__0true: 1909 ; else_if { 0c'A' <= character && character <= 0c'F' } body start 1910 ; character := character - 0c'A' + 10 1911 1a29 30c9 movlw 201 1912 1a2a 07b7 addwf get_hex_nibble__character,f 1913 ; else_if { 0c'A' <= character && character <= 0c'F' } body end 1914 1a2b 2a30 goto label666__1end 1915 label666__1false: 1916 and666__0false: 1917 ; else body start 1918 ; error := none 1919 1a2c 3001 movlw 1 1920 1a2d 0090 movwf error 1921 ; character := 0xff 1922 1a2e 30ff movlw 255 1923 1a2f 00b7 movwf get_hex_nibble__character 1924 ; else body end 1925 ; if exp=`character <= 0c'F'' generic 1926 label666__1end: 1927 ; Other expression=`character <= 0c'F'' delay=-1 1928 ; if exp=`0c'A' <= character' false goto 1929 ; Other expression=`0c'A' <= character' delay=-1 1930 and666__0end: 1931 ; if exp=`character <= 0c'f'' generic 1932 label664__1end: 1933 ; Other expression=`character <= 0c'f'' delay=-1 1934 ; if exp=`0c'a' <= character' false goto 1935 ; Other expression=`0c'a' <= character' delay=-1 1936 and664__0end: 1937 ; if exp=`character <= 0c'9'' generic 1938 label662__1end: 1939 ; Other expression=`character <= 0c'9'' delay=-1 1940 ; if exp=`0c'0' <= character' false goto 1941 ; Other expression=`0c'0' <= character' delay=-1 1942 and662__0end: 1943 ; if { 0c'0' <= character && character <= 0c'9' } end 1944 ; if { error = ok } start 1945 1a30 0810 movf error,w 1946 ; expression=`{ error = ok }' exp_delay=1 true_delay=1 false_delay=0 true_size=3 false_size=0 1947 1a31 1d03 btfss z___byte,z___bit 1948 1a32 2a36 goto label672__0end 1949 ; if { error = ok } body start 1950 ; look_ahead := get_character {{ }} 1951 1a33 21e0 call get_character 1952 1a34 082e movf get_character__0return__byte,w 1953 1a35 0091 movwf look_ahead 1954 ; if { error = ok } body end 1955 label672__0end: 1956 ; if exp=` error = ok ' empty false 1957 ; Other expression=`{ error = ok }' delay=-1 1958 ; if { error = ok } end 1959 ; call put_character < 0c'>' > 1960 ; call put_character < 0c'=' > 1961 ; call put_character < character > 1962 ; call put_character < space > 1963 ; return character 1964 1a36 0837 movf get_hex_nibble__character,w 1965 1a37 00b6 movwf get_hex_nibble__0return__byte 1966 1a38 3400 retlw 0 1967 ; procedure get_hex_nibble end 1968 1969 ; procedure get_white_space start 1970 get_white_space: 1971 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 1972 ; Procedure must be called with PCLATH set to code bank 0 1973 01b8 get_white_space__variables__base equ global__variables__bank3+40 1974 01b8 get_white_space__bytes__base equ get_white_space__variables__base+0 1975 01b9 get_white_space__bits__base equ get_white_space__variables__base+1 1976 0002 get_white_space__total__bytes equ 2 1977 ; arguments_none 1978 01b9 get_white_space__0return__bit equ get_white_space__bits__base+0 1979 01b9 get_white_space__0return__bit__byte equ get_white_space__bits__base+0 1980 0000 get_white_space__0return__bit__bit equ 0 1981 ; This procedure will read exactly one space . If one space is 1982 ; read , 1 is returned ; otherwise , no characters are read and 0 1983 ; is returned . 1984 01b8 get_white_space__character equ get_white_space__bytes__base+0 1985 ; character := peek_character {{ }} 1986 1a39 2247 call peek_character 1987 1a3a 083a movf peek_character__0return__byte,w 1988 1a3b 00b8 movwf get_white_space__character 1989 ; if { character = space } start 1990 1a3c 3020 movlw 32 1991 1a3d 0238 subwf get_white_space__character,w 1992 ; expression=`{ character = space }' exp_delay=2 true_delay=3 false_delay=0 true_size=5 false_size=0 1993 1a3e 1d03 btfss z___byte,z___bit 1994 1a3f 2a45 goto label693__0end 1995 ; if { character = space } body start 1996 ; character := get_character {{ }} 1997 1a40 21e0 call get_character 1998 1a41 082e movf get_character__0return__byte,w 1999 1a42 00b8 movwf get_white_space__character 2000 ; return 1 2001 1a43 1439 bsf get_white_space__0return__bit__byte,get_white_space__0return__bit__bit 2002 1a44 3400 retlw 0 2003 ; if { character = space } body end 2004 label693__0end: 2005 ; if exp=` character = space ' empty false 2006 ; Other expression=`{ character = space }' delay=-1 2007 ; if { character = space } end 2008 ; return 0 2009 1a45 1039 bcf get_white_space__0return__bit__byte,get_white_space__0return__bit__bit 2010 1a46 3400 retlw 0 2011 ; procedure get_white_space end 2012 2013 ; procedure peek_character start 2014 peek_character: 2015 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 2016 ; Procedure must be called with PCLATH set to code bank 0 2017 01ba peek_character__variables__base equ global__variables__bank3+42 2018 01ba peek_character__bytes__base equ peek_character__variables__base+0 2019 01bb peek_character__bits__base equ peek_character__variables__base+1 2020 0001 peek_character__total__bytes equ 1 2021 ; arguments_none 2022 01ba peek_character__0return__byte equ peek_character__bytes__base+0 2023 ; This procedure will look ahead to the next character input 2024 ; without actually ` reading ' it . 2025 ; call put_character < 0c'P' > 2026 ; call put_character < 0c'C' > 2027 ; call put_character < 0c'<' > 2028 ; call show_look_ahead < 0c'a' > 2029 ; if { ! have_look_ahead } start 2030 ; expression=`have_look_ahead' exp_delay=0 true_delay=0 false_delay=4 true_size=0 false_size=8 2031 1a47 1843 btfsc have_look_ahead__byte,have_look_ahead__bit 2032 1a48 2a50 goto label711__0end 2033 ; if { ! have_look_ahead } body start 2034 ; have_look_ahead := 1 2035 1a49 1443 bsf have_look_ahead__byte,have_look_ahead__bit 2036 ; look_ahead := get_byte {{ }} & ascii_mask 2037 1a4a 21aa call get_byte 2038 1a4b 082a movf get_byte__0return__byte,w 2039 1a4c 397f andlw 127 2040 1a4d 0091 movwf look_ahead 2041 ; Do echo : 2042 ; call put_character {{ look_ahead }} 2043 1a4e 00bb movwf put_character__character 2044 1a4f 2253 call put_character 2045 ; if { ! have_look_ahead } body end 2046 label711__0end: 2047 ; if exp=`have_look_ahead' empty true 2048 ; Other expression=`have_look_ahead' delay=-1 2049 ; if { ! have_look_ahead } end 2050 ; call show_look_ahead < 0c'b' > 2051 ; call put_character < 0c'>' > 2052 ; call put_character < 0c'=' > 2053 ; call put_character < look_ahead > 2054 ; call put_character < space > 2055 ; return look_ahead 2056 1a50 0811 movf look_ahead,w 2057 1a51 00ba movwf peek_character__0return__byte 2058 1a52 3400 retlw 0 2059 ; procedure peek_character end 2060 ; comment {The ` put ' procedures :} 2061 2062 ; procedure put_character start 2063 put_character: 2064 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 2065 ; Procedure must be called with PCLATH set to code bank 0 2066 01bb put_character__variables__base equ global__variables__bank3+43 2067 01bb put_character__bytes__base equ put_character__variables__base+0 2068 01be put_character__bits__base equ put_character__variables__base+3 2069 0003 put_character__total__bytes equ 3 2070 01bb put_character__character equ put_character__bytes__base+0 2071 ; This procedure will send < character > out to TX - pin of port C . 2072 01bc put_character__count equ put_character__bytes__base+1 2073 01bd put_character__pir1_copy equ put_character__bytes__base+2 2074 ; pir1_copy := pir1 2075 ; Switch from register bank 3 to register bank 0 (which contains pir1) 2076 1a53 1283 bcf rp0___byte,rp0___bit 2077 1a54 1303 bcf rp1___byte,rp1___bit 2078 1a55 1383 bcf irp___byte,irp___bit 2079 ; Register bank is now 0 2080 1a56 080c movf pir1,w 2081 ; Switch from register bank 0 to register bank 3 (which contains put_character__pir1_copy) 2082 1a57 1683 bsf rp0___byte,rp0___bit 2083 1a58 1703 bsf rp1___byte,rp1___bit 2084 1a59 1783 bsf irp___byte,irp___bit 2085 ; Register bank is now 3 2086 1a5a 00bd movwf put_character__pir1_copy 2087 ; `while ! {{ pir1_copy @ 4 }} ...' start 2088 put_character__737while__continue: 2089 ; Alias variable for select pir1_copy @ 4 2090 01bd put_character__pir1_copy__737select0 equ put_character__pir1_copy+0 2091 01bd put_character__pir1_copy__737select0__byte equ put_character__pir1_copy+0 2092 0004 put_character__pir1_copy__737select0__bit equ 4 2093 ; expression=`{{ pir1_copy @ 4 }}' exp_delay=0 true_delay=2 false_delay=4 true_size=1 false_size=3 2094 1a5b 1a3d btfsc put_character__pir1_copy__737select0__byte,put_character__pir1_copy__737select0__bit 2095 1a5c 2a66 goto put_character__737while__break 2096 ; Wait for transmit buffer to empty . 2097 ; pir1_copy := pir1 2098 ; Switch from register bank 3 to register bank 0 (which contains pir1) 2099 1a5d 1283 bcf rp0___byte,rp0___bit 2100 1a5e 1303 bcf rp1___byte,rp1___bit 2101 1a5f 1383 bcf irp___byte,irp___bit 2102 ; Register bank is now 0 2103 1a60 080c movf pir1,w 2104 ; Switch from register bank 0 to register bank 3 (which contains put_character__pir1_copy) 2105 1a61 1683 bsf rp0___byte,rp0___bit 2106 1a62 1703 bsf rp1___byte,rp1___bit 2107 1a63 1783 bsf irp___byte,irp___bit 2108 ; Register bank is now 3 2109 1a64 00bd movwf put_character__pir1_copy 2110 1a65 2a5b goto put_character__737while__continue 2111 ; if exp=` pir1_copy @ 4 ' true goto 2112 ; Other expression=`{{ pir1_copy @ 4 }}' delay=-1 2113 put_character__737while__break: 2114 ; `while ! {{ pir1_copy @ 4 }} ...' end 2115 ; Send the character : 2116 ; txreg := character 2117 1a66 083b movf put_character__character,w 2118 ; Switch from register bank 3 to register bank 0 (which contains txreg) 2119 1a67 1283 bcf rp0___byte,rp0___bit 2120 1a68 1303 bcf rp1___byte,rp1___bit 2121 1a69 1383 bcf irp___byte,irp___bit 2122 ; Register bank is now 0 2123 1a6a 0099 movwf txreg 2124 ; watch_dog_reset 2125 1a6b 0064 clrwdt 2126 ; Now wait for it to be fully sent : 2127 ; pir1_copy := pir1 2128 1a6c 080c movf pir1,w 2129 ; Switch from register bank 0 to register bank 3 (which contains put_character__pir1_copy) 2130 1a6d 1683 bsf rp0___byte,rp0___bit 2131 1a6e 1703 bsf rp1___byte,rp1___bit 2132 1a6f 1783 bsf irp___byte,irp___bit 2133 ; Register bank is now 3 2134 1a70 00bd movwf put_character__pir1_copy 2135 ; `while ! {{ pir1_copy @ 4 }} ...' start 2136 put_character__747while__continue: 2137 ; Alias variable for select pir1_copy @ 4 2138 01bd put_character__pir1_copy__747select0 equ put_character__pir1_copy+0 2139 01bd put_character__pir1_copy__747select0__byte equ put_character__pir1_copy+0 2140 0004 put_character__pir1_copy__747select0__bit equ 4 2141 ; expression=`{{ pir1_copy @ 4 }}' exp_delay=0 true_delay=2 false_delay=4 true_size=1 false_size=3 2142 1a71 1a3d btfsc put_character__pir1_copy__747select0__byte,put_character__pir1_copy__747select0__bit 2143 1a72 2a7c goto put_character__747while__break 2144 ; Wait for transmit buffer to empty . 2145 ; pir1_copy := pir1 2146 ; Switch from register bank 3 to register bank 0 (which contains pir1) 2147 1a73 1283 bcf rp0___byte,rp0___bit 2148 1a74 1303 bcf rp1___byte,rp1___bit 2149 1a75 1383 bcf irp___byte,irp___bit 2150 ; Register bank is now 0 2151 1a76 080c movf pir1,w 2152 ; Switch from register bank 0 to register bank 3 (which contains put_character__pir1_copy) 2153 1a77 1683 bsf rp0___byte,rp0___bit 2154 1a78 1703 bsf rp1___byte,rp1___bit 2155 1a79 1783 bsf irp___byte,irp___bit 2156 ; Register bank is now 3 2157 1a7a 00bd movwf put_character__pir1_copy 2158 1a7b 2a71 goto put_character__747while__continue 2159 ; if exp=` pir1_copy @ 4 ' true goto 2160 ; Other expression=`{{ pir1_copy @ 4 }}' delay=-1 2161 put_character__747while__break: 2162 ; `while ! {{ pir1_copy @ 4 }} ...' end 2163 ; procedure put_character end 2164 1a7c 3400 retlw 0 2165 2166 ; procedure put_hex_address start 2167 put_hex_address: 2168 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 2169 ; Procedure must be called with PCLATH set to code bank 0 2170 01be put_hex_address__variables__base equ global__variables__bank3+46 2171 01be put_hex_address__bytes__base equ put_hex_address__variables__base+0 2172 01c0 put_hex_address__bits__base equ put_hex_address__variables__base+2 2173 0002 put_hex_address__total__bytes equ 2 2174 01be put_hex_address__high_byte equ put_hex_address__bytes__base+0 2175 01bf put_hex_address__low_byte equ put_hex_address__bytes__base+1 2176 ; This procedure will output < high_byte > followed by < low_byte > 2177 ; as four hexadecimal digits . 2178 ; call put_hex_byte {{ high_byte }} 2179 1a7d 083e movf put_hex_address__high_byte,w 2180 1a7e 00c0 movwf put_hex_byte__byte 2181 1a7f 2284 call put_hex_byte 2182 ; call put_hex_byte {{ low_byte }} 2183 1a80 083f movf put_hex_address__low_byte,w 2184 1a81 00c0 movwf put_hex_byte__byte 2185 1a82 2284 call put_hex_byte 2186 ; procedure put_hex_address end 2187 1a83 3400 retlw 0 2188 2189 ; procedure put_hex_byte start 2190 put_hex_byte: 2191 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 2192 ; Procedure must be called with PCLATH set to code bank 0 2193 01c0 put_hex_byte__variables__base equ global__variables__bank3+48 2194 01c0 put_hex_byte__bytes__base equ put_hex_byte__variables__base+0 2195 01c1 put_hex_byte__bits__base equ put_hex_byte__variables__base+1 2196 0001 put_hex_byte__total__bytes equ 1 2197 01c0 put_hex_byte__byte equ put_hex_byte__bytes__base+0 2198 ; This procedure will output < byte > as two hexadecimal digits . 2199 ; call put_hex_nibble {{ byte >> 4 }} 2200 1a84 0e40 swapf put_hex_byte__byte,w 2201 1a85 390f andlw 15 2202 1a86 00c1 movwf put_hex_nibble__nibble 2203 1a87 228d call put_hex_nibble 2204 ; call put_hex_nibble {{ byte & 15 }} 2205 1a88 300f movlw 15 2206 1a89 0540 andwf put_hex_byte__byte,w 2207 1a8a 00c1 movwf put_hex_nibble__nibble 2208 1a8b 228d call put_hex_nibble 2209 ; procedure put_hex_byte end 2210 1a8c 3400 retlw 0 2211 2212 ; procedure put_hex_nibble start 2213 put_hex_nibble: 2214 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 2215 ; Procedure must be called with PCLATH set to code bank 0 2216 01c1 put_hex_nibble__variables__base equ global__variables__bank3+49 2217 01c1 put_hex_nibble__bytes__base equ put_hex_nibble__variables__base+0 2218 01c2 put_hex_nibble__bits__base equ put_hex_nibble__variables__base+1 2219 0001 put_hex_nibble__total__bytes equ 1 2220 01c1 put_hex_nibble__nibble equ put_hex_nibble__bytes__base+0 2221 ; This procedure will output < nibble > as a hexadecimal digit . 2222 ; if { nibble < 10 } start 2223 1a8d 300a movlw 10 2224 1a8e 0241 subwf put_hex_nibble__nibble,w 2225 ; expression=`{ nibble < 10 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 2226 1a8f 1c03 btfss c___byte,c___bit 2227 ; if { nibble < 10 } body start 2228 ; nibble := nibble + 0c'0' 2229 1a90 3030 movlw 48 2230 ; 1 instructions found for sharing 2231 1a91 1803 btfsc c___byte,c___bit 2232 ; else body start 2233 ; nibble := nibble + 0c'A' - 10 2234 1a92 3037 movlw 55 2235 ; 1 instructions found for sharing 2236 ; if exp=` nibble < 10 ' single true and false skip delay=6 2237 ; Other expression=`{ nibble < 10 }' delay=6 2238 ; 1 shared instructions follow 2239 1a93 07c1 addwf put_hex_nibble__nibble,f 2240 ; if { nibble < 10 } end 2241 ; call put_character {{ nibble }} 2242 1a94 0841 movf put_hex_nibble__nibble,w 2243 1a95 00bb movwf put_character__character 2244 1a96 2253 call put_character 2245 ; procedure put_hex_nibble end 2246 1a97 3400 retlw 0 2247 2248 ; procedure put_new_line start 2249 put_new_line: 2250 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 2251 ; Procedure must be called with PCLATH set to code bank 0 2252 01c2 put_new_line__variables__base equ global__variables__bank3+50 2253 01c2 put_new_line__bytes__base equ put_new_line__variables__base+0 2254 01c2 put_new_line__bits__base equ put_new_line__variables__base+0 2255 0000 put_new_line__total__bytes equ 0 2256 ; arguments_none 2257 ; This procedure will output a carriage - return line - feed pair . 2258 ; call put_character {{ carriage_return }} 2259 1a98 300d movlw 13 2260 1a99 00bb movwf put_character__character 2261 1a9a 2253 call put_character 2262 ; call put_character {{ line_feed }} 2263 1a9b 300a movlw 10 2264 1a9c 00bb movwf put_character__character 2265 1a9d 2253 call put_character 2266 ; procedure put_new_line end 2267 1a9e 3400 retlw 0 2268 2269 ; procedure put_space start 2270 put_space: 2271 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 2272 ; Procedure must be called with PCLATH set to code bank 0 2273 01c2 put_space__variables__base equ global__variables__bank3+50 2274 01c2 put_space__bytes__base equ put_space__variables__base+0 2275 01c2 put_space__bits__base equ put_space__variables__base+0 2276 0000 put_space__total__bytes equ 0 2277 ; arguments_none 2278 ; call put_character {{ space }} 2279 1a9f 3020 movlw 32 2280 1aa0 00bb movwf put_character__character 2281 1aa1 2253 call put_character 2282 ; procedure put_space end 2283 1aa2 3400 retlw 0 2284 2285 ; procedure delay start 2286 ; optimize 0 2287 delay: 2288 ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 2289 ; Procedure must be called with PCLATH set to code bank 0 2290 01c2 delay__variables__base equ global__variables__bank3+50 2291 01c2 delay__bytes__base equ delay__variables__base+0 2292 01c3 delay__bits__base equ delay__variables__base+1 2293 0001 delay__total__bytes equ 1 2294 01c2 delay__806byte1 equ delay__bytes__base+0 2295 ; arguments_none 2296 ; uniform_delay instructions_per_delay 2297 ; Uniform delay remaining = 690 Accumulated Delay = 0 2298 ; Uniform delay remaining = 690 Accumulated Delay = 0 2299 ; Delay 1 third of a bit : 2300 ; Uniform delay remaining = 690 Accumulated Delay = 0 2301 ; watch_dog_reset 2302 1aa3 0064 clrwdt 2303 ; Uniform delay remaining = 689 Accumulated Delay = 1 2304 ; Uniform delay remaining = 689 Accumulated Delay = 1 2305 ; Uniform delay remaining = 689 Accumulated Delay = 1 2306 ; Soak up remaining 689 cycles 2307 ; Delay 689 cycles 2308 1aa4 30e5 movlw 229 2309 1aa5 00c2 movwf delay__806byte1 2310 delay__806delay0: 2311 1aa6 0bc2 decfsz delay__806byte1,f 2312 1aa7 2aa6 goto delay__806delay0 2313 1aa8 0000 nop 2314 ; procedure delay end 2315 1aa9 3400 retlw 0 2316 ; optimize 1 2317 2318 ; Register bank 0 used 2 bytes of 96 available bytes 2319 ; Register bank 1 used 0 bytes of 80 available bytes 2320 ; Register bank 2 used 0 bytes of 96 available bytes 2321 ; Register bank 3 used 51 bytes of 96 available bytes 2322 2323 end