radix dec global__variables__bank0 equ 32 global__variables__bank1 equ 160 global__variables__bank2 equ 272 global__variables__bank3 equ 400 global__bit__variables__bank0 equ 34 global__bit__variables__bank1 equ 160 global__bit__variables__bank2 equ 272 global__bit__variables__bank3 equ 451 indf___register equ 0 pcl___register equ 2 c___byte equ 3 c___bit equ 0 z___byte equ 3 z___bit equ 2 rp0___byte equ 3 rp0___bit equ 5 rp1___byte equ 3 rp1___bit equ 6 irp___byte equ 3 irp___bit equ 7 trisa___register equ 0x85 trisb___register equ 0x86 fsr___register equ 4 pclath___register equ 10 org 0 start: nop nop nop goto skip___interrupt interrupt___vector: retfie skip___interrupt: ; Initialize A/D system to allow digital I/O movlw 7 ; Switch from register bank 0 to register bank 1 (which contains 159) bsf rp0___byte,rp0___bit ; Register bank is now 1 movwf 159 ; Switch from register bank 1 to register bank 0 (which contains 31) bcf rp0___byte,rp0___bit ; Register bank is now 0 clrf 31 ; Initialize TRIS registers movlw 199 tris 5 movlw 0 tris 6 movlw 191 tris 7 clrf pclath___register ; Switch from register bank 0 to register bank 3 bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 ; Switch from code bank 0 to code bank 3 before possible transfer (goto) bsf pclath___register,3 bsf pclath___register,4 goto main ; comment ############################################################################# ; comment {} ; comment {Copyright < c > 2000 - 2001 by Wayne C . Gramlich .} ; comment {All rights reserved .} ; comment {} ; comment {Permission to use , copy , modify , distribute , and sell this software} ; comment {for any purpose is hereby granted without fee provided that the above} ; comment {copyright notice and this permission are retained . The author makes} ; comment {no representations about the suitability of this software for any purpose .} ; comment {It is provided { as is } without express or implied warranty .} ; comment {} ; comment ############################################################################# ; comment {This is a test boot loader that resides in high memory for} ; comment {loading programs into low memory .} ; processor pic16f876 cp = off debug = off cpd = off pwrte = off wdte = on boden = off lvp = off wrt = on fosc = xt ; 16189=0x3f3d 8199=0x2007 __config 16189 configuration___address equ 8199 ; comment {Port and pin definitions :} porta equ 5 pri0__byte equ 5 pri0__bit equ 0 pri1__byte equ 5 pri1__bit equ 1 pri2__byte equ 5 pri2__bit equ 2 unused1a__byte equ 5 unused1a__bit equ 3 unused2a__byte equ 5 unused2a__bit equ 4 unused3a__byte equ 5 unused3a__bit equ 5 portb equ 6 int__byte equ 6 int__bit equ 0 sel0__byte equ 6 sel0__bit equ 1 sel1__byte equ 6 sel1__bit equ 2 sel2__byte equ 6 sel2__bit equ 3 sel3__byte equ 6 sel3__bit equ 4 sel4__byte equ 6 sel4__bit equ 5 sel5__byte equ 6 sel5__bit equ 6 en__byte equ 6 en__bit equ 7 portc equ 7 tx__byte equ 7 tx__bit equ 6 rx__byte equ 7 rx__bit equ 7 unused1c__byte equ 6 unused1c__bit equ 0 unused2c__byte equ 6 unused2c__bit equ 1 unused3c__byte equ 6 unused3c__bit equ 2 unused4c__byte equ 6 unused4c__bit equ 3 unused5c__byte equ 6 unused5c__bit equ 4 unused6c__byte equ 6 unused6c__bit equ 5 ; comment {Bank 0 registers :} ; comment {IND register} ind equ 0 ; comment {PCL register} pcl equ 2 ; comment {Status register} status equ 3 ; bind c status @ 0 c equ status+0 c__byte equ status+0 c__bit equ 0 ; bind dc status @ 1 dc equ status+0 dc__byte equ status+0 dc__bit equ 1 ; bind z status @ 2 z equ status+0 z__byte equ status+0 z__bit equ 2 ; bind pd status @ 3 pd equ status+0 pd__byte equ status+0 pd__bit equ 3 ; bind to status @ 4 to equ status+0 to__byte equ status+0 to__bit equ 4 ; bind rp0 status @ 5 rp0 equ status+0 rp0__byte equ status+0 rp0__bit equ 5 ; bind rp1 status @ 6 rp1 equ status+0 rp1__byte equ status+0 rp1__bit equ 6 ; bind irp status @ 7 irp equ status+0 irp__byte equ status+0 irp__bit equ 7 ; comment {FSR register} fsr equ 4 ; comment {PCLATH register} pclath equ 10 ; comment {Interrupt Control register :} intcon equ 11 ; bind gie intcon @ 7 gie equ intcon+0 gie__byte equ intcon+0 gie__bit equ 7 ; bind peie intcon @ 6 peie equ intcon+0 peie__byte equ intcon+0 peie__bit equ 6 ; bind toie intcon @ 5 toie equ intcon+0 toie__byte equ intcon+0 toie__bit equ 5 ; bind inte intcon @ 4 inte equ intcon+0 inte__byte equ intcon+0 inte__bit equ 4 ; bind rbie intcon @ 3 rbie equ intcon+0 rbie__byte equ intcon+0 rbie__bit equ 3 ; bind toif intcon @ 2 toif equ intcon+0 toif__byte equ intcon+0 toif__bit equ 2 ; bind intf intcon @ 1 intf equ intcon+0 intf__byte equ intcon+0 intf__bit equ 1 ; bind rbif intcon @ 0 rbif equ intcon+0 rbif__byte equ intcon+0 rbif__bit equ 0 ; comment {PIR1 registers < whatever PIR means > :} pir1 equ 12 ; bind pspif pir1 @ 7 pspif equ pir1+0 pspif__byte equ pir1+0 pspif__bit equ 7 ; bind adif pir1 @ 6 adif equ pir1+0 adif__byte equ pir1+0 adif__bit equ 6 ; bind rcif pir1 @ 5 rcif equ pir1+0 rcif__byte equ pir1+0 rcif__bit equ 5 ; bind txif pir1 @ 4 txif equ pir1+0 txif__byte equ pir1+0 txif__bit equ 4 ; bind sspif pir1 @ 3 sspif equ pir1+0 sspif__byte equ pir1+0 sspif__bit equ 3 ; bind ccp1if pir1 @ 2 ccp1if equ pir1+0 ccp1if__byte equ pir1+0 ccp1if__bit equ 2 ; bind tmr2if pir1 @ 1 tmr2if equ pir1+0 tmr2if__byte equ pir1+0 tmr2if__bit equ 1 ; bind tmr1if pir1 @ 0 tmr1if equ pir1+0 tmr1if__byte equ pir1+0 tmr1if__bit equ 0 ; comment {Receive status register :} rcsta equ 24 ; bind spen rcsta @ 7 spen equ rcsta+0 spen__byte equ rcsta+0 spen__bit equ 7 ; bind rx9 rcsta @ 6 rx9 equ rcsta+0 rx9__byte equ rcsta+0 rx9__bit equ 6 ; bind sren rcsta @ 5 sren equ rcsta+0 sren__byte equ rcsta+0 sren__bit equ 5 ; bind cren rcsta @ 4 cren equ rcsta+0 cren__byte equ rcsta+0 cren__bit equ 4 ; bind adden rcsta @ 3 adden equ rcsta+0 adden__byte equ rcsta+0 adden__bit equ 3 ; bind ferr rcsta @ 2 ferr equ rcsta+0 ferr__byte equ rcsta+0 ferr__bit equ 2 ; bind oerr rcsta @ 1 oerr equ rcsta+0 oerr__byte equ rcsta+0 oerr__bit equ 1 ; bind rx9d rcsta @ 0 rx9d equ rcsta+0 rx9d__byte equ rcsta+0 rx9d__bit equ 0 ; comment {Transmit register :} txreg equ 25 ; comment {Receive register :} rcreg equ 26 ; comment {A / D Control register 0 :} adcon0 equ 31 ; bind adon adcon0 @ 0 adon equ adcon0+0 adon__byte equ adcon0+0 adon__bit equ 0 ; bind go_done adcon0 @ 2 go_done equ adcon0+0 go_done__byte equ adcon0+0 go_done__bit equ 2 ; bind chs0 adcon0 @ 3 chs0 equ adcon0+0 chs0__byte equ adcon0+0 chs0__bit equ 3 ; bind chs1 adcon0 @ 4 chs1 equ adcon0+0 chs1__byte equ adcon0+0 chs1__bit equ 4 ; bind adcs0 adcon0 @ 6 adcs0 equ adcon0+0 adcs0__byte equ adcon0+0 adcs0__bit equ 6 ; bind adcs1 adcon0 @ 7 adcs1 equ adcon0+0 adcs1__byte equ adcon0+0 adcs1__bit equ 7 ; comment {Bank 1 registers :} pie1 equ 140 ; bind pspie pie1 @ 7 pspie equ pie1+0 pspie__byte equ pie1+0 pspie__bit equ 7 ; bind adie pie1 @ 6 adie equ pie1+0 adie__byte equ pie1+0 adie__bit equ 6 ; bind rcie pie1 @ 5 rcie equ pie1+0 rcie__byte equ pie1+0 rcie__bit equ 5 ; bind txie pie1 @ 4 txie equ pie1+0 txie__byte equ pie1+0 txie__bit equ 4 ; bind sspie pie1 @ 3 sspie equ pie1+0 sspie__byte equ pie1+0 sspie__bit equ 3 ; bind ccp1ie pie1 @ 2 ccp1ie equ pie1+0 ccp1ie__byte equ pie1+0 ccp1ie__bit equ 2 ; bind tmr2ie pie1 @ 1 tmr2ie equ pie1+0 tmr2ie__byte equ pie1+0 tmr2ie__bit equ 1 ; bind tmr1ie pie1 @ 0 tmr1ie equ pie1+0 tmr1ie__byte equ pie1+0 tmr1ie__bit equ 0 txsta equ 152 ; bind csr txsta @ 7 csr equ txsta+0 csr__byte equ txsta+0 csr__bit equ 7 ; bind tx9 txsta @ 6 tx9 equ txsta+0 tx9__byte equ txsta+0 tx9__bit equ 6 ; bind txen txsta @ 5 txen equ txsta+0 txen__byte equ txsta+0 txen__bit equ 5 ; bind sync txsta @ 4 sync equ txsta+0 sync__byte equ txsta+0 sync__bit equ 4 ; bind brgh txsta @ 2 brgh equ txsta+0 brgh__byte equ txsta+0 brgh__bit equ 2 ; bind trmt txsta @ 1 trmt equ txsta+0 trmt__byte equ txsta+0 trmt__bit equ 1 ; bind tx9d txsta @ 0 tx9d equ txsta+0 tx9d__byte equ txsta+0 tx9d__bit equ 0 ; comment {Baud rate generator :} spbrg equ 153 ; comment {A / D Control register 1 :} adcon1 equ 159 ; bind pcfg0 adcon1 @ 0 pcfg0 equ adcon1+0 pcfg0__byte equ adcon1+0 pcfg0__bit equ 0 ; bind pcfg1 adcon1 @ 1 pcfg1 equ adcon1+0 pcfg1__byte equ adcon1+0 pcfg1__bit equ 1 ; bind pcfg2 adcon1 @ 2 pcfg2 equ adcon1+0 pcfg2__byte equ adcon1+0 pcfg2__bit equ 2 ; comment {Bank 2 registers :} ; comment {EEPROM access registers :} eedata equ 268 eeadr equ 269 eedath equ 270 eeadrh equ 271 ; comment {Bank 3 registers :} eecon1 equ 396 ; bind eepgd eecon1 @ 7 eepgd equ eecon1+0 eepgd__byte equ eecon1+0 eepgd__bit equ 7 ; bind eezlich eecon1 @ 6 eezlich equ eecon1+0 eezlich__byte equ eecon1+0 eezlich__bit equ 6 ; bind wrerr eecon1 @ 3 wrerr equ eecon1+0 wrerr__byte equ eecon1+0 wrerr__bit equ 3 ; bind wren eecon1 @ 2 wren equ eecon1+0 wren__byte equ eecon1+0 wren__bit equ 2 ; bind wr eecon1 @ 1 wr equ eecon1+0 wr__byte equ eecon1+0 wr__bit equ 1 ; bind rd eecon1 @ 0 rd equ eecon1+0 rd__byte equ eecon1+0 rd__bit equ 0 eecon2 equ 397 ; comment {Some general constants :} ; constant ascii_mask 0x7f ascii_mask equ 127 ; constant tab 8 tab equ 8 ; constant line_feed 10 line_feed equ 10 ; constant carriage_return 13 carriage_return equ 13 ; constant space 32 space equ 32 ; constant register_mask 0x7f register_mask equ 127 ; constant clock_rate 20000000 clock_rate equ 20000000 ; constant instruction_rate clock_rate / 4 instruction_rate equ 5000000 ; constant baud_rate 2400 baud_rate equ 2400 ; constant instructions_per_bit instruction_rate / baud_rate instructions_per_bit equ 2083 ; constant delays_per_bit 3 delays_per_bit equ 3 ; constant instructions_per_delay instructions_per_bit / delays_per_bit instructions_per_delay equ 694 ; constant delay_count instructions_per_delay / 6 delay_count equ 115 ; origin 0x100 org 256 ; procedure program start ; Switch from register bank 3 to register bank 0 bcf rp0___byte,rp0___bit bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 0 program: ; Procedure must be called with RP0, RP1, and IRP set to register bank 0 ; Procedure must be called with PCLATH set to code bank 0 program__variables__base equ global__variables__bank0+0 program__bytes__base equ program__variables__base+0 program__bits__base equ program__variables__base+1 program__total__bytes equ 1 ; arguments_none program__count equ program__bytes__base+0 ; `count_down count 15 ...' start movlw 15 movwf program__count program__196_loop: ; call put_char {{ 0c'H' }} movlw 72 movwf put_char__character call put_char ; call put_char {{ 0c'i' }} movlw 105 movwf put_char__character call put_char ; call put_char {{ 0c'!' }} movlw 33 movwf put_char__character call put_char ; call put_char {{ carriage_return }} movlw 13 movwf put_char__character call put_char ; call put_char {{ line_feed }} movlw 10 movwf put_char__character call put_char decfsz program__count,f goto program__196_loop program__196_done: ; `count_down count 15 ...' end ; procedure program end retlw 0 ; procedure put_char start put_char: ; Procedure must be called with RP0, RP1, and IRP set to register bank 0 ; Procedure must be called with PCLATH set to code bank 0 put_char__variables__base equ global__variables__bank0+1 put_char__bytes__base equ put_char__variables__base+0 put_char__bits__base equ put_char__variables__base+1 put_char__total__bytes equ 1 put_char__character equ put_char__bytes__base+0 ; This procedure will send < character > out to TX - pin of port C . ; `while ! txif ...' start put_char__211while__continue: ; expression=`txif' exp_delay=0 true_delay=2 false_delay=2 true_size=1 false_size=1 btfsc txif__byte,txif__bit goto put_char__211while__break ; Wait for transmit buffer to empty . goto put_char__211while__continue ; if exp=`txif' true goto small true ; Other expression=`txif' delay=-1 put_char__211while__break: ; `while ! txif ...' end ; Send the character : ; txreg := character movf put_char__character,w movwf txreg ; watch_dog_reset clrwdt ; Now wait for it to be fully sent : ; `while ! txif ...' start put_char__219while__continue: ; expression=`txif' exp_delay=0 true_delay=2 false_delay=2 true_size=1 false_size=1 btfsc txif__byte,txif__bit goto put_char__219while__break ; Wait for transmit buffer to empty . goto put_char__219while__continue ; if exp=`txif' true goto small true ; Other expression=`txif' delay=-1 put_char__219while__break: ; `while ! txif ...' end ; procedure put_char end retlw 0 ; origin 0x1800 org 6144 ; bank 3 ; Default register bank is now 3 ; comment {String constants :} ; string_constants Start string___fetch: movwf pcl___register ; hello = 0s'PIC16F876-A RoboBrick Rev. 11' , carriage_return , line_feed hello___string equ 0 hello: addwf pcl___register,f ; Length = 31 retlw 31 ; `PIC16F876-A RoboBrick Rev. 11' retlw 80 retlw 73 retlw 67 retlw 49 retlw 54 retlw 70 retlw 56 retlw 55 retlw 54 retlw 45 retlw 65 retlw 32 retlw 82 retlw 111 retlw 98 retlw 111 retlw 66 retlw 114 retlw 105 retlw 99 retlw 107 retlw 32 retlw 82 retlw 101 retlw 118 retlw 46 retlw 32 retlw 49 retlw 49 ; carriage_return retlw 13 ; line_feed retlw 10 ; string__constants End ; comment {Global variables :} ; comment {In general , I don ' t like gobal error registers , but for this} ; comment {application , I think a global one works best :} error equ global__variables__bank3+0 ; constant ok 0 ok equ 0 ; constant none 1 none equ 1 ; constant bad 0xff bad equ 255 ; comment {One - character look ahead :} look_ahead equ global__variables__bank3+1 have_look_ahead equ global__bit__variables__bank3+0 have_look_ahead__byte equ global__bit__variables__bank3+0 have_look_ahead__bit equ 0 zilch_bit equ global__bit__variables__bank3+0 zilch_bit__byte equ global__bit__variables__bank3+0 zilch_bit__bit equ 1 ; procedure main start main: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 main__variables__base equ global__variables__bank3+2 main__bytes__base equ main__variables__base+0 main__bits__base equ main__variables__base+20 main__total__bytes equ 21 main__409byte0 equ main__bytes__base+19 main__377byte0 equ main__bytes__base+19 main__456byte0 equ main__bytes__base+19 main__379byte0 equ main__bytes__base+19 main__453byte0 equ main__bytes__base+19 ; arguments_none main__byte equ main__bytes__base+0 main__chr equ main__bytes__base+1 main__command equ main__bytes__base+2 main__count equ main__bytes__base+3 main__crlf_last equ main__bits__base+0 main__crlf_last__byte equ main__bits__base+0 main__crlf_last__bit equ 2 main__end equ main__bytes__base+4 main__first equ main__bits__base+0 main__first__byte equ main__bits__base+0 main__first__bit equ 4 main__from_address equ main__bytes__base+5 main__from_address_high equ main__bytes__base+6 main__from_address_low equ main__bytes__base+7 main__hex_command equ main__bytes__base+8 main__high equ main__bytes__base+9 main__high_byte equ main__bytes__base+10 main__index equ main__bytes__base+11 main__length equ main__bytes__base+12 main__low equ main__bytes__base+13 main__low_byte equ main__bytes__base+14 main__start equ main__bytes__base+15 main__to_address equ main__bytes__base+16 main__to_address_high equ main__bytes__base+17 main__to_address_low equ main__bytes__base+18 ; Turn of general interrupts : ; gie := 0 bcf gie__byte,gie__bit ; Initilize serial port : ; Do Baud Rate selection and asynch . serial port enable : ; Prescaler = low : ; brgh := 0 ; Switch from register bank 3 to register bank 1 (which contains brgh__byte) bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 1 bcf brgh__byte,brgh__bit ; Baud rate = 2400 baud : ; spbrg := 129 movlw 129 movwf spbrg ; Asynchronous mode : ; sync := 0 bcf sync__byte,sync__bit ; Serial port enable : ; spen := 1 ; Switch from register bank 1 to register bank 0 (which contains spen__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bsf spen__byte,spen__bit ; txif := 0 bcf txif__byte,txif__bit ; Enable the transmitter : ; 8 - bit mode : ; tx9 := 0 ; Switch from register bank 0 to register bank 1 (which contains tx9__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf tx9__byte,tx9__bit ; Enable transmitter : ; txen := 1 bsf txen__byte,txen__bit ; Enable the receiver : ; 8 - bit mode : ; rx9 := 0 ; Switch from register bank 1 to register bank 0 (which contains rx9__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf rx9__byte,rx9__bit ; Disable address : ; adden := 0 bcf adden__byte,adden__bit ; Enable continuous recepition : ; cren := 1 bsf cren__byte,cren__bit ; Enable single reception : ; sren := 1 bsf sren__byte,sren__bit ; Configure A / D to make all pins of port A digital : ; pcfg0 := 1 ; Switch from register bank 0 to register bank 1 (which contains pcfg0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bsf pcfg0__byte,pcfg0__bit ; pcfg1 := 1 bsf pcfg1__byte,pcfg1__bit ; pcfg2 := 1 bsf pcfg2__byte,pcfg2__bit ; Turn off A / D module : ; adon := 0 ; Switch from register bank 1 to register bank 0 (which contains adon__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf adon__byte,adon__bit ; Select 1 : ; portb := 2 ; sel0 := 1 bsf sel0__byte,sel0__bit ; sel1 := 0 bcf sel1__byte,sel1__bit ; sel2 := 0 bcf sel2__byte,sel2__bit ; sel3 := 0 bcf sel3__byte,sel3__bit ; sel4 := 0 bcf sel4__byte,sel4__bit ; sel5 := 0 bcf sel5__byte,sel5__bit ; Squirt out first characters : ; index := 0 ; Switch from register bank 0 to register bank 3 (which contains main__index) bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 clrf main__index ; `while index < hello . size ...' start main__323while__continue: movlw 31 subwf main__index,w ; expression=` index < hello . size ' exp_delay=2 true_delay=8 false_delay=2 true_size=9 false_size=1 btfsc c___byte,c___bit goto main__323while__break ; call put_character {{ hello ~~ {{ index }} }} incf main__index,w clrf pclath___register bsf pclath___register,3 bsf pclath___register,4 call hello movwf put_character__character call put_character ; index := index + 1 incf main__index,f goto main__323while__continue ; if exp=` index < hello . size ' false goto ; Other expression=` index < hello . size ' delay=-1 main__323while__break: ; `while index < hello . size ...' end ; Command loop : ; have_look_ahead := 0 bcf have_look_ahead__byte,have_look_ahead__bit ; loop_forever ... start main__330loop__forever: ; Get command character : ; call put_character {{ 0c'>' }} movlw 62 movwf put_character__character call put_character ; command := get_character {{ }} call get_character movf get_character__0return__byte,w movwf main__command ; call put_character < command > ; Convert any upper case command into a lower case one : ; if { 0c'a' <= command && command <= 0c'z' } start movlw 97 subwf main__command,w ; expression=`0c'a' <= command' exp_delay=2 true_delay=-1 false_delay=2 true_size=6 false_size=1 btfss c___byte,c___bit goto and337__0false movlw 123 subwf main__command,w ; expression=`command <= 0c'z'' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 btfsc c___byte,c___bit goto label337__1end and337__0true: ; if { 0c'a' <= command && command <= 0c'z' } body start ; command := command - 0c'a' + 0c'A' movlw 224 addwf main__command,f ; if { 0c'a' <= command && command <= 0c'z' } body end label337__1end: ; if exp=`command <= 0c'z'' empty false ; Other expression=`command <= 0c'z'' delay=-1 ; if exp=`0c'a' <= command' false goto ; Other expression=`0c'a' <= command' delay=-1 and337__0false: and337__0end: ; if { 0c'a' <= command && command <= 0c'z' } end ; if { command = 0c'E' } start movlw 69 subwf main__command,w ; expression=`{ command = 0c'E' }' exp_delay=2 true_delay=-1 false_delay=-1 true_size=34 false_size=241 btfss z___byte,z___bit goto label340__0false label340__0true: ; if { command = 0c'E' } body start ; Examine data memory command : ; Get < from_address > : ; from_address := get_hex_byte {{ }} & register_mask call get_hex_byte movf get_hex_byte__0return__byte,w andlw 127 movwf main__from_address ; if { get_white_space {{ }} } start call get_white_space ; expression=`{ get_white_space {{ }} }' exp_delay=-1 true_delay=1 false_delay=1 true_size=3 false_size=1 btfss get_white_space__0return__bit__byte,get_white_space__0return__bit__bit goto label346__0false label346__0true: ; if { get_white_space {{ }} } body start ; Get to_address : ; to_address := get_hex_byte {{ }} & register_mask call get_hex_byte movf get_hex_byte__0return__byte,w andlw 127 ; 1 instructions found for sharing goto label346__0end label346__0false: ; else body start ; to_address := from_address movf main__from_address,w ; 1 instructions found for sharing ; if exp=` get_white_space ## {{ }} ' generic label346__0end: ; Other expression=`{ get_white_space {{ }} }' delay=-1 ; 1 shared instructions follow movwf main__to_address ; if { get_white_space {{ }} } end ; For debugging : ; call put_character < 0c'F' > ; call put_character < 0c'm' > ; call put_hex_byte < from_address > ; call put_character < 0c'T' > ; call put_character < 0c'o' > ; call put_hex_byte < to_address > ; Get confirming carriage return : ; if { get_carriage_return {{ }} && error = ok } start call get_carriage_return ; expression=`get_carriage_return ## {{ }}' exp_delay=-1 true_delay=-1 false_delay=2 true_size=18 false_size=1 btfss get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit goto and362__0false movf error,w ; expression=`error = ok' exp_delay=1 true_delay=-1 false_delay=0 true_size=15 false_size=0 btfss z___byte,z___bit goto label362__1end and362__0true: ; if { get_carriage_return {{ }} && error = ok } body start ; Print out each one : ; `while from_address <= to_address ...' start main__364while__continue: movf main__from_address,w subwf main__to_address,w ; expression=` from_address <= to_address ' exp_delay=2 true_delay=1 false_delay=2 true_size=10 false_size=1 btfss c___byte,c___bit goto main__364while__break ; fsr := from_address movf main__from_address,w movwf fsr ; byte := ind movf ind,w movwf main__byte ; call put_hex_byte {{ byte }} movwf put_hex_byte__byte call put_hex_byte ; call put_space {{ }} call put_space ; from_address := from_address + 1 incf main__from_address,f goto main__364while__continue ; if exp=` from_address <= to_address ' false goto ; Other expression=` from_address <= to_address ' delay=-1 main__364while__break: ; `while from_address <= to_address ...' end ; call put_new_line {{ }} call put_new_line ; if { get_carriage_return {{ }} && error = ok } body end label362__1end: ; if exp=`error = ok' empty false ; Other expression=`error = ok' delay=-1 ; if exp=`get_carriage_return ## {{ }}' false goto ; Other expression=`get_carriage_return ## {{ }}' delay=-1 and362__0false: and362__0end: ; if { get_carriage_return {{ }} && error = ok } end ; if { command = 0c'E' } body end goto label340__0end label340__0false: movlw 86 subwf main__command,w ; expression=`{ command = 0c'V' }' exp_delay=2 true_delay=-1 false_delay=-1 true_size=109 false_size=127 btfss z___byte,z___bit goto label373__0false label373__0true: ; else_if { command = 0c'V' } body start ; View program memory command : ; Get from address : ; from_address_high , from_address_low := get_hex_address {{ }} call get_hex_address movf get_hex_address__0return__byte,w movwf main__377byte0 movf get_hex_address__1return__byte,w movwf main__from_address_low movf main__377byte0,w movwf main__from_address_high ; if { get_white_space {{ }} } start call get_white_space ; expression=`{ get_white_space {{ }} }' exp_delay=-1 true_delay=5 false_delay=4 true_size=7 false_size=4 btfsc get_white_space__0return__bit__byte,get_white_space__0return__bit__bit goto label378__0true label378__0false: ; else body start ; to_address_high := from_address_high movf main__from_address_high,w movwf main__to_address_high ; to_address_low := from_address_low movf main__from_address_low,w movwf main__to_address_low ; else body end goto label378__0end label378__0true: ; if { get_white_space {{ }} } body start ; to_address_high , to_address_low := get_hex_address {{ }} call get_hex_address movf get_hex_address__0return__byte,w movwf main__379byte0 movf get_hex_address__1return__byte,w movwf main__to_address_low movf main__379byte0,w movwf main__to_address_high ; if { get_white_space {{ }} } body end ; if exp=` get_white_space ## {{ }} ' generic label378__0end: ; Other expression=`{ get_white_space {{ }} }' delay=-1 ; if { get_white_space {{ }} } end ; For debugging : ; call put_character < 0c'F' > ; call put_character < 0c'm' > ; call put_hex_address < from_address_high , from_address_low > ; call put_character < 0c'T' > ; call put_character < 0c'o' > ; call put_hex_address < to_address_high , to_address_low > ; if { get_carriage_return {{ }} && error = ok } start call get_carriage_return ; expression=`get_carriage_return ## {{ }}' exp_delay=-1 true_delay=-1 false_delay=2 true_size=84 false_size=1 btfss get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit goto and393__0false movf error,w ; expression=`error = ok' exp_delay=1 true_delay=-1 false_delay=0 true_size=81 false_size=0 btfss z___byte,z___bit goto label393__1end and393__0true: ; if { get_carriage_return {{ }} && error = ok } body start ; first := 1 bsf main__first__byte,main__first__bit ; crlf_last := 0 bcf main__crlf_last__byte,main__crlf_last__bit ; high := from_address_high movf main__from_address_high,w movwf main__high ; `while high <= to_address_high ...' start main__397while__continue: movf main__high,w subwf main__to_address_high,w ; expression=` high <= to_address_high ' exp_delay=2 true_delay=1 false_delay=2 true_size=71 false_size=1 btfss c___byte,c___bit goto main__397while__break ; if { high = from_address_high } start movf main__high,w subwf main__from_address_high,w ; expression=`{ high = from_address_high }' exp_delay=2 true_delay=2 false_delay=1 true_size=2 false_size=1 btfsc z___byte,z___bit goto label398__0true label398__0false: ; else body start ; start := 0 clrf main__start ; else body end goto label398__0end label398__0true: ; if { high = from_address_high } body start ; start := from_address_low movf main__from_address_low,w movwf main__start ; if { high = from_address_high } body end ; if exp=` high = from_address_high ' generic label398__0end: ; Other expression=`{ high = from_address_high }' delay=-1 ; if { high = from_address_high } end ; if { high = to_address_high } start movf main__high,w subwf main__to_address_high,w ; expression=`{ high = to_address_high }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfsc z___byte,z___bit ; if { high = to_address_high } body start ; end := to_address_low movf main__to_address_low,w ; 1 instructions found for sharing btfss z___byte,z___bit ; else body start ; end := 0xff movlw 255 ; 1 instructions found for sharing ; if exp=` high = to_address_high ' single true and false skip delay=6 ; Other expression=`{ high = to_address_high }' delay=6 ; 1 shared instructions follow movwf main__end ; if { high = to_address_high } end ; low := start movf main__start,w movwf main__low ; `count_down count end - start + 1 ...' start movf main__end,w movwf main__409byte0 movf main__start,w subwf main__409byte0,w addlw 1 movwf main__count main__409_loop: ; if { first || {{ low & 7 }} = 0 } start ; expression=`first' exp_delay=0 true_delay=6 false_delay=-1 true_size=1 false_size=12 btfsc main__first__byte,main__first__bit goto or410__0true movlw 7 andwf main__low,w ; expression=`{{ low & 7 }} = 0' exp_delay=2 true_delay=4 false_delay=0 true_size=8 false_size=0 btfss z___byte,z___bit goto label410__1end or410__0true: ; if { first || {{ low & 7 }} = 0 } body start ; call put_hex_address {{ high , low }} movf main__high,w movwf put_hex_address__high_byte movf main__low,w movwf put_hex_address__low_byte call put_hex_address ; call put_character {{ 0c':' }} movlw 58 movwf put_character__character call put_character ; if { first || {{ low & 7 }} = 0 } body end label410__1end: ; if exp=`{{ low & 7 }} = 0' empty false ; Other expression=`{{ low & 7 }} = 0' delay=-1 ; if exp=`first' true goto ; Other expression=`first' delay=-1 or410__0false: or410__0end: ; if { first || {{ low & 7 }} = 0 } end ; first := 0 bcf main__first__byte,main__first__bit ; Read the byte : ; eeadrh := high movf main__high,w ; Switch from register bank 3 to register bank 2 (which contains eeadrh) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eeadrh ; eeadr := low ; Switch from register bank 2 to register bank 3 (which contains main__low) bsf rp0___byte,rp0___bit ; Register bank is now 3 movf main__low,w ; Switch from register bank 3 to register bank 2 (which contains eeadr) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eeadr ; eepgd := 1 ; Switch from register bank 2 to register bank 3 (which contains eepgd__byte) bsf rp0___byte,rp0___bit ; Register bank is now 3 bsf eepgd__byte,eepgd__bit ; rd := 1 bsf rd__byte,rd__bit ; The next two instructions are * ignored * ! ! ! ; eezlich := 0 bcf eezlich__byte,eezlich__bit ; eezlich := 1 bsf eezlich__byte,eezlich__bit ; high_byte := eedath ; Switch from register bank 3 to register bank 2 (which contains eedath) bcf rp0___byte,rp0___bit ; Register bank is now 2 movf eedath,w ; Switch from register bank 2 to register bank 3 (which contains main__high_byte) bsf rp0___byte,rp0___bit ; Register bank is now 3 movwf main__high_byte ; low_byte := eedata ; Switch from register bank 3 to register bank 2 (which contains eedata) bcf rp0___byte,rp0___bit ; Register bank is now 2 movf eedata,w ; Switch from register bank 2 to register bank 3 (which contains main__low_byte) bsf rp0___byte,rp0___bit ; Register bank is now 3 movwf main__low_byte ; call put_character {{ space }} movlw 32 movwf put_character__character call put_character ; call put_hex_address {{ high_byte , low_byte }} movf main__high_byte,w movwf put_hex_address__high_byte movf main__low_byte,w movwf put_hex_address__low_byte call put_hex_address ; Move to next instruction : ; low := low + 1 incf main__low,f ; if { {{ low & 7 }} = 0 } start movlw 7 andwf main__low,w ; expression=`{ {{ low & 7 }} = 0 }' exp_delay=2 true_delay=-1 false_delay=1 true_size=2 false_size=1 btfss z___byte,z___bit goto label432__0false label432__0true: ; if { {{ low & 7 }} = 0 } body start ; call put_new_line {{ }} call put_new_line ; crlf_last := 1 bsf main__crlf_last__byte,main__crlf_last__bit ; if { {{ low & 7 }} = 0 } body end goto label432__0end label432__0false: ; else body start ; crlf_last := 0 bcf main__crlf_last__byte,main__crlf_last__bit ; else body end ; if exp=` {{ low & 7 }} = 0 ' generic label432__0end: ; Other expression=`{ {{ low & 7 }} = 0 }' delay=-1 ; if { {{ low & 7 }} = 0 } end decfsz main__count,f goto main__409_loop main__409_done: ; `count_down count end - start + 1 ...' end ; high := high + 1 incf main__high,f goto main__397while__continue ; if exp=` high <= to_address_high ' false goto ; Other expression=` high <= to_address_high ' delay=-1 main__397while__break: ; `while high <= to_address_high ...' end ; if { ! crlf_last } start ; expression=`crlf_last' exp_delay=0 true_delay=0 false_delay=-1 true_size=0 false_size=1 btfss main__crlf_last__byte,main__crlf_last__bit ; if { ! crlf_last } body start ; call put_new_line {{ }} call put_new_line ; if { ! crlf_last } body end ; if exp=`crlf_last' true skip delay=2 ; Other expression=`crlf_last' delay=2 ; if { ! crlf_last } end ; if { get_carriage_return {{ }} && error = ok } body end label393__1end: ; if exp=`error = ok' empty false ; Other expression=`error = ok' delay=-1 ; if exp=`get_carriage_return ## {{ }}' false goto ; Other expression=`get_carriage_return ## {{ }}' delay=-1 and393__0false: and393__0end: ; if { get_carriage_return {{ }} && error = ok } end ; else_if { command = 0c'V' } body end goto label373__0end label373__0false: movlw 83 subwf main__command,w ; expression=`{ command = 0c'S' }' exp_delay=2 true_delay=2 false_delay=-1 true_size=4 false_size=118 btfsc z___byte,z___bit goto label445__0true label445__0false: movlw 82 subwf main__command,w ; expression=`{ command = 0c'R' }' exp_delay=2 true_delay=2 false_delay=-1 true_size=4 false_size=109 btfsc z___byte,z___bit goto label448__0true label448__0false: movlw 87 subwf main__command,w ; expression=`{ command = 0c'W' }' exp_delay=2 true_delay=-1 false_delay=-1 true_size=94 false_size=10 btfss z___byte,z___bit goto label451__0false label451__0true: ; else_if { command = 0c'W' } body start ; Program a hex file : ; to_address_high , to_address_low := get_hex_address {{ }} call get_hex_address movf get_hex_address__0return__byte,w movwf main__453byte0 movf get_hex_address__1return__byte,w movwf main__to_address_low movf main__453byte0,w movwf main__to_address_high ; `while get_white_space ## {{ }} ...' start main__454while__continue: call get_white_space ; expression=` get_white_space ## {{ }} ' exp_delay=-1 true_delay=1 false_delay=2 true_size=80 false_size=1 btfss get_white_space__0return__bit__byte,get_white_space__0return__bit__bit goto main__454while__break ; Read the data bytes : ; high , low := get_hex_address {{ }} call get_hex_address movf get_hex_address__0return__byte,w movwf main__456byte0 movf get_hex_address__1return__byte,w movwf main__low movf main__456byte0,w movwf main__high ; Restrict ourselves between ; Write the data out : ; chr := 0c'-' movlw 45 movwf main__chr ; if { to_address_high != 0 && to_address_high < 0x20 } start movf main__to_address_high,w ; expression=`to_address_high != 0' exp_delay=1 true_delay=-1 false_delay=2 true_size=60 false_size=1 btfsc z___byte,z___bit goto and461__0false movlw 32 subwf main__to_address_high,w ; expression=`to_address_high < 0x20' exp_delay=2 true_delay=-1 false_delay=0 true_size=56 false_size=0 btfsc c___byte,c___bit goto label461__1end and461__0true: ; if { to_address_high != 0 && to_address_high < 0x20 } body start ; Read before write : ; eeadrh := to_address_high movf main__to_address_high,w ; Switch from register bank 3 to register bank 2 (which contains eeadrh) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eeadrh ; eeadr := to_address_low ; Switch from register bank 2 to register bank 3 (which contains main__to_address_low) bsf rp0___byte,rp0___bit ; Register bank is now 3 movf main__to_address_low,w ; Switch from register bank 3 to register bank 2 (which contains eeadr) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eeadr ; eepgd := 1 ; Switch from register bank 2 to register bank 3 (which contains eepgd__byte) bsf rp0___byte,rp0___bit ; Register bank is now 3 bsf eepgd__byte,eepgd__bit ; rd := 1 bsf rd__byte,rd__bit ; The next two instructions are not executed : ; dc := 0 bcf dc__byte,dc__bit ; dc := 1 bsf dc__byte,dc__bit ; Only write if it does not match : ; if { eedath = high && eedata = low } start ; Switch from register bank 3 to register bank 2 (which contains eedath) bcf rp0___byte,rp0___bit ; Register bank is now 2 movf eedath,w ; Switch from register bank 2 to register bank 3 (which contains main__high) bsf rp0___byte,rp0___bit ; Register bank is now 3 subwf main__high,w ; expression=`eedath = high' exp_delay=2 true_delay=-1 false_delay=1 true_size=44 false_size=1 btfss z___byte,z___bit goto and472__0false ; Switch from register bank 3 to register bank 2 (which contains eedata) bcf rp0___byte,rp0___bit ; Register bank is now 2 movf eedata,w ; Switch from register bank 2 to register bank 3 (which contains main__low) bsf rp0___byte,rp0___bit ; Register bank is now 3 subwf main__low,w ; expression=`eedata = low' exp_delay=2 true_delay=2 false_delay=-1 true_size=2 false_size=37 btfss z___byte,z___bit goto label472__1false label472__1true: and472__0true: ; if { eedath = high && eedata = low } body start ; chr := 0c'+' movlw 43 movwf main__chr ; if { eedath = high && eedata = low } body end goto label472__1end label472__1false: and472__0false: ; else body start ; Do the write : ; eeadrh := to_address_high movf main__to_address_high,w ; Switch from register bank 3 to register bank 2 (which contains eeadrh) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eeadrh ; eeadr := to_address_low ; Switch from register bank 2 to register bank 3 (which contains main__to_address_low) bsf rp0___byte,rp0___bit ; Register bank is now 3 movf main__to_address_low,w ; Switch from register bank 3 to register bank 2 (which contains eeadr) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eeadr ; eedath := high ; Switch from register bank 2 to register bank 3 (which contains main__high) bsf rp0___byte,rp0___bit ; Register bank is now 3 movf main__high,w ; Switch from register bank 3 to register bank 2 (which contains eedath) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eedath ; eedata := low ; Switch from register bank 2 to register bank 3 (which contains main__low) bsf rp0___byte,rp0___bit ; Register bank is now 3 movf main__low,w ; Switch from register bank 3 to register bank 2 (which contains eedata) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eedata ; eepgd := 1 ; Switch from register bank 2 to register bank 3 (which contains eepgd__byte) bsf rp0___byte,rp0___bit ; Register bank is now 3 bsf eepgd__byte,eepgd__bit ; wren := 1 bsf wren__byte,wren__bit ; gie := 0 bcf gie__byte,gie__bit ; eecon2 := 0x55 movlw 85 movwf eecon2 ; eecon2 := 0xaa movlw 170 movwf eecon2 ; wr := 1 bsf wr__byte,wr__bit ; The next two instructions are not executed : ; dc := 0 bcf dc__byte,dc__bit ; dc := 1 bsf dc__byte,dc__bit ; wren := 0 bcf wren__byte,wren__bit ; Now verify the write : ; eeadrh := to_address_high movf main__to_address_high,w ; Switch from register bank 3 to register bank 2 (which contains eeadrh) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eeadrh ; eeadr := to_address_low ; Switch from register bank 2 to register bank 3 (which contains main__to_address_low) bsf rp0___byte,rp0___bit ; Register bank is now 3 movf main__to_address_low,w ; Switch from register bank 3 to register bank 2 (which contains eeadr) bcf rp0___byte,rp0___bit ; Register bank is now 2 movwf eeadr ; eepgd := 1 ; Switch from register bank 2 to register bank 3 (which contains eepgd__byte) bsf rp0___byte,rp0___bit ; Register bank is now 3 bsf eepgd__byte,eepgd__bit ; rd := 1 bsf rd__byte,rd__bit ; The next two instructions are not executed : ; dc := 0 bcf dc__byte,dc__bit ; dc := 1 bsf dc__byte,dc__bit ; Provide some feedback : ; if { eedath = high && eedata = low } start ; Switch from register bank 3 to register bank 2 (which contains eedath) bcf rp0___byte,rp0___bit ; Register bank is now 2 movf eedath,w ; Switch from register bank 2 to register bank 3 (which contains main__high) bsf rp0___byte,rp0___bit ; Register bank is now 3 subwf main__high,w ; expression=`eedath = high' exp_delay=2 true_delay=-1 false_delay=2 true_size=6 false_size=1 btfss z___byte,z___bit goto and501__0false ; Switch from register bank 3 to register bank 2 (which contains eedata) bcf rp0___byte,rp0___bit ; Register bank is now 2 movf eedata,w ; Switch from register bank 2 to register bank 3 (which contains main__low) bsf rp0___byte,rp0___bit ; Register bank is now 3 subwf main__low,w ; expression=`eedata = low' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 btfss z___byte,z___bit goto label501__1end and501__0true: ; if { eedath = high && eedata = low } body start ; chr := 0c'+' movlw 43 movwf main__chr ; if { eedath = high && eedata = low } body end label501__1end: ; if exp=`eedata = low' empty false ; Other expression=`eedata = low' delay=-1 ; if exp=`eedath = high' false goto ; Other expression=`eedath = high' delay=-1 and501__0false: and501__0end: ; if { eedath = high && eedata = low } end ; else body end ; if exp=`eedata = low' generic label472__1end: ; Other expression=`eedata = low' delay=-1 ; if exp=`eedath = high' false goto ; Other expression=`eedath = high' delay=-1 and472__0end: ; if { eedath = high && eedata = low } end ; if { to_address_high != 0 && to_address_high < 0x20 } body end label461__1end: ; if exp=`to_address_high < 0x20' empty false ; Other expression=`to_address_high < 0x20' delay=-1 ; if exp=`to_address_high != 0' false goto ; Other expression=`to_address_high != 0' delay=-1 and461__0false: and461__0end: ; if { to_address_high != 0 && to_address_high < 0x20 } end ; call put_character {{ chr }} movf main__chr,w movwf put_character__character call put_character ; increment to next address : ; to_address_low := to_address_low + 1 incf main__to_address_low,f ; if { to_address_low = 0 } start movf main__to_address_low,w ; expression=`{ to_address_low = 0 }' exp_delay=1 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc z___byte,z___bit ; if { to_address_low = 0 } body start ; to_address_high := to_address_high + 1 incf main__to_address_high,f ; if { to_address_low = 0 } body end ; if exp=` to_address_low = 0 ' false skip delay=3 ; Other expression=`{ to_address_low = 0 }' delay=3 ; if { to_address_low = 0 } end goto main__454while__continue ; if exp=` get_white_space ## {{ }} ' false goto ; Other expression=` get_white_space ## {{ }} ' delay=-1 main__454while__break: ; `while get_white_space ## {{ }} ...' end ; zilch_bit := get_carriage_return {{ }} call get_carriage_return bcf zilch_bit__byte,zilch_bit__bit btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit bsf zilch_bit__byte,zilch_bit__bit ; else_if { command = 0c'W' } body end goto label451__0end label451__0false: movlw 71 subwf main__command,w ; expression=`{ command = 0c'G' }' exp_delay=2 true_delay=-1 false_delay=2 true_size=1 false_size=4 btfss z___byte,z___bit goto label515__0false label515__0true: ; else_if { command = 0c'G' } body start ; call goto_command {{ }} call goto_command ; else_if { command = 0c'G' } body end goto label515__0end label515__0false: ; else body start ; Unrecognized command : ; zilch_bit := get_carriage_return {{ }} call get_carriage_return bcf zilch_bit__byte,zilch_bit__bit btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit bsf zilch_bit__byte,zilch_bit__bit ; else body end ; if exp=` command = 0c'G' ' generic label515__0end: ; Other expression=`{ command = 0c'G' }' delay=-1 ; if exp=` command = 0c'W' ' generic label451__0end: ; Other expression=`{ command = 0c'W' }' delay=-1 goto label448__0end label448__0true: ; else_if { command = 0c'R' } body start ; Run command ; zilch_bit := get_carriage_return {{ }} call get_carriage_return bcf zilch_bit__byte,zilch_bit__bit btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit bsf zilch_bit__byte,zilch_bit__bit ; else_if { command = 0c'R' } body end ; if exp=` command = 0c'R' ' generic label448__0end: ; Other expression=`{ command = 0c'R' }' delay=-1 goto label445__0end label445__0true: ; else_if { command = 0c'S' } body start ; Store data memory command : ; zilch_bit := get_carriage_return {{ }} call get_carriage_return bcf zilch_bit__byte,zilch_bit__bit btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit bsf zilch_bit__byte,zilch_bit__bit ; else_if { command = 0c'S' } body end ; if exp=` command = 0c'S' ' generic label445__0end: ; Other expression=`{ command = 0c'S' }' delay=-1 ; if exp=` command = 0c'V' ' generic label373__0end: ; Other expression=`{ command = 0c'V' }' delay=-1 ; if exp=` command = 0c'E' ' generic label340__0end: ; Other expression=`{ command = 0c'E' }' delay=-1 ; if { command = 0c'E' } end goto main__330loop__forever ; loop_forever ... end ; procedure main end ; procedure goto_command start goto_command: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 goto_command__variables__base equ global__variables__bank3+23 goto_command__bytes__base equ goto_command__variables__base+0 goto_command__bits__base equ goto_command__variables__base+3 goto_command__total__bytes equ 3 goto_command__530byte0 equ goto_command__bytes__base+2 ; arguments_none goto_command__address_low equ goto_command__bytes__base+0 goto_command__address_high equ goto_command__bytes__base+1 ; address_high , address_low := get_hex_address {{ }} call get_hex_address movf get_hex_address__0return__byte,w movwf goto_command__530byte0 movf get_hex_address__1return__byte,w movwf goto_command__address_low movf goto_command__530byte0,w movwf goto_command__address_high ; zilch_bit := get_carriage_return {{ }} call get_carriage_return bcf zilch_bit__byte,zilch_bit__bit btfsc get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit bsf zilch_bit__byte,zilch_bit__bit ; pclath := address_high movf goto_command__address_high,w movwf pclath ; pcl := address_low movf goto_command__address_low,w movwf pcl ; procedure goto_command end retlw 0 ; comment {The ` get ' procedures are below :} ; procedure get_byte start get_byte: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 get_byte__variables__base equ global__variables__bank3+26 get_byte__bytes__base equ get_byte__variables__base+0 get_byte__bits__base equ get_byte__variables__base+2 get_byte__total__bytes equ 2 ; arguments_none get_byte__0return__byte equ get_byte__bytes__base+0 ; Get an 8 - bit byte the RX pin of port C . ; Compiler kludge : Compiler can ' t bit test outside of the current data ; bank yet . So read the entire register into a temporary and test second . get_byte__pir1_copy equ get_byte__bytes__base+1 ; pir1_copy := pir1 ; Switch from register bank 3 to register bank 0 (which contains pir1) bcf rp0___byte,rp0___bit bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 0 movf pir1,w ; Switch from register bank 0 to register bank 3 (which contains get_byte__pir1_copy) bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 movwf get_byte__pir1_copy ; `while ! {{ pir1_copy @ 5 }} ...' start get_byte__550while__continue: ; Alias variable for select pir1_copy @ 5 get_byte__pir1_copy__550select0 equ get_byte__pir1_copy+0 get_byte__pir1_copy__550select0__byte equ get_byte__pir1_copy+0 get_byte__pir1_copy__550select0__bit equ 5 ; expression=`{{ pir1_copy @ 5 }}' exp_delay=0 true_delay=2 false_delay=5 true_size=1 false_size=4 btfsc get_byte__pir1_copy__550select0__byte,get_byte__pir1_copy__550select0__bit goto get_byte__550while__break ; Wait for character : ; watch_dog_reset clrwdt ; pir1_copy := pir1 ; Switch from register bank 3 to register bank 0 (which contains pir1) bcf rp0___byte,rp0___bit bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 0 movf pir1,w ; Switch from register bank 0 to register bank 3 (which contains get_byte__pir1_copy) bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 movwf get_byte__pir1_copy goto get_byte__550while__continue ; if exp=` pir1_copy @ 5 ' true goto ; Other expression=`{{ pir1_copy @ 5 }}' delay=-1 get_byte__550while__break: ; `while ! {{ pir1_copy @ 5 }} ...' end ; return rcreg ; Switch from register bank 3 to register bank 0 (which contains rcreg) bcf rp0___byte,rp0___bit bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 0 movf rcreg,w ; Switch from register bank 0 to register bank 3 (which contains get_byte__0return__byte) bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 movwf get_byte__0return__byte retlw 0 ; procedure get_byte end ; procedure get_carriage_return start get_carriage_return: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 get_carriage_return__variables__base equ global__variables__bank3+28 get_carriage_return__bytes__base equ get_carriage_return__variables__base+0 get_carriage_return__bits__base equ get_carriage_return__variables__base+1 get_carriage_return__total__bytes equ 2 ; arguments_none get_carriage_return__0return__bit equ get_carriage_return__bits__base+0 get_carriage_return__0return__bit__byte equ get_carriage_return__bits__base+0 get_carriage_return__0return__bit__bit equ 0 ; This procedure will verify that the next character is ; a carriage return . If the next character is a carriage ; return a 1 is returned . Otherwise , characters are read ; until a carriage return is encountered and 0 is returned . get_carriage_return__character equ get_carriage_return__bytes__base+0 ; character := get_character {{ }} call get_character movf get_character__0return__byte,w movwf get_carriage_return__character ; if { character = carriage_return } start movlw 13 subwf get_carriage_return__character,w ; expression=`{ character = carriage_return }' exp_delay=2 true_delay=3 false_delay=0 true_size=5 false_size=0 btfss z___byte,z___bit goto label570__0end ; if { character = carriage_return } body start ; call put_character {{ line_feed }} movlw 10 movwf put_character__character call put_character ; return 1 bsf get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit retlw 0 ; if { character = carriage_return } body end label570__0end: ; if exp=` character = carriage_return ' empty false ; Other expression=`{ character = carriage_return }' delay=-1 ; if { character = carriage_return } end ; `while character != carriage_return ...' start get_carriage_return__574while__continue: movlw 13 subwf get_carriage_return__character,w ; expression=` character != carriage_return ' exp_delay=2 true_delay=3 false_delay=2 true_size=4 false_size=1 btfsc z___byte,z___bit goto get_carriage_return__574while__break ; character := get_character {{ }} call get_character movf get_character__0return__byte,w movwf get_carriage_return__character goto get_carriage_return__574while__continue ; if exp=` character != carriage_return ' false goto ; Other expression=` character != carriage_return ' delay=-1 get_carriage_return__574while__break: ; `while character != carriage_return ...' end ; call put_character {{ line_feed }} movlw 10 movwf put_character__character call put_character ; return 0 bcf get_carriage_return__0return__bit__byte,get_carriage_return__0return__bit__bit retlw 0 ; procedure get_carriage_return end ; procedure get_character start get_character: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 get_character__variables__base equ global__variables__bank3+30 get_character__bytes__base equ get_character__variables__base+0 get_character__bits__base equ get_character__variables__base+1 get_character__total__bytes equ 1 ; arguments_none get_character__0return__byte equ get_character__bytes__base+0 ; This procedure will get and return a 7 - bit ASCII character . ; One character of look ahead is supported . ; call put_character < 0c'G' > ; call put_character < 0c'C' > ; call put_character < 0c'<' > ; call show_look_ahead < 0c'c' > ; look_ahead := peek_character {{ }} call peek_character movf peek_character__0return__byte,w movwf look_ahead ; have_look_ahead := 0 bcf have_look_ahead__byte,have_look_ahead__bit ; call show_look_ahead < 0c'd' > ; call put_character < 0c'>' > ; call put_character < 0c'=' > ; call put_character < look_ahead > ; call put_character < space > ; return look_ahead movf look_ahead,w movwf get_character__0return__byte retlw 0 ; procedure get_character end ; procedure get_hex_address start get_hex_address: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 get_hex_address__variables__base equ global__variables__bank3+31 get_hex_address__bytes__base equ get_hex_address__variables__base+0 get_hex_address__bits__base equ get_hex_address__variables__base+4 get_hex_address__total__bytes equ 4 ; arguments_none get_hex_address__0return__byte equ get_hex_address__bytes__base+0 get_hex_address__1return__byte equ get_hex_address__bytes__base+1 ; This procedure will read 4 - digit hexadecimal address : get_hex_address__high equ get_hex_address__bytes__base+2 get_hex_address__low equ get_hex_address__bytes__base+3 ; error := ok clrf error ; high := get_hex_byte {{ }} call get_hex_byte movf get_hex_byte__0return__byte,w movwf get_hex_address__high ; if { error = ok } start movf error,w ; expression=`{ error = ok }' exp_delay=1 true_delay=1 false_delay=0 true_size=3 false_size=0 btfss z___byte,z___bit goto label613__0end ; if { error = ok } body start ; low := get_hex_byte {{ }} call get_hex_byte movf get_hex_byte__0return__byte,w movwf get_hex_address__low ; if { error = ok } body end label613__0end: ; if exp=` error = ok ' empty false ; Other expression=`{ error = ok }' delay=-1 ; if { error = ok } end ; return high , low movf get_hex_address__high,w movwf get_hex_address__0return__byte movf get_hex_address__low,w movwf get_hex_address__1return__byte retlw 0 ; procedure get_hex_address end ; procedure get_hex_byte start get_hex_byte: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 get_hex_byte__variables__base equ global__variables__bank3+35 get_hex_byte__bytes__base equ get_hex_byte__variables__base+0 get_hex_byte__bits__base equ get_hex_byte__variables__base+3 get_hex_byte__total__bytes equ 3 get_hex_byte__637byte1 equ get_hex_byte__bytes__base+2 ; arguments_none get_hex_byte__0return__byte equ get_hex_byte__bytes__base+0 ; This procedure will read one hexadecimal byte : get_hex_byte__result equ get_hex_byte__bytes__base+1 ; variable nibble1 byte ; variable nibble2 byte ; call put_character < 0c'G' > ; call put_character < 0c'H' > ; call put_character < 0c'B' > ; call put_character < 0c'<' > ; error := ok clrf error ; result := get_hex_nibble {{ }} call get_hex_nibble movf get_hex_nibble__0return__byte,w movwf get_hex_byte__result ; if { error = ok } start movf error,w ; expression=`{ error = ok }' exp_delay=1 true_delay=5 false_delay=0 true_size=7 false_size=0 btfss z___byte,z___bit goto label635__0end ; if { error = ok } body start ; nibble2 := get_hex_nibble < > ; result := result << 4 | get_hex_nibble {{ }} swapf get_hex_byte__result,w andlw 240 movwf get_hex_byte__637byte1 call get_hex_nibble movf get_hex_nibble__0return__byte,w iorwf get_hex_byte__637byte1,w movwf get_hex_byte__result ; if { error = ok } body end label635__0end: ; if exp=` error = ok ' empty false ; Other expression=`{ error = ok }' delay=-1 ; if { error = ok } end ; call put_character < 0c'>' > ; call put_character < 0c'=' > ; call put_hex_nibble < nibble1 > ; call put_hex_nibble < nibble2 > ; call put_character < space > ; return result movf get_hex_byte__result,w movwf get_hex_byte__0return__byte retlw 0 ; procedure get_hex_byte end ; procedure get_hex_nibble start get_hex_nibble: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 get_hex_nibble__variables__base equ global__variables__bank3+38 get_hex_nibble__bytes__base equ get_hex_nibble__variables__base+0 get_hex_nibble__bits__base equ get_hex_nibble__variables__base+2 get_hex_nibble__total__bytes equ 2 ; arguments_none get_hex_nibble__0return__byte equ get_hex_nibble__bytes__base+0 ; This procedure will get and return one hexadecimal digit worth ; of number . get_hex_nibble__character equ get_hex_nibble__bytes__base+1 ; call put_character < 0c'G' > ; call put_character < 0c'H' > ; call put_character < 0c'N' > ; call put_character < 0c'<' > ; character := peek_character {{ }} call peek_character movf peek_character__0return__byte,w movwf get_hex_nibble__character ; error := ok clrf error ; if { 0c'0' <= character && character <= 0c'9' } start movlw 48 subwf get_hex_nibble__character,w ; expression=`0c'0' <= character' exp_delay=2 true_delay=-1 false_delay=1 true_size=33 false_size=1 btfss c___byte,c___bit goto and662__0false movlw 58 subwf get_hex_nibble__character,w ; expression=`character <= 0c'9'' exp_delay=2 true_delay=2 false_delay=-1 true_size=2 false_size=26 btfsc c___byte,c___bit goto label662__1false label662__1true: and662__0true: ; if { 0c'0' <= character && character <= 0c'9' } body start ; character := character - 0c'0' movlw 208 addwf get_hex_nibble__character,f ; if { 0c'0' <= character && character <= 0c'9' } body end goto label662__1end label662__1false: and662__0false: movlw 97 subwf get_hex_nibble__character,w ; expression=`0c'a' <= character' exp_delay=2 true_delay=-1 false_delay=1 true_size=22 false_size=1 btfss c___byte,c___bit goto and664__0false movlw 103 subwf get_hex_nibble__character,w ; expression=`character <= 0c'f'' exp_delay=2 true_delay=2 false_delay=-1 true_size=2 false_size=15 btfsc c___byte,c___bit goto label664__1false label664__1true: and664__0true: ; else_if { 0c'a' <= character && character <= 0c'f' } body start ; character := character - 0c'a' + 10 movlw 169 addwf get_hex_nibble__character,f ; else_if { 0c'a' <= character && character <= 0c'f' } body end goto label664__1end label664__1false: and664__0false: movlw 65 subwf get_hex_nibble__character,w ; expression=`0c'A' <= character' exp_delay=2 true_delay=-1 false_delay=6 true_size=11 false_size=1 btfss c___byte,c___bit goto and666__0false movlw 71 subwf get_hex_nibble__character,w ; expression=`character <= 0c'F'' exp_delay=2 true_delay=2 false_delay=4 true_size=2 false_size=4 btfsc c___byte,c___bit goto label666__1false label666__1true: and666__0true: ; else_if { 0c'A' <= character && character <= 0c'F' } body start ; character := character - 0c'A' + 10 movlw 201 addwf get_hex_nibble__character,f ; else_if { 0c'A' <= character && character <= 0c'F' } body end goto label666__1end label666__1false: and666__0false: ; else body start ; error := none movlw 1 movwf error ; character := 0xff movlw 255 movwf get_hex_nibble__character ; else body end ; if exp=`character <= 0c'F'' generic label666__1end: ; Other expression=`character <= 0c'F'' delay=-1 ; if exp=`0c'A' <= character' false goto ; Other expression=`0c'A' <= character' delay=-1 and666__0end: ; if exp=`character <= 0c'f'' generic label664__1end: ; Other expression=`character <= 0c'f'' delay=-1 ; if exp=`0c'a' <= character' false goto ; Other expression=`0c'a' <= character' delay=-1 and664__0end: ; if exp=`character <= 0c'9'' generic label662__1end: ; Other expression=`character <= 0c'9'' delay=-1 ; if exp=`0c'0' <= character' false goto ; Other expression=`0c'0' <= character' delay=-1 and662__0end: ; if { 0c'0' <= character && character <= 0c'9' } end ; if { error = ok } start movf error,w ; expression=`{ error = ok }' exp_delay=1 true_delay=1 false_delay=0 true_size=3 false_size=0 btfss z___byte,z___bit goto label672__0end ; if { error = ok } body start ; look_ahead := get_character {{ }} call get_character movf get_character__0return__byte,w movwf look_ahead ; if { error = ok } body end label672__0end: ; if exp=` error = ok ' empty false ; Other expression=`{ error = ok }' delay=-1 ; if { error = ok } end ; call put_character < 0c'>' > ; call put_character < 0c'=' > ; call put_character < character > ; call put_character < space > ; return character movf get_hex_nibble__character,w movwf get_hex_nibble__0return__byte retlw 0 ; procedure get_hex_nibble end ; procedure get_white_space start get_white_space: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 get_white_space__variables__base equ global__variables__bank3+40 get_white_space__bytes__base equ get_white_space__variables__base+0 get_white_space__bits__base equ get_white_space__variables__base+1 get_white_space__total__bytes equ 2 ; arguments_none get_white_space__0return__bit equ get_white_space__bits__base+0 get_white_space__0return__bit__byte equ get_white_space__bits__base+0 get_white_space__0return__bit__bit equ 0 ; This procedure will read exactly one space . If one space is ; read , 1 is returned ; otherwise , no characters are read and 0 ; is returned . get_white_space__character equ get_white_space__bytes__base+0 ; character := peek_character {{ }} call peek_character movf peek_character__0return__byte,w movwf get_white_space__character ; if { character = space } start movlw 32 subwf get_white_space__character,w ; expression=`{ character = space }' exp_delay=2 true_delay=3 false_delay=0 true_size=5 false_size=0 btfss z___byte,z___bit goto label693__0end ; if { character = space } body start ; character := get_character {{ }} call get_character movf get_character__0return__byte,w movwf get_white_space__character ; return 1 bsf get_white_space__0return__bit__byte,get_white_space__0return__bit__bit retlw 0 ; if { character = space } body end label693__0end: ; if exp=` character = space ' empty false ; Other expression=`{ character = space }' delay=-1 ; if { character = space } end ; return 0 bcf get_white_space__0return__bit__byte,get_white_space__0return__bit__bit retlw 0 ; procedure get_white_space end ; procedure peek_character start peek_character: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 peek_character__variables__base equ global__variables__bank3+42 peek_character__bytes__base equ peek_character__variables__base+0 peek_character__bits__base equ peek_character__variables__base+1 peek_character__total__bytes equ 1 ; arguments_none peek_character__0return__byte equ peek_character__bytes__base+0 ; This procedure will look ahead to the next character input ; without actually ` reading ' it . ; call put_character < 0c'P' > ; call put_character < 0c'C' > ; call put_character < 0c'<' > ; call show_look_ahead < 0c'a' > ; if { ! have_look_ahead } start ; expression=`have_look_ahead' exp_delay=0 true_delay=0 false_delay=4 true_size=0 false_size=8 btfsc have_look_ahead__byte,have_look_ahead__bit goto label711__0end ; if { ! have_look_ahead } body start ; have_look_ahead := 1 bsf have_look_ahead__byte,have_look_ahead__bit ; look_ahead := get_byte {{ }} & ascii_mask call get_byte movf get_byte__0return__byte,w andlw 127 movwf look_ahead ; Do echo : ; call put_character {{ look_ahead }} movwf put_character__character call put_character ; if { ! have_look_ahead } body end label711__0end: ; if exp=`have_look_ahead' empty true ; Other expression=`have_look_ahead' delay=-1 ; if { ! have_look_ahead } end ; call show_look_ahead < 0c'b' > ; call put_character < 0c'>' > ; call put_character < 0c'=' > ; call put_character < look_ahead > ; call put_character < space > ; return look_ahead movf look_ahead,w movwf peek_character__0return__byte retlw 0 ; procedure peek_character end ; comment {The ` put ' procedures :} ; procedure put_character start put_character: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 put_character__variables__base equ global__variables__bank3+43 put_character__bytes__base equ put_character__variables__base+0 put_character__bits__base equ put_character__variables__base+3 put_character__total__bytes equ 3 put_character__character equ put_character__bytes__base+0 ; This procedure will send < character > out to TX - pin of port C . put_character__count equ put_character__bytes__base+1 put_character__pir1_copy equ put_character__bytes__base+2 ; pir1_copy := pir1 ; Switch from register bank 3 to register bank 0 (which contains pir1) bcf rp0___byte,rp0___bit bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 0 movf pir1,w ; Switch from register bank 0 to register bank 3 (which contains put_character__pir1_copy) bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 movwf put_character__pir1_copy ; `while ! {{ pir1_copy @ 4 }} ...' start put_character__737while__continue: ; Alias variable for select pir1_copy @ 4 put_character__pir1_copy__737select0 equ put_character__pir1_copy+0 put_character__pir1_copy__737select0__byte equ put_character__pir1_copy+0 put_character__pir1_copy__737select0__bit equ 4 ; expression=`{{ pir1_copy @ 4 }}' exp_delay=0 true_delay=2 false_delay=4 true_size=1 false_size=3 btfsc put_character__pir1_copy__737select0__byte,put_character__pir1_copy__737select0__bit goto put_character__737while__break ; Wait for transmit buffer to empty . ; pir1_copy := pir1 ; Switch from register bank 3 to register bank 0 (which contains pir1) bcf rp0___byte,rp0___bit bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 0 movf pir1,w ; Switch from register bank 0 to register bank 3 (which contains put_character__pir1_copy) bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 movwf put_character__pir1_copy goto put_character__737while__continue ; if exp=` pir1_copy @ 4 ' true goto ; Other expression=`{{ pir1_copy @ 4 }}' delay=-1 put_character__737while__break: ; `while ! {{ pir1_copy @ 4 }} ...' end ; Send the character : ; txreg := character movf put_character__character,w ; Switch from register bank 3 to register bank 0 (which contains txreg) bcf rp0___byte,rp0___bit bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 0 movwf txreg ; watch_dog_reset clrwdt ; Now wait for it to be fully sent : ; pir1_copy := pir1 movf pir1,w ; Switch from register bank 0 to register bank 3 (which contains put_character__pir1_copy) bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 movwf put_character__pir1_copy ; `while ! {{ pir1_copy @ 4 }} ...' start put_character__747while__continue: ; Alias variable for select pir1_copy @ 4 put_character__pir1_copy__747select0 equ put_character__pir1_copy+0 put_character__pir1_copy__747select0__byte equ put_character__pir1_copy+0 put_character__pir1_copy__747select0__bit equ 4 ; expression=`{{ pir1_copy @ 4 }}' exp_delay=0 true_delay=2 false_delay=4 true_size=1 false_size=3 btfsc put_character__pir1_copy__747select0__byte,put_character__pir1_copy__747select0__bit goto put_character__747while__break ; Wait for transmit buffer to empty . ; pir1_copy := pir1 ; Switch from register bank 3 to register bank 0 (which contains pir1) bcf rp0___byte,rp0___bit bcf rp1___byte,rp1___bit bcf irp___byte,irp___bit ; Register bank is now 0 movf pir1,w ; Switch from register bank 0 to register bank 3 (which contains put_character__pir1_copy) bsf rp0___byte,rp0___bit bsf rp1___byte,rp1___bit bsf irp___byte,irp___bit ; Register bank is now 3 movwf put_character__pir1_copy goto put_character__747while__continue ; if exp=` pir1_copy @ 4 ' true goto ; Other expression=`{{ pir1_copy @ 4 }}' delay=-1 put_character__747while__break: ; `while ! {{ pir1_copy @ 4 }} ...' end ; procedure put_character end retlw 0 ; procedure put_hex_address start put_hex_address: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 put_hex_address__variables__base equ global__variables__bank3+46 put_hex_address__bytes__base equ put_hex_address__variables__base+0 put_hex_address__bits__base equ put_hex_address__variables__base+2 put_hex_address__total__bytes equ 2 put_hex_address__high_byte equ put_hex_address__bytes__base+0 put_hex_address__low_byte equ put_hex_address__bytes__base+1 ; This procedure will output < high_byte > followed by < low_byte > ; as four hexadecimal digits . ; call put_hex_byte {{ high_byte }} movf put_hex_address__high_byte,w movwf put_hex_byte__byte call put_hex_byte ; call put_hex_byte {{ low_byte }} movf put_hex_address__low_byte,w movwf put_hex_byte__byte call put_hex_byte ; procedure put_hex_address end retlw 0 ; procedure put_hex_byte start put_hex_byte: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 put_hex_byte__variables__base equ global__variables__bank3+48 put_hex_byte__bytes__base equ put_hex_byte__variables__base+0 put_hex_byte__bits__base equ put_hex_byte__variables__base+1 put_hex_byte__total__bytes equ 1 put_hex_byte__byte equ put_hex_byte__bytes__base+0 ; This procedure will output < byte > as two hexadecimal digits . ; call put_hex_nibble {{ byte >> 4 }} swapf put_hex_byte__byte,w andlw 15 movwf put_hex_nibble__nibble call put_hex_nibble ; call put_hex_nibble {{ byte & 15 }} movlw 15 andwf put_hex_byte__byte,w movwf put_hex_nibble__nibble call put_hex_nibble ; procedure put_hex_byte end retlw 0 ; procedure put_hex_nibble start put_hex_nibble: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 put_hex_nibble__variables__base equ global__variables__bank3+49 put_hex_nibble__bytes__base equ put_hex_nibble__variables__base+0 put_hex_nibble__bits__base equ put_hex_nibble__variables__base+1 put_hex_nibble__total__bytes equ 1 put_hex_nibble__nibble equ put_hex_nibble__bytes__base+0 ; This procedure will output < nibble > as a hexadecimal digit . ; if { nibble < 10 } start movlw 10 subwf put_hex_nibble__nibble,w ; expression=`{ nibble < 10 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { nibble < 10 } body start ; nibble := nibble + 0c'0' movlw 48 ; 1 instructions found for sharing btfsc c___byte,c___bit ; else body start ; nibble := nibble + 0c'A' - 10 movlw 55 ; 1 instructions found for sharing ; if exp=` nibble < 10 ' single true and false skip delay=6 ; Other expression=`{ nibble < 10 }' delay=6 ; 1 shared instructions follow addwf put_hex_nibble__nibble,f ; if { nibble < 10 } end ; call put_character {{ nibble }} movf put_hex_nibble__nibble,w movwf put_character__character call put_character ; procedure put_hex_nibble end retlw 0 ; procedure put_new_line start put_new_line: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 put_new_line__variables__base equ global__variables__bank3+50 put_new_line__bytes__base equ put_new_line__variables__base+0 put_new_line__bits__base equ put_new_line__variables__base+0 put_new_line__total__bytes equ 0 ; arguments_none ; This procedure will output a carriage - return line - feed pair . ; call put_character {{ carriage_return }} movlw 13 movwf put_character__character call put_character ; call put_character {{ line_feed }} movlw 10 movwf put_character__character call put_character ; procedure put_new_line end retlw 0 ; procedure put_space start put_space: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 put_space__variables__base equ global__variables__bank3+50 put_space__bytes__base equ put_space__variables__base+0 put_space__bits__base equ put_space__variables__base+0 put_space__total__bytes equ 0 ; arguments_none ; call put_character {{ space }} movlw 32 movwf put_character__character call put_character ; procedure put_space end retlw 0 ; procedure delay start ; optimize 0 delay: ; Procedure must be called with RP0, RP1, and IRP set to register bank 3 ; Procedure must be called with PCLATH set to code bank 0 delay__variables__base equ global__variables__bank3+50 delay__bytes__base equ delay__variables__base+0 delay__bits__base equ delay__variables__base+1 delay__total__bytes equ 1 delay__806byte1 equ delay__bytes__base+0 ; arguments_none ; uniform_delay instructions_per_delay ; Uniform delay remaining = 690 Accumulated Delay = 0 ; Uniform delay remaining = 690 Accumulated Delay = 0 ; Delay 1 third of a bit : ; Uniform delay remaining = 690 Accumulated Delay = 0 ; watch_dog_reset clrwdt ; Uniform delay remaining = 689 Accumulated Delay = 1 ; Uniform delay remaining = 689 Accumulated Delay = 1 ; Uniform delay remaining = 689 Accumulated Delay = 1 ; Soak up remaining 689 cycles ; Delay 689 cycles movlw 229 movwf delay__806byte1 delay__806delay0: decfsz delay__806byte1,f goto delay__806delay0 nop ; procedure delay end retlw 0 ; optimize 1 ; Register bank 0 used 2 bytes of 96 available bytes ; Register bank 1 used 0 bytes of 80 available bytes ; Register bank 2 used 0 bytes of 96 available bytes ; Register bank 3 used 51 bytes of 96 available bytes end