radix dec global__variables__bank0 equ 8 global__variables__bank1 equ 48 global__variables__bank2 equ 80 global__variables__bank3 equ 112 global__bit__variables__bank0 equ 30 global__bit__variables__bank1 equ 61 global__bit__variables__bank2 equ 80 global__bit__variables__bank3 equ 112 indf___register equ 0 pcl___register equ 2 c___byte equ 3 c___bit equ 0 z___byte equ 3 z___bit equ 2 ; On 12-bit PIC's, RP0 is actually bit 5 in FSR (=4) rp0___byte equ 4 rp0___bit equ 5 ; On 12-bit PIC's, RP1 is actually bit 6 in FSR (=4) rp1___byte equ 4 rp1___bit equ 6 ; On 12-bit PIC's, PA0 is actually bit 5 in STATUS (=3) pa0___byte equ 3 pa0___bit equ 5 fsr___register equ 4 org 0 start: ; Use oscillator calibration value already in register W movwf 5 ; Initialize TRIS registers movlw 204 tris 6 movlw 241 tris 7 ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto main ; comment ############################################################################# ; comment {} ; comment {Copyright < c > 2000 - 2001 by Wayne C . Gramlich & William T . Benson .} ; comment {All rights reserved .} ; comment {} ; comment {Permission to use , copy , modify , distribute , and sell this software} ; comment {for any purpose is hereby granted without fee provided that the above} ; comment {copyright notice and this permission are retained . The author makes} ; comment {no representations about the suitability of this software for any purpose .} ; comment {It is provided { as is } without express or implied warranty .} ; comment {} ; comment {This is the code that implements the Motor2 RoboBrick . Basically} ; comment {it just waits for commands that come in at 2400 baud and responds} ; comment {to them . See :} ; comment {} ; comment {http : / / web . gramlich . net / projects / robobricks / motor2 / index . html} ; comment {} ; comment {for more details .} ; comment {} ; comment ############################################################################# ; processor pic16c505 cp = off wdte = on mclre = off fosc = intrc_no_clock ; 4052=0xfd4 4095=0xfff __config 4052 configuration___address equ 4095 ; comment {Define processor constants :} ; constant clock_rate 4000000 clock_rate equ 4000000 ; constant clocks_per_instruction 4 clocks_per_instruction equ 4 ; constant instruction_rate clock_rate / clocks_per_instruction instruction_rate equ 1000000 ; comment {Define serial communication control constants :} ; constant baud_rate 2400 baud_rate equ 2400 ; constant instructions_per_bit instruction_rate / baud_rate instructions_per_bit equ 416 ; constant delays_per_bit 3 delays_per_bit equ 3 ; constant instructions_per_delay instructions_per_bit / delays_per_bit instructions_per_delay equ 138 ; comment {Most RoboBricks use 9 cycles per loop , but this one needs 12 :} ; constant extra_instructions_per_bit 12 extra_instructions_per_bit equ 12 ; constant extra_instructions_per_delay extra_instructions_per_bit / delays_per_bit extra_instructions_per_delay equ 4 ; constant delay_instructions instructions_per_delay - extra_instructions_per_delay delay_instructions equ 134 ; comment {Register definitions :} ; comment {TMR0 register :} tmr0 equ 1 ; comment {STATUS register :} status equ 3 ; bind c status @ 0 c equ status+0 c__byte equ status+0 c__bit equ 0 ; bind z status @ 2 z equ status+0 z__byte equ status+0 z__bit equ 2 ; comment {OSCCAL register :} osccal equ 5 ; constant osccal_unit 4 osccal_unit equ 4 ; comment {On the 505 , the OPTION register is only setable via the option instrucition .} ; constant rbwu_bit 7 rbwu_bit equ 7 ; constant rbpu_bit 6 rbpu_bit equ 6 ; constant t0cs_bit 5 t0cs_bit equ 5 ; constant t0se_bit 4 t0se_bit equ 4 ; constant psa_bit 3 psa_bit equ 3 ; constant ps2_bit 2 ps2_bit equ 2 ; constant ps1_bit 1 ps1_bit equ 1 ; constant ps0_bit 0 ps0_bit equ 0 ; constant rbuw_mask {{ 1 << rbwu_bit }} rbuw_mask equ 128 ; constant rbpu_mask {{ 1 << rbpu_bit }} rbpu_mask equ 64 ; constant t0cs_mask {{ 1 << t0cs_bit }} t0cs_mask equ 32 ; constant t0se_mask {{ 1 << t0se_bit }} t0se_mask equ 16 ; comment {Disable Wake - up and pull - ups {;} set timer to internal {;} edge_source to raising :} ; constant option_mask rbuw_mask | rbpu_mask option_mask equ 192 ; comment {Define port bit assignments} ; constant motor0a_bit 0 motor0a_bit equ 0 ; constant motor0b_bit 1 motor0b_bit equ 1 ; constant motor1a_bit 4 motor1a_bit equ 4 ; constant motor1b_bit 5 motor1b_bit equ 5 ; constant serial_in_bit 0 serial_in_bit equ 0 ; constant serial_out_bit 1 serial_out_bit equ 1 ; constant motor0e_bit 2 motor0e_bit equ 2 ; constant motor1e_bit 3 motor1e_bit equ 3 portb equ 6 portc equ 7 motor0a__byte equ 6 motor0a__bit equ 0 motor0b__byte equ 6 motor0b__bit equ 1 motor1a__byte equ 6 motor1a__bit equ 4 motor1b__byte equ 6 motor1b__bit equ 5 serial_in__byte equ 7 serial_in__bit equ 0 serial_out__byte equ 7 serial_out__bit equ 1 motor0e__byte equ 7 motor0e__bit equ 2 motor1e__byte equ 7 motor1e__bit equ 3 ; constant motor0a_mask {{ 1 << motor0a_bit }} motor0a_mask equ 1 ; constant motor0b_mask {{ 1 << motor0b_bit }} motor0b_mask equ 2 ; constant motor1a_mask {{ 1 << motor1a_bit }} motor1a_mask equ 16 ; constant motor1b_mask {{ 1 << motor1b_bit }} motor1b_mask equ 32 ; constant serial_in_mask {{ 1 << serial_in_bit }} serial_in_mask equ 1 ; constant serial_out_mask {{ 1 << serial_out_bit }} serial_out_mask equ 2 ; constant motor0e_mask {{ 1 << motor0e_bit }} motor0e_mask equ 4 ; constant motor1e_mask {{ 1 << motor1e_bit }} motor1e_mask equ 8 ; comment {Define duty cycle and motor on / off masks :} actual_speed0 equ global__variables__bank0+0 actual_speed1 equ global__variables__bank0+1 motor0_off equ global__variables__bank0+2 motor0_on equ global__variables__bank0+3 motor1_off equ global__variables__bank0+4 motor1_on equ global__variables__bank0+5 ; comment {Ramp variables :} desired_speed0 equ global__variables__bank0+6 desired_speed1 equ global__variables__bank0+7 ramp0 equ global__variables__bank0+8 ramp1 equ global__variables__bank0+9 ramp0_delay equ global__variables__bank0+10 ramp1_delay equ global__variables__bank0+11 ramp0_offset equ global__variables__bank0+12 ramp1_offset equ global__variables__bank0+13 ; comment {Fail safe variables :} fail_safe equ global__variables__bank0+14 fail_safe_errors equ global__variables__bank0+15 fail_safe_high_counter equ global__variables__bank0+16 fail_safe_low_counter equ global__variables__bank0+17 ; comment {Mode < pulsed vs . continuous > bits :} motor0_mode equ global__bit__variables__bank0+0 motor0_mode__byte equ global__bit__variables__bank0+0 motor0_mode__bit equ 0 motor1_mode equ global__bit__variables__bank0+0 motor1_mode__byte equ global__bit__variables__bank0+0 motor1_mode__bit equ 1 motor0_direction equ global__bit__variables__bank0+0 motor0_direction__byte equ global__bit__variables__bank0+0 motor0_direction__bit equ 2 motor1_direction equ global__bit__variables__bank0+0 motor1_direction__byte equ global__bit__variables__bank0+0 motor1_direction__bit equ 3 ; bank 1 ; Default register bank is now 1 ; comment {Shared command registers and option :} glitch equ global__variables__bank1+0 id_index equ global__variables__bank1+1 option equ global__variables__bank1+2 ; string_constants Start ; Switch from code bank 1 to code bank 0 before possible transfer (label) bcf pa0___byte,pa0___bit string___fetch: movwf pcl___register ; id = 1 , 0 , 14 , 0 , 0 , 0 , 0 , 0 , 0r'16' , 7 , 0s'Motor2B' , 15 , 0s'Gramlich&Benson' id___string equ 0 id: addwf pcl___register,f ; Length = 48 retlw 48 ; 1 retlw 1 ; 0 retlw 0 ; 14 retlw 14 ; 0 retlw 0 ; 0 retlw 0 ; 0 retlw 0 ; 0 retlw 0 ; 0 retlw 0 ; 0r'16' retlw 188 ; random number retlw 124 ; random number retlw 255 ; random number retlw 96 ; random number retlw 204 ; random number retlw 79 ; random number retlw 69 ; random number retlw 236 ; random number retlw 111 ; random number retlw 226 ; random number retlw 201 ; random number retlw 91 ; random number retlw 33 ; random number retlw 15 ; random number retlw 125 ; random number retlw 137 ; random number ; 7 retlw 7 ; `Motor2B' retlw 77 retlw 111 retlw 116 retlw 111 retlw 114 retlw 50 retlw 66 ; 15 retlw 15 ; `Gramlich&Benson' retlw 71 retlw 114 retlw 97 retlw 109 retlw 108 retlw 105 retlw 99 retlw 104 retlw 38 retlw 66 retlw 101 retlw 110 retlw 115 retlw 111 retlw 110 ; string__constants End ; comment {For now put all the smaller routines first so that they can live} ; comment {within the first 256 bytes of main memory . The PIC12C5xx chips} ; comment {can only call routines that are within the first 256 bytes < i . e .} ; comment {the first half > of the code page .} ; bank 1 ; Default register bank is now 1 ; comment {Globals :} receiving equ global__bit__variables__bank1+0 receiving__byte equ global__bit__variables__bank1+0 receiving__bit equ 0 ; procedure get_byte start get_byte: ; Procedure must be called with RP0, RP1, and IRP set to register bank 1 ; Procedure must be called with PCLATH set to code bank 0 get_byte__variables__base equ global__variables__bank1+3 get_byte__bytes__base equ get_byte__variables__base+0 get_byte__bits__base equ get_byte__variables__base+3 get_byte__total__bytes equ 4 ; arguments_none get_byte__0return__byte equ get_byte__bytes__base+0 ; Wait for a character and return it . ; The get_byte < > procedure only waits for 9 - 2 / 3 bits . That ; way the next call to get_byte < > will sychronize on the start ; bit instead of possibly starting a little later . get_byte__count equ get_byte__bytes__base+1 get_byte__char equ get_byte__bytes__base+2 ; Wait for start bit : ; receiving := 1 bsf receiving__byte,receiving__bit ; `while serial_in ...' start get_byte__163while__continue: ; expression=`serial_in' exp_delay=0 true_delay=1 false_delay=2 true_size=2 false_size=1 btfss serial_in__byte,serial_in__bit goto get_byte__163while__break ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 goto get_byte__163while__continue ; if exp=`serial_in' false goto ; Other expression=`serial_in' delay=-1 get_byte__163while__break: ; `while serial_in ...' end ; 3 cycles to escape loop : ; Skip over start bit : ; 1 cycle to code bank switch : ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; call delay {{ }} call delay ; call delay {{ }} call delay ; 1 cycle to code bank switch back : ; Sample in the middle third of each data bit : ; 1 cycle : ; char := 0 ; Switch from register bank 0 to register bank 1 (which contains get_byte__char) bsf rp0___byte,rp0___bit ; Register bank is now 1 clrf get_byte__char ; 2 cycles to set up loop : ; 3 + 1 + 1 + 1 + 2 = 8 ; `count_down count 8 ...' start movlw 8 movwf get_byte__count get_byte__180_loop: ; 1 cycle to code bank switch : ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; 1 cycle to code bank switch back : ; 2 cycles : ; char := char >> 1 bcf c___byte,c___bit ; Switch from register bank 0 to register bank 1 (which contains get_byte__char) bsf rp0___byte,rp0___bit ; Register bank is now 1 rrf get_byte__char,f ; 2 cycles : ; if { serial_in } start ; expression=`{ serial_in }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc serial_in__byte,serial_in__bit ; if { serial_in } body start ; char @ 7 := 1 ; Select char @ 7 get_byte__char__188select0 equ get_byte__char+0 get_byte__char__188select0__byte equ get_byte__char+0 get_byte__char__188select0__bit equ 7 bsf get_byte__char__188select0__byte,get_byte__char__188select0__bit ; if { serial_in } body end ; if exp=`serial_in' false skip delay=2 ; Other expression=`{ serial_in }' delay=2 ; if { serial_in } end ; 1 cycle to code bank switch : ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; call delay {{ }} call delay ; 1 cycle to code bank switch back : ; 3 cycles at end of loop for test and branch : ; 1 + 1 + 2 + 2 + 1 + 1 + 3 = 11 ; nop extra_instructions_per_bit - 11 ; Delay 1 cycles nop ; Switch from register bank 0 to register bank 1 (which contains get_byte__count) bsf rp0___byte,rp0___bit ; Register bank is now 1 decfsz get_byte__count,f goto get_byte__180_loop get_byte__180_done: ; `count_down count 8 ...' end ; Skip over 2 / 3 ' s of stop bit : ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; call delay {{ }} call delay ; return char ; Switch from register bank 0 to register bank 1 (which contains get_byte__char) bsf rp0___byte,rp0___bit ; Register bank is now 1 movf get_byte__char,w movwf get_byte__0return__byte retlw 0 ; procedure get_byte end ; procedure send_byte start send_byte: ; Procedure must be called with RP0, RP1, and IRP set to register bank 1 ; Procedure must be called with PCLATH set to code bank 0 send_byte__variables__base equ global__variables__bank1+7 send_byte__bytes__base equ send_byte__variables__base+0 send_byte__bits__base equ send_byte__variables__base+3 send_byte__total__bytes equ 3 send_byte__237byte1 equ send_byte__bytes__base+2 send_byte__char equ send_byte__bytes__base+0 ; Send < char > to < tx > : send_byte__count equ send_byte__bytes__base+1 ; < receiving > will be 1 if the last get / put routine was a get . ; Before we start transmitting a response back , we want to ensure ; that there has been enough time to turn the line line around . ; We delay the first 1 / 3 of a bit to pad out the 9 - 2 / 3 bits from ; for get_byte to 10 bits . We delay another 1 / 3 of a bit just ; for good measure . Technically , the second call to delay < > ; is not really needed . ; if { receiving } start ; expression=`{ receiving }' exp_delay=0 true_delay=-1 false_delay=0 true_size=3 false_size=0 btfss receiving__byte,receiving__bit goto label221__0end ; if { receiving } body start ; receiving := 0 bcf receiving__byte,receiving__bit ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; call delay {{ }} call delay ; if { receiving } body end ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 label221__0end: ; if exp=`receiving' empty false ; Other expression=`{ receiving }' delay=-1 ; if { receiving } end ; Send the start bit : ; 1 cycle : ; serial_out := 0 bcf serial_out__byte,serial_out__bit ; 1 cycle for code bank switch : ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; call delay {{ }} call delay ; call delay {{ }} call delay ; 1 cycle for code bank switch : ; 2 cycles for loop setup : ; 1 + 1 + 1 + 2 = 5 ; nop extra_instructions_per_bit - 5 ; Delay 7 cycles movlw 2 ; Switch from register bank 0 to register bank 1 (which contains send_byte__237byte1) bsf rp0___byte,rp0___bit ; Register bank is now 1 movwf send_byte__237byte1 send_byte__237delay0: decfsz send_byte__237byte1,f goto send_byte__237delay0 ; Send the data : ; `count_down count 8 ...' start movlw 8 movwf send_byte__count send_byte__240_loop: ; 4 cycles : ; serial_out := char @ 0 ; Alias variable for select char @ 0 send_byte__char__242select0 equ send_byte__char+0 send_byte__char__242select0__byte equ send_byte__char+0 send_byte__char__242select0__bit equ 0 btfss send_byte__char__242select0__byte,send_byte__char__242select0__bit bcf serial_out__byte,serial_out__bit btfsc send_byte__char__242select0__byte,send_byte__char__242select0__bit bsf serial_out__byte,serial_out__bit ; 2 cycles : ; char := char >> 1 bcf c___byte,c___bit rrf send_byte__char,f ; 1 cycle for code bank switch : ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; call delay {{ }} call delay ; call delay {{ }} call delay ; 1 cycle for code bank switch : ; Test and jump at end of loop takes 3 cycles : ; 4 + 2 + 1 + 1 + 3 = 11 ; nop extra_instructions_per_bit - 11 ; Delay 1 cycles nop ; Switch from register bank 0 to register bank 1 (which contains send_byte__count) bsf rp0___byte,rp0___bit ; Register bank is now 1 decfsz send_byte__count,f goto send_byte__240_loop send_byte__240_done: ; `count_down count 8 ...' end ; Send the stop bit : ; 1 cycle extra needed to balance loop : ; nop 1 ; Delay 1 cycles nop ; 1 cycle : ; serial_out := 1 bsf serial_out__byte,serial_out__bit ; 1 cycle for code bank switch : ; call delay {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 call delay ; call delay {{ }} call delay ; call delay {{ }} call delay ; 1 cycle for code bank switch : ; 2 cycles for call / return : ; 2 cycles for argument ; 1 + 1 + 1 + 2 + 2 = 7 ; nop extra_instructions_per_bit - 7 ; Delay 5 cycles nop nop nop nop nop ; procedure send_byte end ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 retlw 0 ; bank 0 ; Default register bank is now 0 ; procedure set_up start set_up: ; Procedure must be called with RP0, RP1, and IRP set to register bank 0 ; Procedure must be called with PCLATH set to code bank 0 set_up__variables__base equ global__variables__bank0+18 set_up__bytes__base equ set_up__variables__base+0 set_up__bits__base equ set_up__variables__base+0 set_up__total__bytes equ 1 ; arguments_none ; This procedure will set the speed of motor to speed . ; Reset failsafe : ; fail_safe_low_counter := 0 clrf fail_safe_low_counter ; fail_safe_high_counter := fail_safe movf fail_safe,w movwf fail_safe_high_counter ; Mode Dir On Off ; = = = = = = = = = = = = = = = = = = ; 0 0 A 0 ; 0 1 B 0 ; 1 0 A B ; 1 1 B A ; Motor 0 : ; if { ramp0 = 0 } start movf ramp0,w ; expression=`{ ramp0 = 0 }' exp_delay=1 true_delay=4 false_delay=7 true_size=4 false_size=7 btfss z___byte,z___bit goto label291__0false label291__0true: ; if { ramp0 = 0 } body start ; No ramping : ; actual_speed0 := desired_speed0 movf desired_speed0,w movwf actual_speed0 ; ramp0_delay := 0 clrf ramp0_delay ; ramp0_offset := 0 clrf ramp0_offset ; if { ramp0 = 0 } body end goto label291__0end label291__0false: ; else body start ; Ramping : ; if { desired_speed0 < actual_speed0 } start movf actual_speed0,w subwf desired_speed0,w ; expression=`{ desired_speed0 < actual_speed0 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { desired_speed0 < actual_speed0 } body start ; ramp0_offset := 0xff movlw 255 ; 1 instructions found for sharing btfsc c___byte,c___bit ; else body start ; ramp0_offset := 1 movlw 1 ; 1 instructions found for sharing ; if exp=` desired_speed0 < actual_speed0 ' single true and false skip delay=6 ; Other expression=`{ desired_speed0 < actual_speed0 }' delay=6 ; 1 shared instructions follow movwf ramp0_offset ; if { desired_speed0 < actual_speed0 } end ; else body end ; if exp=` ramp0 = 0 ' generic label291__0end: ; Other expression=`{ ramp0 = 0 }' delay=-1 ; if { ramp0 = 0 } end ; FIXME : do a motor0_off := 0 and delete the appropriate statements below ; ; if { motor0_direction } start ; expression=`{ motor0_direction }' exp_delay=0 true_delay=-2 false_delay=-2 true_size=7 false_size=7 btfss motor0_direction__byte,motor0_direction__bit goto label305__0false label305__0true: ; if { motor0_direction } body start ; Direction = 1 < Backward > : ; if { motor0_mode } start ; expression=`{ motor0_mode }' exp_delay=0 true_delay=2 false_delay=1 true_size=2 false_size=1 btfsc motor0_mode__byte,motor0_mode__bit goto label307__0true label307__0false: ; else body start ; Mode = 0 < Pulsed > ; motor0_off := 0 clrf motor0_off ; else body end goto label307__0end label307__0true: ; if { motor0_mode } body start ; Mode = 1 < Continuous > : ; motor0_off := motor0a_mask movlw 1 movwf motor0_off ; if { motor0_mode } body end ; if exp=`motor0_mode' generic label307__0end: ; Other expression=`{ motor0_mode }' delay=-1 ; if { motor0_mode } end ; motor0_on := motor0b_mask movlw 2 ; 1 instructions found for sharing goto label305__0end label305__0false: ; else body start ; Direction = 0 < Forward > : ; if { motor0_mode } start ; expression=`{ motor0_mode }' exp_delay=0 true_delay=2 false_delay=1 true_size=2 false_size=1 btfsc motor0_mode__byte,motor0_mode__bit goto label317__0true label317__0false: ; else body start ; Mode = 0 < Pulsed > : ; motor0_off := 0 clrf motor0_off ; else body end goto label317__0end label317__0true: ; if { motor0_mode } body start ; Mode = 1 < Continuous > : ; motor0_off := motor0b_mask movlw 2 movwf motor0_off ; if { motor0_mode } body end ; if exp=`motor0_mode' generic label317__0end: ; Other expression=`{ motor0_mode }' delay=-1 ; if { motor0_mode } end ; motor0_on := motor0a_mask movlw 1 ; 1 instructions found for sharing ; if exp=`motor0_direction' generic label305__0end: ; Other expression=`{ motor0_direction }' delay=-1 ; 1 shared instructions follow movwf motor0_on ; if { motor0_direction } end ; Motor1 : ; if { ramp1 = 0 } start movf ramp1,w ; expression=`{ ramp1 = 0 }' exp_delay=1 true_delay=4 false_delay=7 true_size=4 false_size=7 btfss z___byte,z___bit goto label328__0false label328__0true: ; if { ramp1 = 0 } body start ; No ramping : ; actual_speed1 := desired_speed1 movf desired_speed1,w movwf actual_speed1 ; ramp1_delay := 0 clrf ramp1_delay ; ramp1_offset := 0 clrf ramp1_offset ; if { ramp1 = 0 } body end goto label328__0end label328__0false: ; else body start ; Ramping : ; if { desired_speed1 < actual_speed1 } start movf actual_speed1,w subwf desired_speed1,w ; expression=`{ desired_speed1 < actual_speed1 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { desired_speed1 < actual_speed1 } body start ; ramp1_offset := 0xff movlw 255 ; 1 instructions found for sharing btfsc c___byte,c___bit ; else body start ; ramp1_offset := 1 movlw 1 ; 1 instructions found for sharing ; if exp=` desired_speed1 < actual_speed1 ' single true and false skip delay=6 ; Other expression=`{ desired_speed1 < actual_speed1 }' delay=6 ; 1 shared instructions follow movwf ramp1_offset ; if { desired_speed1 < actual_speed1 } end ; else body end ; if exp=` ramp1 = 0 ' generic label328__0end: ; Other expression=`{ ramp1 = 0 }' delay=-1 ; if { ramp1 = 0 } end ; FIXME : do a motor1 := 0 here and delete the appropriate statements below : ; if { motor1_direction } start ; expression=`{ motor1_direction }' exp_delay=0 true_delay=-2 false_delay=-2 true_size=7 false_size=7 btfss motor1_direction__byte,motor1_direction__bit goto label342__0false label342__0true: ; if { motor1_direction } body start ; Direction = 1 < Backward > : ; if { motor1_mode } start ; expression=`{ motor1_mode }' exp_delay=0 true_delay=2 false_delay=1 true_size=2 false_size=1 btfsc motor1_mode__byte,motor1_mode__bit goto label344__0true label344__0false: ; else body start ; Mode = 1 < Pulsed > ; motor1_off := 0 clrf motor1_off ; else body end goto label344__0end label344__0true: ; if { motor1_mode } body start ; Mode = 1 < Continuous > : ; motor1_off := motor1a_mask movlw 16 movwf motor1_off ; if { motor1_mode } body end ; if exp=`motor1_mode' generic label344__0end: ; Other expression=`{ motor1_mode }' delay=-1 ; if { motor1_mode } end ; motor1_on := motor1b_mask movlw 32 ; 1 instructions found for sharing goto label342__0end label342__0false: ; else body start ; Direction = 0 < Forward > : ; if { motor1_mode } start ; expression=`{ motor1_mode }' exp_delay=0 true_delay=2 false_delay=1 true_size=2 false_size=1 btfsc motor1_mode__byte,motor1_mode__bit goto label354__0true label354__0false: ; else body start ; Mode = 0 < Pulsed > : ; motor1_off := 0 clrf motor1_off ; else body end goto label354__0end label354__0true: ; if { motor1_mode } body start ; Mode = 1 < Continuous > : ; motor1_off := motor1b_mask movlw 32 movwf motor1_off ; if { motor1_mode } body end ; if exp=`motor1_mode' generic label354__0end: ; Other expression=`{ motor1_mode }' delay=-1 ; if { motor1_mode } end ; motor1_on := motor1a_mask movlw 16 ; 1 instructions found for sharing ; if exp=`motor1_direction' generic label342__0end: ; Other expression=`{ motor1_direction }' delay=-1 ; 1 shared instructions follow movwf motor1_on ; if { motor1_direction } end ; procedure set_up end retlw 0 ; bank 1 ; Default register bank is now 1 ; comment {This is kind of ugly . The main routine pretty much fills up all} ; comment {of code bank 1 . We need a little extra space . So we push global} ; comment {variable initialization off to this little chunk of code in code} ; comment {bank 0 . Not pretty .} ; procedure reset start reset: ; Procedure must be called with RP0, RP1, and IRP set to register bank 1 ; Procedure must be called with PCLATH set to code bank 0 reset__variables__base equ global__variables__bank1+10 reset__bytes__base equ reset__variables__base+0 reset__bits__base equ reset__variables__base+0 reset__total__bytes equ 0 ; arguments_none ; FIXME : By a little careful global rearrangement , it should be possible ; to use a loop to initialize everything . It is quite likely that it is ; OK to just zero out all veriables < except option . > ; Totally blast bank 0 : ; Initialize everything else : ; motor0e := 1 bsf motor0e__byte,motor0e__bit ; motor1e := 1 bsf motor1e__byte,motor1e__bit ; actual_speed0 := 0 clrf actual_speed0 ; actual_speed1 := 0 clrf actual_speed1 ; motor0_off := 0 clrf motor0_off ; motor0_on := 0 clrf motor0_on ; motor1_off := 0 clrf motor1_off ; motor1_on := 0 clrf motor1_on ; desired_speed0 := 0 clrf desired_speed0 ; desired_speed1 := 0 clrf desired_speed1 ; ramp0 := 0 ; Switch from register bank 1 to register bank 0 (which contains ramp0) bcf rp0___byte,rp0___bit ; Register bank is now 0 clrf ramp0 ; ramp1 := 0 clrf ramp1 ; ramp0_delay := 0 clrf ramp0_delay ; ramp1_delay := 0 clrf ramp1_delay ; ramp0_offset := 0 clrf ramp0_offset ; ramp1_offset := 0 clrf ramp1_offset ; motor0_direction := 0 bcf motor0_direction__byte,motor0_direction__bit ; motor1_direction := 0 bcf motor1_direction__byte,motor1_direction__bit ; motor0_mode := 0 bcf motor0_mode__byte,motor0_mode__bit ; motor1_mode := 0 bcf motor1_mode__byte,motor1_mode__bit ; fail_safe := 0 clrf fail_safe ; fail_safe_errors := 0 clrf fail_safe_errors ; fail_safe_high_counter := 0 clrf fail_safe_high_counter ; fail_safe_low_counter := 0 clrf fail_safe_low_counter ; glitch := 0 ; Switch from register bank 0 to register bank 1 (which contains glitch) bsf rp0___byte,rp0___bit ; Register bank is now 1 clrf glitch ; id_index := 0 clrf id_index ; Initialize the OPTION register : ; option := option_mask movlw 192 movwf option ; Now option_mask is in W : ; inline assembly statements begin option ; inline assembly statements end ; procedure reset end retlw 0 ; bank 0 ; Default register bank is now 0 ; procedure delay start ; optimize 0 delay: ; Procedure must be called with RP0, RP1, and IRP set to register bank 0 ; Procedure must be called with PCLATH set to code bank 0 delay__variables__base equ global__variables__bank0+19 delay__bytes__base equ delay__variables__base+0 delay__bits__base equ delay__variables__base+3 delay__total__bytes equ 3 delay__504byte2 equ delay__bytes__base+2 delay__449byte2 equ delay__bytes__base+2 delay__421byte1 equ delay__bytes__base+2 delay__482byte2 equ delay__bytes__base+2 delay__451byte2 equ delay__bytes__base+2 delay__452byte2 equ delay__bytes__base+2 ; arguments_none ; uniform_delay delay_instructions ; Uniform delay remaining = 130 Accumulated Delay = 0 ; Uniform delay remaining = 130 Accumulated Delay = 0 ; Delay for 1 / 3 of a bit time . ; Uniform delay remaining = 130 Accumulated Delay = 0 ; Uniform delay remaining = 130 Accumulated Delay = 0 delay__motor0 equ delay__bytes__base+0 ; Uniform delay remaining = 130 Accumulated Delay = 0 delay__motor1 equ delay__bytes__base+1 ; Uniform delay remaining = 130 Accumulated Delay = 0 ; Uniform delay remaining = 130 Accumulated Delay = 0 ; Kick the dog : ; Uniform delay remaining = 130 Accumulated Delay = 0 ; watch_dog_reset clrwdt ; Uniform delay remaining = 129 Accumulated Delay = 1 ; Uniform delay remaining = 129 Accumulated Delay = 1 ; This is the first probe of TMR0 : ; Uniform delay remaining = 129 Accumulated Delay = 1 ; if { tmr0 < actual_speed0 } start movf actual_speed0,w subwf tmr0,w ; expression=`{ tmr0 < actual_speed0 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { tmr0 < actual_speed0 } body start ; Uniform delay remaining = 129 Accumulated Delay = 0 ; motor0 := motor0_on movf motor0_on,w ; 1 instructions found for sharing ; Uniform delay remaining = 127 Accumulated Delay = 2 ; if { tmr0 < actual_speed0 } body end btfsc c___byte,c___bit ; else body start ; Uniform delay remaining = 129 Accumulated Delay = 0 ; motor0 := motor0_off movf motor0_off,w ; 1 instructions found for sharing ; Uniform delay remaining = 127 Accumulated Delay = 2 ; else body end ; if exp=` tmr0 < actual_speed0 ' single true and false skip delay=6 ; Other expression=`{ tmr0 < actual_speed0 }' delay=6 ; 1 shared instructions follow movwf delay__motor0 ; if { tmr0 < actual_speed0 } end ; Uniform delay remaining = 122 Accumulated Delay = 8 ; if { tmr0 < actual_speed1 } start movf actual_speed1,w subwf tmr0,w ; expression=`{ tmr0 < actual_speed1 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { tmr0 < actual_speed1 } body start ; Uniform delay remaining = 122 Accumulated Delay = 0 ; motor1 := motor1_on movf motor1_on,w ; 1 instructions found for sharing ; Uniform delay remaining = 120 Accumulated Delay = 2 ; if { tmr0 < actual_speed1 } body end btfsc c___byte,c___bit ; else body start ; Uniform delay remaining = 122 Accumulated Delay = 0 ; motor1 := motor1_off movf motor1_off,w ; 1 instructions found for sharing ; Uniform delay remaining = 120 Accumulated Delay = 2 ; else body end ; if exp=` tmr0 < actual_speed1 ' single true and false skip delay=6 ; Other expression=`{ tmr0 < actual_speed1 }' delay=6 ; 1 shared instructions follow movwf delay__motor1 ; if { tmr0 < actual_speed1 } end ; Uniform delay remaining = 115 Accumulated Delay = 15 ; portb := motor1 | motor0 movf delay__motor1,w iorwf delay__motor0,w movwf portb ; Uniform delay remaining = 112 Accumulated Delay = 18 ; Uniform delay remaining = 112 Accumulated Delay = 18 ; First check out < fail_safe_counter > : ; Uniform delay remaining = 112 Accumulated Delay = 18 ; fail_safe_low_counter := fail_safe_low_counter - 1 decf fail_safe_low_counter,f ; Uniform delay remaining = 111 Accumulated Delay = 19 ; if { z } start ; expression=`{ z }' exp_delay=0 true_delay=17 false_delay=0 true_size=28 false_size=0 btfsc z__byte,z__bit goto label449__0true label449__0false: ; Delay 16 cycles movlw 5 movwf delay__449byte2 delay__449delay1: decfsz delay__449byte2,f goto delay__449delay1 goto label449__0end label449__0true: ; if { z } body start ; Uniform delay remaining = 111 Accumulated Delay = 0 ; fail_safe_high_counter := fail_safe_high_counter - 1 decf fail_safe_high_counter,f ; Uniform delay remaining = 110 Accumulated Delay = 1 ; if { z } start ; expression=`{ z }' exp_delay=0 true_delay=13 false_delay=0 true_size=18 false_size=0 btfsc z__byte,z__bit goto label451__0true label451__0false: ; Delay 12 cycles movlw 3 movwf delay__451byte2 delay__451delay1: decfsz delay__451byte2,f goto delay__451delay1 nop nop goto label451__0end label451__0true: ; if { z } body start ; Uniform delay remaining = 110 Accumulated Delay = 0 ; if { fail_safe != 0 } start movf fail_safe,w ; expression=`{ fail_safe != 0 }' exp_delay=1 true_delay=9 false_delay=0 true_size=9 false_size=0 btfss z___byte,z___bit goto label452__0true label452__0false: ; Delay 8 cycles movlw 2 movwf delay__452byte2 delay__452delay1: decfsz delay__452byte2,f goto delay__452delay1 nop goto label452__0end label452__0true: ; if { fail_safe != 0 } body start ; Uniform delay remaining = 110 Accumulated Delay = 0 ; Turn the motors off : ; Uniform delay remaining = 110 Accumulated Delay = 0 ; motor0_on := 0 clrf motor0_on ; Uniform delay remaining = 109 Accumulated Delay = 1 ; motor0_off := 0 clrf motor0_off ; Uniform delay remaining = 108 Accumulated Delay = 2 ; motor1_on := 0 clrf motor1_on ; Uniform delay remaining = 107 Accumulated Delay = 3 ; motor1_off := 0 clrf motor1_off ; Uniform delay remaining = 106 Accumulated Delay = 4 ; desired_speed0 := 0 clrf desired_speed0 ; Uniform delay remaining = 105 Accumulated Delay = 5 ; desired_speed1 := 0 clrf desired_speed1 ; Uniform delay remaining = 104 Accumulated Delay = 6 ; actual_speed0 := 0 clrf actual_speed0 ; Uniform delay remaining = 103 Accumulated Delay = 7 ; actual_speed0 := 0 clrf actual_speed0 ; Uniform delay remaining = 102 Accumulated Delay = 8 ; fail_safe_errors := fail_safe_errors + 1 incf fail_safe_errors,f ; Uniform delay remaining = 101 Accumulated Delay = 9 ; Uniform delay remaining = 101 Accumulated Delay = 9 ; if { fail_safe != 0 } body end ; if exp=` fail_safe != 0 ' total delay=13 ; if exp=` fail_safe != 0 ' generic label452__0end: ; Other expression=`{ fail_safe != 0 }' delay=13 ; if { fail_safe != 0 } end ; Uniform delay remaining = 97 Accumulated Delay = 13 ; Uniform delay remaining = 97 Accumulated Delay = 13 ; if { z } body end ; if exp=`z' total delay=16 ; if exp=`z' generic label451__0end: ; Other expression=`{ z }' delay=16 ; if { z } end ; Uniform delay remaining = 94 Accumulated Delay = 17 ; Uniform delay remaining = 94 Accumulated Delay = 17 ; if { z } body end ; if exp=`z' total delay=20 ; if exp=`z' generic label449__0end: ; Other expression=`{ z }' delay=20 ; if { z } end ; Uniform delay remaining = 91 Accumulated Delay = 39 ; Uniform delay remaining = 91 Accumulated Delay = 39 ; This is the second probe of TMR0 : ; Uniform delay remaining = 91 Accumulated Delay = 39 ; if { tmr0 < actual_speed0 } start movf actual_speed0,w subwf tmr0,w ; expression=`{ tmr0 < actual_speed0 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { tmr0 < actual_speed0 } body start ; Uniform delay remaining = 91 Accumulated Delay = 0 ; motor0 := motor0_on movf motor0_on,w ; 1 instructions found for sharing ; Uniform delay remaining = 89 Accumulated Delay = 2 ; if { tmr0 < actual_speed0 } body end btfsc c___byte,c___bit ; else body start ; Uniform delay remaining = 91 Accumulated Delay = 0 ; motor0 := motor0_off movf motor0_off,w ; 1 instructions found for sharing ; Uniform delay remaining = 89 Accumulated Delay = 2 ; else body end ; if exp=` tmr0 < actual_speed0 ' single true and false skip delay=6 ; Other expression=`{ tmr0 < actual_speed0 }' delay=6 ; 1 shared instructions follow movwf delay__motor0 ; if { tmr0 < actual_speed0 } end ; Uniform delay remaining = 84 Accumulated Delay = 46 ; if { tmr0 < actual_speed1 } start movf actual_speed1,w subwf tmr0,w ; expression=`{ tmr0 < actual_speed1 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { tmr0 < actual_speed1 } body start ; Uniform delay remaining = 84 Accumulated Delay = 0 ; motor1 := motor1_on movf motor1_on,w ; 1 instructions found for sharing ; Uniform delay remaining = 82 Accumulated Delay = 2 ; if { tmr0 < actual_speed1 } body end btfsc c___byte,c___bit ; else body start ; Uniform delay remaining = 84 Accumulated Delay = 0 ; motor1 := motor1_off movf motor1_off,w ; 1 instructions found for sharing ; Uniform delay remaining = 82 Accumulated Delay = 2 ; else body end ; if exp=` tmr0 < actual_speed1 ' single true and false skip delay=6 ; Other expression=`{ tmr0 < actual_speed1 }' delay=6 ; 1 shared instructions follow movwf delay__motor1 ; if { tmr0 < actual_speed1 } end ; Uniform delay remaining = 77 Accumulated Delay = 53 ; portb := motor1 | motor0 movf delay__motor1,w iorwf delay__motor0,w movwf portb ; Uniform delay remaining = 74 Accumulated Delay = 56 ; Uniform delay remaining = 74 Accumulated Delay = 56 ; Do < ramp0 > management : ; Uniform delay remaining = 74 Accumulated Delay = 56 ; ramp0_delay := ramp0_delay - 1 decf ramp0_delay,f ; Uniform delay remaining = 73 Accumulated Delay = 57 ; if { z } start ; expression=`{ z }' exp_delay=0 true_delay=9 false_delay=0 true_size=10 false_size=0 btfsc z__byte,z__bit goto label482__0true label482__0false: ; Delay 8 cycles movlw 2 movwf delay__482byte2 delay__482delay1: decfsz delay__482byte2,f goto delay__482delay1 nop goto label482__0end label482__0true: ; if { z } body start ; Uniform delay remaining = 73 Accumulated Delay = 0 ; ramp0_delay := ramp0 movf ramp0,w movwf ramp0_delay ; Uniform delay remaining = 71 Accumulated Delay = 2 ; if { actual_speed0 != desired_speed0 } start movf actual_speed0,w subwf desired_speed0,w ; expression=`{ actual_speed0 != desired_speed0 }' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 btfss z___byte,z___bit goto label484__0true label484__0false: ; Delay 1 cycles nop goto label484__0end label484__0true: ; if { actual_speed0 != desired_speed0 } body start ; Uniform delay remaining = 71 Accumulated Delay = 0 ; actual_speed0 := actual_speed0 + ramp0_offset movf ramp0_offset,w addwf actual_speed0,f ; Uniform delay remaining = 69 Accumulated Delay = 2 ; Uniform delay remaining = 69 Accumulated Delay = 2 ; if { actual_speed0 != desired_speed0 } body end ; if exp=` actual_speed0 != desired_speed0 ' total delay=7 ; if exp=` actual_speed0 != desired_speed0 ' generic label484__0end: ; Other expression=`{ actual_speed0 != desired_speed0 }' delay=7 ; if { actual_speed0 != desired_speed0 } end ; Uniform delay remaining = 64 Accumulated Delay = 9 ; Uniform delay remaining = 64 Accumulated Delay = 9 ; if { z } body end ; if exp=`z' total delay=12 ; if exp=`z' generic label482__0end: ; Other expression=`{ z }' delay=12 ; if { z } end ; Uniform delay remaining = 61 Accumulated Delay = 69 ; Uniform delay remaining = 61 Accumulated Delay = 69 ; This is the third probe of TMR0 : ; Uniform delay remaining = 61 Accumulated Delay = 69 ; if { tmr0 < actual_speed0 } start movf actual_speed0,w subwf tmr0,w ; expression=`{ tmr0 < actual_speed0 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { tmr0 < actual_speed0 } body start ; Uniform delay remaining = 61 Accumulated Delay = 0 ; motor0 := motor0_on movf motor0_on,w ; 1 instructions found for sharing ; Uniform delay remaining = 59 Accumulated Delay = 2 ; if { tmr0 < actual_speed0 } body end btfsc c___byte,c___bit ; else body start ; Uniform delay remaining = 61 Accumulated Delay = 0 ; motor0 := motor0_off movf motor0_off,w ; 1 instructions found for sharing ; Uniform delay remaining = 59 Accumulated Delay = 2 ; else body end ; if exp=` tmr0 < actual_speed0 ' single true and false skip delay=6 ; Other expression=`{ tmr0 < actual_speed0 }' delay=6 ; 1 shared instructions follow movwf delay__motor0 ; if { tmr0 < actual_speed0 } end ; Uniform delay remaining = 54 Accumulated Delay = 76 ; if { tmr0 < actual_speed1 } start movf actual_speed1,w subwf tmr0,w ; expression=`{ tmr0 < actual_speed1 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { tmr0 < actual_speed1 } body start ; Uniform delay remaining = 54 Accumulated Delay = 0 ; motor1 := motor1_on movf motor1_on,w ; 1 instructions found for sharing ; Uniform delay remaining = 52 Accumulated Delay = 2 ; if { tmr0 < actual_speed1 } body end btfsc c___byte,c___bit ; else body start ; Uniform delay remaining = 54 Accumulated Delay = 0 ; motor1 := motor1_off movf motor1_off,w ; 1 instructions found for sharing ; Uniform delay remaining = 52 Accumulated Delay = 2 ; else body end ; if exp=` tmr0 < actual_speed1 ' single true and false skip delay=6 ; Other expression=`{ tmr0 < actual_speed1 }' delay=6 ; 1 shared instructions follow movwf delay__motor1 ; if { tmr0 < actual_speed1 } end ; Uniform delay remaining = 47 Accumulated Delay = 83 ; portb := motor1 | motor0 movf delay__motor1,w iorwf delay__motor0,w movwf portb ; Uniform delay remaining = 44 Accumulated Delay = 86 ; Uniform delay remaining = 44 Accumulated Delay = 86 ; Do < ramp1 > management : ; Uniform delay remaining = 44 Accumulated Delay = 86 ; ramp1_delay := ramp1_delay - 1 decf ramp1_delay,f ; Uniform delay remaining = 43 Accumulated Delay = 87 ; if { z } start ; expression=`{ z }' exp_delay=0 true_delay=9 false_delay=0 true_size=10 false_size=0 btfsc z__byte,z__bit goto label504__0true label504__0false: ; Delay 8 cycles movlw 2 movwf delay__504byte2 delay__504delay1: decfsz delay__504byte2,f goto delay__504delay1 nop goto label504__0end label504__0true: ; if { z } body start ; Uniform delay remaining = 43 Accumulated Delay = 0 ; ramp1_delay := ramp1 movf ramp1,w movwf ramp1_delay ; Uniform delay remaining = 41 Accumulated Delay = 2 ; if { actual_speed1 != desired_speed1 } start movf actual_speed1,w subwf desired_speed1,w ; expression=`{ actual_speed1 != desired_speed1 }' exp_delay=2 true_delay=2 false_delay=0 true_size=2 false_size=0 btfss z___byte,z___bit goto label506__0true label506__0false: ; Delay 1 cycles nop goto label506__0end label506__0true: ; if { actual_speed1 != desired_speed1 } body start ; Uniform delay remaining = 41 Accumulated Delay = 0 ; actual_speed1 := actual_speed1 + ramp1_offset movf ramp1_offset,w addwf actual_speed1,f ; Uniform delay remaining = 39 Accumulated Delay = 2 ; Uniform delay remaining = 39 Accumulated Delay = 2 ; if { actual_speed1 != desired_speed1 } body end ; if exp=` actual_speed1 != desired_speed1 ' total delay=7 ; if exp=` actual_speed1 != desired_speed1 ' generic label506__0end: ; Other expression=`{ actual_speed1 != desired_speed1 }' delay=7 ; if { actual_speed1 != desired_speed1 } end ; Uniform delay remaining = 34 Accumulated Delay = 9 ; Uniform delay remaining = 34 Accumulated Delay = 9 ; if { z } body end ; if exp=`z' total delay=12 ; if exp=`z' generic label504__0end: ; Other expression=`{ z }' delay=12 ; if { z } end ; Uniform delay remaining = 31 Accumulated Delay = 99 ; Uniform delay remaining = 31 Accumulated Delay = 99 ; This is the forth probe of TMR0 : ; Uniform delay remaining = 31 Accumulated Delay = 99 ; if { tmr0 < actual_speed0 } start movf actual_speed0,w subwf tmr0,w ; expression=`{ tmr0 < actual_speed0 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { tmr0 < actual_speed0 } body start ; Uniform delay remaining = 31 Accumulated Delay = 0 ; motor0 := motor0_on movf motor0_on,w ; 1 instructions found for sharing ; Uniform delay remaining = 29 Accumulated Delay = 2 ; if { tmr0 < actual_speed0 } body end btfsc c___byte,c___bit ; else body start ; Uniform delay remaining = 31 Accumulated Delay = 0 ; motor0 := motor0_off movf motor0_off,w ; 1 instructions found for sharing ; Uniform delay remaining = 29 Accumulated Delay = 2 ; else body end ; if exp=` tmr0 < actual_speed0 ' single true and false skip delay=6 ; Other expression=`{ tmr0 < actual_speed0 }' delay=6 ; 1 shared instructions follow movwf delay__motor0 ; if { tmr0 < actual_speed0 } end ; Uniform delay remaining = 24 Accumulated Delay = 106 ; if { tmr0 < actual_speed1 } start movf actual_speed1,w subwf tmr0,w ; expression=`{ tmr0 < actual_speed1 }' exp_delay=2 true_delay=1 false_delay=1 true_size=1 false_size=1 btfss c___byte,c___bit ; if { tmr0 < actual_speed1 } body start ; Uniform delay remaining = 24 Accumulated Delay = 0 ; motor1 := motor1_on movf motor1_on,w ; 1 instructions found for sharing ; Uniform delay remaining = 22 Accumulated Delay = 2 ; if { tmr0 < actual_speed1 } body end btfsc c___byte,c___bit ; else body start ; Uniform delay remaining = 24 Accumulated Delay = 0 ; motor1 := motor1_off movf motor1_off,w ; 1 instructions found for sharing ; Uniform delay remaining = 22 Accumulated Delay = 2 ; else body end ; if exp=` tmr0 < actual_speed1 ' single true and false skip delay=6 ; Other expression=`{ tmr0 < actual_speed1 }' delay=6 ; 1 shared instructions follow movwf delay__motor1 ; if { tmr0 < actual_speed1 } end ; Uniform delay remaining = 17 Accumulated Delay = 113 ; portb := motor1 | motor0 movf delay__motor1,w iorwf delay__motor0,w movwf portb ; Uniform delay remaining = 14 Accumulated Delay = 116 ; Uniform delay remaining = 14 Accumulated Delay = 116 ; Soak up remaining 14 cycles ; Delay 14 cycles movlw 4 movwf delay__421byte1 delay__421delay0: decfsz delay__421byte1,f goto delay__421delay0 nop ; procedure delay end retlw 0 ; optimize 1 ; origin 0x200 org 512 ; bank 1 ; Default register bank is now 1 ; procedure main start switch__576block_start: addwf pcl___register,f goto switch__576block577 goto switch__576block577 goto switch__576block587 goto switch__576block593 goto switch__576block598 goto switch__576block598 goto switch__576block598 goto switch__576block598 switch__576block_end: ; switch_check 576 switch__576block_start switch__576block_end switch__647block_start: addwf pcl___register,f goto switch__647block648 goto switch__647block652 goto switch__647block656 goto switch__647block656 goto switch__647block664 goto switch__647block664 goto switch__647block686 goto switch__647block686 switch__647block_end: ; switch_check 647 switch__647block_start switch__647block_end switch__699block_start: addwf pcl___register,f goto switch__699block700 goto switch__699block705 goto switch__699block709 goto switch__699block713 goto switch__699block717 goto switch__699block717 goto switch__699block717 goto switch__699block717 switch__699block_end: ; switch_check 699 switch__699block_start switch__699block_end switch__731block_start: addwf pcl___register,f goto switch__731block732 goto switch__731block736 goto switch__731default747 goto switch__731default747 goto switch__731default747 goto switch__731default747 goto switch__731default747 goto switch__731default747 switch__731block_end: ; switch_check 731 switch__731block_start switch__731block_end switch__573block_start: addwf pcl___register,f goto switch__573block574 goto switch__573block614 goto switch__573block637 goto switch__573block645 goto switch__573block697 goto switch__573block729 goto switch__573default752 goto switch__573default752 switch__573block_end: ; switch_check 573 switch__573block_start switch__573block_end switch__762block_start: addwf pcl___register,f goto switch__762block763 goto switch__762block767 goto switch__762block771 goto switch__762block775 goto switch__762block779 goto switch__762block790 goto switch__762block794 goto switch__762block799 switch__762block_end: ; switch_check 762 switch__762block_start switch__762block_end switch__759block_start: addwf pcl___register,f goto switch__759end goto switch__759end goto switch__759end goto switch__759end goto switch__759end goto switch__759end goto switch__759end goto switch__759block760 switch__759block_end: ; switch_check 759 switch__759block_start switch__759block_end switch__543block_start: addwf pcl___register,f goto switch__543block544 goto switch__543block557 goto switch__543block571 goto switch__543block757 switch__543block_end: ; switch_check 543 switch__543block_start switch__543block_end main: ; Procedure must be called with RP0, RP1, and IRP set to register bank 1 ; Procedure must be called with PCLATH set to code bank 0 main__variables__base equ global__variables__bank1+10 main__bytes__base equ main__variables__base+0 main__bits__base equ main__variables__base+3 main__total__bytes equ 3 main__759byte0 equ main__bytes__base+2 main__573byte0 equ main__bytes__base+2 main__559byte0 equ main__bytes__base+2 main__546byte0 equ main__bytes__base+2 main__543byte0 equ main__bytes__base+2 ; arguments_none main__command equ main__bytes__base+0 main__temp equ main__bytes__base+1 ; call reset {{ }} ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call reset ; Loop waiting for commands : ; loop_forever ... start ; Switch from code bank 0 to code bank 1 before possible transfer (label) bsf pa0___byte,pa0___bit main__538loop__forever: ; Get a command byte : ; command := get_byte {{ }} ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call get_byte movf get_byte__0return__byte,w movwf main__command ; Dispatch on command : ; switch { command >> 6 } swapf main__command,w movwf main__543byte0 rrf main__543byte0,f rrf main__543byte0,w andlw 3 ; case 0 ; case 1 ; case 2 ; case 3 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__543block_start switch__543block544: ; Set Quick < Command = 00 hh hhdm > : ; temp := {{ command << 2 }} & 0xf0 rlf main__command,w movwf main__546byte0 rlf main__546byte0,w andlw 240 movwf main__temp ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__547select0 equ main__command+0 main__command__547select0__byte equ main__command+0 main__command__547select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=5 false_delay=5 true_size=5 false_size=5 btfss main__command__547select0__byte,main__command__547select0__bit goto label547__1false label547__1true: ; if { command @ 0 } body start ; Motor : ; desired_speed1 := temp movf main__temp,w movwf desired_speed1 ; motor1_direction := command @ 1 ; Alias variable for select command @ 1 main__command__550select0 equ main__command+0 main__command__550select0__byte equ main__command+0 main__command__550select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor1_direction__byte,motor1_direction__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__550select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__550select0__byte,main__command__550select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor1_direction__byte,motor1_direction__bit ; if { command @ 0 } body end ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 goto label547__1end label547__1false: ; else body start ; desired_speed0 := temp movf main__temp,w movwf desired_speed0 ; motor0_direction := command @ 1 ; Alias variable for select command @ 1 main__command__553select0 equ main__command+0 main__command__553select0__byte equ main__command+0 main__command__553select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor0_direction__byte,motor0_direction__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__553select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__553select0__byte,main__command__553select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor0_direction__byte,motor0_direction__bit ; else body end ; if exp=` command @ 0 ' generic ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 label547__1end: ; Other expression=`{ command @ 0 }' delay=-1 ; if { command @ 0 } end ; call set_up {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call set_up ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__543end switch__543block557: ; Set Low < Command = 01 ll lldm > : ; temp := {{ command >> 2 }} & 0xf rrf main__command,w movwf main__559byte0 rrf main__559byte0,w andlw 15 movwf main__temp ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__560select0 equ main__command+0 main__command__560select0__byte equ main__command+0 main__command__560select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=7 false_delay=7 true_size=7 false_size=7 btfss main__command__560select0__byte,main__command__560select0__bit goto label560__1false label560__1true: ; if { command @ 0 } body start ; Motor 1 : ; desired_speed1 := desired_speed1 & 0xf0 | temp movlw 240 andwf desired_speed1,w iorwf main__temp,w movwf desired_speed1 ; motor1_direction := command @ 1 ; Alias variable for select command @ 1 main__command__563select0 equ main__command+0 main__command__563select0__byte equ main__command+0 main__command__563select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor1_direction__byte,motor1_direction__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__563select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__563select0__byte,main__command__563select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor1_direction__byte,motor1_direction__bit ; if { command @ 0 } body end ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 goto label560__1end label560__1false: ; else body start ; Motor 0 : ; desired_speed0 := desired_speed0 & 0xf0 | temp movlw 240 andwf desired_speed0,w iorwf main__temp,w movwf desired_speed0 ; motor0_direction := command @ 1 ; Alias variable for select command @ 1 main__command__567select0 equ main__command+0 main__command__567select0__byte equ main__command+0 main__command__567select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor0_direction__byte,motor0_direction__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__567select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__567select0__byte,main__command__567select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor0_direction__byte,motor0_direction__bit ; else body end ; if exp=` command @ 0 ' generic ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 label560__1end: ; Other expression=`{ command @ 0 }' delay=-1 ; if { command @ 0 } end ; call set_up {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call set_up ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__543end switch__543block571: ; Command = 10 xx xxxx : ; switch { {{ command >> 3 }} & 7 } rrf main__command,w movwf main__573byte0 rrf main__573byte0,f rrf main__573byte0,w andlw 7 ; case 0 ; case 1 ; case 2 ; case 3 ; case 4 ; case 5 goto switch__573block_start switch__573block574: ; Command = 1000 0 xxx : ; switch { command & 7 } movlw 7 andwf main__command,w ; case 0 1 ; case 2 ; case 3 ; case 4 5 6 7 goto switch__576block_start switch__576block577: ; Set Ramp < Command = 1000 000 m > : ; temp := get_byte {{ }} ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call get_byte movf get_byte__0return__byte,w movwf main__temp ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__580select0 equ main__command+0 main__command__580select0__byte equ main__command+0 main__command__580select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=2 false_delay=2 true_size=2 false_size=2 ; Switch from code bank 0 to code bank 1 before possible transfer (btfss) bsf pa0___byte,pa0___bit btfss main__command__580select0__byte,main__command__580select0__bit goto label580__1false label580__1true: ; if { command @ 0 } body start ; ramp1 := temp movf main__temp,w ; Switch from register bank 1 to register bank 0 (which contains ramp1) bcf rp0___byte,rp0___bit ; Register bank is now 0 movwf ramp1 ; if { command @ 0 } body end ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 goto label580__1end label580__1false: ; else body start ; ramp0 := temp movf main__temp,w ; Switch from register bank 1 to register bank 0 (which contains ramp0) bcf rp0___byte,rp0___bit ; Register bank is now 0 movwf ramp0 ; else body end ; if exp=` command @ 0 ' generic ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 label580__1end: ; Other expression=`{ command @ 0 }' delay=-1 ; if { command @ 0 } end ; call set_up {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call set_up ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__576end switch__576block587: ; Set Failsafe < Command = 1000 0010 > : ; fail_safe := get_byte {{ }} ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call get_byte movf get_byte__0return__byte,w ; Switch from register bank 1 to register bank 0 (which contains fail_safe) bcf rp0___byte,rp0___bit ; Register bank is now 0 movwf fail_safe ; fail_safe_high_counter := fail_safe movwf fail_safe_high_counter ; fail_safe_low_counter := 0 clrf fail_safe_low_counter ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__576end switch__576block593: ; Reset Failsafe < Command = 1000 0011 > : ; fail_safe_low_counter := 0 ; Switch from register bank 1 to register bank 0 (which contains fail_safe_low_counter) bcf rp0___byte,rp0___bit ; Register bank is now 0 clrf fail_safe_low_counter ; fail_safe_high_counter := fail_safe movf fail_safe,w movwf fail_safe_high_counter ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 goto switch__576end switch__576block598: ; Set Speed < Command = 1000 01 dm > : ; temp := get_byte {{ }} ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call get_byte movf get_byte__0return__byte,w movwf main__temp ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__601select0 equ main__command+0 main__command__601select0__byte equ main__command+0 main__command__601select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=5 false_delay=5 true_size=5 false_size=5 ; Switch from code bank 0 to code bank 1 before possible transfer (btfss) bsf pa0___byte,pa0___bit btfss main__command__601select0__byte,main__command__601select0__bit goto label601__1false label601__1true: ; if { command @ 0 } body start ; Motor 1 : ; desired_speed1 := temp movf main__temp,w movwf desired_speed1 ; motor1_direction := command @ 1 ; Alias variable for select command @ 1 main__command__604select0 equ main__command+0 main__command__604select0__byte equ main__command+0 main__command__604select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor1_direction__byte,motor1_direction__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__604select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__604select0__byte,main__command__604select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor1_direction__byte,motor1_direction__bit ; if { command @ 0 } body end ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 goto label601__1end label601__1false: ; else body start ; Motor 0 : ; desired_speed0 := temp movf main__temp,w movwf desired_speed0 ; motor0_direction := command @ 1 ; Alias variable for select command @ 1 main__command__608select0 equ main__command+0 main__command__608select0__byte equ main__command+0 main__command__608select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor0_direction__byte,motor0_direction__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__608select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__608select0__byte,main__command__608select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor0_direction__byte,motor0_direction__bit ; else body end ; if exp=` command @ 0 ' generic ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 label601__1end: ; Other expression=`{ command @ 0 }' delay=-1 ; if { command @ 0 } end ; call set_up {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call set_up ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit switch__576end: goto switch__573end switch__573block614: ; Command = 1000 1 xxx : ; if { command @ 2 } start ; Alias variable for select command @ 2 main__command__616select0 equ main__command+0 main__command__616select0__byte equ main__command+0 main__command__616select0__bit equ 2 ; expression=`{ command @ 2 }' exp_delay=0 true_delay=-1 false_delay=-1 true_size=9 false_size=9 btfss main__command__616select0__byte,main__command__616select0__bit goto label616__1false label616__1true: ; if { command @ 2 } body start ; Set direction < Command = 1000 11 dm > : ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__618select0 equ main__command+0 main__command__618select0__byte equ main__command+0 main__command__618select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=3 false_delay=3 true_size=3 false_size=3 btfss main__command__618select0__byte,main__command__618select0__bit goto label618__1false label618__1true: ; if { command @ 0 } body start ; Motor 1 : ; motor1_direction := command @ 1 ; Alias variable for select command @ 1 main__command__620select0 equ main__command+0 main__command__620select0__byte equ main__command+0 main__command__620select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor1_direction__byte,motor1_direction__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__620select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__620select0__byte,main__command__620select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor1_direction__byte,motor1_direction__bit ; if { command @ 0 } body end ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 goto label618__1end label618__1false: ; else body start ; Motor 0 : ; motor0_direction := command @ 1 ; Alias variable for select command @ 1 main__command__623select0 equ main__command+0 main__command__623select0__byte equ main__command+0 main__command__623select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor0_direction__byte,motor0_direction__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__623select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__623select0__byte,main__command__623select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor0_direction__byte,motor0_direction__bit ; else body end ; if exp=` command @ 0 ' generic ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 label618__1end: ; Other expression=`{ command @ 0 }' delay=-1 ; if { command @ 0 } end ; if { command @ 2 } body end goto label616__1end label616__1false: ; else body start ; Set mode < Command = 1000 10 xm > : ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__627select0 equ main__command+0 main__command__627select0__byte equ main__command+0 main__command__627select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=3 false_delay=3 true_size=3 false_size=3 btfss main__command__627select0__byte,main__command__627select0__bit goto label627__1false label627__1true: ; if { command @ 0 } body start ; Motor 1 : ; motor1_mode := command @ 1 ; Alias variable for select command @ 1 main__command__629select0 equ main__command+0 main__command__629select0__byte equ main__command+0 main__command__629select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor1_mode__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor1_mode__byte,motor1_mode__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__629select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__629select0__byte,main__command__629select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor1_mode__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor1_mode__byte,motor1_mode__bit ; if { command @ 0 } body end ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 goto label627__1end label627__1false: ; else body start ; Motor 0 : ; motor0_mode := command @ 1 ; Alias variable for select command @ 1 main__command__632select0 equ main__command+0 main__command__632select0__byte equ main__command+0 main__command__632select0__bit equ 1 ; Switch from register bank 1 to register bank 0 (which contains motor0_mode__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf motor0_mode__byte,motor0_mode__bit ; Switch from register bank 0 to register bank 1 (which contains main__command__632select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__632select0__byte,main__command__632select0__bit bsf z___byte,z___bit ; Switch from register bank 1 to register bank 0 (which contains motor0_mode__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit bsf motor0_mode__byte,motor0_mode__bit ; else body end ; if exp=` command @ 0 ' generic ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 label627__1end: ; Other expression=`{ command @ 0 }' delay=-1 ; if { command @ 0 } end ; else body end ; if exp=` command @ 2 ' generic label616__1end: ; Other expression=`{ command @ 2 }' delay=-1 ; if { command @ 2 } end ; call set_up {{ }} ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call set_up ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__573end switch__573block637: ; Set Prescaler < Command = 1001 0 ppp > : ; option := option_mask | {{ command & 7 }} movlw 7 andwf main__command,w iorlw 192 movwf option ; Option is in W register : ; inline assembly statements begin option ; inline assembly statements end goto switch__573end switch__573block645: ; Command = 1001 1 xxx : ; switch { command & 7 } movlw 7 andwf main__command,w ; case 0 ; case 1 ; case 2 3 ; case 4 5 ; case 6 7 goto switch__647block_start switch__647block648: ; Read Failsafe < Command = 1001 1000 > : ; call send_byte {{ fail_safe }} ; Switch from register bank 1 to register bank 0 (which contains fail_safe) bcf rp0___byte,rp0___bit ; Register bank is now 0 movf fail_safe,w ; Switch from register bank 0 to register bank 1 (which contains send_byte__char) bsf rp0___byte,rp0___bit ; Register bank is now 1 movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__647end switch__647block652: ; Read Prescaler < Command = 1001 1001 > : ; call send_byte {{ option & 7 }} movlw 7 andwf option,w movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__647end switch__647block656: ; Read Speed < Command = 1001 101 m > : ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__658select0 equ main__command+0 main__command__658select0__byte equ main__command+0 main__command__658select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=-1 false_delay=-1 true_size=1 false_size=1 btfsc main__command__658select0__byte,main__command__658select0__bit ; if { command @ 0 } body start ; call send_byte {{ actual_speed1 }} movf actual_speed1,w ; 2 instructions found for sharing btfss main__command__658select0__byte,main__command__658select0__bit ; else body start ; call send_byte {{ actual_speed0 }} movf actual_speed0,w ; 2 instructions found for sharing ; if exp=` command @ 0 ' single true and false skip delay=4 ; Other expression=`{ command @ 0 }' delay=4 ; 2 shared instructions follow movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; if { command @ 0 } end ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__647end switch__647block664: ; Read Mode / Direction < Command = 1001 110 m > : ; temp := 0 clrf main__temp ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__667select0 equ main__command+0 main__command__667select0__byte equ main__command+0 main__command__667select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=4 false_delay=4 true_size=4 false_size=4 btfss main__command__667select0__byte,main__command__667select0__bit goto label667__1false label667__1true: ; if { command @ 0 } body start ; Motor 1 : ; if { motor1_direction } start ; expression=`{ motor1_direction }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 ; Switch from register bank 1 to register bank 0 (which contains motor1_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc motor1_direction__byte,motor1_direction__bit ; if { motor1_direction } body start ; temp @ 1 := 1 ; Select temp @ 1 main__temp__670select0 equ main__temp+0 main__temp__670select0__byte equ main__temp+0 main__temp__670select0__bit equ 1 ; Switch from register bank 0 to register bank 1 (which contains main__temp__670select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bsf main__temp__670select0__byte,main__temp__670select0__bit ; if { motor1_direction } body end ; if exp=`motor1_direction' false skip delay=2 ; Other expression=`{ motor1_direction }' delay=2 ; if { motor1_direction } end ; if { motor1_mode } start ; expression=`{ motor1_mode }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 ; Switch from register bank 1 to register bank 0 (which contains motor1_mode__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc motor1_mode__byte,motor1_mode__bit ; if { motor1_mode } body start ; temp @ 0 := 1 ; Select temp @ 0 main__temp__673select0 equ main__temp+0 main__temp__673select0__byte equ main__temp+0 main__temp__673select0__bit equ 0 ; Switch from register bank 0 to register bank 1 (which contains main__temp__673select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bsf main__temp__673select0__byte,main__temp__673select0__bit ; if { motor1_mode } body end ; if exp=`motor1_mode' false skip delay=2 ; Other expression=`{ motor1_mode }' delay=2 ; if { motor1_mode } end ; if { command @ 0 } body end goto label667__1end label667__1false: ; else body start ; Motor 0 : ; if { motor0_direction } start ; expression=`{ motor0_direction }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 ; Switch from register bank 1 to register bank 0 (which contains motor0_direction__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc motor0_direction__byte,motor0_direction__bit ; if { motor0_direction } body start ; temp @ 1 := 1 ; Select temp @ 1 main__temp__678select0 equ main__temp+0 main__temp__678select0__byte equ main__temp+0 main__temp__678select0__bit equ 1 ; Switch from register bank 0 to register bank 1 (which contains main__temp__678select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bsf main__temp__678select0__byte,main__temp__678select0__bit ; if { motor0_direction } body end ; if exp=`motor0_direction' false skip delay=2 ; Other expression=`{ motor0_direction }' delay=2 ; if { motor0_direction } end ; if { motor0_mode } start ; expression=`{ motor0_mode }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 ; Switch from register bank 1 to register bank 0 (which contains motor0_mode__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc motor0_mode__byte,motor0_mode__bit ; if { motor0_mode } body start ; temp @ 0 := 1 ; Select temp @ 0 main__temp__681select0 equ main__temp+0 main__temp__681select0__byte equ main__temp+0 main__temp__681select0__bit equ 0 ; Switch from register bank 0 to register bank 1 (which contains main__temp__681select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bsf main__temp__681select0__byte,main__temp__681select0__bit ; if { motor0_mode } body end ; if exp=`motor0_mode' false skip delay=2 ; Other expression=`{ motor0_mode }' delay=2 ; if { motor0_mode } end ; else body end ; if exp=` command @ 0 ' generic label667__1end: ; Other expression=`{ command @ 0 }' delay=-1 ; if { command @ 0 } end ; call send_byte {{ temp }} movf main__temp,w movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__647end switch__647block686: ; Read Ramp < Command = 1001 101 m > : ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__688select0 equ main__command+0 main__command__688select0__byte equ main__command+0 main__command__688select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=1 false_delay=1 true_size=1 false_size=1 bcf z___byte,z___bit btfsc main__command__688select0__byte,main__command__688select0__bit bsf z___byte,z___bit ; if { command @ 0 } body start ; temp := ramp1 ; Switch from register bank 1 to register bank 0 (which contains ramp1) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfsc z___byte,z___bit movf ramp1,w ; 1 instructions found for sharing ; Switch from register bank 0 to register bank 1 (which contains main__command__688select0__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf z___byte,z___bit btfsc main__command__688select0__byte,main__command__688select0__bit bsf z___byte,z___bit ; else body start ; temp := ramp0 ; Switch from register bank 1 to register bank 0 (which contains ramp0) bcf rp0___byte,rp0___bit ; Register bank is now 0 btfss z___byte,z___bit movf ramp0,w ; 1 instructions found for sharing ; if exp=` command @ 0 ' single true and false skip delay=4 ; Other expression=`{ command @ 0 }' delay=4 ; 1 shared instructions follow ; Switch from register bank 0 to register bank 1 (which contains main__temp) bsf rp0___byte,rp0___bit ; Register bank is now 1 movwf main__temp ; if { command @ 0 } end ; call send_byte {{ temp }} movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit switch__647end: goto switch__573end switch__573block697: ; Command = 0110 0 xxx : ; switch { command & 7 } movlw 7 andwf main__command,w ; case 0 ; case 1 ; case 2 ; case 3 ; case 4 5 6 7 goto switch__699block_start switch__699block700: ; Read Failsafe Errors < Command = 1010 0000 > : ; call send_byte {{ fail_safe_errors }} ; Switch from register bank 1 to register bank 0 (which contains fail_safe_errors) bcf rp0___byte,rp0___bit ; Register bank is now 0 movf fail_safe_errors,w ; Switch from register bank 0 to register bank 1 (which contains send_byte__char) bsf rp0___byte,rp0___bit ; Register bank is now 1 movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; fail_safe_errors := 0 ; Switch from register bank 1 to register bank 0 (which contains fail_safe_errors) bcf rp0___byte,rp0___bit ; Register bank is now 0 clrf fail_safe_errors ; Switch from register bank 0 to register bank 1 bsf rp0___byte,rp0___bit ; Register bank is now 1 ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__699end switch__699block705: ; Read Failsafe Counter < Command = 1010 0001 > : ; call send_byte {{ fail_safe_high_counter }} ; Switch from register bank 1 to register bank 0 (which contains fail_safe_high_counter) bcf rp0___byte,rp0___bit ; Register bank is now 0 movf fail_safe_high_counter,w ; Switch from register bank 0 to register bank 1 (which contains send_byte__char) bsf rp0___byte,rp0___bit ; Register bank is now 1 movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__699end switch__699block709: ; Read Actual Speed 0 < Command = 1010 0010 > : ; call send_byte {{ actual_speed0 }} movf actual_speed0,w movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__699end switch__699block713: ; Read Actual Speed < Command = 1010 001 m > : ; call send_byte {{ actual_speed1 }} movf actual_speed1,w movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__699end switch__699block717: ; Reset everything < Command = 1010 01 om > : ; if { command @ 0 } start ; Alias variable for select command @ 0 main__command__719select0 equ main__command+0 main__command__719select0__byte equ main__command+0 main__command__719select0__bit equ 0 ; expression=`{ command @ 0 }' exp_delay=0 true_delay=4 false_delay=4 true_size=4 false_size=4 btfss main__command__719select0__byte,main__command__719select0__bit goto label719__1false label719__1true: ; if { command @ 0 } body start ; Motor 1 : ; motor1e := command @ 1 ; Alias variable for select command @ 1 main__command__721select0 equ main__command+0 main__command__721select0__byte equ main__command+0 main__command__721select0__bit equ 1 btfss main__command__721select0__byte,main__command__721select0__bit bcf motor1e__byte,motor1e__bit btfsc main__command__721select0__byte,main__command__721select0__bit bsf motor1e__byte,motor1e__bit ; if { command @ 0 } body end goto label719__1end label719__1false: ; else body start ; Motor 0 : ; motor0e := command @ 1 ; Alias variable for select command @ 1 main__command__724select0 equ main__command+0 main__command__724select0__byte equ main__command+0 main__command__724select0__bit equ 1 btfss main__command__724select0__byte,main__command__724select0__bit bcf motor0e__byte,motor0e__bit btfsc main__command__724select0__byte,main__command__724select0__bit bsf motor0e__byte,motor0e__bit ; else body end ; if exp=` command @ 0 ' generic label719__1end: ; Other expression=`{ command @ 0 }' delay=-1 ; if { command @ 0 } end switch__699end: goto switch__573end switch__573block729: ; Command = 1010 1 xxx : ; switch { command & 3 } movlw 3 andwf main__command,w ; case 0 ; case 1 goto switch__731block_start switch__731block732: ; Reset < Command = 1010 1000 > : ; call reset {{ }} ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call reset ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__731end switch__731block736: ; Read On / Off < Command = 1010 1001 > : ; temp := 0 clrf main__temp ; if { motor0e } start ; expression=`{ motor0e }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc motor0e__byte,motor0e__bit ; if { motor0e } body start ; temp @ 0 := 1 ; Select temp @ 0 main__temp__740select0 equ main__temp+0 main__temp__740select0__byte equ main__temp+0 main__temp__740select0__bit equ 0 bsf main__temp__740select0__byte,main__temp__740select0__bit ; if { motor0e } body end ; if exp=`motor0e' false skip delay=2 ; Other expression=`{ motor0e }' delay=2 ; if { motor0e } end ; if { motor1e } start ; expression=`{ motor1e }' exp_delay=0 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc motor1e__byte,motor1e__bit ; if { motor1e } body start ; temp @ 1 := 1 ; Select temp @ 1 main__temp__743select0 equ main__temp+0 main__temp__743select0__byte equ main__temp+0 main__temp__743select0__bit equ 1 bsf main__temp__743select0__byte,main__temp__743select0__bit ; if { motor1e } body end ; if exp=`motor1e' false skip delay=2 ; Other expression=`{ motor1e }' delay=2 ; if { motor1e } end ; call send_byte {{ temp }} movf main__temp,w movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__731end switch__731default747: ; Do nothing : switch__731end: goto switch__573end switch__573default752: ; Do nothing : switch__573end: goto switch__543end switch__543block757: ; Command = 11 xx xxxx : ; switch { {{ command >> 3 }} & 7 } rrf main__command,w movwf main__759byte0 rrf main__759byte0,f rrf main__759byte0,w andlw 7 ; case 7 goto switch__759block_start switch__759block760: ; Shared commands < Command = 1111 1 ccc > : ; switch { command & 7 } movlw 7 andwf main__command,w ; case 0 ; case 1 ; case 2 ; case 3 ; case 4 ; case 5 ; case 6 ; case 7 goto switch__762block_start switch__762block763: ; Clock Decrement < Command = 1111 1000 > : ; osccal := osccal - osccal_unit movlw 252 addwf osccal,f goto switch__762end switch__762block767: ; Clock Increment < Command = 1111 1001 > : ; osccal := osccal + osccal_unit movlw 4 addwf osccal,f goto switch__762end switch__762block771: ; Clock Read < Command = 1111 1010 > : ; call send_byte {{ osccal }} movf osccal,w movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__762end switch__762block775: ; Clock Pulse < Command = 1111 1011 > : ; call send_byte {{ 0 }} clrf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__762end switch__762block779: ; ID Next < Command = 1111 1100 > : ; if { id_index >= id . size } start movlw 48 subwf id_index,w ; expression=`{ id_index >= id . size }' exp_delay=2 true_delay=1 false_delay=0 true_size=1 false_size=0 btfsc c___byte,c___bit ; if { id_index >= id . size } body start ; id_index := 0 clrf id_index ; if { id_index >= id . size } body end ; if exp=` id_index >= id . size ' false skip delay=4 ; Other expression=`{ id_index >= id . size }' delay=4 ; if { id_index >= id . size } end ; call send_byte {{ id ~~ {{ id_index }} }} incf id_index,w ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call id movwf send_byte__char call send_byte ; id_index := id_index + 1 incf id_index,f ; if { id_index >= id . size } start movlw 48 subwf id_index,w ; expression=`{ id_index >= id . size }' exp_delay=2 true_delay=1 false_delay=0 true_size=1 false_size=0 ; Switch from code bank 0 to code bank 1 before possible transfer (btfsc) bsf pa0___byte,pa0___bit btfsc c___byte,c___bit ; if { id_index >= id . size } body start ; id_index := 0 clrf id_index ; if { id_index >= id . size } body end ; if exp=` id_index >= id . size ' false skip delay=4 ; Other expression=`{ id_index >= id . size }' delay=4 ; if { id_index >= id . size } end goto switch__762end switch__762block790: ; ID Reset < Command = 1111 1101 > : ; id_index := 0 clrf id_index goto switch__762end switch__762block794: ; Glitch Read < Command = 1111 1110 > : ; call send_byte {{ glitch }} movf glitch,w movwf send_byte__char ; Switch from code bank 1 to code bank 0 before possible transfer (call) bcf pa0___byte,pa0___bit call send_byte ; glitch := 0 clrf glitch ; Switch from code bank 0 to code bank 1 before possible transfer (goto) bsf pa0___byte,pa0___bit goto switch__762end switch__762block799: ; Glitch < Command = 1111 1111 > : ; if { glitch != 0xff } start incf glitch,w ; expression=`{ glitch != 0xff }' exp_delay=1 true_delay=1 false_delay=0 true_size=1 false_size=0 btfss z___byte,z___bit ; if { glitch != 0xff } body start ; glitch := glitch + 1 incf glitch,f ; if { glitch != 0xff } body end ; if exp=` glitch != 0xff ' false skip delay=3 ; Other expression=`{ glitch != 0xff }' delay=3 ; if { glitch != 0xff } end switch__762end: switch__759end: switch__543end: goto main__538loop__forever ; loop_forever ... end ; procedure main end ; Register bank 0 used 22 bytes of 24 available bytes ; Register bank 1 used 13 bytes of 16 available bytes ; Register bank 2 used 0 bytes of 16 available bytes ; Register bank 3 used 0 bytes of 16 available bytes end