radix dec ; Code bank 0; Start address: 0; End address: 4095 org 0 ; Define start addresses for data regions shared___globals equ 112 globals___0 equ 32 globals___1 equ 160 globals___2 equ 288 globals___3 equ 416 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2000-2005 by Wayne C. Gramlich ; # All rights reserved. ; buffer = 'iredge4' ; line_number = 6 ; library _robobricks_pic16f688 entered ; # Copyright (c) 2000-2005 by Wayne C. Gramlich and Bill Benson ; # All rights reserved. ; buffer = '_robobricks_pic16f688' ; line_number = 6 ; library _pic16f688 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f688' ; line_number = 5 ; processor pic16f688 ; line_number = 6 ; configure_address 0x2007 ; line_number = 7 ; configure_fill 0x3000 ; line_number = 8 ; configure_option fcmen: on = 0x800 ; line_number = 9 ; configure_option fcmen: off = 0x000 ; line_number = 10 ; configure_option ieso: on = 0x400 ; line_number = 11 ; configure_option ieso: off = 0x000 ; line_number = 12 ; configure_option boden: on = 0x300 ; line_number = 13 ; configure_option boden: partial = 0x200 ; line_number = 14 ; configure_option boden: sboden = 0x100 ; line_number = 15 ; configure_option boden: off = 0x000 ; line_number = 16 ; configure_option cpd: on = 0x00 ; line_number = 17 ; configure_option cpd: off = 0x80 ; line_number = 18 ; configure_option cp: on = 0x00 ; line_number = 19 ; configure_option cp: off = 0x40 ; line_number = 20 ; configure_option mclre: on = 0x20 ; line_number = 21 ; configure_option mclre: off = 0x20 ; line_number = 22 ; configure_option pwrte: on = 0x00 ; line_number = 23 ; configure_option pwrte: off = 0x10 ; line_number = 24 ; configure_option wdte: on = 8 ; line_number = 25 ; configure_option wdte: off = 0 ; line_number = 26 ; configure_option fosc: rc_clk = 7 ; line_number = 27 ; configure_option fosc: rc_no_clk = 6 ; line_number = 28 ; configure_option fosc: int_clk = 5 ; line_number = 29 ; configure_option fosc: int_no_clk = 4 ; line_number = 30 ; configure_option fosc: ec = 3 ; line_number = 31 ; configure_option fosc: hs = 2 ; line_number = 32 ; configure_option fosc: xt = 1 ; line_number = 33 ; configure_option fosc: lp = 0 ; line_number = 35 ; code_bank 0x0 : 0xfff ; line_number = 36 ; data_bank 0x0 : 0x7f ; line_number = 37 ; data_bank 0x80 : 0xff ; line_number = 38 ; data_bank 0x100 : 0x17f ; line_number = 39 ; data_bank 0x180 : 0x1ff ; line_number = 40 ; global_region 0x20 : 0x6f ; line_number = 41 ; global_region 0xa0 : 0xef ; line_number = 42 ; global_region 0x120 : 0x16f ; line_number = 43 ; global_region 0x1a0 : 0x1ef ; line_number = 44 ; shared_region 0x70 : 0x7f ; line_number = 45 ; interrupts_possible ; line_number = 46 ; packages pdip=14, soic=14, tssop=14 ; line_number = 47 ; pin vdd, power_supply ; line_number = 48 ; pin_bindings pdip=1, soic=1, tssop=1 ; line_number = 49 ; pin ra5_in, ra5_nc, ra5_out, t1cki, osc1, clkin ; line_number = 50 ; pin_bindings pdip=2, soic=2, tssop=2 ; line_number = 51 ; bind_to _porta@5 ; line_number = 52 ; or_if ra5_in _trisa 32 ; line_number = 53 ; or_if ra5_nc _trisa 32 ; line_number = 54 ; or_if ra5_out _trisa 0 ; line_number = 55 ; pin ra4_in, ra4_nc, ra4_out, t1g, osc2, an3, clkout ; line_number = 56 ; pin_bindings pdip=3, soic=3, tssop=3 ; line_number = 57 ; bind_to _porta@4 ; line_number = 58 ; or_if ra4_in _trisa 16 ; line_number = 59 ; or_if ra4_nc _trisa 16 ; line_number = 60 ; or_if ra4_out _trisa 0 ; line_number = 61 ; or_if an3 _trisa 8 ; line_number = 62 ; or_if ra4_in _ansel 0 ; line_number = 63 ; or_if ra4_out _ansel 0 ; line_number = 64 ; or_if an3 _ansel 8 ; line_number = 65 ; or_if ra4_in _adcon0 0 ; line_number = 66 ; or_if ra4_out _adcon0 0 ; line_number = 67 ; or_if an3 _adcon0 1 ; line_number = 68 ; pin ra3_in, ra3_nc, mclr, vpp ; line_number = 69 ; pin_bindings pdip=4, soic=4, tssop=4 ; line_number = 70 ; bind_to _porta@4 ; line_number = 71 ; or_if ra3_in _trisa 8 ; line_number = 72 ; or_if ra3_nc _trisa 8 ; line_number = 73 ; pin rc5_in, rc5_nc, rc5_out, rx, dt ; line_number = 74 ; pin_bindings pdip=5, soic=5, tssop=5 ; line_number = 75 ; bind_to _portc@5 ; line_number = 76 ; or_if rc5_in _trisc 32 ; line_number = 77 ; or_if rc5_nc _trisc 32 ; line_number = 78 ; or_if rc5_out _trisc 0 ; line_number = 79 ; or_if rx _trisc 32 ; line_number = 80 ; pin rc4_in, rc4_nc, rc4_out, c2out, tx, ck ; line_number = 81 ; pin_bindings pdip=6, soic=6, tssop=6 ; line_number = 82 ; bind_to _portc@4 ; line_number = 83 ; or_if rc4_in _trisc 16 ; line_number = 84 ; or_if rc4_nc _trisc 16 ; line_number = 85 ; or_if rc4_out _trisc 0 ; # The UART documentation says TX must be marked as in input: ; line_number = 87 ; or_if tx _trisc 16 ; line_number = 88 ; pin rc3_in, rc3_nc, rc3_out, an7 ; line_number = 89 ; pin_bindings pdip=7, soic=7, tssop=7 ; line_number = 90 ; bind_to _portc@3 ; line_number = 91 ; or_if rc3_in _trisc 8 ; line_number = 92 ; or_if rc3_nc _trisc 8 ; line_number = 93 ; or_if rc3_out _trisc 0 ; line_number = 94 ; or_if an7 _trisc 8 ; line_number = 95 ; or_if rc3_in _ansel 0 ; line_number = 96 ; or_if rc3_out _ansel 0 ; line_number = 97 ; or_if an7 _ansel 128 ; line_number = 98 ; or_if rc3_in _adcon0 0 ; line_number = 99 ; or_if rc3_out _adcon0 0 ; line_number = 100 ; or_if an7 _adcon0 1 ; line_number = 101 ; pin rc2_in, rc2_nc, rc2_out, an6 ; line_number = 102 ; pin_bindings pdip=8, soic=8, tssop=8 ; line_number = 103 ; bind_to _portc@2 ; line_number = 104 ; or_if rc2_in _trisc 4 ; line_number = 105 ; or_if rc2_nc _trisc 4 ; line_number = 106 ; or_if rc2_out _trisc 0 ; line_number = 107 ; or_if an6 _trisc 4 ; line_number = 108 ; or_if rc2_in _ansel 0 ; line_number = 109 ; or_if rc2_out _ansel 0 ; line_number = 110 ; or_if an6 _ansel 64 ; line_number = 111 ; or_if rc2_in _adcon0 0 ; line_number = 112 ; or_if rc2_out _adcon0 0 ; line_number = 113 ; or_if an6 _adcon0 1 ; line_number = 114 ; pin rc1_in, rc1_nc, rc1_out, an5, c2in_minus ; line_number = 115 ; pin_bindings pdip=9, soic=9, tssop=9 ; line_number = 116 ; bind_to _portc@1 ; line_number = 117 ; or_if rc1_in _trisc 2 ; line_number = 118 ; or_if rc1_nc _trisc 2 ; line_number = 119 ; or_if rc1_out _trisc 0 ; line_number = 120 ; or_if rc1_in _cmcon0 7 ; line_number = 121 ; or_if rc1_out _cmcon0 7 ; line_number = 122 ; or_if an5 _trisc 2 ; line_number = 123 ; or_if rc1_in _ansel 0 ; line_number = 124 ; or_if rc1_out _ansel 0 ; line_number = 125 ; or_if an5 _ansel 32 ; line_number = 126 ; or_if rc1_in _adcon0 0 ; line_number = 127 ; or_if rc1_out _adcon0 0 ; line_number = 128 ; or_if an5 _adcon0 1 ; line_number = 129 ; pin rc0_in, rc0_nc, rc0_out, an4, c2in_plus ; line_number = 130 ; pin_bindings pdip=10, soic=10, tssop=10 ; line_number = 131 ; bind_to _portc@0 ; line_number = 132 ; or_if rc0_in _trisc 1 ; line_number = 133 ; or_if rc0_nc _trisc 1 ; line_number = 134 ; or_if rc0_out _trisc 0 ; line_number = 135 ; or_if rc0_in _cmcon0 7 ; line_number = 136 ; or_if rc0_out _cmcon0 7 ; line_number = 137 ; or_if an4 _trisc 1 ; line_number = 138 ; or_if rc0_in _ansel 0 ; line_number = 139 ; or_if rc0_out _ansel 0 ; line_number = 140 ; or_if an4 _ansel 16 ; line_number = 141 ; or_if rc0_in _adcon0 0 ; line_number = 142 ; or_if rc0_out _adcon0 0 ; line_number = 143 ; or_if an4 _adcon0 1 ; line_number = 144 ; pin ra2_in, ra2_nc, ra2_out, an2, c1out, t0cki, int ; line_number = 145 ; pin_bindings pdip=11, soic=11, tssop=11 ; line_number = 146 ; bind_to _porta@2 ; line_number = 147 ; or_if ra2_in _trisa 4 ; line_number = 148 ; or_if ra2_nc _trisa 4 ; line_number = 149 ; or_if ra2_out _trisa 0 ; line_number = 150 ; or_if an2 _trisa 4 ; line_number = 151 ; or_if ra2_in _ansel 0 ; line_number = 152 ; or_if ra2_out _ansel 0 ; line_number = 153 ; or_if an2 _ansel 4 ; line_number = 154 ; or_if ra2_in _adcon0 0 ; line_number = 155 ; or_if ra2_out _adcon0 0 ; line_number = 156 ; or_if an2 _adcon0 1 ; line_number = 157 ; pin ra1_in, ra1_nc, ra1_out, an1, c1in_minus, vref, icspclk ; line_number = 158 ; pin_bindings pdip=12, soic=12, tssop=12 ; line_number = 159 ; bind_to _porta@1 ; line_number = 160 ; or_if ra1_in _trisa 2 ; line_number = 161 ; or_if ra1_nc _trisa 2 ; line_number = 162 ; or_if ra1_out _trisa 0 ; line_number = 163 ; or_if ra1_in _cmcon0 7 ; line_number = 164 ; or_if ra1_out _cmcon0 7 ; line_number = 165 ; or_if an1 _trisa 2 ; line_number = 166 ; or_if ra1_in _ansel 0 ; line_number = 167 ; or_if ra1_out _ansel 0 ; line_number = 168 ; or_if an1 _ansel 2 ; line_number = 169 ; or_if ra1_in _adcon0 0 ; line_number = 170 ; or_if ra1_out _adcon0 0 ; line_number = 171 ; or_if an1 _adcon0 1 ; line_number = 172 ; pin ra0_in, ra0_nc, ra0_out, an0, c1in_plus, icspdat, ulpwu ; line_number = 173 ; pin_bindings pdip=13, soic=13, tssop=13 ; line_number = 174 ; bind_to _porta@0 ; line_number = 175 ; or_if ra0_in _trisa 1 ; line_number = 176 ; or_if ra0_nc _trisa 1 ; line_number = 177 ; or_if ra0_out _trisa 0 ; line_number = 178 ; or_if ra0_in _cmcon0 7 ; line_number = 179 ; or_if ra0_out _cmcon0 7 ; line_number = 180 ; or_if an0 _trisa 1 ; line_number = 181 ; or_if ra0_in _ansel 0 ; line_number = 182 ; or_if ra0_out _ansel 0 ; line_number = 183 ; or_if an0 _ansel 1 ; line_number = 184 ; or_if ra0_in _adcon0 0 ; line_number = 185 ; or_if ra0_out _adcon0 0 ; line_number = 186 ; or_if an0 _adcon0 1 ; line_number = 187 ; pin vss, ground ; line_number = 188 ; pin_bindings pdip=14, soic=14, tssop=14 ; # Register/bit bindings: ; # Databank 0 (0x0 - 0x7f): ; line_number = 197 ; register _indf = _indf equ 0 ; line_number = 199 ; register _tmr0 = _tmr0 equ 1 ; line_number = 201 ; register _pcl = _pcl equ 2 ; line_number = 203 ; register _status = _status equ 3 ; line_number = 204 ; bind _irp = _status@7 _irp___byte equ _status _irp___bit equ 7 ; line_number = 205 ; bind _rp1 = _status@5 _rp1___byte equ _status _rp1___bit equ 5 ; line_number = 206 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 207 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 208 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 209 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 210 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 211 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 213 ; register _fsr = _fsr equ 4 ; line_number = 215 ; register _porta = _porta equ 5 ; line_number = 216 ; register _ra = _ra equ 5 ; line_number = 217 ; bind _ra5 = _porta@5 _ra5___byte equ _porta _ra5___bit equ 5 ; line_number = 218 ; bind _ra4 = _porta@4 _ra4___byte equ _porta _ra4___bit equ 4 ; line_number = 219 ; bind _ra3 = _porta@3 _ra3___byte equ _porta _ra3___bit equ 3 ; line_number = 220 ; bind _ra2 = _porta@2 _ra2___byte equ _porta _ra2___bit equ 2 ; line_number = 221 ; bind _ra1 = _porta@1 _ra1___byte equ _porta _ra1___bit equ 1 ; line_number = 222 ; bind _ra0 = _porta@0 _ra0___byte equ _porta _ra0___bit equ 0 ; line_number = 224 ; register _portc = _portc equ 7 ; line_number = 225 ; register _rc = _rc equ 7 ; line_number = 226 ; bind _rc5 = _portc@5 _rc5___byte equ _portc _rc5___bit equ 5 ; line_number = 227 ; bind _rc4 = _portc@4 _rc4___byte equ _portc _rc4___bit equ 4 ; line_number = 228 ; bind _rc3 = _portc@3 _rc3___byte equ _portc _rc3___bit equ 3 ; line_number = 229 ; bind _rc2 = _portc@2 _rc2___byte equ _portc _rc2___bit equ 2 ; line_number = 230 ; bind _rc1 = _portc@1 _rc1___byte equ _portc _rc1___bit equ 1 ; line_number = 231 ; bind _rc0 = _portc@0 _rc0___byte equ _portc _rc0___bit equ 0 ; line_number = 233 ; register _pclath = _pclath equ 10 ; line_number = 235 ; register _intcon = _intcon equ 11 ; line_number = 236 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 237 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 238 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 239 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 240 ; bind _raie = _intcon@3 _raie___byte equ _intcon _raie___bit equ 3 ; line_number = 241 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 242 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 243 ; bind _raif = _intcon@0 _raif___byte equ _intcon _raif___bit equ 0 ; line_number = 245 ; register _pir1 = _pir1 equ 12 ; line_number = 246 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 247 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 248 ; bind _rcif = _pir1@5 _rcif___byte equ _pir1 _rcif___bit equ 5 ; line_number = 249 ; bind _c2if = _pir1@4 _c2if___byte equ _pir1 _c2if___bit equ 4 ; line_number = 250 ; bind _c1if = _pir1@3 _c1if___byte equ _pir1 _c1if___bit equ 3 ; line_number = 251 ; bind _osfif = _pir1@2 _osfif___byte equ _pir1 _osfif___bit equ 2 ; line_number = 252 ; bind _txif = _pir1@1 _txif___byte equ _pir1 _txif___bit equ 1 ; line_number = 253 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 255 ; register _tmr1l = _tmr1l equ 14 ; line_number = 257 ; register _tmr1h = _tmr1h equ 15 ; line_number = 259 ; register _t1con = _t1con equ 16 ; line_number = 260 ; bind t1ginv = _t1con@7 t1ginv___byte equ _t1con t1ginv___bit equ 7 ; line_number = 261 ; bind _tmr1ge = _t1con@6 _tmr1ge___byte equ _t1con _tmr1ge___bit equ 6 ; line_number = 262 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 263 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 264 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 265 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 266 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 267 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 269 ; register _baudctl = _baudctl equ 17 ; line_number = 270 ; bind _abdovf = _baudctl@7 _abdovf___byte equ _baudctl _abdovf___bit equ 7 ; line_number = 271 ; bind _rcidl = _baudctl@6 _rcidl___byte equ _baudctl _rcidl___bit equ 6 ; line_number = 272 ; bind _sckp = _baudctl@4 _sckp___byte equ _baudctl _sckp___bit equ 4 ; line_number = 273 ; bind _brg16 = _baudctl@3 _brg16___byte equ _baudctl _brg16___bit equ 3 ; line_number = 274 ; bind _wue = _baudctl@1 _wue___byte equ _baudctl _wue___bit equ 1 ; line_number = 275 ; bind _abden = _baudctl@0 _abden___byte equ _baudctl _abden___bit equ 0 ; line_number = 277 ; register _spbrgh = _spbrgh equ 18 ; line_number = 279 ; register _spbrg = _spbrg equ 19 ; line_number = 281 ; register _rcreg = _rcreg equ 20 ; line_number = 283 ; register _txreg = _txreg equ 21 ; line_number = 285 ; register _txsta = _txsta equ 22 ; line_number = 286 ; bind _csrc = _txsta@7 _csrc___byte equ _txsta _csrc___bit equ 7 ; line_number = 287 ; bind _tx9 = _txsta@6 _tx9___byte equ _txsta _tx9___bit equ 6 ; line_number = 288 ; bind _txen = _txsta@5 _txen___byte equ _txsta _txen___bit equ 5 ; line_number = 289 ; bind _sync = _txsta@4 _sync___byte equ _txsta _sync___bit equ 4 ; line_number = 290 ; bind _sendb = _txsta@3 _sendb___byte equ _txsta _sendb___bit equ 3 ; line_number = 291 ; bind _brgh = _txsta@2 _brgh___byte equ _txsta _brgh___bit equ 2 ; line_number = 292 ; bind _trmt = _txsta@1 _trmt___byte equ _txsta _trmt___bit equ 1 ; line_number = 293 ; bind _tx9d = _txsta@7 _tx9d___byte equ _txsta _tx9d___bit equ 7 ; line_number = 295 ; register _rcsta = _rcsta equ 23 ; line_number = 296 ; bind _spen = _rcsta@7 _spen___byte equ _rcsta _spen___bit equ 7 ; line_number = 297 ; bind _rx9 = _rcsta@6 _rx9___byte equ _rcsta _rx9___bit equ 6 ; line_number = 298 ; bind _sren = _rcsta@5 _sren___byte equ _rcsta _sren___bit equ 5 ; line_number = 299 ; bind _cren = _rcsta@4 _cren___byte equ _rcsta _cren___bit equ 4 ; line_number = 300 ; bind _adden = _rcsta@3 _adden___byte equ _rcsta _adden___bit equ 3 ; line_number = 301 ; bind _ferr = _rcsta@2 _ferr___byte equ _rcsta _ferr___bit equ 2 ; line_number = 302 ; bind _oerr = _rcsta@1 _oerr___byte equ _rcsta _oerr___bit equ 1 ; line_number = 303 ; bind _rx9d = _rcsta@0 _rx9d___byte equ _rcsta _rx9d___bit equ 0 ; line_number = 305 ; register _wdtcon = _wdtcon equ 24 ; line_number = 306 ; bind _wdtps3 = _wdtcon@4 _wdtps3___byte equ _wdtcon _wdtps3___bit equ 4 ; line_number = 307 ; bind _wdtps2 = _wdtcon@3 _wdtps2___byte equ _wdtcon _wdtps2___bit equ 3 ; line_number = 308 ; bind _wdtps1 = _wdtcon@2 _wdtps1___byte equ _wdtcon _wdtps1___bit equ 2 ; line_number = 309 ; bind _wdtps0 = _wdtcon@1 _wdtps0___byte equ _wdtcon _wdtps0___bit equ 1 ; line_number = 310 ; bind _swdten = _wdtcon@0 _swdten___byte equ _wdtcon _swdten___bit equ 0 ; line_number = 312 ; register _cmcon0 = _cmcon0 equ 25 ; line_number = 313 ; bind _c1out = _cmcon0@7 _c1out___byte equ _cmcon0 _c1out___bit equ 7 ; line_number = 314 ; bind _c2out = _cmcon0@6 _c2out___byte equ _cmcon0 _c2out___bit equ 6 ; line_number = 315 ; bind _c1inv = _cmcon0@5 _c1inv___byte equ _cmcon0 _c1inv___bit equ 5 ; line_number = 316 ; bind _c2inv = _cmcon0@4 _c2inv___byte equ _cmcon0 _c2inv___bit equ 4 ; line_number = 317 ; bind _cis = _cmcon0@3 _cis___byte equ _cmcon0 _cis___bit equ 3 ; line_number = 318 ; bind _cm2 = _cmcon0@2 _cm2___byte equ _cmcon0 _cm2___bit equ 2 ; line_number = 319 ; bind _cm1 = _cmcon0@1 _cm1___byte equ _cmcon0 _cm1___bit equ 1 ; line_number = 320 ; bind _cm0 = _cmcon0@0 _cm0___byte equ _cmcon0 _cm0___bit equ 0 ; line_number = 322 ; register _cmcon1 = _cmcon1 equ 26 ; line_number = 323 ; bind _t1gss = _cmcon1@0 _t1gss___byte equ _cmcon1 _t1gss___bit equ 0 ; line_number = 324 ; bind _c2sync = _cmcon1@1 _c2sync___byte equ _cmcon1 _c2sync___bit equ 1 ; line_number = 326 ; register _adresh = _adresh equ 30 ; line_number = 328 ; register _adcon0 = _adcon0 equ 31 ; line_number = 329 ; bind _adfm = _adcon0@7 _adfm___byte equ _adcon0 _adfm___bit equ 7 ; line_number = 330 ; bind _vcfg = _adcon0@6 _vcfg___byte equ _adcon0 _vcfg___bit equ 6 ; line_number = 331 ; bind _chs2 = _adcon0@4 _chs2___byte equ _adcon0 _chs2___bit equ 4 ; line_number = 332 ; bind _chs1 = _adcon0@3 _chs1___byte equ _adcon0 _chs1___bit equ 3 ; line_number = 333 ; bind _chs0 = _adcon0@2 _chs0___byte equ _adcon0 _chs0___bit equ 2 ; line_number = 334 ; bind _go = _adcon0@1 _go___byte equ _adcon0 _go___bit equ 1 ; line_number = 335 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 339 ; register _option_reg = _option_reg equ 129 ; line_number = 340 ; bind _rapu = _option_reg@7 _rapu___byte equ _option_reg _rapu___bit equ 7 ; line_number = 341 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 342 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 343 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 344 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 345 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 346 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 347 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 349 ; register _trisa = _trisa equ 133 ; line_number = 350 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 351 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 352 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 353 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 354 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 355 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 357 ; register _trisc = _trisc equ 135 ; line_number = 358 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 359 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 360 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 361 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 362 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 363 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 365 ; register _pie1 = _pie1 equ 140 ; line_number = 366 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 367 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 368 ; bind _rcie = _pie1@5 _rcie___byte equ _pie1 _rcie___bit equ 5 ; line_number = 369 ; bind _c2ie = _pie1@4 _c2ie___byte equ _pie1 _c2ie___bit equ 4 ; line_number = 370 ; bind _c1ie = _pie1@3 _c1ie___byte equ _pie1 _c1ie___bit equ 3 ; line_number = 371 ; bind _osfie = _pie1@2 _osfie___byte equ _pie1 _osfie___bit equ 2 ; line_number = 372 ; bind _txie = _pie1@1 _txie___byte equ _pie1 _txie___bit equ 1 ; line_number = 373 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 375 ; register _pcon = _pcon equ 142 ; line_number = 376 ; bind _ulpwue = _pcon@5 _ulpwue___byte equ _pcon _ulpwue___bit equ 5 ; line_number = 377 ; bind _sboden = _pcon@4 _sboden___byte equ _pcon _sboden___bit equ 4 ; line_number = 378 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 379 ; bind _bod = _pcon@0 _bod___byte equ _pcon _bod___bit equ 0 ; line_number = 381 ; register _osccon = _osccon equ 143 ; line_number = 382 ; bind _ircf2 = _osccon@6 _ircf2___byte equ _osccon _ircf2___bit equ 6 ; line_number = 383 ; bind _ircf1 = _osccon@5 _ircf1___byte equ _osccon _ircf1___bit equ 5 ; line_number = 384 ; bind _ircf0 = _osccon@4 _ircf0___byte equ _osccon _ircf0___bit equ 4 ; line_number = 385 ; bind _osts = _osccon@3 _osts___byte equ _osccon _osts___bit equ 3 ; line_number = 386 ; bind _hts = _osccon@2 _hts___byte equ _osccon _hts___bit equ 2 ; line_number = 387 ; bind _lts = _osccon@3 _lts___byte equ _osccon _lts___bit equ 3 ; line_number = 388 ; bind _scs = _osccon@2 _scs___byte equ _osccon _scs___bit equ 2 ; line_number = 390 ; register _osctune = _osctune equ 144 ; line_number = 391 ; bind _tun4 = _osctune@4 _tun4___byte equ _osctune _tun4___bit equ 4 ; line_number = 392 ; bind _tun3 = _osctune@3 _tun3___byte equ _osctune _tun3___bit equ 3 ; line_number = 393 ; bind _tun2 = _osctune@2 _tun2___byte equ _osctune _tun2___bit equ 2 ; line_number = 394 ; bind _tun1 = _osctune@1 _tun1___byte equ _osctune _tun1___bit equ 1 ; line_number = 395 ; bind _tun0 = _osctune@0 _tun0___byte equ _osctune _tun0___bit equ 0 ; line_number = 396 ; constant _osccal_lsb = 1 _osccal_lsb equ 1 ; line_number = 398 ; register _ansel = _ansel equ 145 ; line_number = 399 ; bind _ans7 = _ansel@7 _ans7___byte equ _ansel _ans7___bit equ 7 ; line_number = 400 ; bind _ans6 = _ansel@6 _ans6___byte equ _ansel _ans6___bit equ 6 ; line_number = 401 ; bind _ans5 = _ansel@5 _ans5___byte equ _ansel _ans5___bit equ 5 ; line_number = 402 ; bind _ans4 = _ansel@4 _ans4___byte equ _ansel _ans4___bit equ 4 ; line_number = 403 ; bind _ans3 = _ansel@3 _ans3___byte equ _ansel _ans3___bit equ 3 ; line_number = 404 ; bind _ans2 = _ansel@2 _ans2___byte equ _ansel _ans2___bit equ 2 ; line_number = 405 ; bind _ans1 = _ansel@1 _ans1___byte equ _ansel _ans1___bit equ 1 ; line_number = 406 ; bind _ans0 = _ansel@0 _ans0___byte equ _ansel _ans0___bit equ 0 ; line_number = 408 ; register _wpua = _wpua equ 149 ; line_number = 409 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 410 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 411 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 412 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 413 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 415 ; register _ioca = _ioca equ 150 ; line_number = 416 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 417 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 418 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 419 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 420 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 421 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 423 ; register _eedath = _eedath equ 151 ; line_number = 425 ; register _eeadrh = _eeadrh equ 152 ; line_number = 427 ; register _vrcon = _vrcon equ 153 ; line_number = 428 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 429 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 430 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 431 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 432 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 433 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 435 ; register _eedata = _eedata equ 154 ; line_number = 436 ; bind _eedat7 = _eedata@7 _eedat7___byte equ _eedata _eedat7___bit equ 7 ; line_number = 437 ; bind _eedat6 = _eedata@6 _eedat6___byte equ _eedata _eedat6___bit equ 6 ; line_number = 438 ; bind _eedat5 = _eedata@5 _eedat5___byte equ _eedata _eedat5___bit equ 5 ; line_number = 439 ; bind _eedat4 = _eedata@4 _eedat4___byte equ _eedata _eedat4___bit equ 4 ; line_number = 440 ; bind _eedat3 = _eedata@3 _eedat3___byte equ _eedata _eedat3___bit equ 3 ; line_number = 441 ; bind _eedat2 = _eedata@2 _eedat2___byte equ _eedata _eedat2___bit equ 2 ; line_number = 442 ; bind _eedat1 = _eedata@1 _eedat1___byte equ _eedata _eedat1___bit equ 1 ; line_number = 443 ; bind _eedat0 = _eedata@0 _eedat0___byte equ _eedata _eedat0___bit equ 0 ; line_number = 445 ; register _eeadr = _eeadr equ 155 ; line_number = 446 ; bind _eeadr7 = _eeadr@7 _eeadr7___byte equ _eeadr _eeadr7___bit equ 7 ; line_number = 447 ; bind _eeadr6 = _eeadr@6 _eeadr6___byte equ _eeadr _eeadr6___bit equ 6 ; line_number = 448 ; bind _eeadr5 = _eeadr@5 _eeadr5___byte equ _eeadr _eeadr5___bit equ 5 ; line_number = 449 ; bind _eeadr4 = _eeadr@4 _eeadr4___byte equ _eeadr _eeadr4___bit equ 4 ; line_number = 450 ; bind _eeadr3 = _eeadr@3 _eeadr3___byte equ _eeadr _eeadr3___bit equ 3 ; line_number = 451 ; bind _eeadr2 = _eeadr@2 _eeadr2___byte equ _eeadr _eeadr2___bit equ 2 ; line_number = 452 ; bind _eeadr1 = _eeadr@1 _eeadr1___byte equ _eeadr _eeadr1___bit equ 1 ; line_number = 453 ; bind _eeadr0 = _eeadr@0 _eeadr0___byte equ _eeadr _eeadr0___bit equ 0 ; line_number = 455 ; register _eecon1 = _eecon1 equ 156 ; line_number = 456 ; bind _eepgd = _eecon1@7 _eepgd___byte equ _eecon1 _eepgd___bit equ 7 ; line_number = 457 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 458 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 459 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 460 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 462 ; register _eecon2 = _eecon2 equ 157 ; line_number = 464 ; register _adresl = _adresl equ 158 ; line_number = 466 ; register _adcon1 = _adcon1 equ 159 ; line_number = 467 ; bind _adcs2 = _adcon1@6 _adcs2___byte equ _adcon1 _adcs2___bit equ 6 ; line_number = 468 ; bind _adcs1 = _adcon1@5 _adcs1___byte equ _adcon1 _adcs1___bit equ 5 ; line_number = 469 ; bind _adcs0 = _adcon1@4 _adcs0___byte equ _adcon1 _adcs0___bit equ 4 ; # Data Bank 2 (0x100 - 0x17f): ; buffer = '_robobricks_pic16f688' ; line_number = 6 ; library _pic16f688 exited ; line_number = 7 ; library clock8mhz entered ; # Copyright (c) 2004-2005 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock8mhz' ; line_number = 9 ; constant clock_rate = 8000000 clock_rate equ 8000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 2000000 ; line_number = 12 ; constant microsecond = 2 microsecond equ 2 ; buffer = '_robobricks_pic16f688' ; line_number = 7 ; library clock8mhz exited ; # Get some EUSART constants defined: ; line_number = 10 ; constant _eusart_clock = clock_rate _eusart_clock equ 8000000 ; line_number = 11 ; constant _eusart_factor = 4 _eusart_factor equ 4 ; line_number = 12 ; library _eusart entered ; # Copyright (c) 2005 by Wayne C. Gramlich ; # All rights reserved. ; # This library contains a bunch of definitions for the Enhanced Universal ; # Asynchronous Serial Receiver/Transmitter (EUSART) that is available ; # on many of the PIC microcontrollers. ; # In order to use this module you have to get two constants defined ; # BEFORE including this library -- {_eusart_factor} and {_eusart_clock}. ; # {_eusart_clock} should be set to the frequency oscillator for the chip. ; # {_eusart_factor} should be set to 4, 16, or 64 depending upon whether ; # the {_brg16} and {_brgh} bits are set. Use the table below to select: ; # ; # _{brg16} {_brgh} _{eusart_factor} ; # 0 0 64 ; # 0 1 16 ; # 1 0 16 ; # 1 1 ; # 2400 baud: ; buffer = '_eusart' ; line_number = 23 ; constant _eusart_2400 = (_eusart_clock / (2400 * _eusart_factor)) - 1 _eusart_2400 equ 832 ; line_number = 24 ; constant _eusart_2400_low = _eusart_2400 & 0xff _eusart_2400_low equ 64 ; line_number = 25 ; constant _eusart_2400_high = _eusart_2400 >> 8 _eusart_2400_high equ 3 ; line_number = 26 ; constant _eusart_2400_index = 0 _eusart_2400_index equ 0 ; # 4800 baud: ; line_number = 28 ; constant _eusart_4800 = (_eusart_clock / (4800 * _eusart_factor)) - 1 _eusart_4800 equ 415 ; line_number = 29 ; constant _eusart_4800_low = _eusart_4800 & 0xff _eusart_4800_low equ 159 ; line_number = 30 ; constant _eusart_4800_high = _eusart_4800 >> 8 _eusart_4800_high equ 1 ; line_number = 31 ; constant _eusart_4800_index = 1 _eusart_4800_index equ 1 ; # 9600 baud: ; line_number = 33 ; constant _eusart_9600 = (_eusart_clock / (9600 * _eusart_factor)) - 1 _eusart_9600 equ 207 ; line_number = 34 ; constant _eusart_9600_low = _eusart_9600 & 0xff _eusart_9600_low equ 207 ; line_number = 35 ; constant _eusart_9600_high = _eusart_9600 >> 8 _eusart_9600_high equ 0 ; line_number = 36 ; constant _eusart_9600_index = 2 _eusart_9600_index equ 2 ; # 19200 baud: ; line_number = 38 ; constant _eusart_19200 = (_eusart_clock / (19200 * _eusart_factor)) - 1 _eusart_19200 equ 103 ; line_number = 39 ; constant _eusart_19200_low = _eusart_19200 & 0xff _eusart_19200_low equ 103 ; line_number = 40 ; constant _eusart_19200_high = _eusart_19200 >> 8 _eusart_19200_high equ 0 ; line_number = 41 ; constant _eusart_19200_index = 3 _eusart_19200_index equ 3 ; # 38400 baud: ; line_number = 43 ; constant _eusart_38400 = (_eusart_clock / (38400 * _eusart_factor)) - 1 _eusart_38400 equ 51 ; line_number = 44 ; constant _eusart_38400_low = _eusart_38400 & 0xff _eusart_38400_low equ 51 ; line_number = 45 ; constant _eusart_38400_high = _eusart_38400 >> 8 _eusart_38400_high equ 0 ; line_number = 46 ; constant _eusart_38400_index = 4 _eusart_38400_index equ 4 ; # 57600 baud: ; line_number = 48 ; constant _eusart_57600 = (_eusart_clock / (57600 * _eusart_factor)) - 1 _eusart_57600 equ 33 ; line_number = 49 ; constant _eusart_57600_low = _eusart_57600 & 0xff _eusart_57600_low equ 33 ; line_number = 50 ; constant _eusart_57600_high = _eusart_57600 >> 8 _eusart_57600_high equ 0 ; line_number = 51 ; constant _eusart_57600_index = 5 _eusart_57600_index equ 5 ; # 115200 baud: ; line_number = 53 ; constant _eusart_115200 = (_eusart_clock / (115200 * _eusart_factor)) - 1 _eusart_115200 equ 16 ; line_number = 54 ; constant _eusart_115200_low = _eusart_115200 & 0xff _eusart_115200_low equ 16 ; line_number = 55 ; constant _eusart_115200_high = _eusart_115200 >> 8 _eusart_115200_high equ 0 ; line_number = 56 ; constant _eusart_115200_index = 6 _eusart_115200_index equ 6 ; # 203400 baud: ; line_number = 58 ; constant _eusart_203400 = (_eusart_clock / (203400 * _eusart_factor)) - 1 _eusart_203400 equ 8 ; line_number = 59 ; constant _eusart_203400_low = _eusart_203400 & 0xff _eusart_203400_low equ 8 ; line_number = 60 ; constant _eusart_203400_high = _eusart_203400 >> 8 _eusart_203400_high equ 0 ; line_number = 61 ; constant _eusart_203400_index = 7 _eusart_203400_index equ 7 ; buffer = '_robobricks_pic16f688' ; line_number = 12 ; library _eusart exited ; line_number = 14 ; global debug_mode bit debug_mode___byte equ globals___0+79 debug_mode___bit equ 0 ; line_number = 15 ; global in_byte_get bit in_byte_get___byte equ globals___0+79 in_byte_get___bit equ 1 ; Delaying code generation for procedure byte_get ; Delaying code generation for procedure byte_put ; Delaying code generation for procedure baud_rate_low ; Delaying code generation for procedure baud_rate_high ; buffer = 'iredge4' ; line_number = 6 ; library _robobricks_pic16f688 exited ; line_number = 8 ; package pdip ; line_number = 9 ; pin 1 = power_supply ; line_number = 10 ; pin 2 = ra5_out, name = led1 led1___byte equ _porta led1___bit equ 5 ; line_number = 11 ; pin 3 = ra4_out, name = led2 led2___byte equ _porta led2___bit equ 4 ; line_number = 12 ; pin 4 = ra3_nc ; line_number = 13 ; pin 5 = rx ; line_number = 14 ; pin 6 = tx ; line_number = 15 ; pin 7 = rc3_out, name = led3 led3___byte equ _portc led3___bit equ 3 ; line_number = 16 ; pin 8 = rc2_out, name = led0 led0___byte equ _portc led0___bit equ 2 ; line_number = 17 ; pin 9 = an5, name = in0 in0___byte equ _portc in0___bit equ 1 ; line_number = 18 ; pin 10 = rc0_in, name = debug debug___byte equ _portc debug___bit equ 0 ; line_number = 19 ; pin 11 = an2, name = in1 in1___byte equ _porta in1___bit equ 2 ; line_number = 20 ; pin 12 = an1, name = in2 in2___byte equ _porta in2___bit equ 1 ; line_number = 21 ; pin 13 = an0, name = in3 in3___byte equ _porta in3___bit equ 0 ; line_number = 22 ; pin 14 = ground ; line_number = 24 ; constant analogs_size = 4 analogs_size equ 4 ; line_number = 25 ; constant io_mask = 0xf io_mask equ 15 ; line_number = 26 ; constant threshold_default = 0x80 threshold_default equ 128 ; line_number = 28 ; constant state_size = 16 + 12 state_size equ 28 ; line_number = 29 ; constant state_size2 = state_size << 1 state_size2 equ 56 ; line_number = 30 ; global state[state_size] array[byte] state equ globals___0+3 ; line_number = 31 ; bind command_previous = state[0] command_previous equ globals___0+3 ; line_number = 32 ; bind command_last = state[1] command_last equ globals___0+4 ; line_number = 33 ; bind sent_previous = state[2] sent_previous equ globals___0+5 ; line_number = 34 ; bind sent_last = state[3] sent_last equ globals___0+6 ; line_number = 35 ; bind threshold_trim_pot = state[4] threshold_trim_pot equ globals___0+7 ; line_number = 36 ; bind inputs = state[5] inputs equ globals___0+8 ; line_number = 37 ; bind complement = state[6] complement equ globals___0+9 ; line_number = 38 ; bind command = state[7] command equ globals___0+10 ; line_number = 39 ; bind raw_inputs = state[8] raw_inputs equ globals___0+11 ; line_number = 40 ; bind interrupt_bits = state[9] interrupt_bits equ globals___0+12 ; line_number = 41 ; bind falling = state[10] falling equ globals___0+13 ; line_number = 42 ; bind high = state[11] high equ globals___0+14 ; line_number = 43 ; bind low = state[12] low equ globals___0+15 ; line_number = 44 ; bind raising = state[13] raising equ globals___0+16 ; line_number = 45 ; bind threshold_enables = state[14] threshold_enables equ globals___0+17 ; line_number = 46 ; bind thresholds_low[0] = state[16] thresholds_low equ globals___0+19 ; line_number = 47 ; bind thresholds_high[0] = state[20] thresholds_high equ globals___0+23 ; line_number = 48 ; bind analogs[0] = state[24] analogs equ globals___0+27 ; line_number = 50 ; global delay_counter byte delay_counter equ globals___0+31 ; line_number = 51 ; global channel byte channel equ globals___0+32 ; line_number = 52 ; global glitch byte glitch equ globals___0+33 ; line_number = 53 ; global id_index byte id_index equ globals___0+34 ; line_number = 55 ; bind interrupt_enable = interrupt_bits@1 interrupt_enable___byte equ globals___0+12 interrupt_enable___bit equ 1 ; line_number = 56 ; bind interrupt_pending = interrupt_bits@0 interrupt_pending___byte equ globals___0+12 interrupt_pending___bit equ 0 ; line_number = 58 ; procedure main main: ; Initialize some registers movlw 1 movwf _adcon0 movlw 39 bsf __rp0___byte, __rp0___bit movwf _ansel movlw 7 bcf __rp0___byte, __rp0___bit movwf _cmcon0 movlw 15 bsf __rp0___byte, __rp0___bit movwf _trisa movlw 51 movwf _trisc ; arguments_none ; line_number = 60 ; returns_nothing ; line_number = 62 ; local bit byte main__bit equ globals___0+35 ; line_number = 63 ; local temporary byte main__temporary equ globals___0+36 ; # Switch over to 8MHz: ; before procedure statements delay=non-uniform, bit states=(data:00=>01 code:XX=>XX) ; line_number = 66 ; _osccon := 0x71 movlw 113 movwf _osccon ; # Warm up the UART: ; line_number = 69 ; _txsta := 0x24 movlw 36 bcf __rp0___byte, __rp0___bit movwf _txsta ; line_number = 70 ; _rcsta := 0x90 movlw 144 movwf _rcsta ; line_number = 71 ; _baudctl := 0x08 movlw 8 movwf _baudctl ; line_number = 72 ; _spbrg := _eusart_2400_low movlw 64 movwf _spbrg ; line_number = 73 ; _spbrgh := _eusart_2400_high movlw 3 movwf _spbrgh ; line_number = 75 ; call reset() call reset ; # Set the direction: ; line_number = 78 ; loop_forever start main__1: ; # Wait for a command: ; line_number = 80 ; command := byte_get() call byte_get movwf command ; # Dispatch on command: ; line_number = 83 ; switch command >> 6 start movlw main__84>>8 movwf __pclath main__85 equ globals___0+49 swapf command,w movwf main__85 rrf main__85,f rrf main__85,w andlw 3 addlw main__84 movwf __pcl ; page_group 4 main__84: goto main__80 goto main__81 goto main__82 goto main__83 ; line_number = 84 ; case 0 main__80: ; # 00xx xxxx: ; line_number = 86 ; switch command >> 3 start movlw main__33>>8 movwf __pclath main__34 equ globals___0+49 rrf command,w movwf main__34 rrf main__34,f rrf main__34,w andlw 31 addlw main__33 movwf __pcl ; page_group 8 main__33: goto main__28 goto main__29 goto main__30 goto main__30 goto main__31 goto main__31 goto main__32 goto main__32 ; line_number = 87 ; case 0 main__28: ; # 0000 0xxx: ; line_number = 89 ; switch command & 7 start movlw main__7>>8 movwf __pclath movlw 7 andwf command,w addlw main__7 movwf __pcl ; page_group 8 main__7: goto main__2 goto main__2 goto main__2 goto main__2 goto main__3 goto main__4 goto main__5 goto main__6 ; line_number = 90 ; case 0, 1, 2, 3 main__2: ; # 0000 00bb (Read Pin): ; line_number = 92 ; call byte_put(analogs[command]) movf command,w addlw analogs movwf __fsr movf __indf,w call byte_put goto main__8 ; line_number = 93 ; case 4 main__3: ; # 0000 01000 (Read Binary Values): ; line_number = 95 ; call byte_put(inputs) movf inputs,w call byte_put goto main__8 ; line_number = 96 ; case 5 main__4: ; # 0000 0101 (Read Raw Binary): ; line_number = 98 ; call byte_put(raw_inputs) movf raw_inputs,w call byte_put goto main__8 ; line_number = 99 ; case 6 main__5: ; # 0000 0110 (Read Threshold Enables): ; line_number = 101 ; call byte_put(threshold_enables) movf threshold_enables,w call byte_put goto main__8 ; line_number = 102 ; case 7 main__6: ; # 0000 0111 (Reset): ; line_number = 104 ; call reset() call reset main__8: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 89 ; switch command & 7 done goto main__35 ; line_number = 105 ; case 1 main__29: ; # 0000 1xxx: ; line_number = 107 ; switch command & 7 start movlw main__15>>8 movwf __pclath movlw 7 andwf command,w addlw main__15 movwf __pcl ; page_group 8 main__15: goto main__9 goto main__10 goto main__11 goto main__12 goto main__13 goto main__14 goto main__14 goto main__14 ; line_number = 108 ; case 0 main__9: ; # 0000 1000 (Read Complement Mask): ; line_number = 110 ; call byte_put(complement) movf complement,w call byte_put goto main__16 ; line_number = 111 ; case 1 main__10: ; # 0000 1001 (Read High Mask): ; line_number = 113 ; call byte_put(high) movf high,w call byte_put goto main__16 ; line_number = 114 ; case 2 main__11: ; # 0000 1010 (Read Low Mask): ; line_number = 116 ; call byte_put(low) movf low,w call byte_put goto main__16 ; line_number = 117 ; case 3 main__12: ; # 0000 1011 (Read Raising Mask): ; line_number = 119 ; call byte_put(raising) movf raising,w call byte_put goto main__16 ; line_number = 120 ; case 4 main__13: ; # 0000 1100 (Read Falling Mask): ; line_number = 122 ; call byte_put(falling) movf falling,w call byte_put goto main__16 ; line_number = 123 ; case 5, 6, 7 main__14: ; # 0000 111x or 0000 1101 ; line_number = 125 ; do_nothing main__16: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 107 ; switch command & 7 done goto main__35 ; line_number = 126 ; case 2, 3 main__30: ; # 0001 ccbb: ; line_number = 128 ; bit := command & 3 movlw 3 andwf command,w movwf main__bit ; line_number = 129 ; switch (command >> 2) & 3 start movlw main__25>>8 movwf __pclath main__26 equ globals___0+49 rrf command,w movwf main__26 rrf main__26,w andlw 3 addlw main__25 movwf __pcl ; page_group 4 main__25: goto main__21 goto main__22 goto main__23 goto main__24 ; line_number = 130 ; case 0 main__21: ; # 0001 00bb (Read High Threshold): ; line_number = 132 ; call byte_put(thresholds_high[bit]) movf main__bit,w addlw thresholds_high movwf __fsr movf __indf,w call byte_put goto main__27 ; line_number = 133 ; case 1 main__22: ; # 0001 01bb (Read Low Threshold): ; line_number = 135 ; call byte_put(thresholds_low[bit]) movf main__bit,w addlw thresholds_low movwf __fsr movf __indf,w call byte_put goto main__27 ; line_number = 136 ; case 2 main__23: ; # 0001 10bb (Set High Threshold): ; line_number = 138 ; thresholds_high[bit] := byte_get() ; index_temporary_first main__17 equ globals___0+49 main__18 equ globals___0+50 movf main__bit,w movwf main__17 call byte_get movwf main__18 movf main__17,w addlw thresholds_high movwf __fsr movf main__18,w movwf __indf goto main__27 ; line_number = 139 ; case 3 main__24: ; # 0001 11bb (Set Low Threshold): ; line_number = 141 ; thresholds_low[bit] := byte_get() ; index_temporary_first main__19 equ globals___0+49 main__20 equ globals___0+50 movf main__bit,w movwf main__19 call byte_get movwf main__20 movf main__19,w addlw thresholds_low movwf __fsr movf main__20,w movwf __indf main__27: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 129 ; switch (command >> 2) & 3 done goto main__35 ; line_number = 142 ; case 4, 5 main__31: ; # 0010 cccc (Set Complement Mask): ; line_number = 144 ; complement := command & io_mask movlw 15 andwf command,w movwf complement goto main__35 ; line_number = 145 ; case 6, 7 main__32: ; # 0011 xxxx: ; line_number = 147 ; do_nothing main__35: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 86 ; switch command >> 3 done goto main__86 ; line_number = 148 ; case 1 main__81: ; # 01cc mmmm: ; line_number = 150 ; temporary := command & io_mask movlw 15 andwf command,w movwf main__temporary ; line_number = 151 ; switch (command >> 4) & 3 start movlw main__40>>8 movwf __pclath main__41 equ globals___0+49 swapf command,w andlw 3 addlw main__40 movwf __pcl ; page_group 4 main__40: goto main__36 goto main__37 goto main__38 goto main__39 ; line_number = 152 ; case 0 main__36: ; # 0100 hhhh (Set High Mask): ; line_number = 154 ; high := temporary movf main__temporary,w movwf high goto main__42 ; line_number = 155 ; case 1 main__37: ; # 0101 llll (Set Low Mask): ; line_number = 157 ; low := temporary movf main__temporary,w movwf low goto main__42 ; line_number = 158 ; case 2 main__38: ; # 0110 rrrr (Set Raising Mask): ; line_number = 160 ; raising := temporary movf main__temporary,w movwf raising goto main__42 ; line_number = 161 ; case 3 main__39: ; # 0111 ffff (Set Falling Mask): ; line_number = 163 ; falling := temporary movf main__temporary,w movwf falling main__42: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 151 ; switch (command >> 4) & 3 done goto main__86 ; line_number = 164 ; case 2 main__82: ; # 10xx xxxx: ; line_number = 166 ; switch (command >> 3) & 7 start movlw main__45>>8 movwf __pclath main__46 equ globals___0+49 rrf command,w movwf main__46 rrf main__46,f rrf main__46,w andlw 7 addlw main__45 movwf __pcl ; page_group 8 main__45: goto main__43 goto main__43 goto main__44 goto main__44 goto main__44 goto main__44 goto main__44 goto main__44 ; line_number = 167 ; case 0, 1 main__43: ; # 1000 eeee (Set Threshold Enables): ; line_number = 169 ; threshold_enables := command & 0xf movlw 15 andwf command,w movwf threshold_enables goto main__47 ; line_number = 170 ; case 2, 3, 4, 5, 6, 7 main__44: ; # 1001 xxxx or 101x xxxx: ; line_number = 172 ; do_nothing main__47: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 166 ; switch (command >> 3) & 7 done goto main__86 ; line_number = 173 ; case 3 main__83: ; # Command = 11xx xxxx: ; line_number = 175 ; switch (command >> 3) & 7 start movlw main__77>>8 movwf __pclath main__78 equ globals___0+49 rrf command,w movwf main__78 rrf main__78,f rrf main__78,w andlw 7 addlw main__77 movwf __pcl ; page_group 8 main__77: goto main__73 goto main__73 goto main__73 goto main__73 goto main__73 goto main__74 goto main__75 goto main__76 ; line_number = 176 ; case 0, 1, 2, 3, 4 main__73: ; # 1100 xxxx or 1110 0xxx: ; line_number = 178 ; do_nothing goto main__79 ; line_number = 179 ; case 5 main__74: ; # Read Interrupt Bits (Command = 1110 1111): ; line_number = 181 ; switch command & 7 start movlw main__51>>8 movwf __pclath movlw 7 andwf command,w addlw main__51 movwf __pcl ; page_group 8 main__51: goto main__48 goto main__48 goto main__48 goto main__48 goto main__48 goto main__48 goto main__49 goto main__50 ; line_number = 182 ; case 0, 1, 2, 3, 4, 5 main__48: ; # 1110 10xx or 1110 1110x: goto main__52 ; line_number = 184 ; case 6 main__49: ; # 1110 1110 (Reset): ; line_number = 186 ; call reset() call reset goto main__52 ; line_number = 187 ; case 7 main__50: ; # 1110 1111 (Return Interrupt Bits): ; line_number = 189 ; call byte_put(interrupt_bits) movf interrupt_bits,w call byte_put main__52: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 181 ; switch command & 7 done goto main__79 ; line_number = 190 ; case 6 main__75: ; # Shared Interrupt commands (Command = 1111 0xxx): ; line_number = 192 ; switch command & 7 start movlw main__60>>8 movwf __pclath movlw 7 andwf command,w addlw main__60 movwf __pcl ; page_group 8 main__60: goto main__57 goto main__57 goto main__57 goto main__57 goto main__58 goto main__58 goto main__59 goto main__59 ; line_number = 193 ; case 0, 1, 2, 3 main__57: ; # 1111 10ep (Set interrupt bits): ; line_number = 195 ; interrupt_enable := command@1 bcf interrupt_enable___byte, interrupt_enable___bit main__select__53___byte equ command main__select__53___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__53___byte, main__select__53___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__53 (data:00=>00 code:XX=>XX) ; line_number = 196 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__54___byte equ command main__select__54___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__54___byte, main__select__54___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__54 (data:00=>00 code:XX=>XX) goto main__61 ; line_number = 197 ; case 4, 5 main__58: ; # 1111 110p (Set Interrupt Pending): ; line_number = 199 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__55___byte equ command main__select__55___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__55___byte, main__select__55___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__55 (data:00=>00 code:XX=>XX) goto main__61 ; line_number = 200 ; case 6, 7 main__59: ; # 1110 111e (Set Interrupt Enable): ; line_number = 202 ; interrupt_enable := command@0 bcf interrupt_enable___byte, interrupt_enable___bit main__select__56___byte equ command main__select__56___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__56___byte, main__select__56___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__56 (data:00=>00 code:XX=>XX) main__61: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 192 ; switch command & 7 done goto main__79 ; line_number = 203 ; case 7 main__76: ; # Shared commands (Command = 1111 1xxx): ; line_number = 205 ; switch command & 7 start movlw main__71>>8 movwf __pclath movlw 7 andwf command,w addlw main__71 movwf __pcl ; page_group 8 main__71: goto main__63 goto main__64 goto main__65 goto main__66 goto main__67 goto main__68 goto main__69 goto main__70 ; line_number = 206 ; case 0 main__63: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1000 (Clock Decrement): ; line_number = 208 ; _osctune := _osctune - _osccal_lsb decf _osctune,f goto main__72 ; line_number = 209 ; case 1 main__64: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1001 (Clock Increment): ; line_number = 211 ; _osctune := _osctune + _osccal_lsb incf _osctune,f goto main__72 ; line_number = 212 ; case 2 main__65: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1010 (Clock Read): ; line_number = 214 ; call byte_put(_osctune) movf _osctune,w bcf __rp0___byte, __rp0___bit call byte_put goto main__72 ; line_number = 215 ; case 3 main__66: ; # 1111 1011 (Clock Pulse): ; line_number = 217 ; call byte_put(0) movlw 0 call byte_put goto main__72 ; line_number = 218 ; case 4 main__67: ; # 1111 1100 (ID Next): ; line_number = 220 ; call byte_put(id[id_index]) movf id_index,w call id call byte_put ; line_number = 221 ; id_index := id_index + 1 incf id_index,f ; line_number = 222 ; if id_index >= id.size start movlw 41 subwf id_index,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss __c___byte, __c___bit goto main__62 ; line_number = 223 ; id_index := 0 movlw 0 movwf id_index ; Recombine size1 = 0 || size2 = 0 main__62: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) ; line_number = 222 ; if id_index >= id.size done goto main__72 ; line_number = 224 ; case 5 main__68: ; # 1111 1101 (ID Reset): ; line_number = 226 ; id_index := 0 movlw 0 movwf id_index goto main__72 ; line_number = 227 ; case 6 main__69: ; # 1111 1110 (Glitch Read): ; line_number = 229 ; call byte_put(glitch) movf glitch,w call byte_put ; line_number = 230 ; glitch := 0 movlw 0 movwf glitch goto main__72 ; line_number = 231 ; case 7 main__70: ; # 1111 1111 (Glitch): ; line_number = 233 ; if glitch != 0xff start ; Left minus Right incf glitch,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 234 ; glitch := glitch + 1 incf glitch,f ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:XX=>XX) ; line_number = 233 ; if glitch != 0xff done main__72: ; switch end:(data:00=>0? code:XX=>XX) ; line_number = 205 ; switch command & 7 done main__79: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 175 ; switch (command >> 3) & 7 done main__86: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 83 ; switch command >> 6 done ; line_number = 78 ; loop_forever wrap-up ; Need to adjust code banks to match front of loop bcf __rp0___byte, __rp0___bit bcf __rp1___byte, __rp1___bit goto main__1 ; line_number = 78 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 238 ; procedure delay delay: ; arguments_none ; line_number = 240 ; returns_nothing ; line_number = 242 ; local chan byte delay__chan equ globals___0+37 ; line_number = 243 ; local changed byte delay__changed equ globals___0+38 ; line_number = 244 ; local current byte delay__current equ globals___0+39 ; line_number = 245 ; local hexify bit delay__hexify___byte equ globals___0+79 delay__hexify___bit equ 2 ; line_number = 246 ; local index byte delay__index equ globals___0+40 ; line_number = 247 ; local mask byte delay__mask equ globals___0+41 ; line_number = 248 ; local not_current byte delay__not_current equ globals___0+42 ; line_number = 249 ; local previous byte delay__previous equ globals___0+43 ; line_number = 250 ; local temp byte delay__temp equ globals___0+44 ; line_number = 251 ; local thresholds_index byte delay__thresholds_index equ globals___0+45 ; line_number = 252 ; local high byte delay__high equ globals___0+46 ; line_number = 253 ; local low byte delay__low equ globals___0+47 ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 255 ; watch_dog_reset done clrwdt ; # Perform A/D: ; line_number = 258 ; chan := chans[channel] movf channel,w call chans movwf delay__chan ; # At 8MHz, TAD = 1.6uS (ADCS<2:0>=010). An A/D conversion takes ; # 11*TAD = 11*1.6uS = 17.1uS ; # Acquiring the signal takes approximately 20uS. ; # We'll pad that out a little to 30uS to be safe: ; line_number = 265 ; _adcon0 := (chan << 2) | 1 delay__1 equ globals___0+51 rlf delay__chan,w movwf delay__1 rlf delay__1,w andlw 252 iorlw 1 movwf _adcon0 ; line_number = 266 ; delay 30 * microsecond start ; Delay expression evaluates to 60 ; line_number = 267 ; do_nothing ; Delay 60 cycles ; Delay loop takes 15 * 4 = 60 cycles movlw 15 delay__2: addlw 255 btfss __z___byte, __z___bit goto delay__2 ; line_number = 266 ; delay 30 * microsecond done ; # Getting the value takes 11 & Tad, where Tad = 2uS = 22uS. ; # We'll add 5uS for a little pad: ; line_number = 271 ; _go := 1 bsf _go___byte, _go___bit ; line_number = 272 ; delay 28 * microsecond start ; Delay expression evaluates to 56 ; line_number = 273 ; do_nothing ; Delay 56 cycles ; Delay loop takes 14 * 4 = 56 cycles movlw 14 delay__3: addlw 255 btfss __z___byte, __z___bit goto delay__3 ; line_number = 272 ; delay 28 * microsecond done ; # A/D result is ready: ; line_number = 276 ; temp := 0xff - _adresh comf _adresh,w movwf delay__temp ; # Store the result away: ; line_number = 279 ; analogs[channel] := temp ; index_fsr_first movf channel,w addlw analogs movwf __fsr movf delay__temp,w movwf __indf ; line_number = 281 ; mask := masks[channel] movf channel,w call masks movwf delay__mask ; line_number = 282 ; if (temp >= thresholds_high[channel]) start movf channel,w addlw thresholds_high movwf __fsr movf __indf,w subwf delay__temp,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=2 false_code_size=12 btfss __c___byte, __c___bit goto delay__5 ; line_number = 283 ; raw_inputs := raw_inputs | mask movf delay__mask,w iorwf raw_inputs,f goto delay__6 delay__5: ; line_number = 284 movf channel,w addlw thresholds_low movwf __fsr movf __indf,w subwf delay__temp,w btfsc __z___byte, __z___bit bcf __c___byte, __c___bit ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=3 true_test=false body_code.delay=0 (non-uniform delay) btfsc __c___byte, __c___bit goto delay__4 ; line_number = 285 ; raw_inputs := raw_inputs & (0xff ^ mask) movlw 255 xorwf delay__mask,w andwf raw_inputs,f delay__4: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) delay__6: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) ; line_number = 282 ; if (temp >= thresholds_high[channel]) done ; line_number = 286 ; inputs := raw_inputs ^ complement movf raw_inputs,w xorwf complement,w movwf inputs ; line_number = 287 ; led0 := inputs@0 bcf led0___byte, led0___bit delay__select__7___byte equ inputs delay__select__7___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc delay__select__7___byte, delay__select__7___bit bsf led0___byte, led0___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=delay__select__7 (data:00=>00 code:XX=>XX) ; line_number = 288 ; led1 := inputs@1 bcf led1___byte, led1___bit delay__select__8___byte equ inputs delay__select__8___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc delay__select__8___byte, delay__select__8___bit bsf led1___byte, led1___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=delay__select__8 (data:00=>00 code:XX=>XX) ; line_number = 289 ; led2 := inputs@2 bcf led2___byte, led2___bit delay__select__9___byte equ inputs delay__select__9___bit equ 2 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc delay__select__9___byte, delay__select__9___bit bsf led2___byte, led2___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=delay__select__9 (data:00=>00 code:XX=>XX) ; line_number = 290 ; led3 := inputs@3 bcf led3___byte, led3___bit delay__select__10___byte equ inputs delay__select__10___bit equ 3 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc delay__select__10___byte, delay__select__10___bit bsf led3___byte, led3___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=delay__select__10 (data:00=>00 code:XX=>XX) ; line_number = 292 ; channel := (channel + 1) & 3 incf channel,w andlw 3 movwf channel ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; # # Show our A/D result: ; # temp := analogs[0] ; # if temp@7 ; # led0 := 1 ; # else ; # led0 := 0 ; # if temp@6 ; # led1 := 1 ; # else ; # led1 := 0 ; # if temp@5 ; # led2 := 1 ; # else ; # led2 := 0 ; # if temp@4 ; # led3 := 1 ; # else ; # led3 := 0 ; # ; # ; # ; # # Next time around, do case 1: ; # delay_counter := delay_counter + 1 ; # case 1 ; # # Process A/D result ; # if !(channel@2) ; # mask := masks[channel] ; # temp := analogs[channel] ; # if (temp >= thresholds_high[channel]) ; # raw_inputs := raw_inputs | mask ; # else_if (temp <= thresholds_low[channel]) ; # raw_inputs := raw_inputs & (0xff ^ mask) ; # ; # # Bump to next channel: ; # channel := channel + 1 ; # if channel >= chans.size ; # channel := 0 ; # ; # # Light up the LED's: ; # inputs := raw_inputs ^ complement ; # led0 := inputs@0 ; # led1 := inputs@1 ; # led2 := inputs@2 ; # led3 := inputs@3 ; # ; # # Setup for interrupts: ; # previous := current ; # # Read the I/O port once: ; # current := inputs ^ complement ; # not_current := current ^ 0xf ; # changed := current ^ previous ; # ; # # See about triggering the interrupt_pending flag: ; # if (low & not_current) | (high & current) | ; # (changed & current & raising) | ; # (changed & not_current & falling) != 0 ; # interrupt_pending := 1 ; # ; # # Send an interrupt if interrupts are enabled: ; # if interrupt_pending && interrupt_enable ; # # Shove serial out to low: ; # interrupt_enable := 0 ; # #serial_out := 0 ; # ; # # Next time around, perform case 2: ; # delay_counter := delay_counter + 1 ; # case 2 ; # # Process threshold trim pot: ; # thresholds_index := (thresholds_index + 1) & 3 ; # mask := masks[thresholds_index] ; # if threshold_enables & mask != 0 ; # low := thresholds_low[thresholds_index] ; # high := thresholds_high[thresholds_index] ; # if threshold_trim_pot > low ; # low := low + 1 ; # if high != 255 ; # high := high + 1 ; # else_if threshold_trim_pot < temp ; # low := low - 1 ; # if high != 0 ; # high := high - 1 ; # thresholds_low[thresholds_index] := low ; # thresholds_high[thresholds_index] := high ; # ; # # Next time around, perform case 3: ; # delay_counter := delay_counter + 1 ; # case 3 ; # do_nothing ; line_number = 385 ; procedure reset reset: ; arguments_none ; line_number = 387 ; returns_nothing ; # This procedure will initialize all of the registers: ; line_number = 391 ; local index byte reset__index equ globals___0+48 ; # Initialize the A/D module: ; # A/D Conversion clock is Fosc/8 (Tad=2uS) and AD is on: ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 395 ; _adcon0 := 1 movlw 1 movwf _adcon0 ; line_number = 396 ; _adcon1 := 0x20 movlw 32 bsf __rp0___byte, __rp0___bit movwf _adcon1 ; line_number = 397 ; _adcs0 := 1 bsf _adcs0___byte, _adcs0___bit ; line_number = 398 ; _adif := 0 bcf __rp0___byte, __rp0___bit bcf _adif___byte, _adif___bit ; line_number = 399 ; _adie := 0 bsf __rp0___byte, __rp0___bit bcf _adie___byte, _adie___bit ; line_number = 400 ; _gie := 0 bcf __rp0___byte, __rp0___bit bcf _gie___byte, _gie___bit ; #_ansel := 1 | 2 | 4 | 32 ; line_number = 403 ; channel := 0 movlw 0 movwf channel ; line_number = 404 ; complement := 0 movlw 0 movwf complement ; line_number = 405 ; command := 0 movlw 0 movwf command ; line_number = 406 ; delay_counter := 0 movlw 0 movwf delay_counter ; line_number = 407 ; falling := 0 movlw 0 movwf falling ; line_number = 408 ; glitch := 0 movlw 0 movwf glitch ; line_number = 409 ; high := 0 movlw 0 movwf high ; line_number = 410 ; id_index := 0 movlw 0 movwf id_index ; line_number = 411 ; interrupt_bits := 0 movlw 0 movwf interrupt_bits ; line_number = 412 ; low := 0 movlw 0 movwf low ; line_number = 413 ; raising := 0 movlw 0 movwf raising ; line_number = 414 ; raw_inputs := 0 movlw 0 movwf raw_inputs ; # Initialize threshold vectors: ; line_number = 417 ; index := 0 movlw 0 movwf reset__index ; line_number = 418 ; while index < 4 start reset__1: movlw 4 subwf reset__index,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=12 true_test=false body_code.delay=0 (non-uniform delay) btfsc __c___byte, __c___bit goto reset__2 ; line_number = 419 ; thresholds_high[index] := threshold_default ; index_fsr_first movf reset__index,w addlw thresholds_high movwf __fsr movlw 128 movwf __indf ; line_number = 420 ; thresholds_low[index] := threshold_default ; index_fsr_first movf reset__index,w addlw thresholds_low movwf __fsr movlw 128 movwf __indf ; line_number = 421 ; index := index + 1 incf reset__index,f goto reset__1 reset__2: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) ; line_number = 418 ; while index < 4 done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 424 ; constant zero8 = "\0,0,0,0,0,0,0,0\" ; zero8 = '\0,0,0,0,0,0,0,0\' ; line_number = 425 ; constant module_name = "\8\IREdge4D" ; module_name = '\8\IREdge4D' ; line_number = 426 ; constant vendor_name = "\7\Gramson" ; vendor_name = '\7\Gramson' ; line_number = 427 ; string id = "\1,0,25,2,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; id = '\1,0,25,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8\IREdge4D\7\Gramson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 41 id___base: retlw 1 retlw 0 retlw 25 retlw 2 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 8 retlw 73 retlw 82 retlw 69 retlw 100 retlw 103 retlw 101 retlw 52 retlw 68 retlw 7 retlw 71 retlw 114 retlw 97 retlw 109 retlw 115 retlw 111 retlw 110 ; line_number = 427 ; string id = "\1,0,25,2,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; line_number = 429 ; string chans = "\5,2,1,0\" start ; chans = '\5,2,1,0\' chans: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw chans___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw chans___base ; Index to the correct return value movwf __pcl ; page_group 4 chans___base: retlw 5 retlw 2 retlw 1 retlw 0 ; line_number = 429 ; string chans = "\5,2,1,0\" start ; line_number = 430 ; string masks = "\1,2,4,8\" start ; masks = '\1,2,4,8\' masks: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw masks___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw masks___base ; Index to the correct return value movwf __pcl ; page_group 4 masks___base: retlw 1 retlw 2 retlw 4 retlw 8 ; line_number = 430 ; string masks = "\1,2,4,8\" start ; Appending 4 delayed procedures to code bank 0 ; buffer = '_robobricks_pic16f688' ; line_number = 17 ; procedure byte_get byte_get: ; arguments_none ; line_number = 19 ; returns byte ; # This procedure will return the next byte from the UART. ; # It continuously calls delay() while it is waiting. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 24 ; while !_rcif start byte_get__1: ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=0 (non-uniform delay) btfsc _rcif___byte, _rcif___bit goto byte_get__2 ; line_number = 25 ; in_byte_get := 1 bsf in_byte_get___byte, in_byte_get___bit ; line_number = 26 ; call delay() call delay ; line_number = 27 ; in_byte_get := 0 bcf in_byte_get___byte, in_byte_get___bit goto byte_get__1 byte_get__2: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=_rcif (data:00=>00 code:XX=>XX) ; line_number = 24 ; while !_rcif done ; line_number = 28 ; command_previous := command_last movf command_last,w movwf command_previous ; line_number = 29 ; _rcif := 0 bcf _rcif___byte, _rcif___bit ; line_number = 30 ; return _rcreg start ; line_number = 30 movf _rcreg,w return ; line_number = 30 ; return _rcreg done ; delay after procedure statements=non-uniform ; line_number = 33 ; procedure byte_put byte_put: ; Last argument is sitting in W; save into argument variable movwf byte_put__value ; delay=4294967295 ; line_number = 34 ; argument value byte byte_put__value equ globals___0 ; line_number = 35 ; returns_nothing ; # This procedure will output {value} to the UART. If the UART is ; # already busy transmitting a character, the {delay} procedure is ; # repeatably called until {value} can be sent. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 41 ; while !_trmt start byte_put__1: ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=2 true_test=false body_code.delay=0 (non-uniform delay) btfsc _trmt___byte, _trmt___bit goto byte_put__2 ; line_number = 42 ; call delay() call delay goto byte_put__1 byte_put__2: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=_trmt (data:00=>00 code:XX=>XX) ; line_number = 41 ; while !_trmt done ; line_number = 43 ; debug := 0 bcf debug___byte, debug___bit ; line_number = 44 ; sent_previous := sent_last movf sent_last,w movwf sent_previous ; line_number = 45 ; sent_last := value movf byte_put__value,w movwf sent_last ; line_number = 46 ; _txreg := value movf byte_put__value,w movwf _txreg ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 49 ; procedure baud_rate_low baud_rate_low: ; Last argument is sitting in W; save into argument variable movwf baud_rate_low__baud_rate_index ; delay=4294967295 ; line_number = 50 ; argument baud_rate_index byte baud_rate_low__baud_rate_index equ globals___0+1 ; line_number = 51 ; returns byte ; #: This procedure will return the baud rate low byte for {baud_rate_index}. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 55 ; switch baud_rate_index start movlw baud_rate_low__9>>8 movwf __pclath movf baud_rate_low__baud_rate_index,w addlw baud_rate_low__9 movwf __pcl ; page_group 8 baud_rate_low__9: ; line_number = 57 ; return _eusart_2400_low start ; line_number = 57 retlw 64 ; line_number = 57 ; return _eusart_2400_low done ; line_number = 59 ; return _eusart_4800_low start ; line_number = 59 retlw 159 ; line_number = 59 ; return _eusart_4800_low done ; line_number = 61 ; return _eusart_9600_low start ; line_number = 61 retlw 207 ; line_number = 61 ; return _eusart_9600_low done ; line_number = 63 ; return _eusart_19200_low start ; line_number = 63 retlw 103 ; line_number = 63 ; return _eusart_19200_low done ; line_number = 65 ; return _eusart_38400_low start ; line_number = 65 retlw 51 ; line_number = 65 ; return _eusart_38400_low done ; line_number = 67 ; return _eusart_57600_low start ; line_number = 67 retlw 33 ; line_number = 67 ; return _eusart_57600_low done ; line_number = 69 ; return _eusart_115200_low start ; line_number = 69 retlw 16 ; line_number = 69 ; return _eusart_115200_low done ; line_number = 71 ; return _eusart_203400_low start ; line_number = 71 retlw 8 ; line_number = 71 ; return _eusart_203400_low done baud_rate_low__10: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 55 ; switch baud_rate_index done ; delay after procedure statements=non-uniform ; Exiting procedure with no return(s); fail with infinite loop baud_rate_low__11: goto baud_rate_low__11 ; line_number = 74 ; procedure baud_rate_high baud_rate_high: ; Last argument is sitting in W; save into argument variable movwf baud_rate_high__baud_rate_index ; delay=4294967295 ; line_number = 75 ; argument baud_rate_index byte baud_rate_high__baud_rate_index equ globals___0+2 ; line_number = 76 ; returns byte ; # This procedure will return the baud rate high byte for ; # {baud_rate_index}. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 81 ; switch baud_rate_index start movlw baud_rate_high__9>>8 movwf __pclath movf baud_rate_high__baud_rate_index,w addlw baud_rate_high__9 movwf __pcl ; page_group 8 baud_rate_high__9: ; line_number = 83 ; return _eusart_2400_high start ; line_number = 83 retlw 3 ; line_number = 83 ; return _eusart_2400_high done ; line_number = 85 ; return _eusart_4800_high start ; line_number = 85 retlw 1 ; line_number = 85 ; return _eusart_4800_high done ; line_number = 87 ; return _eusart_9600_high start ; line_number = 87 retlw 0 ; line_number = 87 ; return _eusart_9600_high done ; line_number = 89 ; return _eusart_19200_high start ; line_number = 89 retlw 0 ; line_number = 89 ; return _eusart_19200_high done ; line_number = 91 ; return _eusart_38400_high start ; line_number = 91 retlw 0 ; line_number = 91 ; return _eusart_38400_high done ; line_number = 93 ; return _eusart_57600_high start ; line_number = 93 retlw 0 ; line_number = 93 ; return _eusart_57600_high done ; line_number = 95 ; return _eusart_115200_high start ; line_number = 95 retlw 0 ; line_number = 95 ; return _eusart_115200_high done ; line_number = 97 ; return _eusart_203400_high start ; line_number = 97 retlw 0 ; line_number = 97 ; return _eusart_203400_high done baud_rate_high__10: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 81 ; switch baud_rate_index done ; delay after procedure statements=non-uniform ; Exiting procedure with no return(s); fail with infinite loop baud_rate_high__11: goto baud_rate_high__11 ; Configuration bits ; fill = 0x3000 ; fcmen = off (0x0) ; ieso = off (0x0) ; boden = off (0x0) ; cpd = off (0x80) ; cp = off (0x40) ; mclre = off (0x20) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = int_no_clk (0x4) ; 12532 = 0x30f4 __config 12532 ; Define start addresses for data regions ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 ; Region="globals___0" Address=32" Size=80 Bytes=52 Bits=3 Available=27 ; Region="globals___1" Address=160" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___2" Address=288" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___3" Address=416" Size=80 Bytes=0 Bits=0 Available=80 end