radix dec ; Code bank 0; Start address: 0; End address: 1023 org 0 ; Define start addresses for data regions shared___globals equ 32 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # ############################################################################# ; # ; # Copyright (c) 2000-2004 by Wayne C. Gramlich & William T. Benson. ; # All rights reserved. ; # ; # This is the code that implements the IREdge4 RoboBrick. Basically ; # it just waits for commands that come in at 2400 baud and responds ; # to them. See ; # ; # http://web.gramlich.net/projects/robobricks/iredge4/index.html ; # ; # for more details. ; # ; # ############################################################################# ; buffer = 'iredge4' ; line_number = 16 ; library _pic16f676 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f676' ; line_number = 5 ; processor pic16f676 ; line_number = 6 ; configure_address 0x2007 ; line_number = 7 ; configure_fill 0x0000 ; line_number = 8 ; configure_option bg: bg11 = 0x3000 ; line_number = 9 ; configure_option bg: bg10 = 0x2000 ; line_number = 10 ; configure_option bg: bg01 = 0x1000 ; line_number = 11 ; configure_option bg: bg00 = 0x0000 ; line_number = 12 ; configure_option cpd: on = 0x000 ; line_number = 13 ; configure_option cpd: off = 0x100 ; line_number = 14 ; configure_option cp: on = 0x00 ; line_number = 15 ; configure_option cp: off = 0x80 ; line_number = 16 ; configure_option boden: on = 0x40 ; line_number = 17 ; configure_option boden: off = 0x00 ; line_number = 18 ; configure_option mclre: on = 0x20 ; line_number = 19 ; configure_option mclre: off = 0x00 ; line_number = 20 ; configure_option pwrte: on = 0x00 ; line_number = 21 ; configure_option pwrte: off = 0x10 ; line_number = 22 ; configure_option wdte: on = 8 ; line_number = 23 ; configure_option wdte: off = 0 ; line_number = 24 ; configure_option fosc: rc_clk = 7 ; line_number = 25 ; configure_option fosc: rc_no_clk = 6 ; line_number = 26 ; configure_option fosc: int_clk = 5 ; line_number = 27 ; configure_option fosc: int_no_clk = 4 ; line_number = 28 ; configure_option fosc: ec = 3 ; line_number = 29 ; configure_option fosc: hs = 2 ; line_number = 30 ; configure_option fosc: xt = 1 ; line_number = 31 ; configure_option fosc: lp = 0 ; line_number = 32 ; code_bank 0x0 : 0x3ff ; line_number = 33 ; data_bank 0x0 : 0x7f ; line_number = 34 ; data_bank 0x80 : 0xff ; line_number = 35 ; shared_region 0x20 : 0x5f ; line_number = 36 ; interrupts_possible ; line_number = 37 ; osccal_register_symbol _osccal ; line_number = 38 ; osccal_at_address 0x3ff ; line_number = 39 ; packages pdip=14, soic=14, tssop=14 ; line_number = 40 ; pin vdd, power_supply ; line_number = 41 ; pin_bindings pdip=1, soic=1, tssop=1 ; line_number = 42 ; pin ra5_in, ra5_out, t1cki, osc1, clkin ; line_number = 43 ; pin_bindings pdip=2, soic=2, tssop=2 ; line_number = 44 ; bind_to _porta@5 ; line_number = 45 ; or_if ra5_in _trisa 16 ; line_number = 46 ; or_if ra5_out _trisa 0 ; line_number = 47 ; pin ra4_in, ra4_out, t1g, osc2, an3, clkout ; line_number = 48 ; pin_bindings pdip=3, soic=3, tssop=3 ; line_number = 49 ; bind_to _porta@4 ; line_number = 50 ; or_if ra4_in _trisa 8 ; line_number = 51 ; or_if ra4_out _trisa 0 ; line_number = 52 ; or_if an3 _trisa 8 ; line_number = 53 ; or_if an3 _ansel 8 ; line_number = 54 ; or_if an3 _adcon0 1 ; line_number = 55 ; pin ra3_in, mclr, vpp ; line_number = 56 ; pin_bindings pdip=4, soic=4, tssop=4 ; line_number = 57 ; bind_to _porta@4 ; line_number = 58 ; or_if ra3_in _trisa 4 ; line_number = 59 ; pin rc5_in, rc5_out ; line_number = 60 ; pin_bindings pdip=5, soic=5, tssop=5 ; line_number = 61 ; bind_to _portc@5 ; line_number = 62 ; or_if rc5_in _trisc 32 ; line_number = 63 ; or_if rc5_out _trisc 0 ; line_number = 64 ; pin rc4_in, rc4_out ; line_number = 65 ; pin_bindings pdip=6, soic=6, tssop=6 ; line_number = 66 ; bind_to _portc@4 ; line_number = 67 ; or_if rc4_in _trisc 16 ; line_number = 68 ; or_if rc4_out _trisc 0 ; line_number = 69 ; pin rc3_in, rc3_out, an7 ; line_number = 70 ; pin_bindings pdip=7, soic=7, tssop=7 ; line_number = 71 ; bind_to _portc@3 ; line_number = 72 ; or_if rc3_in _trisc 8 ; line_number = 73 ; or_if rc3_out _trisc 0 ; line_number = 74 ; or_if an7 _trisc 8 ; line_number = 75 ; or_if an7 _ansel 128 ; line_number = 76 ; or_if an7 _adcon0 1 ; line_number = 77 ; pin rc2_in, rc2_out, an6 ; line_number = 78 ; pin_bindings pdip=8, soic=8, tssop=8 ; line_number = 79 ; bind_to _portc@2 ; line_number = 80 ; or_if rc2_in _trisc 4 ; line_number = 81 ; or_if rc2_out _trisc 0 ; line_number = 82 ; or_if an6 _trisc 4 ; line_number = 83 ; or_if an6 _ansel 64 ; line_number = 84 ; or_if an6 _adcon0 1 ; line_number = 85 ; pin rc1_in, rc1_out, an5 ; line_number = 86 ; pin_bindings pdip=9, soic=9, tssop=9 ; line_number = 87 ; bind_to _portc@1 ; line_number = 88 ; or_if rc1_in _trisc 2 ; line_number = 89 ; or_if rc1_out _trisc 0 ; line_number = 90 ; or_if an5 _trisc 2 ; line_number = 91 ; or_if an5 _ansel 32 ; line_number = 92 ; or_if an5 _adcon0 1 ; line_number = 93 ; pin rc0_in, rc0_out, an4 ; line_number = 94 ; pin_bindings pdip=10, soic=10, tssop=10 ; line_number = 95 ; bind_to _portc@0 ; line_number = 96 ; or_if rc0_in _trisc 1 ; line_number = 97 ; or_if rc0_out _trisc 0 ; line_number = 98 ; or_if an4 _trisc 1 ; line_number = 99 ; or_if an4 _ansel 16 ; line_number = 100 ; or_if an4 _adcon0 1 ; line_number = 101 ; pin ra2_in, ra2_out, an2, cout, t0cki, int ; line_number = 102 ; pin_bindings pdip=11, soic=11, tssop=11 ; line_number = 103 ; bind_to _porta@2 ; line_number = 104 ; or_if ra2_in _trisa 4 ; line_number = 105 ; or_if ra2_out _trisa 0 ; line_number = 106 ; or_if an2 _trisa 4 ; line_number = 107 ; or_if an2 _ansel 4 ; line_number = 108 ; or_if an2 _adcon0 1 ; line_number = 109 ; pin ra1_in, ra1_out, an1, cin_minus, vref, icspclk ; line_number = 110 ; pin_bindings pdip=12, soic=12, tssop=12 ; line_number = 111 ; bind_to _porta@1 ; line_number = 112 ; or_if ra1_in _trisa 2 ; line_number = 113 ; or_if ra1_out _trisa 0 ; line_number = 114 ; or_if an1 _trisa 2 ; line_number = 115 ; or_if an1 _ansel 2 ; line_number = 116 ; or_if an1 _adcon0 1 ; line_number = 117 ; pin ra0_in, ra0_out, an0, cin_plus, icspdat ; line_number = 118 ; pin_bindings pdip=13, soic=13, tssop=13 ; line_number = 119 ; bind_to _porta@0 ; line_number = 120 ; or_if ra0_in _trisa 1 ; line_number = 121 ; or_if ra0_out _trisa 0 ; line_number = 122 ; or_if an0 _trisa 1 ; line_number = 123 ; or_if an0 _ansel 1 ; line_number = 124 ; or_if an0 _adcon0 1 ; line_number = 125 ; pin vss, ground ; line_number = 126 ; pin_bindings pdip=14, soic=14, tssop=14 ; line_number = 131 ; library _pic16f630_676 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # Shared register definitions for the PIC16F630 and PIC16F676. ; buffer = '_pic16f630_676' ; line_number = 7 ; register _indf = _indf equ 0 ; line_number = 9 ; register _tmr0 = _tmr0 equ 1 ; line_number = 11 ; register _pcl = _pcl equ 2 ; line_number = 13 ; register _status = _status equ 3 ; line_number = 14 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 15 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 16 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 17 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 18 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 19 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 21 ; register _fsr = _fsr equ 4 ; line_number = 23 ; register _porta = _porta equ 5 ; line_number = 24 ; register _ra = _ra equ 5 ; line_number = 25 ; bind _ra5 = _porta@5 _ra5___byte equ _porta _ra5___bit equ 5 ; line_number = 26 ; bind _ra4 = _porta@4 _ra4___byte equ _porta _ra4___bit equ 4 ; line_number = 27 ; bind _ra3 = _porta@3 _ra3___byte equ _porta _ra3___bit equ 3 ; line_number = 28 ; bind _ra2 = _porta@2 _ra2___byte equ _porta _ra2___bit equ 2 ; line_number = 29 ; bind _ra1 = _porta@1 _ra1___byte equ _porta _ra1___bit equ 1 ; line_number = 30 ; bind _ra0 = _porta@0 _ra0___byte equ _porta _ra0___bit equ 0 ; line_number = 32 ; register _portc = _portc equ 7 ; line_number = 33 ; register _rc = _rc equ 7 ; line_number = 34 ; bind _rc5 = _portc@5 _rc5___byte equ _portc _rc5___bit equ 5 ; line_number = 35 ; bind _rc4 = _portc@4 _rc4___byte equ _portc _rc4___bit equ 4 ; line_number = 36 ; bind _rc3 = _portc@3 _rc3___byte equ _portc _rc3___bit equ 3 ; line_number = 37 ; bind _rc2 = _portc@2 _rc2___byte equ _portc _rc2___bit equ 2 ; line_number = 38 ; bind _rc1 = _portc@1 _rc1___byte equ _portc _rc1___bit equ 1 ; line_number = 39 ; bind _rc0 = _portc@0 _rc0___byte equ _portc _rc0___bit equ 0 ; line_number = 41 ; register _pclath = _pclath equ 10 ; line_number = 43 ; register _intcon = _intcon equ 11 ; line_number = 44 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 45 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 46 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 47 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 48 ; bind _raie = _intcon@3 _raie___byte equ _intcon _raie___bit equ 3 ; line_number = 49 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 50 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 51 ; bind _raif = _intcon@0 _raif___byte equ _intcon _raif___bit equ 0 ; line_number = 53 ; register _pir1 = _pir1 equ 12 ; line_number = 54 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 55 ; bind _cmif = _pir1@3 _cmif___byte equ _pir1 _cmif___bit equ 3 ; line_number = 56 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 58 ; register _tmr1l = _tmr1l equ 14 ; line_number = 60 ; register _tmr1h = _tmr1h equ 15 ; line_number = 62 ; register _t1con = _t1con equ 16 ; line_number = 63 ; bind _t1ge = _t1con@6 _t1ge___byte equ _t1con _t1ge___bit equ 6 ; line_number = 64 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 65 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 66 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 67 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 68 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 69 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 71 ; register _cmcon = _cmcon equ 25 ; line_number = 72 ; bind _cout = _cmcon@6 _cout___byte equ _cmcon _cout___bit equ 6 ; line_number = 73 ; bind _cinv = _cmcon@4 _cinv___byte equ _cmcon _cinv___bit equ 4 ; line_number = 74 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 75 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 76 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 77 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 81 ; register _option_reg = _option_reg equ 128 ; line_number = 82 ; bind _rapu = _option_reg@7 _rapu___byte equ _option_reg _rapu___bit equ 7 ; line_number = 83 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 84 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 85 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 86 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 87 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 88 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 89 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 91 ; register _trisa = _trisa equ 133 ; line_number = 92 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 93 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 94 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 95 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 96 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 97 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 99 ; register _trisc = _trisc equ 135 ; line_number = 100 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 101 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 102 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 103 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 104 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 105 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 107 ; register _pie1 = _pie1 equ 140 ; line_number = 108 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 109 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 110 ; bind _cmie = _pie1@3 _cmie___byte equ _pie1 _cmie___bit equ 3 ; line_number = 111 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 113 ; register _pcon = _pcon equ 142 ; line_number = 114 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 115 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 117 ; register _osccal = _osccal equ 144 ; line_number = 118 ; bind _cal5 = _osccal@7 _cal5___byte equ _osccal _cal5___bit equ 7 ; line_number = 119 ; bind _cal4 = _osccal@6 _cal4___byte equ _osccal _cal4___bit equ 6 ; line_number = 120 ; bind _cal3 = _osccal@5 _cal3___byte equ _osccal _cal3___bit equ 5 ; line_number = 121 ; bind _cal2 = _osccal@4 _cal2___byte equ _osccal _cal2___bit equ 4 ; line_number = 122 ; bind _cal1 = _osccal@3 _cal1___byte equ _osccal _cal1___bit equ 3 ; line_number = 123 ; bind _cal0 = _osccal@2 _cal0___byte equ _osccal _cal0___bit equ 2 ; line_number = 124 ; constant _osccal_lsb = 4 _osccal_lsb equ 4 ; line_number = 126 ; register _wpua = _wpua equ 149 ; line_number = 127 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 128 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 129 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 130 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 131 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 133 ; register _ioca = _ioca equ 150 ; line_number = 134 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 135 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 136 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 137 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 138 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 139 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 141 ; register _vrcon = _vrcon equ 153 ; line_number = 142 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 143 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 144 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 145 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 146 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 147 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 149 ; register _eedata = _eedata equ 154 ; line_number = 151 ; register _eeadr = _eeadr equ 155 ; line_number = 153 ; register _eecon1 = _eecon1 equ 156 ; line_number = 154 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 155 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 156 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 157 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 159 ; register _eecon2 = _eecon2 equ 157 ; buffer = '_pic16f676' ; line_number = 131 ; library _pic16f630_676 exited ; # The only difference between the PIC16F676 and the PIC16F630 is that ; # the 'F676 has 8 channels of A/D and the 'F630 does not. ; line_number = 136 ; register _adresh = _adresh equ 30 ; # The {_adif} flag is only avaiable for the PIC16F676: ; line_number = 139 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 141 ; register _adcon0 = _adcon0 equ 31 ; line_number = 142 ; bind _adfm = _adcon0@7 _adfm___byte equ _adcon0 _adfm___bit equ 7 ; line_number = 143 ; bind _vcfg = _adcon0@5 _vcfg___byte equ _adcon0 _vcfg___bit equ 5 ; line_number = 144 ; bind _chs2 = _adcon0@4 _chs2___byte equ _adcon0 _chs2___bit equ 4 ; line_number = 145 ; bind _chs1 = _adcon0@3 _chs1___byte equ _adcon0 _chs1___bit equ 3 ; line_number = 146 ; bind _chs0 = _adcon0@2 _chs0___byte equ _adcon0 _chs0___bit equ 2 ; line_number = 147 ; bind _go = _adcon0@1 _go___byte equ _adcon0 _go___bit equ 1 ; line_number = 148 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; line_number = 150 ; register _adsel = _adsel equ 145 ; line_number = 151 ; bind _ans7 = _adsel@7 _ans7___byte equ _adsel _ans7___bit equ 7 ; line_number = 152 ; bind _ans6 = _adsel@6 _ans6___byte equ _adsel _ans6___bit equ 6 ; line_number = 153 ; bind _ans5 = _adsel@5 _ans5___byte equ _adsel _ans5___bit equ 5 ; line_number = 154 ; bind _ans4 = _adsel@4 _ans4___byte equ _adsel _ans4___bit equ 4 ; line_number = 155 ; bind _ans3 = _adsel@3 _ans3___byte equ _adsel _ans3___bit equ 3 ; line_number = 156 ; bind _ans2 = _adsel@2 _ans2___byte equ _adsel _ans2___bit equ 2 ; line_number = 157 ; bind _ans1 = _adsel@1 _ans1___byte equ _adsel _ans1___bit equ 1 ; line_number = 158 ; bind _ans0 = _adsel@0 _ans0___byte equ _adsel _ans0___bit equ 0 ; line_number = 160 ; register _adresl = _adresl equ 158 ; line_number = 162 ; register _adcon1 = _adcon1 equ 159 ; line_number = 163 ; bind _adcs2 = _adcon1@6 _adcs2___byte equ _adcon1 _adcs2___bit equ 6 ; line_number = 164 ; bind _adcs1 = _adcon1@5 _adcs1___byte equ _adcon1 _adcs1___bit equ 5 ; line_number = 165 ; bind _adcs0 = _adcon1@4 _adcs0___byte equ _adcon1 _adcs0___bit equ 4 ; buffer = 'iredge4' ; line_number = 16 ; library _pic16f676 exited ; line_number = 17 ; library clock4mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock4mhz' ; line_number = 9 ; constant clock_rate = 4000000 clock_rate equ 4000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 1000000 ; buffer = 'iredge4' ; line_number = 17 ; library clock4mhz exited ; line_number = 18 ; library bit_bang entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library provides bit bang routines for sending and receiving ; # serial data at 2400 baud in 8N1 format (1 start bit, 8 data bits, ; # No parity bit, 1 stop stop bit.) ; # ; # This library requires that the pins {serial_in} and {serial_out} ; # be defined. In addition, the variable {instruction_rate} needs ; # to be defined. Lastly, there needs to be a {delay} procedure ; # with an "exact_delay delay_instructions" clause in it. The {delay} ; # routine should invoke "watch_dog_reset" so that the watch dog time ; # can be set. ; # Define some constants that we will be needing: ; buffer = 'bit_bang' ; line_number = 17 ; constant baud_rate = 2400 baud_rate equ 2400 ; line_number = 18 ; constant instructions_per_bit = instruction_rate / baud_rate instructions_per_bit equ 416 ; line_number = 19 ; constant delays_per_bit = 3 delays_per_bit equ 3 ; line_number = 20 ; constant instructions_per_delay = instructions_per_bit / delays_per_bit instructions_per_delay equ 138 ; line_number = 21 ; constant extra_instructions = 5 extra_instructions equ 5 ; line_number = 22 ; constant delay_instructions = instructions_per_delay - extra_instructions delay_instructions equ 133 ; # The {receiving} bit is sent when data is being received. ; # It gets cleared whenever data gets sent. It is used to ; # determine whether additional delay is needed to turn a ; # line around for slow interpretted chips like the Basic ; # Stamp 2 and the OOPIC. ; line_number = 30 ; global receiving bit receiving___byte equ shared___globals+63 receiving___bit equ 0 ; line_number = 31 ; global waiting bit waiting___byte equ shared___globals+63 waiting___bit equ 1 ; Delaying code generation for procedure byte_get ; Delaying code generation for procedure byte_put ; buffer = 'iredge4' ; line_number = 18 ; library bit_bang exited ; line_number = 20 ; package pdip ; line_number = 21 ; pin 1 = power_supply ; line_number = 22 ; pin 2 = ra5_out, name = serial_out serial_out___byte equ _porta serial_out___bit equ 5 ; line_number = 23 ; pin 3 = ra4_out, name = led1 led1___byte equ _porta led1___bit equ 4 ; line_number = 24 ; pin 4 = ra3_in, name = serial_in serial_in___byte equ _porta serial_in___bit equ 4 ; line_number = 25 ; pin 5 = rc5_out, name = led2 led2___byte equ _portc led2___bit equ 5 ; line_number = 26 ; pin 6 = rc4_out, name = led3 led3___byte equ _portc led3___bit equ 4 ; line_number = 27 ; pin 7 = rc3_out, name = led4 led4___byte equ _portc led4___bit equ 3 ; line_number = 28 ; pin 8 = rc2_out, name = debug_out debug_out___byte equ _portc debug_out___bit equ 2 ; line_number = 29 ; pin 9 = an5, name = in0 in0___byte equ _portc in0___bit equ 1 ; line_number = 30 ; pin 10 = an4, name = in1 in1___byte equ _portc in1___bit equ 0 ; line_number = 31 ; pin 11 = an2, name = cal cal___byte equ _porta cal___bit equ 2 ; line_number = 32 ; pin 12 = an1, name = in2 in2___byte equ _porta in2___bit equ 1 ; line_number = 33 ; pin 13 = an0, name = in3 in3___byte equ _porta in3___bit equ 0 ; line_number = 34 ; pin 14 = ground ; line_number = 36 ; constant analogs_size = 4 analogs_size equ 4 ; line_number = 37 ; constant io_mask = 0xf io_mask equ 15 ; line_number = 38 ; constant threshold_default = 0x80 threshold_default equ 128 ; line_number = 40 ; global analogs[analogs_size] array[byte] analogs equ shared___globals+4 ; line_number = 41 ; global thresholds_low[analogs_size] array[byte] thresholds_low equ shared___globals+8 ; line_number = 42 ; global thresholds_high[analogs_size] array[byte] thresholds_high equ shared___globals+12 ; line_number = 43 ; global delay_counter byte delay_counter equ shared___globals+16 ; line_number = 44 ; global channel byte channel equ shared___globals+17 ; line_number = 45 ; global glitch byte glitch equ shared___globals+18 ; line_number = 46 ; global id_index byte id_index equ shared___globals+19 ; line_number = 47 ; global debug_character byte debug_character equ shared___globals+20 ; line_number = 48 ; global debug_phase byte debug_phase equ shared___globals+21 ; line_number = 49 ; global debug_counter byte debug_counter equ shared___globals+22 ; line_number = 50 ; global debug_next bit debug_next___byte equ shared___globals+63 debug_next___bit equ 2 ; line_number = 52 ; constant vars_size = 17 vars_size equ 17 ; line_number = 53 ; global vars[vars_size] byte vars equ shared___globals+23 ; line_number = 54 ; bind threshold_trim_pot = vars[0] threshold_trim_pot equ shared___globals+23 ; line_number = 55 ; bind inputs = vars[1] inputs equ shared___globals+24 ; line_number = 56 ; bind complement = vars[2] complement equ shared___globals+25 ; line_number = 57 ; bind command = vars[3] command equ shared___globals+26 ; line_number = 58 ; bind last_sent = vars[4] last_sent equ shared___globals+27 ; line_number = 59 ; bind last_received =vars[5] last_received equ shared___globals+28 ; line_number = 60 ; bind raw_inputs = vars[6] raw_inputs equ shared___globals+29 ; line_number = 61 ; bind interrupt_bits = vars[7] interrupt_bits equ shared___globals+30 ; line_number = 62 ; bind falling = vars[8] falling equ shared___globals+31 ; line_number = 63 ; bind high = vars[9] high equ shared___globals+32 ; line_number = 64 ; bind low = vars[10] low equ shared___globals+33 ; line_number = 65 ; bind raising = vars[11] raising equ shared___globals+34 ; line_number = 66 ; bind threshold_enables = vars[12] threshold_enables equ shared___globals+35 ; line_number = 67 ; bind command_previous = vars[13] command_previous equ shared___globals+36 ; line_number = 68 ; bind command_last = vars[14] command_last equ shared___globals+37 ; line_number = 69 ; bind sent_previous = vars[15] sent_previous equ shared___globals+38 ; line_number = 70 ; bind sent_last = vars[16] sent_last equ shared___globals+39 ; line_number = 72 ; bind interrupt_enable = interrupt_bits@1 interrupt_enable___byte equ shared___globals+30 interrupt_enable___bit equ 1 ; line_number = 73 ; bind interrupt_pending = interrupt_bits@0 interrupt_pending___byte equ shared___globals+30 interrupt_pending___bit equ 0 ; line_number = 75 ; procedure main main: ; Need to calibrate the oscillator call 1023 bsf __rp0___byte, __rp0___bit movwf _osccal ; Initialize some registers movlw 1 bcf __rp0___byte, __rp0___bit movwf _adcon0 movlw 7 bsf __rp0___byte, __rp0___bit movwf _trisa movlw 3 movwf _trisc ; arguments_none ; line_number = 77 ; returns_nothing ; line_number = 79 ; local bit byte main__bit equ shared___globals+40 ; line_number = 80 ; local temporary byte main__temporary equ shared___globals+41 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) ; line_number = 82 ; call reset() bcf __rp0___byte, __rp0___bit call reset ; # Set the direction: ; line_number = 85 ; loop_forever start main__1: ; # Wait for a command: ; line_number = 87 ; command := byte_get() call byte_get movwf command ; # Dispatch on command: ; line_number = 90 ; switch command >> 6 start movlw main__80>>8 movwf __pclath main__81 equ shared___globals+54 swapf command,w movwf main__81 rrf main__81,f rrf main__81,w andlw 3 addlw main__80 movwf __pcl ; page_group 4 main__80: goto main__76 goto main__77 goto main__78 goto main__79 ; line_number = 91 ; case 0 main__76: ; # Command = 00xx xxxx: ; line_number = 93 ; switch command >> 3 start movlw main__33>>8 movwf __pclath main__34 equ shared___globals+54 rrf command,w movwf main__34 rrf main__34,f rrf main__34,w andlw 31 addlw main__33 movwf __pcl ; page_group 8 main__33: goto main__28 goto main__29 goto main__30 goto main__30 goto main__31 goto main__31 goto main__32 goto main__32 ; line_number = 94 ; case 0 main__28: ; # Command = 0000 0xxx: ; line_number = 96 ; switch command & 7 start movlw main__7>>8 movwf __pclath movlw 7 andwf command,w addlw main__7 movwf __pcl ; page_group 8 main__7: goto main__2 goto main__2 goto main__2 goto main__2 goto main__3 goto main__4 goto main__5 goto main__6 ; line_number = 97 ; case 0, 1, 2, 3 main__2: ; # Read Pin (Command = 0000 00bb): ; line_number = 99 ; call byte_put(analogs[command]) movf command,w addlw analogs movwf __fsr movf __indf,w call byte_put goto main__8 ; line_number = 100 ; case 4 main__3: ; # Read Binary Values (Command = 0000 0100): ; line_number = 102 ; call byte_put(inputs) movf inputs,w call byte_put goto main__8 ; line_number = 103 ; case 5 main__4: ; # Read Raw Binary (Command = 0000 0101): ; line_number = 105 ; call byte_put(raw_inputs) movf raw_inputs,w call byte_put goto main__8 ; line_number = 106 ; case 6 main__5: ; # Read Threshold Enables (Command = 0000 0110): ; line_number = 108 ; call byte_put(threshold_enables) movf threshold_enables,w call byte_put goto main__8 ; line_number = 109 ; case 7 main__6: ; # Reset (Command = 0000 0111): ; line_number = 111 ; call reset() call reset main__8: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 96 ; switch command & 7 done goto main__35 ; line_number = 112 ; case 1 main__29: ; # Command = 0000 1xxx: ; line_number = 114 ; switch command & 7 start movlw main__15>>8 movwf __pclath movlw 7 andwf command,w addlw main__15 movwf __pcl ; page_group 8 main__15: goto main__9 goto main__10 goto main__11 goto main__12 goto main__13 goto main__14 goto main__14 goto main__14 ; line_number = 115 ; case 0 main__9: ; # Read Complement Mask(Command = 0000 1000): ; line_number = 117 ; call byte_put(complement) movf complement,w call byte_put goto main__16 ; line_number = 118 ; case 1 main__10: ; # Read High Mask (Command = 0000 1001): ; line_number = 120 ; call byte_put(high) movf high,w call byte_put goto main__16 ; line_number = 121 ; case 2 main__11: ; # Read Low Mask (Command = 0000 1010): ; line_number = 123 ; call byte_put(low) movf low,w call byte_put goto main__16 ; line_number = 124 ; case 3 main__12: ; # Read Raising Mask (Command = 0000 1011): ; line_number = 126 ; call byte_put(raising) movf raising,w call byte_put goto main__16 ; line_number = 127 ; case 4 main__13: ; # Read Falling Mask (Command = 0000 1100): ; line_number = 129 ; call byte_put(falling) movf falling,w call byte_put goto main__16 ; line_number = 130 ; case 5, 6, 7 main__14: ; # Undefined command: ; line_number = 132 ; do_nothing main__16: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 114 ; switch command & 7 done goto main__35 ; line_number = 133 ; case 2, 3 main__30: ; # Command = 0001 xxxx: ; line_number = 135 ; bit := command & 3 movlw 3 andwf command,w movwf main__bit ; line_number = 136 ; switch (command >> 2) & 3 start movlw main__25>>8 movwf __pclath main__26 equ shared___globals+54 rrf command,w movwf main__26 rrf main__26,w andlw 3 addlw main__25 movwf __pcl ; page_group 4 main__25: goto main__21 goto main__22 goto main__23 goto main__24 ; line_number = 137 ; case 0 main__21: ; # Read High Threshold (Command = 0001 00bb): ; line_number = 139 ; call byte_put(thresholds_high[bit]) movf main__bit,w addlw thresholds_high movwf __fsr movf __indf,w call byte_put goto main__27 ; line_number = 140 ; case 1 main__22: ; # Read Low Threshold (Command = 0001 01bb): ; line_number = 142 ; call byte_put(thresholds_low[bit]) movf main__bit,w addlw thresholds_low movwf __fsr movf __indf,w call byte_put goto main__27 ; line_number = 143 ; case 2 main__23: ; # Set High Threshold (Command = 0001 10bb): ; line_number = 145 ; thresholds_high[bit] := byte_get() ; index_temporary_first main__17 equ shared___globals+54 main__18 equ shared___globals+55 movf main__bit,w movwf main__17 call byte_get movwf main__18 movf main__17,w addlw thresholds_high movwf __fsr movf main__18,w movwf __indf goto main__27 ; line_number = 146 ; case 3 main__24: ; # Set Low Threshold (Command = 0001 11bb): ; line_number = 148 ; thresholds_low[bit] := byte_get() ; index_temporary_first main__19 equ shared___globals+54 main__20 equ shared___globals+55 movf main__bit,w movwf main__19 call byte_get movwf main__20 movf main__19,w addlw thresholds_low movwf __fsr movf main__20,w movwf __indf main__27: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 136 ; switch (command >> 2) & 3 done goto main__35 ; line_number = 149 ; case 4, 5 main__31: ; # Set Complement Mask (Command = 0010 cccc): ; line_number = 151 ; complement := command & io_mask movlw 15 andwf command,w movwf complement goto main__35 ; line_number = 152 ; case 6, 7 main__32: ; line_number = 153 ; do_nothing main__35: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 93 ; switch command >> 3 done goto main__82 ; line_number = 154 ; case 1 main__77: ; # Command = 01xx xxxx: ; line_number = 156 ; temporary := command & io_mask movlw 15 andwf command,w movwf main__temporary ; line_number = 157 ; switch (command >> 4) & 3 start movlw main__40>>8 movwf __pclath main__41 equ shared___globals+54 swapf command,w andlw 3 addlw main__40 movwf __pcl ; page_group 4 main__40: goto main__36 goto main__37 goto main__38 goto main__39 ; line_number = 158 ; case 0 main__36: ; # Set High Mask (Command = 0100 hhhh): ; line_number = 160 ; high := temporary movf main__temporary,w movwf high goto main__42 ; line_number = 161 ; case 1 main__37: ; # Set Low Mask (Command = 0101 llll): ; line_number = 163 ; low := temporary movf main__temporary,w movwf low goto main__42 ; line_number = 164 ; case 2 main__38: ; # Set Raising Mask (Command = 0110 rrrr): ; line_number = 166 ; raising := temporary movf main__temporary,w movwf raising goto main__42 ; line_number = 167 ; case 3 main__39: ; # Set Falling Mask (Command = 0111 ffff): ; line_number = 169 ; falling := temporary movf main__temporary,w movwf falling main__42: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 157 ; switch (command >> 4) & 3 done goto main__82 ; line_number = 170 ; case 2 main__78: ; # Do nothing (Command = 10xx xxxx): ; line_number = 172 ; switch (command >> 3) & 7 start movlw main__45>>8 movwf __pclath main__46 equ shared___globals+54 rrf command,w movwf main__46 rrf main__46,f rrf main__46,w andlw 7 addlw main__45 movwf __pcl ; page_group 8 main__45: goto main__43 goto main__43 goto main__44 goto main__44 goto main__44 goto main__44 goto main__44 goto main__44 ; line_number = 173 ; case 0, 1 main__43: ; # Set Threshold Enables (1000 eeee): ; line_number = 175 ; threshold_enables := command & 0xf movlw 15 andwf command,w movwf threshold_enables goto main__47 ; line_number = 176 ; case 2, 3, 4, 5, 6, 7 main__44: ; # Others: ; line_number = 178 ; do_nothing main__47: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 172 ; switch (command >> 3) & 7 done goto main__82 ; line_number = 179 ; case 3 main__79: ; # Command = 11xx xxxx: ; line_number = 181 ; switch (command >> 3) & 7 start movlw main__73>>8 movwf __pclath main__74 equ shared___globals+54 rrf command,w movwf main__74 rrf main__74,f rrf main__74,w andlw 7 addlw main__73 movwf __pcl ; page_group 8 main__73: goto main__69 goto main__69 goto main__69 goto main__69 goto main__69 goto main__70 goto main__71 goto main__72 ; line_number = 182 ; case 0, 1, 2, 3, 4 main__69: ; # Command = 1100 xxxx or 1110 0xxx: ; line_number = 184 ; do_nothing goto main__75 ; line_number = 185 ; case 5 main__70: ; # Read Interrupt Bits (Command = 1110 1111): ; line_number = 187 ; if (command & 7) = 7 start ; Left minus Right movlw 7 andwf command,w addlw 249 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss __z___byte, __z___bit goto main__48 ; # Return Interrupt Bits: ; line_number = 189 ; call byte_put(interrupt_bits) movf interrupt_bits,w call byte_put ; Recombine size1 = 0 || size2 = 0 main__48: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 187 ; if (command & 7) = 7 done goto main__75 ; line_number = 190 ; case 6 main__71: ; # Shared Interrupt commands (Command = 1111 0xxx): ; line_number = 192 ; switch command & 7 start movlw main__56>>8 movwf __pclath movlw 7 andwf command,w addlw main__56 movwf __pcl ; page_group 8 main__56: goto main__53 goto main__53 goto main__53 goto main__53 goto main__54 goto main__54 goto main__55 goto main__55 ; line_number = 193 ; case 0, 1, 2, 3 main__53: ; # Set interrupt bits (Command = 1111 10ep): ; line_number = 195 ; interrupt_enable := command@1 bcf interrupt_enable___byte, interrupt_enable___bit main__select__49___byte equ command main__select__49___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__49___byte, main__select__49___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__49 (data:X0=>X0 code:XX=>XX) ; line_number = 196 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__50___byte equ command main__select__50___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__50___byte, main__select__50___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__50 (data:X0=>X0 code:XX=>XX) goto main__57 ; line_number = 197 ; case 4, 5 main__54: ; # Set Interrupt Pending (Command = 1111 110p): ; line_number = 199 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__51___byte equ command main__select__51___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__51___byte, main__select__51___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__51 (data:X0=>X0 code:XX=>XX) goto main__57 ; line_number = 200 ; case 6, 7 main__55: ; # Set Interrupt Enable (Command = 1110 111e): ; line_number = 202 ; interrupt_enable := command@0 bcf interrupt_enable___byte, interrupt_enable___bit main__select__52___byte equ command main__select__52___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__52___byte, main__select__52___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__52 (data:X0=>X0 code:XX=>XX) main__57: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 192 ; switch command & 7 done goto main__75 ; line_number = 203 ; case 7 main__72: ; # Shared commands (Command = 1111 1xxx): ; line_number = 205 ; switch command & 7 start movlw main__67>>8 movwf __pclath movlw 7 andwf command,w addlw main__67 movwf __pcl ; page_group 8 main__67: goto main__59 goto main__60 goto main__61 goto main__62 goto main__63 goto main__64 goto main__65 goto main__66 ; line_number = 206 ; case 0 main__59: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Decrement (Command = 1111 1000): ; line_number = 208 ; _osccal := _osccal - _osccal_lsb movlw 252 addwf _osccal,f goto main__68 ; line_number = 209 ; case 1 main__60: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Increment (Command = 1111 1001): ; line_number = 211 ; _osccal := _osccal + _osccal_lsb movlw 4 addwf _osccal,f goto main__68 ; line_number = 212 ; case 2 main__61: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Read (Command = 1111 1010): ; line_number = 214 ; call byte_put(_osccal) movf _osccal,w bcf __rp0___byte, __rp0___bit call byte_put goto main__68 ; line_number = 215 ; case 3 main__62: ; # Clock Pulse (Command = 1111 1011): ; line_number = 217 ; call byte_put(0) movlw 0 call byte_put goto main__68 ; line_number = 218 ; case 4 main__63: ; # ID Next (Command = 1111 1100): ; line_number = 220 ; call byte_put(id[id_index]) movf id_index,w call id call byte_put ; line_number = 221 ; id_index := id_index + 1 incf id_index,f ; line_number = 222 ; if id_index >= id.size start movlw 47 subwf id_index,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss __c___byte, __c___bit goto main__58 ; line_number = 223 ; id_index := 0 movlw 0 movwf id_index ; Recombine size1 = 0 || size2 = 0 main__58: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; line_number = 222 ; if id_index >= id.size done goto main__68 ; line_number = 224 ; case 5 main__64: ; # ID Reset (Command = 1111 1101): ; line_number = 226 ; id_index := 0 movlw 0 movwf id_index goto main__68 ; line_number = 227 ; case 6 main__65: ; # Glitch Read (Command = 1111 1110): ; line_number = 229 ; call byte_put(glitch) movf glitch,w call byte_put ; line_number = 230 ; glitch := 0 movlw 0 movwf glitch goto main__68 ; line_number = 231 ; case 7 main__66: ; # Glitch (Command = 1111 1111): ; line_number = 233 ; if glitch != 0xff start ; Left minus Right incf glitch,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 234 ; glitch := glitch + 1 incf glitch,f ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 233 ; if glitch != 0xff done main__68: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 205 ; switch command & 7 done main__75: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 181 ; switch (command >> 3) & 7 done main__82: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 90 ; switch command >> 6 done ; line_number = 85 ; loop_forever wrap-up ; Need to adjust code banks to match front of loop bcf __rp0___byte, __rp0___bit goto main__1 ; line_number = 85 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 236 ; procedure delay delay: ; arguments_none ; line_number = 238 ; returns_nothing ; line_number = 239 ; exact_delay delay_instructions ; line_number = 241 ; local chan byte delay__chan equ shared___globals+42 ; line_number = 242 ; local changed byte delay__changed equ shared___globals+43 ; line_number = 243 ; local current byte delay__current equ shared___globals+44 ; line_number = 244 ; local hexify bit delay__hexify___byte equ shared___globals+63 delay__hexify___bit equ 3 ; line_number = 245 ; local index byte delay__index equ shared___globals+45 ; line_number = 246 ; local mask byte delay__mask equ shared___globals+46 ; line_number = 247 ; local not_current byte delay__not_current equ shared___globals+47 ; line_number = 248 ; local previous byte delay__previous equ shared___globals+48 ; line_number = 249 ; local temp byte delay__temp equ shared___globals+49 ; line_number = 250 ; local thresholds_index byte delay__thresholds_index equ shared___globals+50 ; line_number = 251 ; local high byte delay__high equ shared___globals+51 ; line_number = 252 ; local low byte delay__low equ shared___globals+52 ; before procedure statements delay=0, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 254 ; watch_dog_reset done ; Delay at watch_dog_reset is 0 clrwdt ; line_number = 256 ; switch delay_counter start movlw delay__49>>8 movwf __pclath movf delay_counter,w addlw delay__49 movwf __pcl ; page_group 4 delay__49: goto delay__45 goto delay__46 goto delay__47 goto delay__48 ; case_data[0] delay=89{0 } ; case_data[1] delay=93{1 } ; case_data[2] delay=58{2 } ; case_data[3] delay=0{3 } ; Maximum Case Delay = 93 ; line_number = 257 ; case 0 delay__45: ; # Perform A/D: ; line_number = 259 ; chan := chans[channel] ; Delay at assignment is 0 movf channel,w call chans movwf delay__chan ; # Acquiring the signal takes approximately 20uS. ; # We'll pad that out a little to 30uS to be safe: ; line_number = 263 ; _adcon0 := (chan << 2) | 1 ; Delay at assignment is 13 delay__1 equ shared___globals+56 rlf delay__chan,w movwf delay__1 rlf delay__1,w andlw 252 iorlw 1 movwf _adcon0 ; Delay at delay is 19 ; line_number = 264 ; delay 30 start ; Delay expression evaluates to 30 ; line_number = 265 ; do_nothing ; Delay 30 cycles ; Delay loop takes 7 * 4 = 28 cycles movlw 7 delay__2: addlw 255 btfss __z___byte, __z___bit goto delay__2 goto delay__3 delay__3: ; line_number = 264 ; delay 30 done ; # Getting the value takes 11 & Tad, where Tad = 2uS = 22uS. ; # We'll add 5uS for a little pad: ; line_number = 269 ; _go := 1 ; Delay at assignment is 49 bsf _go___byte, _go___bit ; Delay at delay is 50 ; line_number = 270 ; delay 28 start ; Delay expression evaluates to 28 ; line_number = 271 ; do_nothing ; Delay 28 cycles ; Delay loop takes 7 * 4 = 28 cycles movlw 7 delay__4: addlw 255 btfss __z___byte, __z___bit goto delay__4 ; line_number = 270 ; delay 28 done ; # A/D result is ready: ; line_number = 274 ; temp := 0xff - _adresh ; Delay at assignment is 78 comf _adresh,w movwf delay__temp ; # Store the result away: ; line_number = 277 ; if channel@2 start ; Delay at if is 80 delay__select__5___byte equ channel delay__select__5___bit equ 2 ; (after recombine) true_delay=2, false_delay=5 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=2 false_code_size=5 btfss delay__select__5___byte, delay__select__5___bit goto delay__6 ; # Deal with threshold trim pot: ; line_number = 279 ; threshold_trim_pot := temp ; Delay at assignment is 0 movf delay__temp,w movwf threshold_trim_pot ; Delay 2 cycles goto delay__8 delay__8: goto delay__7 delay__6: ; line_number = 281 ; analogs[channel] := temp ; Delay at assignment is 0 ; index_fsr_first movf channel,w addlw analogs movwf __fsr movf delay__temp,w movwf __indf delay__7: ; code.delay=88 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__5 (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=5 code delay=88 ; line_number = 277 ; if channel@2 done ; # Next time around, do case 1: ; line_number = 284 ; delay_counter := delay_counter + 1 ; Delay at assignment is 88 incf delay_counter,f ; Delay 4 cycles goto delay__51 delay__51: goto delay__52 delay__52: goto delay__50 ; line_number = 285 ; case 1 delay__46: ; # Process A/D result ; line_number = 287 ; if !(channel@2) start ; Delay at if is 0 delay__select__16___byte equ channel delay__select__16___bit equ 2 ; (after recombine) true_delay=0, false_delay=39 uniform_delay=true ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=37 true_test=false body_code.delay=39 (uniform delay) btfss delay__select__16___byte, delay__select__16___bit goto delay__17 ; Delay 38 cycles ; Delay loop takes 9 * 4 = 36 cycles movlw 9 delay__19: addlw 255 btfss __z___byte, __z___bit goto delay__19 goto delay__20 delay__20: goto delay__18 delay__17: ; line_number = 288 ; mask := masks[channel] ; Delay at assignment is 0 movf channel,w call masks movwf delay__mask ; line_number = 289 ; temp := analogs[channel] ; Delay at assignment is 13 movf channel,w addlw analogs movwf __fsr movf __indf,w movwf delay__temp ; line_number = 290 ; if (temp >= thresholds_high[channel]) start ; Delay at if is 18 movf channel,w addlw thresholds_high movwf __fsr movf __indf,w subwf delay__temp,w ; (after recombine) true_delay=2, false_delay=13 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=2 false_code_size=14 btfss __c___byte, __c___bit goto delay__12 ; line_number = 291 ; raw_inputs := raw_inputs | mask ; Delay at assignment is 0 movf delay__mask,w iorwf raw_inputs,f ; Delay 10 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 delay__14: addlw 255 btfss __z___byte, __z___bit goto delay__14 goto delay__15 delay__15: goto delay__13 delay__12: ; line_number = 292 movf channel,w addlw thresholds_low movwf __fsr movf __indf,w subwf delay__temp,w btfsc __z___byte, __z___bit bcf __c___byte, __c___bit ; (after recombine) true_delay=0, false_delay=3 uniform_delay=true ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=3 true_test=false body_code.delay=3 (uniform delay) btfss __c___byte, __c___bit goto delay__9 ; Delay 2 cycles goto delay__11 delay__11: goto delay__10 delay__9: ; line_number = 293 ; raw_inputs := raw_inputs & (0xff ^ mask) ; Delay at assignment is 0 movlw 255 xorwf delay__mask,w andwf raw_inputs,f delay__10: ; code.delay=13 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit delay__13: ; code.delay=39 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=2 false delay=13 code delay=39 ; line_number = 290 ; if (temp >= thresholds_high[channel]) done delay__18: ; code.delay=42 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__16 (data:X0=>X0 code:XX=>XX) ; if final true delay=39 false delay=0 code delay=42 ; line_number = 287 ; if !(channel@2) done ; # Bump to next channel: ; line_number = 296 ; channel := channel + 1 ; Delay at assignment is 42 incf channel,f ; line_number = 297 ; if channel >= chans.size start ; Delay at if is 43 movlw 5 subwf channel,w ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc __c___byte, __c___bit goto delay__21 ; Delay 1 cycles nop goto delay__22 delay__21: ; line_number = 298 ; channel := 0 ; Delay at assignment is 0 movlw 0 movwf channel delay__22: ; code.delay=50 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=2 false delay=0 code delay=50 ; line_number = 297 ; if channel >= chans.size done ; # Light up the LED's: ; line_number = 301 ; inputs := raw_inputs ^ complement ; Delay at assignment is 50 movf raw_inputs,w xorwf complement,w movwf inputs ; line_number = 302 ; led1 := inputs@0 ; Delay at assignment is 53 bcf led1___byte, led1___bit delay__select__23___byte equ inputs delay__select__23___bit equ 0 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__23___byte, delay__select__23___bit bsf led1___byte, led1___bit ; code.delay=56 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__23 (data:X0=>X0 code:XX=>XX) ; line_number = 303 ; led2 := inputs@1 ; Delay at assignment is 56 bcf led2___byte, led2___bit delay__select__24___byte equ inputs delay__select__24___bit equ 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__24___byte, delay__select__24___bit bsf led2___byte, led2___bit ; code.delay=59 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__24 (data:X0=>X0 code:XX=>XX) ; line_number = 304 ; led3 := inputs@2 ; Delay at assignment is 59 bcf led3___byte, led3___bit delay__select__25___byte equ inputs delay__select__25___bit equ 2 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__25___byte, delay__select__25___bit bsf led3___byte, led3___bit ; code.delay=62 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__25 (data:X0=>X0 code:XX=>XX) ; line_number = 305 ; led4 := inputs@3 ; Delay at assignment is 62 bcf led4___byte, led4___bit delay__select__26___byte equ inputs delay__select__26___bit equ 3 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__26___byte, delay__select__26___bit bsf led4___byte, led4___bit ; code.delay=65 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__26 (data:X0=>X0 code:XX=>XX) ; # Setup for interrupts: ; line_number = 308 ; previous := current ; Delay at assignment is 65 movf delay__current,w movwf delay__previous ; # Read the I/O port once: ; line_number = 310 ; current := inputs ^ complement ; Delay at assignment is 67 movf inputs,w xorwf complement,w movwf delay__current ; line_number = 311 ; not_current := current ^ 0xf ; Delay at assignment is 70 movlw 15 xorwf delay__current,w movwf delay__not_current ; line_number = 312 ; changed := current ^ previous ; Delay at assignment is 73 movf delay__current,w xorwf delay__previous,w movwf delay__changed ; # See about triggering the interrupt_pending flag: ; line_number = 315 ; if (low & not_current) | (high & current) | (changed & current & raising) | (changed & not_current & falling) != 0 start ; Delay at if is 76 ; Left minus Right delay__27 equ shared___globals+56 movf delay__low,w andwf delay__not_current,w movwf delay__27 movf delay__high,w andwf delay__current,w iorwf delay__27,f movf delay__changed,w andwf delay__current,w andwf raising,w iorwf delay__27,f movf delay__changed,w andwf delay__not_current,w andwf falling,w iorwf delay__27,w ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 318 ; interrupt_pending := 1 ; Delay at assignment is 0 bsf interrupt_pending___byte, interrupt_pending___bit ; code.delay=92 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=92 ; line_number = 315 ; if (low & not_current) | (high & current) | (changed & current & raising) | (changed & not_current & falling) != 0 done ; # Send an interrupt if interrupts are enabled: ; line_number = 321 ; if interrupt_pending && interrupt_enable start ; Delay at if is 92 ; (after recombine) true_delay=5, false_delay=2 uniform_delay=true ; CASE: true.size>1 false.size=1; false=GOTO ; Uniform delay btfsc interrupt_pending___byte, interrupt_pending___bit goto delay__31 goto delay__28 ; Delay 2 cycles goto delay__33 delay__33: goto delay__32 delay__31: ; &&||: index=1 true_delay=2 false_delay=0 goto_delay=2 ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc interrupt_enable___byte, interrupt_enable___bit goto delay__29 ; Delay 1 cycles nop goto delay__30 delay__29: ; # Shove serial out to low: ; line_number = 323 ; interrupt_enable := 0 ; Delay at assignment is 0 bcf interrupt_enable___byte, interrupt_enable___bit ; line_number = 324 ; serial_out := 0 ; Delay at assignment is 1 bcf serial_out___byte, serial_out___bit delay__30: delay__28: ; code.delay=5 back_code.delay=0 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) ; &&||: index=0 true_delay=2 false_delay=0 goto_delay=2 ; &&||:: index=0 new_delay=5 goto_delay=2 delay__32: ; code.delay=4294967295 back_code.delay=0 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=0 code delay=92 ; line_number = 321 ; if interrupt_pending && interrupt_enable done ; # Next time around, perform case 2: ; line_number = 327 ; delay_counter := delay_counter + 1 ; Delay at assignment is 92 incf delay_counter,f goto delay__50 ; line_number = 328 ; case 2 delay__47: ; # Process threshold trim pot: ; line_number = 330 ; thresholds_index := (thresholds_index + 1) & 3 ; Delay at assignment is 0 incf delay__thresholds_index,w andlw 3 movwf delay__thresholds_index ; line_number = 331 ; mask := masks[thresholds_index] ; Delay at assignment is 3 movf delay__thresholds_index,w call masks movwf delay__mask ; line_number = 332 ; if threshold_enables & mask != 0 start ; Delay at if is 16 ; Left minus Right movf threshold_enables,w andwf delay__mask,w ; (after recombine) true_delay=0, false_delay=36 uniform_delay=true ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=44 true_test=false body_code.delay=36 (uniform delay) btfss __z___byte, __z___bit goto delay__41 ; Delay 35 cycles ; Delay loop takes 8 * 4 = 32 cycles movlw 8 delay__43: addlw 255 btfss __z___byte, __z___bit goto delay__43 goto delay__44 delay__44: nop goto delay__42 delay__41: ; line_number = 333 ; low := thresholds_low[thresholds_index] ; Delay at assignment is 0 movf delay__thresholds_index,w addlw thresholds_low movwf __fsr movf __indf,w movwf delay__low ; line_number = 334 ; high := thresholds_high[thresholds_index] ; Delay at assignment is 5 movf delay__thresholds_index,w addlw thresholds_high movwf __fsr movf __indf,w movwf delay__high ; line_number = 335 ; if threshold_trim_pot > low start ; Delay at if is 10 movf delay__low,w subwf threshold_trim_pot,w btfsc __z___byte, __z___bit bcf __c___byte, __c___bit ; (after recombine) true_delay=4, false_delay=9 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=4 false_code_size=11 btfss __c___byte, __c___bit goto delay__37 ; line_number = 336 ; low := low + 1 ; Delay at assignment is 0 incf delay__low,f ; line_number = 337 ; if high != 255 start ; Delay at if is 1 ; Left minus Right incf delay__high,w ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 338 ; high := high + 1 ; Delay at assignment is 0 incf delay__high,f ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=4 ; line_number = 337 ; if high != 255 done ; Delay 4 cycles goto delay__39 delay__39: goto delay__40 delay__40: goto delay__38 delay__37: ; line_number = 339 movf delay__temp,w subwf threshold_trim_pot,w ; (after recombine) true_delay=0, false_delay=4 uniform_delay=true ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=4 (uniform delay) btfss __c___byte, __c___bit goto delay__34 ; Delay 3 cycles goto delay__36 delay__36: nop goto delay__35 delay__34: ; line_number = 340 ; low := low - 1 ; Delay at assignment is 0 decf delay__low,f ; line_number = 341 ; if high != 0 start ; Delay at if is 1 ; Left minus Right movf delay__high,w ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 342 ; high := high - 1 ; Delay at assignment is 0 decf delay__high,f ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=4 ; line_number = 341 ; if high != 0 done delay__35: ; code.delay=9 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit delay__38: ; code.delay=26 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=4 false delay=9 code delay=26 ; line_number = 335 ; if threshold_trim_pot > low done ; line_number = 343 ; thresholds_low[thresholds_index] := low ; Delay at assignment is 26 ; index_fsr_first movf delay__thresholds_index,w addlw thresholds_low movwf __fsr movf delay__low,w movwf __indf ; line_number = 344 ; thresholds_high[thresholds_index] := high ; Delay at assignment is 31 ; index_fsr_first movf delay__thresholds_index,w addlw thresholds_high movwf __fsr movf delay__high,w movwf __indf delay__42: ; code.delay=57 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=36 false delay=0 code delay=57 ; line_number = 332 ; if threshold_enables & mask != 0 done ; # Next time around, perform case 3: ; line_number = 347 ; delay_counter := delay_counter + 1 ; Delay at assignment is 57 incf delay_counter,f ; Delay 35 cycles ; Delay loop takes 8 * 4 = 32 cycles movlw 8 delay__53: addlw 255 btfss __z___byte, __z___bit goto delay__53 goto delay__54 delay__54: nop goto delay__50 ; line_number = 348 ; case 3 delay__48: ; line_number = 349 ; do_nothing ; Delay 93 cycles ; Delay loop takes 23 * 4 = 92 cycles movlw 23 delay__55: addlw 255 btfss __z___byte, __z___bit goto delay__55 nop goto delay__50 delay__50: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 256 ; switch delay_counter done ; delay after procedure statements=104 bcf __rp0___byte, __rp0___bit ; Delay 26 cycles ; Delay loop takes 6 * 4 = 24 cycles movlw 6 delay__56: addlw 255 btfss __z___byte, __z___bit goto delay__56 goto delay__57 delay__57: ; Implied return retlw 0 ; Final delay = 133 ; line_number = 352 ; procedure reset reset: ; arguments_none ; line_number = 354 ; returns_nothing ; # This procedure will initialize all of the registers: ; line_number = 358 ; local index byte reset__index equ shared___globals+53 ; # Initialize the A/D module: ; # A/D Conversion clock is Fosc/8 (Tad=2uS) and AD is on: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 362 ; _adcon0 := 1 movlw 1 movwf _adcon0 ; line_number = 363 ; _adcon1 := 0 movlw 0 bsf __rp0___byte, __rp0___bit movwf _adcon1 ; line_number = 364 ; _adcs0 := 1 bsf _adcs0___byte, _adcs0___bit ; line_number = 365 ; _adif := 0 bcf __rp0___byte, __rp0___bit bcf _adif___byte, _adif___bit ; line_number = 366 ; _adie := 0 bsf __rp0___byte, __rp0___bit bcf _adie___byte, _adie___bit ; line_number = 367 ; _gie := 0 bcf __rp0___byte, __rp0___bit bcf _gie___byte, _gie___bit ; #ansel := 0 ; #ans0 := 1 ; #ans1 := 1 ; #ans2 := 1 ; #ans4 := 1 ; #ans5 := 1 ; line_number = 374 ; _adsel := (1 | 2 | 4 | 16 | 32) ; Expression is strictly a constant movlw 55 bsf __rp0___byte, __rp0___bit movwf _adsel ; line_number = 376 ; channel := 0 movlw 0 bcf __rp0___byte, __rp0___bit movwf channel ; line_number = 377 ; complement := 0 movlw 0 movwf complement ; line_number = 378 ; command := 0 movlw 0 movwf command ; line_number = 379 ; debug_phase := 0 movlw 0 movwf debug_phase ; line_number = 380 ; debug_counter := 0 movlw 0 movwf debug_counter ; line_number = 381 ; delay_counter := 0 movlw 0 movwf delay_counter ; line_number = 382 ; falling := 0 movlw 0 movwf falling ; line_number = 383 ; glitch := 0 movlw 0 movwf glitch ; line_number = 384 ; high := 0 movlw 0 movwf high ; line_number = 385 ; id_index := 0 movlw 0 movwf id_index ; line_number = 386 ; interrupt_bits := 0 movlw 0 movwf interrupt_bits ; line_number = 387 ; last_received := 0 movlw 0 movwf last_received ; line_number = 388 ; last_sent := 0 movlw 0 movwf last_sent ; line_number = 389 ; low := 0 movlw 0 movwf low ; line_number = 390 ; raising := 0 movlw 0 movwf raising ; line_number = 391 ; raw_inputs := 0 movlw 0 movwf raw_inputs ; # Initialize threshold vectors: ; line_number = 394 ; index := 0 movlw 0 movwf reset__index ; line_number = 395 ; while index < 4 start reset__1: movlw 4 subwf reset__index,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=12 true_test=false body_code.delay=0 (non-uniform delay) btfsc __c___byte, __c___bit goto reset__2 ; line_number = 396 ; thresholds_high[index] := threshold_default ; index_fsr_first movf reset__index,w addlw thresholds_high movwf __fsr movlw 128 movwf __indf ; line_number = 397 ; thresholds_low[index] := threshold_default ; index_fsr_first movf reset__index,w addlw thresholds_low movwf __fsr movlw 128 movwf __indf ; line_number = 398 ; index := index + 1 incf reset__index,f goto reset__1 reset__2: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; line_number = 395 ; while index < 4 done ; # Bit resets: ; line_number = 401 ; debug_next := 0 bcf debug_next___byte, debug_next___bit ; line_number = 402 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; line_number = 403 ; debug_out := 1 bsf debug_out___byte, debug_out___bit ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 406 ; constant zero8 = "\0,0,0,0,0,0,0,0\" ; zero8 = '\0,0,0,0,0,0,0,0\' ; line_number = 407 ; constant module_name = "\8\IREdge4C" ; module_name = '\8\IREdge4C' ; line_number = 408 ; constant vendor_name = "\13\Mondo-tronics" ; vendor_name = '\13\Mondo-tronics' ; line_number = 409 ; string id = "\1,0,25,2,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; id = '\1,0,25,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8\IREdge4C\13\Mondo-tronics' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 47 id___base: retlw 1 retlw 0 retlw 25 retlw 2 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 8 retlw 73 retlw 82 retlw 69 retlw 100 retlw 103 retlw 101 retlw 52 retlw 67 retlw 13 retlw 77 retlw 111 retlw 110 retlw 100 retlw 111 retlw 45 retlw 116 retlw 114 retlw 111 retlw 110 retlw 105 retlw 99 retlw 115 ; line_number = 409 ; string id = "\1,0,25,2,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; line_number = 411 ; string chans = "\4,1,0,2,5\" start ; chans = '\4,1,0,2,5\' chans: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw chans___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw chans___base ; Index to the correct return value movwf __pcl ; page_group 5 chans___base: retlw 4 retlw 1 retlw 0 retlw 2 retlw 5 ; line_number = 411 ; string chans = "\4,1,0,2,5\" start ; line_number = 412 ; string masks = "\1,2,4,8\" start ; masks = '\1,2,4,8\' masks: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw masks___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw masks___base ; Index to the correct return value movwf __pcl ; page_group 4 masks___base: retlw 1 retlw 2 retlw 4 retlw 8 ; line_number = 412 ; string masks = "\1,2,4,8\" start ; Appending 2 delayed procedures to code bank 0 ; buffer = 'bit_bang' ; line_number = 33 ; procedure byte_get byte_get: ; arguments_none ; line_number = 35 ; returns byte ; # This procedure will wait for a byte to be received from ; # serial_in_bit. It calls the delay procedure for all delays. ; # This procedure will keep calling the {delay} routine until ; # data is received. ; line_number = 42 ; local count byte byte_get__count equ shared___globals ; line_number = 43 ; local byte byte byte_get__byte equ shared___globals+1 ; # Why does the delay procedure wait for a third of bit? Well, it ; # has to do with the loop immediately below. If we catch the ; # start bit at the beginning of a 1/3 bit time, we will be ; # sampling data at approximately 1/3 of the way into each bit. ; # Conversely, if we catch the start near the end of a 1/3 bit ; # bit time, we will be sampling data at approximately 2/3 of the ; # way into each bit. So, what this means is that our bit sample ; # times will be somewhere between 1/3 and 2/3 of bit (i.e. in ; # the middle of the bit. ; # It would be nice to tweak the code to shorter delay times ; # (1/4 bit, 1/5 bit, etc.) but then it gets too hard to get ; # the bookeeping done in the delay routine. A PIC running at ; # 4MHz (=1MIPS), only has 138 instructions available for the ; # delay routine when at 1/3 of bit. ; # Wait for a start bit: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 62 ; waiting := 1 bsf waiting___byte, waiting___bit ; line_number = 63 ; receiving := 1 bsf receiving___byte, receiving___bit ; line_number = 64 ; while serial_in start byte_get__1: ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss serial_in___byte, serial_in___bit goto byte_get__2 ; line_number = 65 ; delay instructions_per_delay - 3 start ; Delay expression evaluates to 135 ; line_number = 66 ; call delay() ; Delay at call is 0 call delay ; line_number = 65 ; delay instructions_per_delay - 3 done goto byte_get__1 ; Recombine size1 = 0 || size2 = 0 byte_get__2: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; line_number = 64 ; while serial_in done ; line_number = 67 ; waiting := 0 bcf waiting___byte, waiting___bit ; # Clear out any preceeding interrupt condition: ; line_number = 70 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; # Skip over start bit: ; line_number = 73 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # There are two instructions of set-up for following loop_exactly: ; line_number = 75 ; call delay() ; Delay at call is 0 call delay ; line_number = 76 ; call delay() ; Delay at call is 135 call delay ; line_number = 77 ; call delay() ; Delay at call is 270 call delay ; line_number = 78 ; byte := 0 ; Delay at assignment is 405 movlw 0 movwf byte_get__byte ; Delay 7 cycles goto byte_get__3 byte_get__3: goto byte_get__4 byte_get__4: goto byte_get__5 byte_get__5: nop ; line_number = 73 ; delay instructions_per_bit - 2 done ; # Read in 8 bits of data: ; line_number = 81 ; loop_exactly 8 start byte_get__6 equ shared___globals+57 movlw 8 movwf byte_get__6 byte_get__7: ; # There are 3 instrucitons of loop_exactly overhead: ; line_number = 83 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 84 ; call delay() ; Delay at call is 0 call delay ; line_number = 85 ; byte := byte >> 1 ; Delay at assignment is 135 ; Assignment of variable to self (no code needed) rrf byte_get__byte,f bcf byte_get__byte, 7 ; line_number = 86 ; if serial_in start ; Delay at if is 137 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc serial_in___byte, serial_in___bit ; line_number = 87 ; byte@7 := 1 ; Delay at assignment is 0 byte_get__select__8___byte equ byte_get__byte byte_get__select__8___bit equ 7 bsf byte_get__select__8___byte, byte_get__select__8___bit ; code.delay=139 back_code.delay=0 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=139 ; line_number = 86 ; if serial_in done ; line_number = 88 ; call delay() ; Delay at call is 139 call delay ; line_number = 89 ; call delay() ; Delay at call is 274 call delay ; Delay 4 cycles goto byte_get__9 byte_get__9: goto byte_get__10 byte_get__10: ; line_number = 83 ; delay instructions_per_bit - 3 done ; line_number = 81 ; loop_exactly 8 wrap-up decfsz byte_get__6,f goto byte_get__7 ; line_number = 81 ; loop_exactly 8 done ; # Skip over 2/3's of stop bit; 3 cycles for return: ; line_number = 92 ; delay instructions_per_delay*2 - 3 start ; Delay expression evaluates to 273 ; line_number = 93 ; call delay() ; Delay at call is 0 call delay ; line_number = 94 ; call delay() ; Delay at call is 135 call delay ; Delay 3 cycles goto byte_get__11 byte_get__11: nop ; line_number = 92 ; delay instructions_per_delay*2 - 3 done ; line_number = 95 ; command_previous := command_last movf command_last,w movwf command_previous ; line_number = 96 ; command_last := byte movf byte_get__byte,w movwf command_last ; line_number = 97 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; line_number = 98 ; return byte start ; line_number = 98 movf byte_get__byte,w return ; line_number = 98 ; return byte done ; delay after procedure statements=non-uniform ; line_number = 101 ; procedure byte_put byte_put: ; Last argument is sitting in W; save into argument variable movwf byte_put__byte ; delay=4294967295 ; line_number = 102 ; argument byte byte byte_put__byte equ shared___globals+3 ; line_number = 103 ; returns_nothing ; # This procedure will send {byte} to {serial_out} pin. The {delay} ; # procedure is called to provide the appropriate bit timing. ; line_number = 108 ; local count byte byte_put__count equ shared___globals+2 ; # {receiving} will be 1 if the last get/put routine was a get. ; # Before we start transmitting a response back, we want to ensure ; # that there has been enough time to turn the line around. ; # We delay the first 1/3 of a bit to pad out the 9-2/3 bits ; # from get_byte to 10 bits. We delay another 3 bits just to ; # ensure that slow interpreters do not get overrun. ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 116 ; sent_previous := sent_last movf sent_last,w movwf sent_previous ; line_number = 117 ; sent_last := byte movf byte_put__byte,w movwf sent_last ; line_number = 118 ; if receiving start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=4 true_test=true body_code.delay=0 (non-uniform delay) btfss receiving___byte, receiving___bit goto byte_put__3 ; line_number = 119 ; receiving := 0 bcf receiving___byte, receiving___bit ; # 10 = 1 + 3*3 = 3-1/3 extra bits of delay: ; line_number = 121 ; loop_exactly 10 start byte_put__1 equ shared___globals+58 movlw 10 movwf byte_put__1 byte_put__2: ; line_number = 122 ; call delay() call delay ; line_number = 121 ; loop_exactly 10 wrap-up decfsz byte_put__1,f goto byte_put__2 ; line_number = 121 ; loop_exactly 10 done ; Recombine size1 = 0 || size2 = 0 byte_put__3: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=receiving (data:X0=>X0 code:XX=>XX) ; line_number = 118 ; if receiving done ; # Send the start bit: ; line_number = 125 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # The loop_exactly setup after this is 2 instructions: ; line_number = 127 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; line_number = 128 ; call delay() ; Delay at call is 1 call delay ; line_number = 129 ; call delay() ; Delay at call is 136 call delay ; line_number = 130 ; call delay() ; Delay at call is 271 call delay ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__4: addlw 255 btfss __z___byte, __z___bit goto byte_put__4 ; line_number = 125 ; delay instructions_per_bit - 2 done ; # Send the data: ; line_number = 133 ; loop_exactly 8 start byte_put__5 equ shared___globals+58 movlw 8 movwf byte_put__5 byte_put__6: ; # Loop_exactly overhead is 3 instructions: ; line_number = 135 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 136 ; if byte@0 start ; Delay at if is 0 byte_put__select__7___byte equ byte_put__byte byte_put__select__7___bit equ 0 ; (after recombine) true_delay=1, false_delay=1 uniform_delay=true ; CASE: true_size=1 && false_size=1 ; SUBCASE: Double test; true, then false btfsc byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 137 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit btfss byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 139 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=byte_put__select__7 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=1 code delay=4 ; line_number = 136 ; if byte@0 done ; line_number = 140 ; byte := byte >> 1 ; Delay at assignment is 4 ; Assignment of variable to self (no code needed) rrf byte_put__byte,f bcf byte_put__byte, 7 ; line_number = 141 ; call delay() ; Delay at call is 6 call delay ; line_number = 142 ; call delay() ; Delay at call is 141 call delay ; line_number = 143 ; call delay() ; Delay at call is 276 call delay ; Delay 2 cycles goto byte_put__8 byte_put__8: ; line_number = 135 ; delay instructions_per_bit - 3 done ; line_number = 133 ; loop_exactly 8 wrap-up decfsz byte_put__5,f goto byte_put__6 ; line_number = 133 ; loop_exactly 8 done ; # Send the stop bit: ; line_number = 146 ; delay instructions_per_bit start ; Delay expression evaluates to 416 ; line_number = 147 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit ; line_number = 148 ; call delay() ; Delay at call is 1 call delay ; line_number = 149 ; call delay() ; Delay at call is 136 call delay ; line_number = 150 ; call delay() ; Delay at call is 271 call delay ; Delay 10 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__9: addlw 255 btfss __z___byte, __z___bit goto byte_put__9 goto byte_put__10 byte_put__10: ; line_number = 146 ; delay instructions_per_bit done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Configuration bits ; fill = 0x0 ; bg = bg11 (0x3000) ; cpd = off (0x100) ; cp = off (0x80) ; boden = off (0x0) ; mclre = off (0x0) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = int_no_clk (0x4) ; 12692 = 0x3194 __config 12692 ; Define start addresses for data regions ; Region="shared___globals" Address=32" Size=64 Bytes=59 Bits=4 Available=4 ; Region="shared___globals" Address=32" Size=64 Bytes=59 Bits=4 Available=4 ; Region="shared___globals" Address=32" Size=64 Bytes=59 Bits=4 Available=4 end