radix dec ; Code bank 0; Start address: 0; End address: 4095 org 0 ; Define start addresses for data regions shared___globals equ 112 globals___0 equ 32 globals___1 equ 160 globals___2 equ 288 globals___3 equ 416 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2000-2005 by Wayne C. Gramlich ; # All rights reserved. ; buffer = 'digital8' ; line_number = 6 ; library _robobricks_pic16f688 entered ; # Copyright (c) 2000-2005 by Wayne C. Gramlich and Bill Benson ; # All rights reserved. ; buffer = '_robobricks_pic16f688' ; line_number = 6 ; library _pic16f688 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f688' ; line_number = 5 ; processor pic16f688 ; line_number = 6 ; configure_address 0x2007 ; line_number = 7 ; configure_fill 0x3000 ; line_number = 8 ; configure_option fcmen: on = 0x800 ; line_number = 9 ; configure_option fcmen: off = 0x000 ; line_number = 10 ; configure_option ieso: on = 0x400 ; line_number = 11 ; configure_option ieso: off = 0x000 ; line_number = 12 ; configure_option boden: on = 0x300 ; line_number = 13 ; configure_option boden: partial = 0x200 ; line_number = 14 ; configure_option boden: sboden = 0x100 ; line_number = 15 ; configure_option boden: off = 0x000 ; line_number = 16 ; configure_option cpd: on = 0x00 ; line_number = 17 ; configure_option cpd: off = 0x80 ; line_number = 18 ; configure_option cp: on = 0x00 ; line_number = 19 ; configure_option cp: off = 0x40 ; line_number = 20 ; configure_option mclre: on = 0x20 ; line_number = 21 ; configure_option mclre: off = 0x20 ; line_number = 22 ; configure_option pwrte: on = 0x00 ; line_number = 23 ; configure_option pwrte: off = 0x10 ; line_number = 24 ; configure_option wdte: on = 8 ; line_number = 25 ; configure_option wdte: off = 0 ; line_number = 26 ; configure_option fosc: rc_clk = 7 ; line_number = 27 ; configure_option fosc: rc_no_clk = 6 ; line_number = 28 ; configure_option fosc: int_clk = 5 ; line_number = 29 ; configure_option fosc: int_no_clk = 4 ; line_number = 30 ; configure_option fosc: ec = 3 ; line_number = 31 ; configure_option fosc: hs = 2 ; line_number = 32 ; configure_option fosc: xt = 1 ; line_number = 33 ; configure_option fosc: lp = 0 ; line_number = 35 ; code_bank 0x0 : 0xfff ; line_number = 36 ; data_bank 0x0 : 0x7f ; line_number = 37 ; data_bank 0x80 : 0xff ; line_number = 38 ; data_bank 0x100 : 0x17f ; line_number = 39 ; data_bank 0x180 : 0x1ff ; line_number = 40 ; global_region 0x20 : 0x6f ; line_number = 41 ; global_region 0xa0 : 0xef ; line_number = 42 ; global_region 0x120 : 0x16f ; line_number = 43 ; global_region 0x1a0 : 0x1ef ; line_number = 44 ; shared_region 0x70 : 0x7f ; line_number = 45 ; interrupts_possible ; line_number = 46 ; packages pdip=14, soic=14, tssop=14 ; line_number = 47 ; pin vdd, power_supply ; line_number = 48 ; pin_bindings pdip=1, soic=1, tssop=1 ; line_number = 49 ; pin ra5_in, ra5_nc, ra5_out, t1cki, osc1, clkin ; line_number = 50 ; pin_bindings pdip=2, soic=2, tssop=2 ; line_number = 51 ; bind_to _porta@5 ; line_number = 52 ; or_if ra5_in _trisa 32 ; line_number = 53 ; or_if ra5_nc _trisa 32 ; line_number = 54 ; or_if ra5_out _trisa 0 ; line_number = 55 ; pin ra4_in, ra4_nc, ra4_out, t1g, osc2, an3, clkout ; line_number = 56 ; pin_bindings pdip=3, soic=3, tssop=3 ; line_number = 57 ; bind_to _porta@4 ; line_number = 58 ; or_if ra4_in _trisa 16 ; line_number = 59 ; or_if ra4_nc _trisa 16 ; line_number = 60 ; or_if ra4_out _trisa 0 ; line_number = 61 ; or_if an3 _trisa 8 ; line_number = 62 ; or_if ra4_in _ansel 0 ; line_number = 63 ; or_if ra4_out _ansel 0 ; line_number = 64 ; or_if an3 _ansel 8 ; line_number = 65 ; or_if ra4_in _adcon0 0 ; line_number = 66 ; or_if ra4_out _adcon0 0 ; line_number = 67 ; or_if an3 _adcon0 1 ; line_number = 68 ; pin ra3_in, ra3_nc, mclr, vpp ; line_number = 69 ; pin_bindings pdip=4, soic=4, tssop=4 ; line_number = 70 ; bind_to _porta@4 ; line_number = 71 ; or_if ra3_in _trisa 8 ; line_number = 72 ; or_if ra3_nc _trisa 8 ; line_number = 73 ; pin rc5_in, rc5_nc, rc5_out, rx, dt ; line_number = 74 ; pin_bindings pdip=5, soic=5, tssop=5 ; line_number = 75 ; bind_to _portc@5 ; line_number = 76 ; or_if rc5_in _trisc 32 ; line_number = 77 ; or_if rc5_nc _trisc 32 ; line_number = 78 ; or_if rc5_out _trisc 0 ; line_number = 79 ; or_if rx _trisc 32 ; line_number = 80 ; pin rc4_in, rc4_nc, rc4_out, c2out, tx, ck ; line_number = 81 ; pin_bindings pdip=6, soic=6, tssop=6 ; line_number = 82 ; bind_to _portc@4 ; line_number = 83 ; or_if rc4_in _trisc 16 ; line_number = 84 ; or_if rc4_nc _trisc 16 ; line_number = 85 ; or_if rc4_out _trisc 0 ; # The UART documentation says TX must be marked as in input: ; line_number = 87 ; or_if tx _trisc 16 ; line_number = 88 ; pin rc3_in, rc3_nc, rc3_out, an7 ; line_number = 89 ; pin_bindings pdip=7, soic=7, tssop=7 ; line_number = 90 ; bind_to _portc@3 ; line_number = 91 ; or_if rc3_in _trisc 8 ; line_number = 92 ; or_if rc3_nc _trisc 8 ; line_number = 93 ; or_if rc3_out _trisc 0 ; line_number = 94 ; or_if an7 _trisc 8 ; line_number = 95 ; or_if rc3_in _ansel 0 ; line_number = 96 ; or_if rc3_out _ansel 0 ; line_number = 97 ; or_if an7 _ansel 128 ; line_number = 98 ; or_if rc3_in _adcon0 0 ; line_number = 99 ; or_if rc3_out _adcon0 0 ; line_number = 100 ; or_if an7 _adcon0 1 ; line_number = 101 ; pin rc2_in, rc2_nc, rc2_out, an6 ; line_number = 102 ; pin_bindings pdip=8, soic=8, tssop=8 ; line_number = 103 ; bind_to _portc@2 ; line_number = 104 ; or_if rc2_in _trisc 4 ; line_number = 105 ; or_if rc2_nc _trisc 4 ; line_number = 106 ; or_if rc2_out _trisc 0 ; line_number = 107 ; or_if an6 _trisc 4 ; line_number = 108 ; or_if rc2_in _ansel 0 ; line_number = 109 ; or_if rc2_out _ansel 0 ; line_number = 110 ; or_if an6 _ansel 64 ; line_number = 111 ; or_if rc2_in _adcon0 0 ; line_number = 112 ; or_if rc2_out _adcon0 0 ; line_number = 113 ; or_if an6 _adcon0 1 ; line_number = 114 ; pin rc1_in, rc1_nc, rc1_out, an5, c2in_minus ; line_number = 115 ; pin_bindings pdip=9, soic=9, tssop=9 ; line_number = 116 ; bind_to _portc@1 ; line_number = 117 ; or_if rc1_in _trisc 2 ; line_number = 118 ; or_if rc1_nc _trisc 2 ; line_number = 119 ; or_if rc1_out _trisc 0 ; line_number = 120 ; or_if rc1_in _cmcon0 7 ; line_number = 121 ; or_if rc1_out _cmcon0 7 ; line_number = 122 ; or_if an5 _trisc 2 ; line_number = 123 ; or_if rc1_in _ansel 0 ; line_number = 124 ; or_if rc1_out _ansel 0 ; line_number = 125 ; or_if an5 _ansel 32 ; line_number = 126 ; or_if rc1_in _adcon0 0 ; line_number = 127 ; or_if rc1_out _adcon0 0 ; line_number = 128 ; or_if an5 _adcon0 1 ; line_number = 129 ; pin rc0_in, rc0_nc, rc0_out, an4, c2in_plus ; line_number = 130 ; pin_bindings pdip=10, soic=10, tssop=10 ; line_number = 131 ; bind_to _portc@0 ; line_number = 132 ; or_if rc0_in _trisc 1 ; line_number = 133 ; or_if rc0_nc _trisc 1 ; line_number = 134 ; or_if rc0_out _trisc 0 ; line_number = 135 ; or_if rc0_in _cmcon0 7 ; line_number = 136 ; or_if rc0_out _cmcon0 7 ; line_number = 137 ; or_if an4 _trisc 1 ; line_number = 138 ; or_if rc0_in _ansel 0 ; line_number = 139 ; or_if rc0_out _ansel 0 ; line_number = 140 ; or_if an4 _ansel 16 ; line_number = 141 ; or_if rc0_in _adcon0 0 ; line_number = 142 ; or_if rc0_out _adcon0 0 ; line_number = 143 ; or_if an4 _adcon0 1 ; line_number = 144 ; pin ra2_in, ra2_nc, ra2_out, an2, c1out, t0cki, int ; line_number = 145 ; pin_bindings pdip=11, soic=11, tssop=11 ; line_number = 146 ; bind_to _porta@2 ; line_number = 147 ; or_if ra2_in _trisa 4 ; line_number = 148 ; or_if ra2_nc _trisa 4 ; line_number = 149 ; or_if ra2_out _trisa 0 ; line_number = 150 ; or_if an2 _trisa 4 ; line_number = 151 ; or_if ra2_in _ansel 0 ; line_number = 152 ; or_if ra2_out _ansel 0 ; line_number = 153 ; or_if an2 _ansel 4 ; line_number = 154 ; or_if ra2_in _adcon0 0 ; line_number = 155 ; or_if ra2_out _adcon0 0 ; line_number = 156 ; or_if an2 _adcon0 1 ; line_number = 157 ; pin ra1_in, ra1_nc, ra1_out, an1, c1in_minus, vref, icspclk ; line_number = 158 ; pin_bindings pdip=12, soic=12, tssop=12 ; line_number = 159 ; bind_to _porta@1 ; line_number = 160 ; or_if ra1_in _trisa 2 ; line_number = 161 ; or_if ra1_nc _trisa 2 ; line_number = 162 ; or_if ra1_out _trisa 0 ; line_number = 163 ; or_if ra1_in _cmcon0 7 ; line_number = 164 ; or_if ra1_out _cmcon0 7 ; line_number = 165 ; or_if an1 _trisa 2 ; line_number = 166 ; or_if ra1_in _ansel 0 ; line_number = 167 ; or_if ra1_out _ansel 0 ; line_number = 168 ; or_if an1 _ansel 2 ; line_number = 169 ; or_if ra1_in _adcon0 0 ; line_number = 170 ; or_if ra1_out _adcon0 0 ; line_number = 171 ; or_if an1 _adcon0 1 ; line_number = 172 ; pin ra0_in, ra0_nc, ra0_out, an0, c1in_plus, icspdat, ulpwu ; line_number = 173 ; pin_bindings pdip=13, soic=13, tssop=13 ; line_number = 174 ; bind_to _porta@0 ; line_number = 175 ; or_if ra0_in _trisa 1 ; line_number = 176 ; or_if ra0_nc _trisa 1 ; line_number = 177 ; or_if ra0_out _trisa 0 ; line_number = 178 ; or_if ra0_in _cmcon0 7 ; line_number = 179 ; or_if ra0_out _cmcon0 7 ; line_number = 180 ; or_if an0 _trisa 1 ; line_number = 181 ; or_if ra0_in _ansel 0 ; line_number = 182 ; or_if ra0_out _ansel 0 ; line_number = 183 ; or_if an0 _ansel 1 ; line_number = 184 ; or_if ra0_in _adcon0 0 ; line_number = 185 ; or_if ra0_out _adcon0 0 ; line_number = 186 ; or_if an0 _adcon0 1 ; line_number = 187 ; pin vss, ground ; line_number = 188 ; pin_bindings pdip=14, soic=14, tssop=14 ; # Register/bit bindings: ; # Databank 0 (0x0 - 0x7f): ; line_number = 197 ; register _indf = _indf equ 0 ; line_number = 199 ; register _tmr0 = _tmr0 equ 1 ; line_number = 201 ; register _pcl = _pcl equ 2 ; line_number = 203 ; register _status = _status equ 3 ; line_number = 204 ; bind _irp = _status@7 _irp___byte equ _status _irp___bit equ 7 ; line_number = 205 ; bind _rp1 = _status@5 _rp1___byte equ _status _rp1___bit equ 5 ; line_number = 206 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 207 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 208 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 209 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 210 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 211 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 213 ; register _fsr = _fsr equ 4 ; line_number = 215 ; register _porta = _porta equ 5 ; line_number = 216 ; register _ra = _ra equ 5 ; line_number = 217 ; bind _ra5 = _porta@5 _ra5___byte equ _porta _ra5___bit equ 5 ; line_number = 218 ; bind _ra4 = _porta@4 _ra4___byte equ _porta _ra4___bit equ 4 ; line_number = 219 ; bind _ra3 = _porta@3 _ra3___byte equ _porta _ra3___bit equ 3 ; line_number = 220 ; bind _ra2 = _porta@2 _ra2___byte equ _porta _ra2___bit equ 2 ; line_number = 221 ; bind _ra1 = _porta@1 _ra1___byte equ _porta _ra1___bit equ 1 ; line_number = 222 ; bind _ra0 = _porta@0 _ra0___byte equ _porta _ra0___bit equ 0 ; line_number = 224 ; register _portc = _portc equ 7 ; line_number = 225 ; register _rc = _rc equ 7 ; line_number = 226 ; bind _rc5 = _portc@5 _rc5___byte equ _portc _rc5___bit equ 5 ; line_number = 227 ; bind _rc4 = _portc@4 _rc4___byte equ _portc _rc4___bit equ 4 ; line_number = 228 ; bind _rc3 = _portc@3 _rc3___byte equ _portc _rc3___bit equ 3 ; line_number = 229 ; bind _rc2 = _portc@2 _rc2___byte equ _portc _rc2___bit equ 2 ; line_number = 230 ; bind _rc1 = _portc@1 _rc1___byte equ _portc _rc1___bit equ 1 ; line_number = 231 ; bind _rc0 = _portc@0 _rc0___byte equ _portc _rc0___bit equ 0 ; line_number = 233 ; register _pclath = _pclath equ 10 ; line_number = 235 ; register _intcon = _intcon equ 11 ; line_number = 236 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 237 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 238 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 239 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 240 ; bind _raie = _intcon@3 _raie___byte equ _intcon _raie___bit equ 3 ; line_number = 241 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 242 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 243 ; bind _raif = _intcon@0 _raif___byte equ _intcon _raif___bit equ 0 ; line_number = 245 ; register _pir1 = _pir1 equ 12 ; line_number = 246 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 247 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 248 ; bind _rcif = _pir1@5 _rcif___byte equ _pir1 _rcif___bit equ 5 ; line_number = 249 ; bind _c2if = _pir1@4 _c2if___byte equ _pir1 _c2if___bit equ 4 ; line_number = 250 ; bind _c1if = _pir1@3 _c1if___byte equ _pir1 _c1if___bit equ 3 ; line_number = 251 ; bind _osfif = _pir1@2 _osfif___byte equ _pir1 _osfif___bit equ 2 ; line_number = 252 ; bind _txif = _pir1@1 _txif___byte equ _pir1 _txif___bit equ 1 ; line_number = 253 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 255 ; register _tmr1l = _tmr1l equ 14 ; line_number = 257 ; register _tmr1h = _tmr1h equ 15 ; line_number = 259 ; register _t1con = _t1con equ 16 ; line_number = 260 ; bind t1ginv = _t1con@7 t1ginv___byte equ _t1con t1ginv___bit equ 7 ; line_number = 261 ; bind _tmr1ge = _t1con@6 _tmr1ge___byte equ _t1con _tmr1ge___bit equ 6 ; line_number = 262 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 263 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 264 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 265 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 266 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 267 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 269 ; register _baudctl = _baudctl equ 17 ; line_number = 270 ; bind _abdovf = _baudctl@7 _abdovf___byte equ _baudctl _abdovf___bit equ 7 ; line_number = 271 ; bind _rcidl = _baudctl@6 _rcidl___byte equ _baudctl _rcidl___bit equ 6 ; line_number = 272 ; bind _sckp = _baudctl@4 _sckp___byte equ _baudctl _sckp___bit equ 4 ; line_number = 273 ; bind _brg16 = _baudctl@3 _brg16___byte equ _baudctl _brg16___bit equ 3 ; line_number = 274 ; bind _wue = _baudctl@1 _wue___byte equ _baudctl _wue___bit equ 1 ; line_number = 275 ; bind _abden = _baudctl@0 _abden___byte equ _baudctl _abden___bit equ 0 ; line_number = 277 ; register _spbrgh = _spbrgh equ 18 ; line_number = 279 ; register _spbrg = _spbrg equ 19 ; line_number = 281 ; register _rcreg = _rcreg equ 20 ; line_number = 283 ; register _txreg = _txreg equ 21 ; line_number = 285 ; register _txsta = _txsta equ 22 ; line_number = 286 ; bind _csrc = _txsta@7 _csrc___byte equ _txsta _csrc___bit equ 7 ; line_number = 287 ; bind _tx9 = _txsta@6 _tx9___byte equ _txsta _tx9___bit equ 6 ; line_number = 288 ; bind _txen = _txsta@5 _txen___byte equ _txsta _txen___bit equ 5 ; line_number = 289 ; bind _sync = _txsta@4 _sync___byte equ _txsta _sync___bit equ 4 ; line_number = 290 ; bind _sendb = _txsta@3 _sendb___byte equ _txsta _sendb___bit equ 3 ; line_number = 291 ; bind _brgh = _txsta@2 _brgh___byte equ _txsta _brgh___bit equ 2 ; line_number = 292 ; bind _trmt = _txsta@1 _trmt___byte equ _txsta _trmt___bit equ 1 ; line_number = 293 ; bind _tx9d = _txsta@7 _tx9d___byte equ _txsta _tx9d___bit equ 7 ; line_number = 295 ; register _rcsta = _rcsta equ 23 ; line_number = 296 ; bind _spen = _rcsta@7 _spen___byte equ _rcsta _spen___bit equ 7 ; line_number = 297 ; bind _rx9 = _rcsta@6 _rx9___byte equ _rcsta _rx9___bit equ 6 ; line_number = 298 ; bind _sren = _rcsta@5 _sren___byte equ _rcsta _sren___bit equ 5 ; line_number = 299 ; bind _cren = _rcsta@4 _cren___byte equ _rcsta _cren___bit equ 4 ; line_number = 300 ; bind _adden = _rcsta@3 _adden___byte equ _rcsta _adden___bit equ 3 ; line_number = 301 ; bind _ferr = _rcsta@2 _ferr___byte equ _rcsta _ferr___bit equ 2 ; line_number = 302 ; bind _oerr = _rcsta@1 _oerr___byte equ _rcsta _oerr___bit equ 1 ; line_number = 303 ; bind _rx9d = _rcsta@0 _rx9d___byte equ _rcsta _rx9d___bit equ 0 ; line_number = 305 ; register _wdtcon = _wdtcon equ 24 ; line_number = 306 ; bind _wdtps3 = _wdtcon@4 _wdtps3___byte equ _wdtcon _wdtps3___bit equ 4 ; line_number = 307 ; bind _wdtps2 = _wdtcon@3 _wdtps2___byte equ _wdtcon _wdtps2___bit equ 3 ; line_number = 308 ; bind _wdtps1 = _wdtcon@2 _wdtps1___byte equ _wdtcon _wdtps1___bit equ 2 ; line_number = 309 ; bind _wdtps0 = _wdtcon@1 _wdtps0___byte equ _wdtcon _wdtps0___bit equ 1 ; line_number = 310 ; bind _swdten = _wdtcon@0 _swdten___byte equ _wdtcon _swdten___bit equ 0 ; line_number = 312 ; register _cmcon0 = _cmcon0 equ 25 ; line_number = 313 ; bind _c1out = _cmcon0@7 _c1out___byte equ _cmcon0 _c1out___bit equ 7 ; line_number = 314 ; bind _c2out = _cmcon0@6 _c2out___byte equ _cmcon0 _c2out___bit equ 6 ; line_number = 315 ; bind _c1inv = _cmcon0@5 _c1inv___byte equ _cmcon0 _c1inv___bit equ 5 ; line_number = 316 ; bind _c2inv = _cmcon0@4 _c2inv___byte equ _cmcon0 _c2inv___bit equ 4 ; line_number = 317 ; bind _cis = _cmcon0@3 _cis___byte equ _cmcon0 _cis___bit equ 3 ; line_number = 318 ; bind _cm2 = _cmcon0@2 _cm2___byte equ _cmcon0 _cm2___bit equ 2 ; line_number = 319 ; bind _cm1 = _cmcon0@1 _cm1___byte equ _cmcon0 _cm1___bit equ 1 ; line_number = 320 ; bind _cm0 = _cmcon0@0 _cm0___byte equ _cmcon0 _cm0___bit equ 0 ; line_number = 322 ; register _cmcon1 = _cmcon1 equ 26 ; line_number = 323 ; bind _t1gss = _cmcon1@0 _t1gss___byte equ _cmcon1 _t1gss___bit equ 0 ; line_number = 324 ; bind _c2sync = _cmcon1@1 _c2sync___byte equ _cmcon1 _c2sync___bit equ 1 ; line_number = 326 ; register _adresh = _adresh equ 30 ; line_number = 328 ; register _adcon0 = _adcon0 equ 31 ; line_number = 329 ; bind _adfm = _adcon0@7 _adfm___byte equ _adcon0 _adfm___bit equ 7 ; line_number = 330 ; bind _vcfg = _adcon0@6 _vcfg___byte equ _adcon0 _vcfg___bit equ 6 ; line_number = 331 ; bind _chs2 = _adcon0@4 _chs2___byte equ _adcon0 _chs2___bit equ 4 ; line_number = 332 ; bind _chs1 = _adcon0@3 _chs1___byte equ _adcon0 _chs1___bit equ 3 ; line_number = 333 ; bind _chs0 = _adcon0@2 _chs0___byte equ _adcon0 _chs0___bit equ 2 ; line_number = 334 ; bind _go = _adcon0@1 _go___byte equ _adcon0 _go___bit equ 1 ; line_number = 335 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 339 ; register _option_reg = _option_reg equ 129 ; line_number = 340 ; bind _rapu = _option_reg@7 _rapu___byte equ _option_reg _rapu___bit equ 7 ; line_number = 341 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 342 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 343 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 344 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 345 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 346 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 347 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 349 ; register _trisa = _trisa equ 133 ; line_number = 350 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 351 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 352 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 353 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 354 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 355 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 357 ; register _trisc = _trisc equ 135 ; line_number = 358 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 359 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 360 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 361 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 362 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 363 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 365 ; register _pie1 = _pie1 equ 140 ; line_number = 366 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 367 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 368 ; bind _rcie = _pie1@5 _rcie___byte equ _pie1 _rcie___bit equ 5 ; line_number = 369 ; bind _c2ie = _pie1@4 _c2ie___byte equ _pie1 _c2ie___bit equ 4 ; line_number = 370 ; bind _c1ie = _pie1@3 _c1ie___byte equ _pie1 _c1ie___bit equ 3 ; line_number = 371 ; bind _osfie = _pie1@2 _osfie___byte equ _pie1 _osfie___bit equ 2 ; line_number = 372 ; bind _txie = _pie1@1 _txie___byte equ _pie1 _txie___bit equ 1 ; line_number = 373 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 375 ; register _pcon = _pcon equ 142 ; line_number = 376 ; bind _ulpwue = _pcon@5 _ulpwue___byte equ _pcon _ulpwue___bit equ 5 ; line_number = 377 ; bind _sboden = _pcon@4 _sboden___byte equ _pcon _sboden___bit equ 4 ; line_number = 378 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 379 ; bind _bod = _pcon@0 _bod___byte equ _pcon _bod___bit equ 0 ; line_number = 381 ; register _osccon = _osccon equ 143 ; line_number = 382 ; bind _ircf2 = _osccon@6 _ircf2___byte equ _osccon _ircf2___bit equ 6 ; line_number = 383 ; bind _ircf1 = _osccon@5 _ircf1___byte equ _osccon _ircf1___bit equ 5 ; line_number = 384 ; bind _ircf0 = _osccon@4 _ircf0___byte equ _osccon _ircf0___bit equ 4 ; line_number = 385 ; bind _osts = _osccon@3 _osts___byte equ _osccon _osts___bit equ 3 ; line_number = 386 ; bind _hts = _osccon@2 _hts___byte equ _osccon _hts___bit equ 2 ; line_number = 387 ; bind _lts = _osccon@3 _lts___byte equ _osccon _lts___bit equ 3 ; line_number = 388 ; bind _scs = _osccon@2 _scs___byte equ _osccon _scs___bit equ 2 ; line_number = 390 ; register _osctune = _osctune equ 144 ; line_number = 391 ; bind _tun4 = _osctune@4 _tun4___byte equ _osctune _tun4___bit equ 4 ; line_number = 392 ; bind _tun3 = _osctune@3 _tun3___byte equ _osctune _tun3___bit equ 3 ; line_number = 393 ; bind _tun2 = _osctune@2 _tun2___byte equ _osctune _tun2___bit equ 2 ; line_number = 394 ; bind _tun1 = _osctune@1 _tun1___byte equ _osctune _tun1___bit equ 1 ; line_number = 395 ; bind _tun0 = _osctune@0 _tun0___byte equ _osctune _tun0___bit equ 0 ; line_number = 396 ; constant _osccal_lsb = 1 _osccal_lsb equ 1 ; line_number = 398 ; register _ansel = _ansel equ 145 ; line_number = 399 ; bind _ans7 = _ansel@7 _ans7___byte equ _ansel _ans7___bit equ 7 ; line_number = 400 ; bind _ans6 = _ansel@6 _ans6___byte equ _ansel _ans6___bit equ 6 ; line_number = 401 ; bind _ans5 = _ansel@5 _ans5___byte equ _ansel _ans5___bit equ 5 ; line_number = 402 ; bind _ans4 = _ansel@4 _ans4___byte equ _ansel _ans4___bit equ 4 ; line_number = 403 ; bind _ans3 = _ansel@3 _ans3___byte equ _ansel _ans3___bit equ 3 ; line_number = 404 ; bind _ans2 = _ansel@2 _ans2___byte equ _ansel _ans2___bit equ 2 ; line_number = 405 ; bind _ans1 = _ansel@1 _ans1___byte equ _ansel _ans1___bit equ 1 ; line_number = 406 ; bind _ans0 = _ansel@0 _ans0___byte equ _ansel _ans0___bit equ 0 ; line_number = 408 ; register _wpua = _wpua equ 149 ; line_number = 409 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 410 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 411 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 412 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 413 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 415 ; register _ioca = _ioca equ 150 ; line_number = 416 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 417 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 418 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 419 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 420 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 421 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 423 ; register _eedath = _eedath equ 151 ; line_number = 425 ; register _eeadrh = _eeadrh equ 152 ; line_number = 427 ; register _vrcon = _vrcon equ 153 ; line_number = 428 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 429 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 430 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 431 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 432 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 433 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 435 ; register _eedata = _eedata equ 154 ; line_number = 436 ; bind _eedat7 = _eedata@7 _eedat7___byte equ _eedata _eedat7___bit equ 7 ; line_number = 437 ; bind _eedat6 = _eedata@6 _eedat6___byte equ _eedata _eedat6___bit equ 6 ; line_number = 438 ; bind _eedat5 = _eedata@5 _eedat5___byte equ _eedata _eedat5___bit equ 5 ; line_number = 439 ; bind _eedat4 = _eedata@4 _eedat4___byte equ _eedata _eedat4___bit equ 4 ; line_number = 440 ; bind _eedat3 = _eedata@3 _eedat3___byte equ _eedata _eedat3___bit equ 3 ; line_number = 441 ; bind _eedat2 = _eedata@2 _eedat2___byte equ _eedata _eedat2___bit equ 2 ; line_number = 442 ; bind _eedat1 = _eedata@1 _eedat1___byte equ _eedata _eedat1___bit equ 1 ; line_number = 443 ; bind _eedat0 = _eedata@0 _eedat0___byte equ _eedata _eedat0___bit equ 0 ; line_number = 445 ; register _eeadr = _eeadr equ 155 ; line_number = 446 ; bind _eeadr7 = _eeadr@7 _eeadr7___byte equ _eeadr _eeadr7___bit equ 7 ; line_number = 447 ; bind _eeadr6 = _eeadr@6 _eeadr6___byte equ _eeadr _eeadr6___bit equ 6 ; line_number = 448 ; bind _eeadr5 = _eeadr@5 _eeadr5___byte equ _eeadr _eeadr5___bit equ 5 ; line_number = 449 ; bind _eeadr4 = _eeadr@4 _eeadr4___byte equ _eeadr _eeadr4___bit equ 4 ; line_number = 450 ; bind _eeadr3 = _eeadr@3 _eeadr3___byte equ _eeadr _eeadr3___bit equ 3 ; line_number = 451 ; bind _eeadr2 = _eeadr@2 _eeadr2___byte equ _eeadr _eeadr2___bit equ 2 ; line_number = 452 ; bind _eeadr1 = _eeadr@1 _eeadr1___byte equ _eeadr _eeadr1___bit equ 1 ; line_number = 453 ; bind _eeadr0 = _eeadr@0 _eeadr0___byte equ _eeadr _eeadr0___bit equ 0 ; line_number = 455 ; register _eecon1 = _eecon1 equ 156 ; line_number = 456 ; bind _eepgd = _eecon1@7 _eepgd___byte equ _eecon1 _eepgd___bit equ 7 ; line_number = 457 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 458 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 459 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 460 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 462 ; register _eecon2 = _eecon2 equ 157 ; line_number = 464 ; register _adresl = _adresl equ 158 ; line_number = 466 ; register _adcon1 = _adcon1 equ 159 ; line_number = 467 ; bind _adcs2 = _adcon1@6 _adcs2___byte equ _adcon1 _adcs2___bit equ 6 ; line_number = 468 ; bind _adcs1 = _adcon1@5 _adcs1___byte equ _adcon1 _adcs1___bit equ 5 ; line_number = 469 ; bind _adcs0 = _adcon1@4 _adcs0___byte equ _adcon1 _adcs0___bit equ 4 ; # Data Bank 2 (0x100 - 0x17f): ; buffer = '_robobricks_pic16f688' ; line_number = 6 ; library _pic16f688 exited ; line_number = 7 ; library clock8mhz entered ; # Copyright (c) 2004-2005 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock8mhz' ; line_number = 9 ; constant clock_rate = 8000000 clock_rate equ 8000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 2000000 ; line_number = 12 ; constant microsecond = 2 microsecond equ 2 ; buffer = '_robobricks_pic16f688' ; line_number = 7 ; library clock8mhz exited ; # Get some EUSART constants defined: ; line_number = 10 ; constant _eusart_clock = clock_rate _eusart_clock equ 8000000 ; line_number = 11 ; constant _eusart_factor = 4 _eusart_factor equ 4 ; line_number = 12 ; library _eusart entered ; # Copyright (c) 2005 by Wayne C. Gramlich ; # All rights reserved. ; # This library contains a bunch of definitions for the Enhanced Universal ; # Asynchronous Serial Receiver/Transmitter (EUSART) that is available ; # on many of the PIC microcontrollers. ; # In order to use this module you have to get two constants defined ; # BEFORE including this library -- {_eusart_factor} and {_eusart_clock}. ; # {_eusart_clock} should be set to the frequency oscillator for the chip. ; # {_eusart_factor} should be set to 4, 16, or 64 depending upon whether ; # the {_brg16} and {_brgh} bits are set. Use the table below to select: ; # ; # _{brg16} {_brgh} _{eusart_factor} ; # 0 0 64 ; # 0 1 16 ; # 1 0 16 ; # 1 1 ; # 2400 baud: ; buffer = '_eusart' ; line_number = 23 ; constant _eusart_2400 = (_eusart_clock / (2400 * _eusart_factor)) - 1 _eusart_2400 equ 832 ; line_number = 24 ; constant _eusart_2400_low = _eusart_2400 & 0xff _eusart_2400_low equ 64 ; line_number = 25 ; constant _eusart_2400_high = _eusart_2400 >> 8 _eusart_2400_high equ 3 ; line_number = 26 ; constant _eusart_2400_index = 0 _eusart_2400_index equ 0 ; # 4800 baud: ; line_number = 28 ; constant _eusart_4800 = (_eusart_clock / (4800 * _eusart_factor)) - 1 _eusart_4800 equ 415 ; line_number = 29 ; constant _eusart_4800_low = _eusart_4800 & 0xff _eusart_4800_low equ 159 ; line_number = 30 ; constant _eusart_4800_high = _eusart_4800 >> 8 _eusart_4800_high equ 1 ; line_number = 31 ; constant _eusart_4800_index = 1 _eusart_4800_index equ 1 ; # 9600 baud: ; line_number = 33 ; constant _eusart_9600 = (_eusart_clock / (9600 * _eusart_factor)) - 1 _eusart_9600 equ 207 ; line_number = 34 ; constant _eusart_9600_low = _eusart_9600 & 0xff _eusart_9600_low equ 207 ; line_number = 35 ; constant _eusart_9600_high = _eusart_9600 >> 8 _eusart_9600_high equ 0 ; line_number = 36 ; constant _eusart_9600_index = 2 _eusart_9600_index equ 2 ; # 19200 baud: ; line_number = 38 ; constant _eusart_19200 = (_eusart_clock / (19200 * _eusart_factor)) - 1 _eusart_19200 equ 103 ; line_number = 39 ; constant _eusart_19200_low = _eusart_19200 & 0xff _eusart_19200_low equ 103 ; line_number = 40 ; constant _eusart_19200_high = _eusart_19200 >> 8 _eusart_19200_high equ 0 ; line_number = 41 ; constant _eusart_19200_index = 3 _eusart_19200_index equ 3 ; # 38400 baud: ; line_number = 43 ; constant _eusart_38400 = (_eusart_clock / (38400 * _eusart_factor)) - 1 _eusart_38400 equ 51 ; line_number = 44 ; constant _eusart_38400_low = _eusart_38400 & 0xff _eusart_38400_low equ 51 ; line_number = 45 ; constant _eusart_38400_high = _eusart_38400 >> 8 _eusart_38400_high equ 0 ; line_number = 46 ; constant _eusart_38400_index = 4 _eusart_38400_index equ 4 ; # 57600 baud: ; line_number = 48 ; constant _eusart_57600 = (_eusart_clock / (57600 * _eusart_factor)) - 1 _eusart_57600 equ 33 ; line_number = 49 ; constant _eusart_57600_low = _eusart_57600 & 0xff _eusart_57600_low equ 33 ; line_number = 50 ; constant _eusart_57600_high = _eusart_57600 >> 8 _eusart_57600_high equ 0 ; line_number = 51 ; constant _eusart_57600_index = 5 _eusart_57600_index equ 5 ; # 115200 baud: ; line_number = 53 ; constant _eusart_115200 = (_eusart_clock / (115200 * _eusart_factor)) - 1 _eusart_115200 equ 16 ; line_number = 54 ; constant _eusart_115200_low = _eusart_115200 & 0xff _eusart_115200_low equ 16 ; line_number = 55 ; constant _eusart_115200_high = _eusart_115200 >> 8 _eusart_115200_high equ 0 ; line_number = 56 ; constant _eusart_115200_index = 6 _eusart_115200_index equ 6 ; # 203400 baud: ; line_number = 58 ; constant _eusart_203400 = (_eusart_clock / (203400 * _eusart_factor)) - 1 _eusart_203400 equ 8 ; line_number = 59 ; constant _eusart_203400_low = _eusart_203400 & 0xff _eusart_203400_low equ 8 ; line_number = 60 ; constant _eusart_203400_high = _eusart_203400 >> 8 _eusart_203400_high equ 0 ; line_number = 61 ; constant _eusart_203400_index = 7 _eusart_203400_index equ 7 ; buffer = '_robobricks_pic16f688' ; line_number = 12 ; library _eusart exited ; line_number = 14 ; global debug_mode bit debug_mode___byte equ globals___0+79 debug_mode___bit equ 0 ; line_number = 15 ; global in_byte_get bit in_byte_get___byte equ globals___0+79 in_byte_get___bit equ 1 ; Delaying code generation for procedure byte_get ; Delaying code generation for procedure byte_put ; Delaying code generation for procedure baud_rate_low ; Delaying code generation for procedure baud_rate_high ; buffer = 'digital8' ; line_number = 6 ; library _robobricks_pic16f688 exited ; line_number = 8 ; package pdip ; line_number = 9 ; pin 1 = power_supply ; line_number = 10 ; pin 2 = ra5_in, name=debug debug___byte equ _porta debug___bit equ 5 ; line_number = 11 ; pin 3 = ra4_in, name=io1, mask=io1_mask, bit=io1_bit io1___byte equ _porta io1___bit equ 4 io1_mask equ 16 io1_bit equ 4 ; line_number = 12 ; pin 4 = ra3_nc, name=nc1 nc1___byte equ _porta nc1___bit equ 4 ; line_number = 13 ; pin 5 = rx, name=rx rx___byte equ _portc rx___bit equ 5 ; line_number = 14 ; pin 6 = tx, name=tx tx___byte equ _portc tx___bit equ 4 ; line_number = 15 ; pin 7 = rc3_in, name=io7, mask=io7_mask, bit=io7_bit io7___byte equ _portc io7___bit equ 3 io7_mask equ 8 io7_bit equ 3 ; line_number = 16 ; pin 8 = rc2_in, name=io6, mask=io6_mask, bit=io6_bit io6___byte equ _portc io6___bit equ 2 io6_mask equ 4 io6_bit equ 2 ; line_number = 17 ; pin 9 = rc1_in, name=io5, mask=io5_mask, bit=io5_bit io5___byte equ _portc io5___bit equ 1 io5_mask equ 2 io5_bit equ 1 ; line_number = 18 ; pin 10 = rc0_in, name=io4, mask=io4_mask, bit=io4_bit io4___byte equ _portc io4___bit equ 0 io4_mask equ 1 io4_bit equ 0 ; line_number = 19 ; pin 11 = ra2_in, name=io3, mask=io3_mask, bit=io3_bit io3___byte equ _porta io3___bit equ 2 io3_mask equ 4 io3_bit equ 2 ; line_number = 20 ; pin 12 = ra1_in, name=io2, mask=io2_mask, bit=io2_bit io2___byte equ _porta io2___bit equ 1 io2_mask equ 2 io2_bit equ 1 ; line_number = 21 ; pin 13 = ra0_in, name=io0, mask=io0_mask, bit=io0_bit io0___byte equ _porta io0___bit equ 0 io0_mask equ 1 io0_bit equ 0 ; line_number = 22 ; pin 14 = ground ; # Pin bindings:6 ; # Some globals: byte ; line_number = 27 ; constant state_size = 14 state_size equ 14 ; line_number = 28 ; constant state_size2 = state_size << 1 state_size2 equ 28 ; line_number = 29 ; global state[state_size] array[byte] state equ globals___0+3 ; line_number = 30 ; bind command_previous = state[0] command_previous equ globals___0+3 ; line_number = 31 ; bind command_last = state[1] command_last equ globals___0+4 ; line_number = 32 ; bind sent_last = state[2] sent_last equ globals___0+5 ; line_number = 33 ; bind sent_previous = state[3] sent_previous equ globals___0+6 ; line_number = 34 ; bind raw = state[4] raw equ globals___0+7 ; line_number = 35 ; bind direction = state[5] direction equ globals___0+8 ; line_number = 36 ; bind outputs = state[6] outputs equ globals___0+9 ; line_number = 37 ; bind complement_mask = state[7] complement_mask equ globals___0+10 ; line_number = 38 ; bind flags = state[8] flags equ globals___0+11 ; line_number = 39 ; bind low_mask = state[9] low_mask equ globals___0+12 ; line_number = 40 ; bind high_mask = state[10] high_mask equ globals___0+13 ; line_number = 41 ; bind rising_mask = state[11] rising_mask equ globals___0+14 ; line_number = 42 ; bind falling_mask = state[12] falling_mask equ globals___0+15 ; line_number = 43 ; bind analog_mask = state[13] analog_mask equ globals___0+16 ; line_number = 44 ; global analogs_high[8] array[byte] analogs_high equ globals___0+17 ; line_number = 45 ; global analogs_low[8] array[byte] analogs_low equ globals___0+25 ; line_number = 46 ; global thresholds_high[8] array[byte] thresholds_high equ globals___0+33 ; line_number = 47 ; global thresholds_low[8] array[byte] thresholds_low equ globals___0+41 ; line_number = 49 ; bind interrupt_enable = flags@0 interrupt_enable___byte equ globals___0+11 interrupt_enable___bit equ 0 ; line_number = 50 ; bind interrupt_pending = flags@1 interrupt_pending___byte equ globals___0+11 interrupt_pending___bit equ 1 ; line_number = 52 ; global glitch byte glitch equ globals___0+49 ; line_number = 53 ; global index byte index equ globals___0+50 ; line_number = 54 ; global chan byte chan equ globals___0+51 ; line_number = 55 ; global channel byte channel equ globals___0+52 ; line_number = 57 ; origin 0 org 0 ; line_number = 59 ; procedure main main: ; Initialize some registers clrf _adcon0 bsf __rp0___byte, __rp0___bit clrf _ansel movlw 7 bcf __rp0___byte, __rp0___bit movwf _cmcon0 movlw 63 bsf __rp0___byte, __rp0___bit movwf _trisa movlw 63 movwf _trisc ; arguments_none ; line_number = 61 ; returns_nothing ; line_number = 63 ; local command byte main__command equ globals___0+53 ; line_number = 64 ; local temp byte main__temp equ globals___0+54 ; line_number = 65 ; local do_send bit main__do_send___byte equ globals___0+79 main__do_send___bit equ 2 ; # Switch over to 8MHz: ; before procedure statements delay=non-uniform, bit states=(data:00=>01 code:XX=>XX) ; line_number = 68 ; _osccon := 0x71 movlw 113 movwf _osccon ; # Warm up the UART: ; line_number = 71 ; _txsta := 0x24 movlw 36 bcf __rp0___byte, __rp0___bit movwf _txsta ; line_number = 72 ; _rcsta := 0x90 movlw 144 movwf _rcsta ; line_number = 73 ; _baudctl := 0x08 movlw 8 movwf _baudctl ; line_number = 74 ; _spbrg := _eusart_2400_low movlw 64 movwf _spbrg ; line_number = 75 ; _spbrgh := _eusart_2400_high movlw 3 movwf _spbrgh ; # Initalize all of the globals: ; line_number = 78 ; call reset() call reset ; # Process commands: ; line_number = 81 ; loop_forever start main__1: ; # Wait for command: ; line_number = 83 ; command := byte_get() call byte_get movwf main__command ; # Dispatch on command ; line_number = 86 ; switch command >> 6 start movlw main__106>>8 movwf __pclath main__107 equ globals___0+61 swapf main__command,w movwf main__107 rrf main__107,f rrf main__107,w andlw 3 addlw main__106 movwf __pcl ; page_group 4 main__106: goto main__102 goto main__103 goto main__104 goto main__105 ; line_number = 88 ; case 0 main__102: ; # 0000 xxxx: ; line_number = 90 ; switch command >> 4 start movlw main__41>>8 movwf __pclath main__42 equ globals___0+61 swapf main__command,w andlw 15 addlw main__41 movwf __pcl ; page_group 4 main__41: goto main__37 goto main__38 goto main__39 goto main__40 ; line_number = 91 ; case 0 main__37: ; line_number = 92 ; do_send := 1 bsf main__do_send___byte, main__do_send___bit ; line_number = 93 ; switch command start ; line_number = 94 ; case_maximum 15 movlw main__16>>8 movwf __pclath movf main__command,w addlw main__16 movwf __pcl ; page_group 16 main__16: goto main__3 goto main__4 goto main__5 goto main__6 goto main__7 goto main__8 goto main__9 goto main__10 goto main__11 goto main__12 goto main__13 goto main__14 goto main__15 goto main__15 goto main__15 goto main__15 ; line_number = 95 ; case 0 main__3: ; # 0000 0000 (Read Inputs): ; line_number = 97 ; temp := raw ^ complement_mask movf raw,w xorwf complement_mask,w movwf main__temp goto main__17 ; line_number = 98 ; case 1 main__4: ; # 0000 0001 (Read Outputs): ; line_number = 100 ; temp := outputs ^ complement_mask movf outputs,w xorwf complement_mask,w movwf main__temp goto main__17 ; line_number = 101 ; case 2 main__5: ; # 0000 0010 (Read Direction): ; line_number = 103 ; temp := complement_mask movf complement_mask,w movwf main__temp goto main__17 ; line_number = 104 ; case 3 main__6: ; # 0000 0011 (Read Raw): ; line_number = 106 ; temp := direction movf direction,w movwf main__temp goto main__17 ; line_number = 107 ; case 4 main__7: ; # 0000 0100 (Read Read Low Mask): ; line_number = 109 ; temp := low_mask movf low_mask,w movwf main__temp goto main__17 ; line_number = 110 ; case 5 main__8: ; # 0000 0101 (Read High Mask): ; line_number = 112 ; temp := high_mask movf high_mask,w movwf main__temp goto main__17 ; line_number = 113 ; case 6 main__9: ; # 0000 0110 (Read Rising Mask): ; line_number = 115 ; temp := rising_mask movf rising_mask,w movwf main__temp goto main__17 ; line_number = 116 ; case 7 main__10: ; # 0000 0111 (Read Falling Mask): ; line_number = 118 ; temp := falling_mask movf falling_mask,w movwf main__temp goto main__17 ; line_number = 119 ; case 8 main__11: ; # 0000 1000 (Read Inputs Raw): ; line_number = 121 ; temp := raw movf raw,w movwf main__temp goto main__17 ; line_number = 122 ; case 9 main__12: ; # 0000 1001 (Read Analog Mask): ; line_number = 124 ; temp := analog_mask movf analog_mask,w movwf main__temp goto main__17 ; line_number = 125 ; case 10 main__13: ; # 0000 1010 (Read Outputs Raw): ; line_number = 127 ; temp := outputs movf outputs,w movwf main__temp goto main__17 ; line_number = 128 ; case 11 main__14: ; # 0000 1011 (Read Analog VRef): ; line_number = 130 ; temp := 0 movlw 0 movwf main__temp ; line_number = 131 ; if _vcfg start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc _vcfg___byte, _vcfg___bit ; line_number = 132 ; temp@0 := 1 main__select__2___byte equ main__temp main__select__2___bit equ 0 bsf main__select__2___byte, main__select__2___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=_vcfg (data:00=>00 code:XX=>XX) ; line_number = 131 ; if _vcfg done goto main__17 ; line_number = 133 ; default main__15: ; # 0000 101x or 0000 11xx (Do nothing): ; line_number = 135 ; do_send := 0 bcf main__do_send___byte, main__do_send___bit main__17: ; switch end:(data:XX=>00 code:XX=>XX) ; line_number = 93 ; switch command done ; line_number = 136 ; if do_send start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss main__do_send___byte, main__do_send___bit goto main__18 ; line_number = 137 ; call byte_put(temp) movf main__temp,w call byte_put ; Recombine size1 = 0 || size2 = 0 main__18: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__do_send (data:XX=>00 code:XX=>XX) ; line_number = 136 ; if do_send done goto main__43 ; line_number = 138 ; case 1 main__38: ; # 0001 xxxx: ; line_number = 140 ; switch command & 15 start ; line_number = 141 ; case_maximum 15 movlw main__32>>8 movwf __pclath movlw 15 andwf main__command,w addlw main__32 movwf __pcl ; page_group 16 main__32: goto main__19 goto main__20 goto main__21 goto main__22 goto main__23 goto main__24 goto main__25 goto main__26 goto main__27 goto main__28 goto main__29 goto main__30 goto main__33 goto main__33 goto main__33 goto main__31 ; line_number = 142 ; case 0 main__19: ; # 0001 0000 (Reset Outputs): ; line_number = 144 ; outputs := complement_mask movf complement_mask,w movwf outputs goto main__33 ; line_number = 145 ; case 1 main__20: ; # 0001 0001 (Set Outputs): ; line_number = 147 ; outputs := byte_get() ^ complement_mask call byte_get xorwf complement_mask,w movwf outputs goto main__33 ; line_number = 148 ; case 2 main__21: ; # 0001 0010 (Set Complement Mask): ; line_number = 150 ; complement_mask := byte_get() call byte_get movwf complement_mask goto main__33 ; line_number = 151 ; case 3 main__22: ; # 0001 0011 (Set Direction Mask): ; line_number = 153 ; direction := byte_get() call byte_get movwf direction ; line_number = 154 ; call direction_set() call direction_set goto main__33 ; line_number = 155 ; case 4 main__23: ; # 0001 0100 (Set Low Mask): ; line_number = 157 ; low_mask := byte_get() call byte_get movwf low_mask goto main__33 ; line_number = 158 ; case 5 main__24: ; # 0001 0101 (Set High Mask): ; line_number = 160 ; high_mask := byte_get() call byte_get movwf high_mask goto main__33 ; line_number = 161 ; case 6 main__25: ; # 0001 0110 (Set Rising Mask): ; line_number = 163 ; rising_mask := byte_get() call byte_get movwf rising_mask goto main__33 ; line_number = 164 ; case 7 main__26: ; # 0001 0111 (Set Falling Mask): ; line_number = 166 ; falling_mask := byte_get() call byte_get movwf falling_mask goto main__33 ; line_number = 167 ; case 8 main__27: ; # 0001 1000 (Set Outputs Raw): ; line_number = 169 ; outputs := byte_get() call byte_get movwf outputs goto main__33 ; line_number = 170 ; case 9 main__28: ; # 0001 1001 (Set Analog Mask): ; line_number = 172 ; analog_mask := byte_get() call byte_get movwf analog_mask ; line_number = 173 ; call direction_set() call direction_set goto main__33 ; line_number = 174 ; case 10 main__29: ; # 0001 1010 (Clear Analog Vref): ; line_number = 176 ; _vcfg := 0 bcf _vcfg___byte, _vcfg___bit goto main__33 ; line_number = 177 ; case 11 main__30: ; # 0001 1011 (Set Analog Vref): ; line_number = 179 ; _vcfg := 1 bsf _vcfg___byte, _vcfg___bit goto main__33 ; line_number = 180 ; case 15 main__31: ; # 0001 1001 (Reset Everything): ; line_number = 182 ; call reset() call reset main__33: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 140 ; switch command & 15 done goto main__43 ; line_number = 183 ; case 2 main__39: ; # 0110 vbbb (Set Output Bit): ; line_number = 185 ; temp := mask[command & 7] movlw 7 andwf main__command,w call mask movwf main__temp ; line_number = 186 ; if command@3 start main__select__34___byte equ main__command main__select__34___bit equ 3 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=2 false_code_size=3 btfss main__select__34___byte, main__select__34___bit goto main__35 ; line_number = 187 ; outputs := outputs | temp movf main__temp,w iorwf outputs,f goto main__36 main__35: ; line_number = 189 ; outputs := outputs & (temp ^ 0xff) movlw 255 xorwf main__temp,w andwf outputs,f main__36: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__34 (data:00=>00 code:XX=>XX) ; line_number = 186 ; if command@3 done goto main__43 ; line_number = 190 ; case 3 main__40: ; # 0011 xxxx (Do Nothing): ; line_number = 192 ; do_nothing main__43: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 90 ; switch command >> 4 done goto main__108 ; line_number = 193 ; case 1 main__103: ; # 01xx xxxx: ; line_number = 195 ; switch (command >> 4) & 3 start movlw main__53>>8 movwf __pclath main__54 equ globals___0+61 swapf main__command,w andlw 3 addlw main__53 movwf __pcl ; page_group 4 main__53: goto main__49 goto main__50 goto main__51 goto main__52 ; line_number = 196 ; case 0 main__49: ; # 0100 llll (Set Outputs Low): ; line_number = 198 ; outputs := outputs & 0xf0 | (command ^ complement_mask) & 0xf main__44 equ globals___0+61 movlw 240 andwf outputs,w movwf main__44 movf main__command,w xorwf complement_mask,w andlw 15 iorwf main__44,w movwf outputs goto main__55 ; line_number = 199 ; case 1 main__50: ; # 0101 hhhh (Set Outputs High): ; line_number = 201 ; outputs := ((command << 4) ^ (complement_mask & 0xf0)) | outputs & 0xf main__45 equ globals___0+61 main__46 equ globals___0+62 swapf main__command,w movwf main__46 movlw 240 andwf main__46,f movlw 240 andwf complement_mask,w xorwf main__46,w movwf main__45 movlw 15 andwf outputs,w iorwf main__45,w movwf outputs goto main__55 ; line_number = 203 ; case 2 main__51: ; # 0110 llll (Set Direction Low): ; line_number = 205 ; direction := direction & 0xf0 | command & 0xf main__47 equ globals___0+61 movlw 240 andwf direction,w movwf main__47 movlw 15 andwf main__command,w iorwf main__47,w movwf direction ; line_number = 206 ; call direction_set() call direction_set goto main__55 ; line_number = 207 ; case 3 main__52: ; # 0111 hhhh (Set Direction High): ; line_number = 209 ; direction := (command << 4) | direction & 0xf main__48 equ globals___0+61 swapf main__command,w movwf main__48 movlw 240 andwf main__48,f movlw 15 andwf direction,w iorwf main__48,w movwf direction ; line_number = 210 ; call direction_set() call direction_set main__55: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 195 ; switch (command >> 4) & 3 done goto main__108 ; line_number = 211 ; case 2 main__104: ; # 10xx xxxx: ; line_number = 213 ; temp := command & 7 movlw 7 andwf main__command,w movwf main__temp ; line_number = 214 ; switch (command >> 3) & 7 start ; line_number = 215 ; case_maximum 7 movlw main__66>>8 movwf __pclath main__67 equ globals___0+61 rrf main__command,w movwf main__67 rrf main__67,f rrf main__67,w andlw 7 addlw main__66 movwf __pcl ; page_group 8 main__66: goto main__60 goto main__61 goto main__62 goto main__63 goto main__68 goto main__68 goto main__64 goto main__65 ; line_number = 216 ; case 0 main__60: ; # 1000 0bbb (Read Analog 8-bits): ; line_number = 218 ; call byte_put(analogs_high[temp]) movf main__temp,w addlw analogs_high movwf __fsr movf __indf,w call byte_put goto main__68 ; line_number = 219 ; case 1 main__61: ; # 1000 1bbb (Read Analog 10-bits): ; line_number = 221 ; call byte_put(analogs_high[temp]) movf main__temp,w addlw analogs_high movwf __fsr movf __indf,w call byte_put ; line_number = 222 ; call byte_put(analogs_low[temp]) movf main__temp,w addlw analogs_low movwf __fsr movf __indf,w call byte_put goto main__68 ; line_number = 223 ; case 2 main__62: ; # 1001 0bbb (Read Low Threshold): ; line_number = 225 ; call byte_put(thresholds_low[temp]) movf main__temp,w addlw thresholds_low movwf __fsr movf __indf,w call byte_put goto main__68 ; line_number = 226 ; case 3 main__63: ; # 1001 1bbb (Read High Threshold): ; line_number = 228 ; call byte_put(thresholds_high[temp]) movf main__temp,w addlw thresholds_high movwf __fsr movf __indf,w call byte_put goto main__68 ; line_number = 229 ; case 6 main__64: ; # 1011 0bbb (Set Low Threshold): ; line_number = 231 ; thresholds_low[temp] := byte_get() ; index_temporary_first main__56 equ globals___0+61 main__57 equ globals___0+62 movf main__temp,w movwf main__56 call byte_get movwf main__57 movf main__56,w addlw thresholds_low movwf __fsr movf main__57,w movwf __indf goto main__68 ; line_number = 232 ; case 7 main__65: ; # 1011 1bbb (Set High Threshold): ; line_number = 234 ; thresholds_high[temp] := byte_get() ; index_temporary_first main__58 equ globals___0+61 main__59 equ globals___0+62 movf main__temp,w movwf main__58 call byte_get movwf main__59 movf main__58,w addlw thresholds_high movwf __fsr movf main__59,w movwf __indf main__68: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 214 ; switch (command >> 3) & 7 done goto main__108 ; line_number = 235 ; case 3 main__105: ; # 11xx xxxx: ; line_number = 237 ; switch (command >> 3) & 7 start movlw main__99>>8 movwf __pclath main__100 equ globals___0+61 rrf main__command,w movwf main__100 rrf main__100,f rrf main__100,w andlw 7 addlw main__99 movwf __pcl ; page_group 8 main__99: goto main__95 goto main__95 goto main__95 goto main__95 goto main__95 goto main__96 goto main__97 goto main__98 ; line_number = 238 ; default main__95: ; # 110x xxxx or 1110 0xxx: ; line_number = 240 ; do_nothing goto main__101 ; line_number = 241 ; case 5 main__96: ; # 1110 1xxx: ; line_number = 243 ; switch command & 7 start movlw main__73>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__73 movwf __pcl ; page_group 8 main__73: goto main__74 goto main__74 goto main__74 goto main__74 goto main__74 goto main__74 goto main__71 goto main__72 ; line_number = 244 ; case 6 main__71: ; # 1110 1110 (Reset) ; line_number = 246 ; call reset() call reset goto main__74 ; line_number = 247 ; case 7 main__72: ; # 1110 1111 (Read Interrupt Bits): ; line_number = 249 ; temp := 0 movlw 0 movwf main__temp ; line_number = 250 ; if interrupt_pending start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc interrupt_pending___byte, interrupt_pending___bit ; line_number = 251 ; temp@0 := 1 main__select__69___byte equ main__temp main__select__69___bit equ 0 bsf main__select__69___byte, main__select__69___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:00=>00 code:XX=>XX) ; line_number = 250 ; if interrupt_pending done ; line_number = 252 ; if interrupt_enable start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc interrupt_enable___byte, interrupt_enable___bit ; line_number = 253 ; temp@1 := 1 main__select__70___byte equ main__temp main__select__70___bit equ 1 bsf main__select__70___byte, main__select__70___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:00=>00 code:XX=>XX) ; line_number = 252 ; if interrupt_enable done ; line_number = 254 ; call byte_put(temp) movf main__temp,w call byte_put main__74: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 243 ; switch command & 7 done goto main__101 ; line_number = 255 ; case 6 main__97: ; # 1111 0xxx: ; line_number = 257 ; switch command & 7 start movlw main__82>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__82 movwf __pcl ; page_group 8 main__82: goto main__79 goto main__79 goto main__79 goto main__79 goto main__80 goto main__80 goto main__81 goto main__81 ; line_number = 258 ; case 0, 1, 2, 3 main__79: ; # 1111 00ep (Set Interrupt Bits): ; line_number = 260 ; interrupt_enable := command@1 bcf interrupt_enable___byte, interrupt_enable___bit main__select__75___byte equ main__command main__select__75___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__75___byte, main__select__75___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__75 (data:00=>00 code:XX=>XX) ; line_number = 261 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__76___byte equ main__command main__select__76___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__76___byte, main__select__76___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__76 (data:00=>00 code:XX=>XX) goto main__83 ; line_number = 262 ; case 4, 5 main__80: ; # 1111 010p (Set Interrupt Pending): ; line_number = 264 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__77___byte equ main__command main__select__77___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__77___byte, main__select__77___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__77 (data:00=>00 code:XX=>XX) goto main__83 ; line_number = 265 ; case 6, 7 main__81: ; # 1111 011e (Set Interrupt Enable): ; line_number = 267 ; interrupt_enable := command@0 bcf interrupt_enable___byte, interrupt_enable___bit main__select__78___byte equ main__command main__select__78___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__78___byte, main__select__78___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__78 (data:00=>00 code:XX=>XX) main__83: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 257 ; switch command & 7 done goto main__101 ; line_number = 268 ; case 7 main__98: ; line_number = 269 ; switch command & 7 start movlw main__93>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__93 movwf __pcl ; page_group 8 main__93: goto main__85 goto main__86 goto main__87 goto main__88 goto main__89 goto main__90 goto main__91 goto main__92 ; line_number = 270 ; case 0 main__85: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1000 (Clock Decrement): ; line_number = 272 ; _osctune := _osctune - _osccal_lsb decf _osctune,f goto main__94 ; line_number = 273 ; case 1 main__86: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1001 (Clock Increment): ; line_number = 275 ; _osctune := _osctune + _osccal_lsb incf _osctune,f goto main__94 ; line_number = 276 ; case 2 main__87: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1010 (Clock Read): ; line_number = 278 ; call byte_put(_osctune) movf _osctune,w bcf __rp0___byte, __rp0___bit call byte_put goto main__94 ; line_number = 279 ; case 3 main__88: ; # 1111 1011 (Clock Pulse): ; line_number = 281 ; call byte_put(0) movlw 0 call byte_put goto main__94 ; line_number = 282 ; case 4 main__89: ; # 1111 1100 (ID Next): ; line_number = 284 ; temp := 0 movlw 0 movwf main__temp ; line_number = 285 ; if index < id.size start movlw 50 subwf index,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=0 (non-uniform delay) btfsc __c___byte, __c___bit goto main__84 ; line_number = 286 ; temp := id[index] movf index,w call id movwf main__temp ; line_number = 287 ; index := index + 1 incf index,f main__84: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) ; line_number = 285 ; if index < id.size done ; line_number = 288 ; call byte_put(temp) movf main__temp,w call byte_put goto main__94 ; line_number = 289 ; case 5 main__90: ; # 1111 1101 (ID Reset): ; line_number = 291 ; index := 0 movlw 0 movwf index goto main__94 ; line_number = 292 ; case 6 main__91: ; # 1111 1110 (Glitch Read): ; line_number = 294 ; call byte_put(glitch) movf glitch,w call byte_put ; line_number = 295 ; glitch := 0 movlw 0 movwf glitch goto main__94 ; line_number = 296 ; case 7 main__92: ; # 1111 1111 (Glitch): ; line_number = 298 ; if glitch != 0xff start ; Left minus Right incf glitch,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 299 ; glitch := glitch + 1 incf glitch,f ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:XX=>XX) ; line_number = 298 ; if glitch != 0xff done main__94: ; switch end:(data:00=>0? code:XX=>XX) ; line_number = 269 ; switch command & 7 done main__101: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 237 ; switch (command >> 3) & 7 done main__108: ; switch end:(data:00=>?? code:XX=>XX) ; line_number = 86 ; switch command >> 6 done ; line_number = 81 ; loop_forever wrap-up ; Need to adjust code banks to match front of loop bcf __rp0___byte, __rp0___bit bcf __rp1___byte, __rp1___bit goto main__1 ; line_number = 81 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 302 ; procedure direction_set direction_set: ; arguments_none ; line_number = 304 ; returns_nothing ; # This procedure will set the direction appropriately. ; line_number = 308 ; local temp byte direction_set__temp equ globals___0+55 ; # Deal with port C: ; # RX and TX should both be inputs: ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 312 ; temp := 0x30 movlw 48 movwf direction_set__temp ; line_number = 313 ; if direction@4 start direction_set__select__2___byte equ direction direction_set__select__2___bit equ 4 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__2___byte, direction_set__select__2___bit ; line_number = 314 ; temp@io4_bit := 1 direction_set__select__1___byte equ direction_set__temp direction_set__select__1___bit equ 0 bsf direction_set__select__1___byte, direction_set__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__2 (data:00=>00 code:XX=>XX) ; line_number = 313 ; if direction@4 done ; line_number = 315 ; if direction@5 start direction_set__select__4___byte equ direction direction_set__select__4___bit equ 5 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__4___byte, direction_set__select__4___bit ; line_number = 316 ; temp@io5_bit := 1 direction_set__select__3___byte equ direction_set__temp direction_set__select__3___bit equ 1 bsf direction_set__select__3___byte, direction_set__select__3___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__4 (data:00=>00 code:XX=>XX) ; line_number = 315 ; if direction@5 done ; line_number = 317 ; if direction@6 start direction_set__select__6___byte equ direction direction_set__select__6___bit equ 6 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__6___byte, direction_set__select__6___bit ; line_number = 318 ; temp@io6_bit := 1 direction_set__select__5___byte equ direction_set__temp direction_set__select__5___bit equ 2 bsf direction_set__select__5___byte, direction_set__select__5___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__6 (data:00=>00 code:XX=>XX) ; line_number = 317 ; if direction@6 done ; line_number = 319 ; if direction@7 start direction_set__select__8___byte equ direction direction_set__select__8___bit equ 7 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__8___byte, direction_set__select__8___bit ; line_number = 320 ; temp@io7_bit := 1 direction_set__select__7___byte equ direction_set__temp direction_set__select__7___bit equ 3 bsf direction_set__select__7___byte, direction_set__select__7___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__8 (data:00=>00 code:XX=>XX) ; line_number = 319 ; if direction@7 done ; line_number = 321 ; _trisc := temp movf direction_set__temp,w bsf __rp0___byte, __rp0___bit movwf _trisc ; # Deal with port A: ; line_number = 324 ; temp := 0 movlw 0 bcf __rp0___byte, __rp0___bit movwf direction_set__temp ; line_number = 325 ; if direction@0 start direction_set__select__10___byte equ direction direction_set__select__10___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__10___byte, direction_set__select__10___bit ; line_number = 326 ; temp@io0_bit := 1 direction_set__select__9___byte equ direction_set__temp direction_set__select__9___bit equ 0 bsf direction_set__select__9___byte, direction_set__select__9___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__10 (data:00=>00 code:XX=>XX) ; line_number = 325 ; if direction@0 done ; line_number = 327 ; if direction@1 start direction_set__select__12___byte equ direction direction_set__select__12___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__12___byte, direction_set__select__12___bit ; line_number = 328 ; temp@io1_bit := 1 direction_set__select__11___byte equ direction_set__temp direction_set__select__11___bit equ 4 bsf direction_set__select__11___byte, direction_set__select__11___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__12 (data:00=>00 code:XX=>XX) ; line_number = 327 ; if direction@1 done ; line_number = 329 ; if direction@2 start direction_set__select__14___byte equ direction direction_set__select__14___bit equ 2 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__14___byte, direction_set__select__14___bit ; line_number = 330 ; temp@io2_bit:= 1 direction_set__select__13___byte equ direction_set__temp direction_set__select__13___bit equ 1 bsf direction_set__select__13___byte, direction_set__select__13___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__14 (data:00=>00 code:XX=>XX) ; line_number = 329 ; if direction@2 done ; line_number = 331 ; if direction@3 start direction_set__select__16___byte equ direction direction_set__select__16___bit equ 3 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__16___byte, direction_set__select__16___bit ; line_number = 332 ; temp@io3_bit := 1 direction_set__select__15___byte equ direction_set__temp direction_set__select__15___bit equ 2 bsf direction_set__select__15___byte, direction_set__select__15___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__16 (data:00=>00 code:XX=>XX) ; line_number = 331 ; if direction@3 done ; line_number = 333 ; _trisa := temp movf direction_set__temp,w bsf __rp0___byte, __rp0___bit movwf _trisa ; line_number = 335 ; temp := 0 movlw 0 bcf __rp0___byte, __rp0___bit movwf direction_set__temp ; line_number = 336 ; if analog_mask@0 start direction_set__select__18___byte equ analog_mask direction_set__select__18___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__18___byte, direction_set__select__18___bit ; line_number = 337 ; temp@0 := 1 direction_set__select__17___byte equ direction_set__temp direction_set__select__17___bit equ 0 bsf direction_set__select__17___byte, direction_set__select__17___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__18 (data:00=>00 code:XX=>XX) ; line_number = 336 ; if analog_mask@0 done ; line_number = 338 ; if analog_mask@1 start direction_set__select__20___byte equ analog_mask direction_set__select__20___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__20___byte, direction_set__select__20___bit ; line_number = 339 ; temp@1 := 1 direction_set__select__19___byte equ direction_set__temp direction_set__select__19___bit equ 1 bsf direction_set__select__19___byte, direction_set__select__19___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__20 (data:00=>00 code:XX=>XX) ; line_number = 338 ; if analog_mask@1 done ; line_number = 340 ; if analog_mask@2 start direction_set__select__22___byte equ analog_mask direction_set__select__22___bit equ 2 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__22___byte, direction_set__select__22___bit ; line_number = 341 ; temp@3 := 1 direction_set__select__21___byte equ direction_set__temp direction_set__select__21___bit equ 3 bsf direction_set__select__21___byte, direction_set__select__21___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__22 (data:00=>00 code:XX=>XX) ; line_number = 340 ; if analog_mask@2 done ; line_number = 342 ; if analog_mask@3 start direction_set__select__24___byte equ analog_mask direction_set__select__24___bit equ 3 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__24___byte, direction_set__select__24___bit ; line_number = 343 ; temp@2 := 1 direction_set__select__23___byte equ direction_set__temp direction_set__select__23___bit equ 2 bsf direction_set__select__23___byte, direction_set__select__23___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__24 (data:00=>00 code:XX=>XX) ; line_number = 342 ; if analog_mask@3 done ; line_number = 344 ; if analog_mask@4 start direction_set__select__26___byte equ analog_mask direction_set__select__26___bit equ 4 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__26___byte, direction_set__select__26___bit ; line_number = 345 ; temp@4 := 1 direction_set__select__25___byte equ direction_set__temp direction_set__select__25___bit equ 4 bsf direction_set__select__25___byte, direction_set__select__25___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__26 (data:00=>00 code:XX=>XX) ; line_number = 344 ; if analog_mask@4 done ; line_number = 346 ; if analog_mask@5 start direction_set__select__28___byte equ analog_mask direction_set__select__28___bit equ 5 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__28___byte, direction_set__select__28___bit ; line_number = 347 ; temp@5 := 1 direction_set__select__27___byte equ direction_set__temp direction_set__select__27___bit equ 5 bsf direction_set__select__27___byte, direction_set__select__27___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__28 (data:00=>00 code:XX=>XX) ; line_number = 346 ; if analog_mask@5 done ; line_number = 348 ; if analog_mask@6 start direction_set__select__30___byte equ analog_mask direction_set__select__30___bit equ 6 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__30___byte, direction_set__select__30___bit ; line_number = 349 ; temp@6 := 1 direction_set__select__29___byte equ direction_set__temp direction_set__select__29___bit equ 6 bsf direction_set__select__29___byte, direction_set__select__29___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__30 (data:00=>00 code:XX=>XX) ; line_number = 348 ; if analog_mask@6 done ; line_number = 350 ; if analog_mask@7 start direction_set__select__32___byte equ analog_mask direction_set__select__32___bit equ 7 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__32___byte, direction_set__select__32___bit ; line_number = 351 ; temp@7 := 1 direction_set__select__31___byte equ direction_set__temp direction_set__select__31___bit equ 7 bsf direction_set__select__31___byte, direction_set__select__31___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__32 (data:00=>00 code:XX=>XX) ; line_number = 350 ; if analog_mask@7 done ; line_number = 352 ; _ansel := temp movf direction_set__temp,w bsf __rp0___byte, __rp0___bit movwf _ansel ; delay after procedure statements=non-uniform bcf __rp0___byte, __rp0___bit ; Implied return retlw 0 ; line_number = 355 ; procedure reset reset: ; arguments_none ; line_number = 357 ; returns_nothing ; # This procedure will initialize all global registers: ; # Initialize global registertes: ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 362 ; index := 0 movlw 0 movwf index ; line_number = 363 ; loop_exactly state_size start reset__1 equ globals___0+63 movlw 14 movwf reset__1 reset__2: ; line_number = 364 ; state[index] := 0 ; index_fsr_first movf index,w addlw state movwf __fsr movlw 0 movwf __indf ; line_number = 365 ; index := index + 1 incf index,f ; line_number = 363 ; loop_exactly state_size wrap-up decfsz reset__1,f goto reset__2 ; line_number = 363 ; loop_exactly state_size done ; line_number = 367 ; index := 0 movlw 0 movwf index ; line_number = 368 ; loop_exactly 8 start reset__3 equ globals___0+63 movlw 8 movwf reset__3 reset__4: ; line_number = 369 ; analogs_high[index] := 0 ; index_fsr_first movf index,w addlw analogs_high movwf __fsr movlw 0 movwf __indf ; line_number = 370 ; analogs_low[index] := 0 ; index_fsr_first movf index,w addlw analogs_low movwf __fsr movlw 0 movwf __indf ; line_number = 371 ; thresholds_high[index] := 0x80 ; index_fsr_first movf index,w addlw thresholds_high movwf __fsr movlw 128 movwf __indf ; line_number = 372 ; thresholds_low[index] := 0x80 ; index_fsr_first movf index,w addlw thresholds_low movwf __fsr movlw 128 movwf __indf ; line_number = 373 ; index := index + 1 incf index,f ; line_number = 368 ; loop_exactly 8 wrap-up decfsz reset__3,f goto reset__4 ; line_number = 368 ; loop_exactly 8 done ; line_number = 375 ; interrupt_enable := 0 bcf interrupt_enable___byte, interrupt_enable___bit ; line_number = 376 ; interrupt_pending := 0 bcf interrupt_pending___byte, interrupt_pending___bit ; line_number = 377 ; direction := 0xff movlw 255 movwf direction ; line_number = 378 ; analog_mask := 0 movlw 0 movwf analog_mask ; # Initialize the A/D module: ; # A/D Conversion clock is Fosc/8 (Tad=2uS) and AD is on: ; line_number = 382 ; _adcon0 := 1 movlw 1 movwf _adcon0 ; line_number = 383 ; _adcon1 := 0x20 movlw 32 bsf __rp0___byte, __rp0___bit movwf _adcon1 ; line_number = 384 ; _adcs0 := 1 bsf _adcs0___byte, _adcs0___bit ; line_number = 385 ; _adif := 0 bcf __rp0___byte, __rp0___bit bcf _adif___byte, _adif___bit ; line_number = 386 ; _adie := 0 bsf __rp0___byte, __rp0___bit bcf _adie___byte, _adie___bit ; line_number = 387 ; _gie := 0 bcf __rp0___byte, __rp0___bit bcf _gie___byte, _gie___bit ; line_number = 388 ; channel := 0 movlw 0 movwf channel ; line_number = 389 ; _vcfg := 0 bcf _vcfg___byte, _vcfg___bit ; # This sets TRISA and TRISC: ; line_number = 392 ; call direction_set() call direction_set ; # Initialize remaining registers: ; line_number = 395 ; glitch := 0 movlw 0 movwf glitch ; line_number = 396 ; index := 0 movlw 0 movwf index ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 399 ; procedure delay delay: ; arguments_none ; line_number = 401 ; returns_nothing ; # This procedure delays 1/3 of a bit. ; line_number = 405 ; local temp byte delay__temp equ globals___0+56 ; line_number = 406 ; local previous byte delay__previous equ globals___0+57 ; line_number = 407 ; local current byte delay__current equ globals___0+58 ; line_number = 408 ; local not_current byte delay__not_current equ globals___0+59 ; line_number = 409 ; local changed byte delay__changed equ globals___0+60 ; # Perform A/D: ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 413 ; chan := chans[channel] movf channel,w call chans movwf chan ; # At 8MHz, TAD = 1.6uS (ADCS<2:0>=010). An A/D conversion takes ; # 11*TAD = 11*1.6uS = 17.1uS ; # Acquiring the signal takes approximately 20uS. ; # We'll pad that out a little to 25uS to be safe: ; line_number = 421 ; temp := (chan << 2) | 1 delay__1 equ globals___0+64 rlf chan,w movwf delay__1 rlf delay__1,w andlw 252 iorlw 1 movwf delay__temp ; line_number = 422 ; if _vcfg start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc _vcfg___byte, _vcfg___bit ; # Keep _vcfg set: ; line_number = 424 ; temp@6 := 1 delay__select__2___byte equ delay__temp delay__select__2___bit equ 6 bsf delay__select__2___byte, delay__select__2___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=_vcfg (data:00=>00 code:XX=>XX) ; line_number = 422 ; if _vcfg done ; line_number = 425 ; _adcon0 := temp movf delay__temp,w movwf _adcon0 ; line_number = 426 ; delay 25 * microsecond start ; Delay expression evaluates to 50 ; # Kick the dog: ; line_number = 428 ; watch_dog_reset done ; Delay at watch_dog_reset is 0 clrwdt ; # Read inputs: ; line_number = 431 ; raw := 0 ; Delay at assignment is 1 movlw 0 movwf raw ; line_number = 432 ; if io7 start ; Delay at if is 3 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io7___byte, io7___bit ; line_number = 433 ; raw@7 := 1 ; Delay at assignment is 0 delay__select__3___byte equ raw delay__select__3___bit equ 7 bsf delay__select__3___byte, delay__select__3___bit ; code.delay=5 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io7 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=5 ; line_number = 432 ; if io7 done ; line_number = 434 ; if io6 start ; Delay at if is 5 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io6___byte, io6___bit ; line_number = 435 ; raw@6 := 1 ; Delay at assignment is 0 delay__select__4___byte equ raw delay__select__4___bit equ 6 bsf delay__select__4___byte, delay__select__4___bit ; code.delay=7 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io6 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=7 ; line_number = 434 ; if io6 done ; line_number = 436 ; if io5 start ; Delay at if is 7 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io5___byte, io5___bit ; line_number = 437 ; raw@5 := 1 ; Delay at assignment is 0 delay__select__5___byte equ raw delay__select__5___bit equ 5 bsf delay__select__5___byte, delay__select__5___bit ; code.delay=9 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io5 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=9 ; line_number = 436 ; if io5 done ; line_number = 438 ; if io4 start ; Delay at if is 9 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io4___byte, io4___bit ; line_number = 439 ; raw@4 := 1 ; Delay at assignment is 0 delay__select__6___byte equ raw delay__select__6___bit equ 4 bsf delay__select__6___byte, delay__select__6___bit ; code.delay=11 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io4 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=11 ; line_number = 438 ; if io4 done ; line_number = 440 ; if io3 start ; Delay at if is 11 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io3___byte, io3___bit ; line_number = 441 ; raw@3 := 1 ; Delay at assignment is 0 delay__select__7___byte equ raw delay__select__7___bit equ 3 bsf delay__select__7___byte, delay__select__7___bit ; code.delay=13 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io3 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=13 ; line_number = 440 ; if io3 done ; line_number = 442 ; if io2 start ; Delay at if is 13 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io2___byte, io2___bit ; line_number = 443 ; raw@2 := 1 ; Delay at assignment is 0 delay__select__8___byte equ raw delay__select__8___bit equ 2 bsf delay__select__8___byte, delay__select__8___bit ; code.delay=15 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io2 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=15 ; line_number = 442 ; if io2 done ; line_number = 444 ; if io1 start ; Delay at if is 15 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io1___byte, io1___bit ; line_number = 445 ; raw@1 := 1 ; Delay at assignment is 0 delay__select__9___byte equ raw delay__select__9___bit equ 1 bsf delay__select__9___byte, delay__select__9___bit ; code.delay=17 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io1 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=17 ; line_number = 444 ; if io1 done ; line_number = 446 ; if io0 start ; Delay at if is 17 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io0___byte, io0___bit ; line_number = 447 ; raw@0 := 1 ; Delay at assignment is 0 delay__select__10___byte equ raw delay__select__10___bit equ 0 bsf delay__select__10___byte, delay__select__10___bit ; code.delay=19 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io0 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=19 ; line_number = 446 ; if io0 done ; Delay 31 cycles ; Delay loop takes 7 * 4 = 28 cycles movlw 7 delay__11: addlw 255 btfss __z___byte, __z___bit goto delay__11 goto delay__12 delay__12: nop ; line_number = 426 ; delay 25 * microsecond done ; # Getting the value takes 11 & Tad, where Tad = 2uS = 22uS. ; # We'll add 5uS for a little pad: ; line_number = 451 ; _go := 1 bsf _go___byte, _go___bit ; line_number = 452 ; delay 28 * microsecond start ; Delay expression evaluates to 56 ; # Write out port C: ; line_number = 454 ; temp := 0 ; Delay at assignment is 0 movlw 0 movwf delay__temp ; line_number = 455 ; if outputs@7 start ; Delay at if is 2 delay__select__14___byte equ outputs delay__select__14___bit equ 7 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__14___byte, delay__select__14___bit ; line_number = 456 ; temp@io7_bit := 1 ; Delay at assignment is 0 delay__select__13___byte equ delay__temp delay__select__13___bit equ 3 bsf delay__select__13___byte, delay__select__13___bit ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__14 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=4 ; line_number = 455 ; if outputs@7 done ; line_number = 457 ; if outputs@6 start ; Delay at if is 4 delay__select__16___byte equ outputs delay__select__16___bit equ 6 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__16___byte, delay__select__16___bit ; line_number = 458 ; temp@io6_bit := 1 ; Delay at assignment is 0 delay__select__15___byte equ delay__temp delay__select__15___bit equ 2 bsf delay__select__15___byte, delay__select__15___bit ; code.delay=6 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__16 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=6 ; line_number = 457 ; if outputs@6 done ; line_number = 459 ; if outputs@5 start ; Delay at if is 6 delay__select__18___byte equ outputs delay__select__18___bit equ 5 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__18___byte, delay__select__18___bit ; line_number = 460 ; temp@io5_bit := 1 ; Delay at assignment is 0 delay__select__17___byte equ delay__temp delay__select__17___bit equ 1 bsf delay__select__17___byte, delay__select__17___bit ; code.delay=8 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__18 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=8 ; line_number = 459 ; if outputs@5 done ; line_number = 461 ; if outputs@4 start ; Delay at if is 8 delay__select__20___byte equ outputs delay__select__20___bit equ 4 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__20___byte, delay__select__20___bit ; line_number = 462 ; temp@io4_bit := 1 ; Delay at assignment is 0 delay__select__19___byte equ delay__temp delay__select__19___bit equ 0 bsf delay__select__19___byte, delay__select__19___bit ; code.delay=10 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__20 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=10 ; line_number = 461 ; if outputs@4 done ; line_number = 463 ; _portc := temp ; Delay at assignment is 10 movf delay__temp,w movwf _portc ; # Write out port A: ; line_number = 466 ; temp := 0 ; Delay at assignment is 12 movlw 0 movwf delay__temp ; line_number = 467 ; if outputs@3 start ; Delay at if is 14 delay__select__22___byte equ outputs delay__select__22___bit equ 3 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__22___byte, delay__select__22___bit ; line_number = 468 ; temp@io3_bit := 1 ; Delay at assignment is 0 delay__select__21___byte equ delay__temp delay__select__21___bit equ 2 bsf delay__select__21___byte, delay__select__21___bit ; code.delay=16 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__22 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=16 ; line_number = 467 ; if outputs@3 done ; line_number = 469 ; if outputs@2 start ; Delay at if is 16 delay__select__24___byte equ outputs delay__select__24___bit equ 2 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__24___byte, delay__select__24___bit ; line_number = 470 ; temp@io2_bit := 1 ; Delay at assignment is 0 delay__select__23___byte equ delay__temp delay__select__23___bit equ 1 bsf delay__select__23___byte, delay__select__23___bit ; code.delay=18 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__24 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=18 ; line_number = 469 ; if outputs@2 done ; line_number = 471 ; if outputs@1 start ; Delay at if is 18 delay__select__26___byte equ outputs delay__select__26___bit equ 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__26___byte, delay__select__26___bit ; line_number = 472 ; temp@io1_bit := 1 ; Delay at assignment is 0 delay__select__25___byte equ delay__temp delay__select__25___bit equ 4 bsf delay__select__25___byte, delay__select__25___bit ; code.delay=20 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__26 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=20 ; line_number = 471 ; if outputs@1 done ; line_number = 473 ; if outputs@0 start ; Delay at if is 20 delay__select__28___byte equ outputs delay__select__28___bit equ 0 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__28___byte, delay__select__28___bit ; line_number = 474 ; temp@io0_bit := 1 ; Delay at assignment is 0 delay__select__27___byte equ delay__temp delay__select__27___bit equ 0 bsf delay__select__27___byte, delay__select__27___bit ; code.delay=22 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__28 (data:00=>00 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=22 ; line_number = 473 ; if outputs@0 done ; line_number = 475 ; _porta := temp ; Delay at assignment is 22 movf delay__temp,w movwf _porta ; Delay 32 cycles ; Delay loop takes 8 * 4 = 32 cycles movlw 8 delay__29: addlw 255 btfss __z___byte, __z___bit goto delay__29 ; line_number = 452 ; delay 28 * microsecond done ; # A/D result is ready: ; line_number = 478 ; analogs_high[channel] := _adresh ; index_fsr_first movf channel,w addlw analogs_high movwf __fsr movf _adresh,w movwf __indf ; line_number = 479 ; analogs_low[channel] := _adresl ; index_fsr_first movf channel,w addlw analogs_low movwf __fsr bsf __rp0___byte, __rp0___bit movf _adresl,w movwf __indf ; # Store the result away: ; line_number = 482 ; channel := (channel + 1) & 7 bcf __rp0___byte, __rp0___bit incf channel,w andlw 7 movwf channel ; # Setup for interrupts: ; line_number = 485 ; previous := current movf delay__current,w movwf delay__previous ; # Read the I/O port once: ; line_number = 487 ; current := raw ^ complement_mask movf raw,w xorwf complement_mask,w movwf delay__current ; line_number = 488 ; not_current := current ^ 0xff movlw 255 xorwf delay__current,w movwf delay__not_current ; line_number = 489 ; changed := current ^ previous movf delay__current,w xorwf delay__previous,w movwf delay__changed ; # See about triggering the interrupt_pending flag: ; line_number = 492 ; if (low_mask & not_current) | (high_mask & current) | (changed & current & rising_mask) | (changed & not_current & falling_mask) != 0 start ; Left minus Right delay__30 equ globals___0+64 movf low_mask,w andwf delay__not_current,w movwf delay__30 movf high_mask,w andwf delay__current,w iorwf delay__30,f movf delay__changed,w andwf delay__current,w andwf rising_mask,w iorwf delay__30,f movf delay__changed,w andwf delay__not_current,w andwf falling_mask,w iorwf delay__30,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 495 ; interrupt_pending := 1 bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:XX=>XX) ; line_number = 492 ; if (low_mask & not_current) | (high_mask & current) | (changed & current & rising_mask) | (changed & not_current & falling_mask) != 0 done ; # Send an interrupt if interrupts are enabled: ; line_number = 498 ; if interrupt_pending start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=6 true_test=true body_code.delay=0 (non-uniform delay) btfss interrupt_pending___byte, interrupt_pending___bit goto delay__33 ; line_number = 499 ; if interrupt_enable start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=4 true_test=true body_code.delay=0 (non-uniform delay) btfss interrupt_enable___byte, interrupt_enable___bit goto delay__32 ; # If transmit buffer is empty, send a null: ; line_number = 501 ; if _trmt start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss _trmt___byte, _trmt___bit goto delay__31 ; line_number = 502 ; _txreg := 0 movlw 0 movwf _txreg ; Recombine size1 = 0 || size2 = 0 delay__31: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=_trmt (data:00=>00 code:XX=>XX) ; line_number = 501 ; if _trmt done ; Recombine size1 = 0 || size2 = 0 delay__32: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:00=>00 code:XX=>XX) ; line_number = 499 ; if interrupt_enable done ; Recombine size1 = 0 || size2 = 0 delay__33: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:00=>00 code:XX=>XX) ; line_number = 498 ; if interrupt_pending done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 505 ; constant zeros8 = "\0,0,0,0,0,0,0,0\" ; zeros8 = '\0,0,0,0,0,0,0,0\' ; line_number = 506 ; constant module_name = "\9\Digital8D" ; module_name = '\9\Digital8D' ; line_number = 507 ; constant vendor_name = "\15\Gramlich&Benson" ; vendor_name = '\15\Gramlich&Benson' ; line_number = 508 ; string id = "\1,0,32,3,3,0,0,0\" ~ zeros8 ~ zeros8 ~ module_name ~ vendor_name start ; id = '\1,0\ \3,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,9\Digital8D\15\Gramlich&Benson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 50 id___base: retlw 1 retlw 0 retlw 32 retlw 3 retlw 3 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 9 retlw 68 retlw 105 retlw 103 retlw 105 retlw 116 retlw 97 retlw 108 retlw 56 retlw 68 retlw 15 retlw 71 retlw 114 retlw 97 retlw 109 retlw 108 retlw 105 retlw 99 retlw 104 retlw 38 retlw 66 retlw 101 retlw 110 retlw 115 retlw 111 retlw 110 ; line_number = 508 ; string id = "\1,0,32,3,3,0,0,0\" ~ zeros8 ~ zeros8 ~ module_name ~ vendor_name start ; line_number = 510 ; string chans = "\0,3,1,2,4,5,6,7\" start ; chans = '\0,3,1,2,4,5,6,7\' chans: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw chans___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw chans___base ; Index to the correct return value movwf __pcl ; page_group 8 chans___base: retlw 0 retlw 3 retlw 1 retlw 2 retlw 4 retlw 5 retlw 6 retlw 7 ; line_number = 510 ; string chans = "\0,3,1,2,4,5,6,7\" start ; line_number = 512 ; string mask = "\1,2,4,8,16,32,64,128\" start ; mask = '\1,2,4,8,16\ @\128\' mask: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw mask___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw mask___base ; Index to the correct return value movwf __pcl ; page_group 8 mask___base: retlw 1 retlw 2 retlw 4 retlw 8 retlw 16 retlw 32 retlw 64 retlw 128 ; line_number = 512 ; string mask = "\1,2,4,8,16,32,64,128\" start ; Appending 4 delayed procedures to code bank 0 ; buffer = '_robobricks_pic16f688' ; line_number = 17 ; procedure byte_get byte_get: ; arguments_none ; line_number = 19 ; returns byte ; # This procedure will return the next byte from the UART. ; # It continuously calls delay() while it is waiting. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 24 ; while !_rcif start byte_get__1: ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=0 (non-uniform delay) btfsc _rcif___byte, _rcif___bit goto byte_get__2 ; line_number = 25 ; in_byte_get := 1 bsf in_byte_get___byte, in_byte_get___bit ; line_number = 26 ; call delay() call delay ; line_number = 27 ; in_byte_get := 0 bcf in_byte_get___byte, in_byte_get___bit goto byte_get__1 byte_get__2: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=_rcif (data:00=>00 code:XX=>XX) ; line_number = 24 ; while !_rcif done ; line_number = 28 ; interrupt_pending := 0 bcf interrupt_pending___byte, interrupt_pending___bit ; line_number = 29 ; command_previous := command_last movf command_last,w movwf command_previous ; line_number = 30 ; _rcif := 0 bcf _rcif___byte, _rcif___bit ; line_number = 31 ; return _rcreg start ; line_number = 31 movf _rcreg,w return ; line_number = 31 ; return _rcreg done ; delay after procedure statements=non-uniform ; line_number = 34 ; procedure byte_put byte_put: ; Last argument is sitting in W; save into argument variable movwf byte_put__value ; delay=4294967295 ; line_number = 35 ; argument value byte byte_put__value equ globals___0 ; line_number = 36 ; returns_nothing ; # This procedure will output {value} to the UART. If the UART is ; # already busy transmitting a character, the {delay} procedure is ; # repeatably called until {value} can be sent. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 42 ; while !_trmt start byte_put__1: ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=2 true_test=false body_code.delay=0 (non-uniform delay) btfsc _trmt___byte, _trmt___bit goto byte_put__2 ; line_number = 43 ; call delay() call delay goto byte_put__1 byte_put__2: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=_trmt (data:00=>00 code:XX=>XX) ; line_number = 42 ; while !_trmt done ; line_number = 44 ; debug := 0 bcf debug___byte, debug___bit ; line_number = 45 ; sent_previous := sent_last movf sent_last,w movwf sent_previous ; line_number = 46 ; sent_last := value movf byte_put__value,w movwf sent_last ; line_number = 47 ; _txreg := value movf byte_put__value,w movwf _txreg ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 50 ; procedure baud_rate_low baud_rate_low: ; Last argument is sitting in W; save into argument variable movwf baud_rate_low__baud_rate_index ; delay=4294967295 ; line_number = 51 ; argument baud_rate_index byte baud_rate_low__baud_rate_index equ globals___0+1 ; line_number = 52 ; returns byte ; #: This procedure will return the baud rate low byte for {baud_rate_index}. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 56 ; switch baud_rate_index start movlw baud_rate_low__9>>8 movwf __pclath movf baud_rate_low__baud_rate_index,w addlw baud_rate_low__9 movwf __pcl ; page_group 8 baud_rate_low__9: ; line_number = 58 ; return _eusart_2400_low start ; line_number = 58 retlw 64 ; line_number = 58 ; return _eusart_2400_low done ; line_number = 60 ; return _eusart_4800_low start ; line_number = 60 retlw 159 ; line_number = 60 ; return _eusart_4800_low done ; line_number = 62 ; return _eusart_9600_low start ; line_number = 62 retlw 207 ; line_number = 62 ; return _eusart_9600_low done ; line_number = 64 ; return _eusart_19200_low start ; line_number = 64 retlw 103 ; line_number = 64 ; return _eusart_19200_low done ; line_number = 66 ; return _eusart_38400_low start ; line_number = 66 retlw 51 ; line_number = 66 ; return _eusart_38400_low done ; line_number = 68 ; return _eusart_57600_low start ; line_number = 68 retlw 33 ; line_number = 68 ; return _eusart_57600_low done ; line_number = 70 ; return _eusart_115200_low start ; line_number = 70 retlw 16 ; line_number = 70 ; return _eusart_115200_low done ; line_number = 72 ; return _eusart_203400_low start ; line_number = 72 retlw 8 ; line_number = 72 ; return _eusart_203400_low done baud_rate_low__10: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 56 ; switch baud_rate_index done ; delay after procedure statements=non-uniform ; Exiting procedure with no return(s); fail with infinite loop baud_rate_low__11: goto baud_rate_low__11 ; line_number = 75 ; procedure baud_rate_high baud_rate_high: ; Last argument is sitting in W; save into argument variable movwf baud_rate_high__baud_rate_index ; delay=4294967295 ; line_number = 76 ; argument baud_rate_index byte baud_rate_high__baud_rate_index equ globals___0+2 ; line_number = 77 ; returns byte ; # This procedure will return the baud rate high byte for ; # {baud_rate_index}. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:XX=>XX) ; line_number = 82 ; switch baud_rate_index start movlw baud_rate_high__9>>8 movwf __pclath movf baud_rate_high__baud_rate_index,w addlw baud_rate_high__9 movwf __pcl ; page_group 8 baud_rate_high__9: ; line_number = 84 ; return _eusart_2400_high start ; line_number = 84 retlw 3 ; line_number = 84 ; return _eusart_2400_high done ; line_number = 86 ; return _eusart_4800_high start ; line_number = 86 retlw 1 ; line_number = 86 ; return _eusart_4800_high done ; line_number = 88 ; return _eusart_9600_high start ; line_number = 88 retlw 0 ; line_number = 88 ; return _eusart_9600_high done ; line_number = 90 ; return _eusart_19200_high start ; line_number = 90 retlw 0 ; line_number = 90 ; return _eusart_19200_high done ; line_number = 92 ; return _eusart_38400_high start ; line_number = 92 retlw 0 ; line_number = 92 ; return _eusart_38400_high done ; line_number = 94 ; return _eusart_57600_high start ; line_number = 94 retlw 0 ; line_number = 94 ; return _eusart_57600_high done ; line_number = 96 ; return _eusart_115200_high start ; line_number = 96 retlw 0 ; line_number = 96 ; return _eusart_115200_high done ; line_number = 98 ; return _eusart_203400_high start ; line_number = 98 retlw 0 ; line_number = 98 ; return _eusart_203400_high done baud_rate_high__10: ; switch end:(data:00=>00 code:XX=>XX) ; line_number = 82 ; switch baud_rate_index done ; delay after procedure statements=non-uniform ; Exiting procedure with no return(s); fail with infinite loop baud_rate_high__11: goto baud_rate_high__11 ; Configuration bits ; fill = 0x3000 ; fcmen = off (0x0) ; ieso = off (0x0) ; boden = off (0x0) ; cpd = off (0x80) ; cp = off (0x40) ; mclre = off (0x20) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = int_no_clk (0x4) ; 12532 = 0x30f4 __config 12532 ; Define start addresses for data regions ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 ; Region="globals___0" Address=32" Size=80 Bytes=65 Bits=3 Available=14 ; Region="globals___1" Address=160" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___2" Address=288" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___3" Address=416" Size=80 Bytes=0 Bits=0 Available=80 end