radix dec ; Code bank 0; Start address: 0; End address: 1023 org 0 ; Define start addresses for data regions shared___globals equ 32 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2000-2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = 'digital8' ; line_number = 6 ; library _pic16f630 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f630' ; line_number = 5 ; processor pic16f630 ; line_number = 6 ; configure_address 0x2007 ; line_number = 7 ; configure_fill 0x0000 ; line_number = 8 ; configure_option bg: bg11 = 0x3000 ; line_number = 9 ; configure_option bg: bg10 = 0x2000 ; line_number = 10 ; configure_option bg: bg01 = 0x1000 ; line_number = 11 ; configure_option bg: bg00 = 0x0000 ; line_number = 12 ; configure_option cpd: on = 0x000 ; line_number = 13 ; configure_option cpd: off = 0x100 ; line_number = 14 ; configure_option cp: on = 0x00 ; line_number = 15 ; configure_option cp: off = 0x80 ; line_number = 16 ; configure_option boden: on = 0x40 ; line_number = 17 ; configure_option boden: off = 0x00 ; line_number = 18 ; configure_option mclre: on = 0x20 ; line_number = 19 ; configure_option mclre: off = 0x00 ; line_number = 20 ; configure_option pwrte: on = 0x00 ; line_number = 21 ; configure_option pwrte: off = 0x10 ; line_number = 22 ; configure_option wdte: on = 8 ; line_number = 23 ; configure_option wdte: off = 0 ; line_number = 24 ; configure_option fosc: rc_clk = 7 ; line_number = 25 ; configure_option fosc: rc_no_clk = 6 ; line_number = 26 ; configure_option fosc: int_clk = 5 ; line_number = 27 ; configure_option fosc: int_no_clk = 4 ; line_number = 28 ; configure_option fosc: ec = 3 ; line_number = 29 ; configure_option fosc: hs = 2 ; line_number = 30 ; configure_option fosc: xt = 1 ; line_number = 31 ; configure_option fosc: lp = 0 ; line_number = 32 ; code_bank 0x0 : 0x3ff ; line_number = 33 ; data_bank 0x0 : 0x7f ; line_number = 34 ; data_bank 0x80 : 0xff ; line_number = 35 ; shared_region 0x20 : 0x5f ; line_number = 36 ; interrupts_possible ; line_number = 37 ; osccal_register_symbol _osccal ; line_number = 38 ; osccal_at_address 0x3ff ; line_number = 39 ; packages pdip=14, soic=14, tssop=14 ; line_number = 40 ; pin vdd, power_supply ; line_number = 41 ; pin_bindings pdip=1, soic=1, tssop=1 ; line_number = 42 ; pin ra5_in, ra5_out, t1cki, osc1, clkin, ra5_unused ; line_number = 43 ; pin_bindings pdip=2, soic=2, tssop=2 ; line_number = 44 ; bind_to _porta@5 ; line_number = 45 ; or_if ra5_in _trisa 16 ; line_number = 46 ; or_if ra5_out _trisa 0 ; line_number = 47 ; pin ra4_in, ra4_out, t1g, osc2, clkout, ra4_unused ; line_number = 48 ; pin_bindings pdip=3, soic=3, tssop=3 ; line_number = 49 ; bind_to _porta@4 ; line_number = 50 ; or_if ra4_in _trisa 8 ; line_number = 51 ; or_if ra4_out _trisa 0 ; line_number = 52 ; pin ra3_in, mclr, vpp, ra3_unused ; line_number = 53 ; pin_bindings pdip=4, soic=4, tssop=4 ; line_number = 54 ; bind_to _porta@3 ; line_number = 55 ; or_if ra3_in _trisa 4 ; line_number = 56 ; pin rc5_in, rc5_out, rc5_unused ; line_number = 57 ; pin_bindings pdip=5, soic=5, tssop=5 ; line_number = 58 ; bind_to _portc@5 ; line_number = 59 ; or_if rc5_in _trisc 32 ; line_number = 60 ; or_if rc5_out _trisc 0 ; line_number = 61 ; pin rc4_in, rc4_out, rc4_unused ; line_number = 62 ; pin_bindings pdip=6, soic=6, tssop=6 ; line_number = 63 ; bind_to _portc@4 ; line_number = 64 ; or_if rc4_in _trisc 16 ; line_number = 65 ; or_if rc4_out _trisc 0 ; line_number = 66 ; pin rc3_in, rc3_out, r3_unused ; line_number = 67 ; pin_bindings pdip=7, soic=7, tssop=7 ; line_number = 68 ; bind_to _portc@3 ; line_number = 69 ; or_if rc3_in _trisc 8 ; line_number = 70 ; or_if rc3_out _trisc 0 ; line_number = 71 ; pin rc2_in, rc2_out, rc2_unused ; line_number = 72 ; pin_bindings pdip=8, soic=8, tssop=8 ; line_number = 73 ; bind_to _portc@2 ; line_number = 74 ; or_if rc2_in _trisc 4 ; line_number = 75 ; or_if rc2_out _trisc 0 ; line_number = 76 ; pin rc1_in, rc1_out, rc1_unused ; line_number = 77 ; pin_bindings pdip=9, soic=9, tssop=9 ; line_number = 78 ; bind_to _portc@1 ; line_number = 79 ; or_if rc1_in _trisc 2 ; line_number = 80 ; or_if rc1_out _trisc 0 ; line_number = 81 ; pin rc0_in, rc0_out, rc0_unused ; line_number = 82 ; pin_bindings pdip=10, soic=10, tssop=10 ; line_number = 83 ; bind_to _portc@0 ; line_number = 84 ; or_if rc0_in _trisc 1 ; line_number = 85 ; or_if rc0_out _trisc 0 ; line_number = 86 ; pin ra2_in, ra2_out, cout, t0cki, int, ra2_unused ; line_number = 87 ; pin_bindings pdip=11, soic=11, tssop=11 ; line_number = 88 ; bind_to _porta@2 ; line_number = 89 ; or_if ra2_in _trisa 4 ; line_number = 90 ; or_if ra2_out _trisa 0 ; line_number = 91 ; pin ra1_in, ra1_out, cin_minus, vref, icspclk, ra1_unused ; line_number = 92 ; pin_bindings pdip=12, soic=12, tssop=12 ; line_number = 93 ; bind_to _porta@1 ; line_number = 94 ; or_if ra1_in _trisa 2 ; line_number = 95 ; or_if ra1_out _trisa 0 ; line_number = 96 ; pin ra0_in, ra0_out, cin_plus, icspdat, ra0_unused ; line_number = 97 ; pin_bindings pdip=13, soic=13, tssop=13 ; line_number = 98 ; bind_to _porta@0 ; line_number = 99 ; or_if ra0_in _trisa 1 ; line_number = 100 ; or_if ra0_out _trisa 0 ; line_number = 101 ; pin vss, ground ; line_number = 102 ; pin_bindings pdip=14, soic=14, tssop=14 ; line_number = 107 ; library _pic16f630_676 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # Shared register definitions for the PIC16F630 and PIC16F676. ; buffer = '_pic16f630_676' ; line_number = 7 ; register _indf = _indf equ 0 ; line_number = 9 ; register _tmr0 = _tmr0 equ 1 ; line_number = 11 ; register _pcl = _pcl equ 2 ; line_number = 13 ; register _status = _status equ 3 ; line_number = 14 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 15 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 16 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 17 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 18 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 19 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 21 ; register _fsr = _fsr equ 4 ; line_number = 23 ; register _porta = _porta equ 5 ; line_number = 24 ; register _ra = _ra equ 5 ; line_number = 25 ; bind _ra5 = _porta@5 _ra5___byte equ _porta _ra5___bit equ 5 ; line_number = 26 ; bind _ra4 = _porta@4 _ra4___byte equ _porta _ra4___bit equ 4 ; line_number = 27 ; bind _ra3 = _porta@3 _ra3___byte equ _porta _ra3___bit equ 3 ; line_number = 28 ; bind _ra2 = _porta@2 _ra2___byte equ _porta _ra2___bit equ 2 ; line_number = 29 ; bind _ra1 = _porta@1 _ra1___byte equ _porta _ra1___bit equ 1 ; line_number = 30 ; bind _ra0 = _porta@0 _ra0___byte equ _porta _ra0___bit equ 0 ; line_number = 32 ; register _portc = _portc equ 7 ; line_number = 33 ; register _rc = _rc equ 7 ; line_number = 34 ; bind _rc5 = _portc@5 _rc5___byte equ _portc _rc5___bit equ 5 ; line_number = 35 ; bind _rc4 = _portc@4 _rc4___byte equ _portc _rc4___bit equ 4 ; line_number = 36 ; bind _rc3 = _portc@3 _rc3___byte equ _portc _rc3___bit equ 3 ; line_number = 37 ; bind _rc2 = _portc@2 _rc2___byte equ _portc _rc2___bit equ 2 ; line_number = 38 ; bind _rc1 = _portc@1 _rc1___byte equ _portc _rc1___bit equ 1 ; line_number = 39 ; bind _rc0 = _portc@0 _rc0___byte equ _portc _rc0___bit equ 0 ; line_number = 41 ; register _pclath = _pclath equ 10 ; line_number = 43 ; register _intcon = _intcon equ 11 ; line_number = 44 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 45 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 46 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 47 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 48 ; bind _raie = _intcon@3 _raie___byte equ _intcon _raie___bit equ 3 ; line_number = 49 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 50 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 51 ; bind _raif = _intcon@0 _raif___byte equ _intcon _raif___bit equ 0 ; line_number = 53 ; register _pir1 = _pir1 equ 12 ; line_number = 54 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 55 ; bind _cmif = _pir1@3 _cmif___byte equ _pir1 _cmif___bit equ 3 ; line_number = 56 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 58 ; register _tmr1l = _tmr1l equ 14 ; line_number = 60 ; register _tmr1h = _tmr1h equ 15 ; line_number = 62 ; register _t1con = _t1con equ 16 ; line_number = 63 ; bind _t1ge = _t1con@6 _t1ge___byte equ _t1con _t1ge___bit equ 6 ; line_number = 64 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 65 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 66 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 67 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 68 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 69 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 71 ; register _cmcon = _cmcon equ 25 ; line_number = 72 ; bind _cout = _cmcon@6 _cout___byte equ _cmcon _cout___bit equ 6 ; line_number = 73 ; bind _cinv = _cmcon@4 _cinv___byte equ _cmcon _cinv___bit equ 4 ; line_number = 74 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 75 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 76 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 77 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 81 ; register _option_reg = _option_reg equ 128 ; line_number = 82 ; bind _rapu = _option_reg@7 _rapu___byte equ _option_reg _rapu___bit equ 7 ; line_number = 83 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 84 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 85 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 86 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 87 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 88 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 89 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 91 ; register _trisa = _trisa equ 133 ; line_number = 92 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 93 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 94 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 95 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 96 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 97 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 99 ; register _trisc = _trisc equ 135 ; line_number = 100 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 101 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 102 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 103 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 104 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 105 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 107 ; register _pie1 = _pie1 equ 140 ; line_number = 108 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 109 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 110 ; bind _cmie = _pie1@3 _cmie___byte equ _pie1 _cmie___bit equ 3 ; line_number = 111 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 113 ; register _pcon = _pcon equ 142 ; line_number = 114 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 115 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 117 ; register _osccal = _osccal equ 144 ; line_number = 118 ; bind _cal5 = _osccal@7 _cal5___byte equ _osccal _cal5___bit equ 7 ; line_number = 119 ; bind _cal4 = _osccal@6 _cal4___byte equ _osccal _cal4___bit equ 6 ; line_number = 120 ; bind _cal3 = _osccal@5 _cal3___byte equ _osccal _cal3___bit equ 5 ; line_number = 121 ; bind _cal2 = _osccal@4 _cal2___byte equ _osccal _cal2___bit equ 4 ; line_number = 122 ; bind _cal1 = _osccal@3 _cal1___byte equ _osccal _cal1___bit equ 3 ; line_number = 123 ; bind _cal0 = _osccal@2 _cal0___byte equ _osccal _cal0___bit equ 2 ; line_number = 124 ; constant _osccal_lsb = 4 _osccal_lsb equ 4 ; line_number = 126 ; register _wpua = _wpua equ 149 ; line_number = 127 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 128 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 129 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 130 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 131 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 133 ; register _ioca = _ioca equ 150 ; line_number = 134 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 135 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 136 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 137 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 138 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 139 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 141 ; register _vrcon = _vrcon equ 153 ; line_number = 142 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 143 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 144 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 145 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 146 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 147 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 149 ; register _eedata = _eedata equ 154 ; line_number = 151 ; register _eeadr = _eeadr equ 155 ; line_number = 153 ; register _eecon1 = _eecon1 equ 156 ; line_number = 154 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 155 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 156 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 157 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 159 ; register _eecon2 = _eecon2 equ 157 ; buffer = '_pic16f630' ; line_number = 107 ; library _pic16f630_676 exited ; buffer = 'digital8' ; line_number = 6 ; library _pic16f630 exited ; line_number = 7 ; library clock4mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock4mhz' ; line_number = 9 ; constant clock_rate = 4000000 clock_rate equ 4000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 1000000 ; buffer = 'digital8' ; line_number = 7 ; library clock4mhz exited ; line_number = 8 ; library bit_bang entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library provides bit bang routines for sending and receiving ; # serial data at 2400 baud in 8N1 format (1 start bit, 8 data bits, ; # No parity bit, 1 stop stop bit.) ; # ; # This library requires that the pins {serial_in} and {serial_out} ; # be defined. In addition, the variable {instruction_rate} needs ; # to be defined. Lastly, there needs to be a {delay} procedure ; # with an "exact_delay delay_instructions" clause in it. The {delay} ; # routine should invoke "watch_dog_reset" so that the watch dog time ; # can be set. ; # Define some constants that we will be needing: ; buffer = 'bit_bang' ; line_number = 17 ; constant baud_rate = 2400 baud_rate equ 2400 ; line_number = 18 ; constant instructions_per_bit = instruction_rate / baud_rate instructions_per_bit equ 416 ; line_number = 19 ; constant delays_per_bit = 3 delays_per_bit equ 3 ; line_number = 20 ; constant instructions_per_delay = instructions_per_bit / delays_per_bit instructions_per_delay equ 138 ; line_number = 21 ; constant extra_instructions = 5 extra_instructions equ 5 ; line_number = 22 ; constant delay_instructions = instructions_per_delay - extra_instructions delay_instructions equ 133 ; # The {receiving} bit is sent when data is being received. ; # It gets cleared whenever data gets sent. It is used to ; # determine whether additional delay is needed to turn a ; # line around for slow interpretted chips like the Basic ; # Stamp 2 and the OOPIC. ; line_number = 30 ; global receiving bit receiving___byte equ shared___globals+63 receiving___bit equ 0 ; line_number = 31 ; global waiting bit waiting___byte equ shared___globals+63 waiting___bit equ 1 ; Delaying code generation for procedure byte_get ; Delaying code generation for procedure byte_put ; buffer = 'digital8' ; line_number = 8 ; library bit_bang exited ; line_number = 10 ; package pdip ; line_number = 11 ; pin 1 = power_supply ; line_number = 12 ; pin 2 = ra5_in, name=io0, mask=io0_mask, bit=io0_bit io0___byte equ _porta io0___bit equ 5 io0_mask equ 32 io0_bit equ 5 ; line_number = 13 ; pin 3 = ra4_in, name=io1, mask=io1_mask, bit=io1_bit io1___byte equ _porta io1___bit equ 4 io1_mask equ 16 io1_bit equ 4 ; line_number = 14 ; pin 4 = ra3_in, name=serial_in, mask=serial_in_mask, bit=serial_in_bit serial_in___byte equ _porta serial_in___bit equ 3 serial_in_mask equ 8 serial_in_bit equ 3 ; line_number = 15 ; pin 5 = rc5_unused ; line_number = 16 ; pin 6 = rc4_out, name=debug_out, mask=debug_out_mask, bit=debug_out_bit debug_out___byte equ _portc debug_out___bit equ 4 debug_out_mask equ 16 debug_out_bit equ 4 ; line_number = 17 ; pin 7 = rc3_in, name=io7, mask=io7_mask, bit=io7_bit io7___byte equ _portc io7___bit equ 3 io7_mask equ 8 io7_bit equ 3 ; line_number = 18 ; pin 8 = rc2_in, name=io6, mask=io6_mask, bit=io6_bit io6___byte equ _portc io6___bit equ 2 io6_mask equ 4 io6_bit equ 2 ; line_number = 19 ; pin 9 = rc1_in, name=io5, mask=io5_mask, bit=io5_bit io5___byte equ _portc io5___bit equ 1 io5_mask equ 2 io5_bit equ 1 ; line_number = 20 ; pin 10 = rc0_in, name=io4, mask=io4_mask, bit=io4_bit io4___byte equ _portc io4___bit equ 0 io4_mask equ 1 io4_bit equ 0 ; line_number = 21 ; pin 11 = ra2_in, name=io3, mask=io3_mask, bit=io3_bit io3___byte equ _porta io3___bit equ 2 io3_mask equ 4 io3_bit equ 2 ; line_number = 22 ; pin 12 = ra1_in, name=io2, mask=io2_mask, bit=io2_bit io2___byte equ _porta io2___bit equ 1 io2_mask equ 2 io2_bit equ 1 ; line_number = 23 ; pin 13 = ra0_out, name=serial_out, mask=serial_out_mask, bit=serial_out_bit serial_out___byte equ _porta serial_out___bit equ 0 serial_out_mask equ 1 serial_out_bit equ 0 ; line_number = 24 ; pin 14 = ground ; # Pin bindings: ; # TRIS masks: ; line_number = 31 ; constant trisa_mask = io2_mask | io3_mask | serial_in_mask | io1_mask | io0_mask | 0xc0 trisa_mask equ 254 ; line_number = 33 ; constant trisc_mask = io4_mask | io5_mask | io6_mask | io7_mask | 0xc0 trisc_mask equ 207 ; # Some globals: byte ; line_number = 36 ; constant state_size = 12 state_size equ 12 ; line_number = 37 ; constant state_size2 = state_size << 1 state_size2 equ 24 ; line_number = 38 ; global state[state_size] array[byte] state equ shared___globals+4 ; line_number = 39 ; bind command_previous = state[0] command_previous equ shared___globals+4 ; line_number = 40 ; bind command_last = state[1] command_last equ shared___globals+5 ; line_number = 41 ; bind sent_last = state[2] sent_last equ shared___globals+6 ; line_number = 42 ; bind sent_previous = state[3] sent_previous equ shared___globals+7 ; line_number = 43 ; bind raw = state[4] raw equ shared___globals+8 ; line_number = 44 ; bind outputs = state[5] outputs equ shared___globals+9 ; line_number = 45 ; bind complement_mask = state[6] complement_mask equ shared___globals+10 ; line_number = 46 ; bind flags = state[7] flags equ shared___globals+11 ; line_number = 47 ; bind low_mask = state[8] low_mask equ shared___globals+12 ; line_number = 48 ; bind high_mask = state[9] high_mask equ shared___globals+13 ; line_number = 49 ; bind rising_mask = state[10] rising_mask equ shared___globals+14 ; line_number = 50 ; bind falling_mask = state[11] falling_mask equ shared___globals+15 ; line_number = 52 ; bind interrupt_enable = flags@0 interrupt_enable___byte equ shared___globals+11 interrupt_enable___bit equ 0 ; line_number = 53 ; bind interrupt_pending = flags@1 interrupt_pending___byte equ shared___globals+11 interrupt_pending___bit equ 1 ; line_number = 55 ; global direction byte direction equ shared___globals+16 ; line_number = 56 ; global glitch byte glitch equ shared___globals+17 ; line_number = 57 ; global index byte index equ shared___globals+18 ; line_number = 59 ; global debug_character byte debug_character equ shared___globals+19 ; line_number = 60 ; global debug_counter byte debug_counter equ shared___globals+20 ; line_number = 61 ; global debug_index byte debug_index equ shared___globals+21 ; line_number = 63 ; origin 0x3ff org 1023 ; line_number = 65 ; procedure osccal osccal: ; arguments_none ; line_number = 67 ; returns byte ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 69 ; return 0xa0 start ; line_number = 69 retlw 160 ; line_number = 69 ; return 0xa0 done ; delay after procedure statements=non-uniform ; line_number = 71 ; origin 0 org 0 ; line_number = 73 ; procedure main main: ; Need to calibrate the oscillator call 1023 bsf __rp0___byte, __rp0___bit movwf _osccal ; Initialize some registers movlw 30 movwf _trisa movlw 15 movwf _trisc ; arguments_none ; line_number = 75 ; returns_nothing ; line_number = 77 ; local command byte main__command equ shared___globals+22 ; line_number = 78 ; local temp byte main__temp equ shared___globals+23 ; line_number = 79 ; local do_send bit main__do_send___byte equ shared___globals+63 main__do_send___bit equ 2 ; # Initalize all of the globals: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) ; line_number = 82 ; call reset() bcf __rp0___byte, __rp0___bit call reset ; # Process commands: ; line_number = 85 ; loop_forever start main__1: ; # Wait for command: ; line_number = 87 ; command := byte_get() call byte_get movwf main__command ; # Dispatch on command ; line_number = 90 ; switch command >> 6 start movlw main__85>>8 movwf __pclath main__86 equ shared___globals+30 swapf main__command,w movwf main__86 rrf main__86,f rrf main__86,w andlw 3 addlw main__85 movwf __pcl ; page_group 4 main__85: goto main__81 goto main__82 goto main__83 goto main__84 ; line_number = 92 ; case 0 main__81: ; # 0000 xxxx: ; line_number = 94 ; switch command >> 4 start movlw main__36>>8 movwf __pclath main__37 equ shared___globals+30 swapf main__command,w andlw 15 addlw main__36 movwf __pcl ; page_group 4 main__36: goto main__32 goto main__33 goto main__34 goto main__35 ; line_number = 95 ; case 0 main__32: ; line_number = 96 ; do_send := 1 bsf main__do_send___byte, main__do_send___bit ; line_number = 97 ; switch command start ; line_number = 98 ; case_maximum 15 movlw main__13>>8 movwf __pclath movf main__command,w addlw main__13 movwf __pcl ; page_group 16 main__13: goto main__2 goto main__3 goto main__4 goto main__5 goto main__6 goto main__7 goto main__8 goto main__9 goto main__10 goto main__11 goto main__12 goto main__12 goto main__12 goto main__12 goto main__12 goto main__12 ; line_number = 99 ; case 0 main__2: ; # 0000 0000 (Read Inputs): ; line_number = 101 ; temp := raw ^ complement_mask movf raw,w xorwf complement_mask,w movwf main__temp goto main__14 ; line_number = 102 ; case 1 main__3: ; # 0000 0001 (Read Outputs): ; line_number = 104 ; temp := outputs ^ complement_mask movf outputs,w xorwf complement_mask,w movwf main__temp goto main__14 ; line_number = 105 ; case 2 main__4: ; # 0000 0010 (Read Direction): ; line_number = 107 ; temp := complement_mask movf complement_mask,w movwf main__temp goto main__14 ; line_number = 108 ; case 3 main__5: ; # 0000 0011 (Read Raw): ; line_number = 110 ; temp := direction movf direction,w movwf main__temp goto main__14 ; line_number = 111 ; case 4 main__6: ; # 0000 0100 (Read Read Low Mask): ; line_number = 113 ; temp := low_mask movf low_mask,w movwf main__temp goto main__14 ; line_number = 114 ; case 5 main__7: ; # 0000 0101 (Read High Mask): ; line_number = 116 ; temp := high_mask movf high_mask,w movwf main__temp goto main__14 ; line_number = 117 ; case 6 main__8: ; # 0000 0110 (Read Rising Mask): ; line_number = 119 ; temp := rising_mask movf rising_mask,w movwf main__temp goto main__14 ; line_number = 120 ; case 7 main__9: ; # 0000 0111 (Read Falling Mask): ; line_number = 122 ; temp := falling_mask movf falling_mask,w movwf main__temp goto main__14 ; line_number = 123 ; case 8 main__10: ; # 0000 1000 (Read Inputs Raw): ; line_number = 125 ; temp := raw movf raw,w movwf main__temp goto main__14 ; line_number = 126 ; case 9 main__11: ; # 0000 1001 (Read Outputs Raw): ; line_number = 128 ; temp := outputs movf outputs,w movwf main__temp goto main__14 ; line_number = 129 ; default main__12: ; # 0000 101x or 0000 11xx (Do nothing): ; line_number = 131 ; do_send := 0 bcf main__do_send___byte, main__do_send___bit main__14: ; switch end:(data:XX=>X0 code:XX=>XX) ; line_number = 97 ; switch command done ; line_number = 132 ; if do_send start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss main__do_send___byte, main__do_send___bit goto main__15 ; line_number = 133 ; call byte_put(temp) movf main__temp,w call byte_put ; Recombine size1 = 0 || size2 = 0 main__15: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__do_send (data:XX=>X0 code:XX=>XX) ; line_number = 132 ; if do_send done goto main__38 ; line_number = 134 ; case 1 main__33: ; # 0001 xxxx: ; line_number = 136 ; switch command & 15 start ; line_number = 137 ; case_maximum 15 movlw main__27>>8 movwf __pclath movlw 15 andwf main__command,w addlw main__27 movwf __pcl ; page_group 16 main__27: goto main__16 goto main__17 goto main__18 goto main__19 goto main__20 goto main__21 goto main__22 goto main__23 goto main__24 goto main__25 goto main__26 goto main__26 goto main__26 goto main__26 goto main__26 goto main__26 ; line_number = 138 ; case 0 main__16: ; # 0001 0000 (Reset Outputs): ; line_number = 140 ; outputs := complement_mask movf complement_mask,w movwf outputs goto main__28 ; line_number = 141 ; case 1 main__17: ; # 0001 0001 (Set Outputs): ; line_number = 143 ; outputs := byte_get() ^ complement_mask call byte_get xorwf complement_mask,w movwf outputs goto main__28 ; line_number = 144 ; case 2 main__18: ; # 0001 0010 (Set Complement Mask): ; line_number = 146 ; complement_mask := byte_get() call byte_get movwf complement_mask goto main__28 ; line_number = 147 ; case 3 main__19: ; # 0001 0011 (Set Direction Mask): ; line_number = 149 ; direction := byte_get() call byte_get movwf direction ; line_number = 150 ; call direction_set() call direction_set goto main__28 ; line_number = 151 ; case 4 main__20: ; # 0001 0100 (Set Low Mask): ; line_number = 153 ; low_mask := byte_get() call byte_get movwf low_mask goto main__28 ; line_number = 154 ; case 5 main__21: ; # 0001 0101 (Set High Mask): ; line_number = 156 ; high_mask := byte_get() call byte_get movwf high_mask goto main__28 ; line_number = 157 ; case 6 main__22: ; # 0001 0110 (Set Rising Mask): ; line_number = 159 ; rising_mask := byte_get() call byte_get movwf rising_mask goto main__28 ; line_number = 160 ; case 7 main__23: ; # 0001 0111 (Set Falling Mask): ; line_number = 162 ; falling_mask := byte_get() call byte_get movwf falling_mask goto main__28 ; line_number = 163 ; case 8 main__24: ; # 0001 1000 (Set Outputs Raw): ; line_number = 165 ; outputs := byte_get() call byte_get movwf outputs goto main__28 ; line_number = 166 ; case 9 main__25: ; # 0001 1001 (Reset Everything): ; line_number = 168 ; call reset() call reset goto main__28 ; line_number = 169 ; default main__26: ; # 0001 101x or 0001 11xx (Do Nothing): ; line_number = 171 ; do_nothing main__28: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 136 ; switch command & 15 done goto main__38 ; line_number = 172 ; case 2 main__34: ; # 0110 vbbb (Set Output Bit): ; line_number = 174 ; temp := mask[command & 7] movlw 7 andwf main__command,w call mask movwf main__temp ; line_number = 175 ; if command@3 start main__select__29___byte equ main__command main__select__29___bit equ 3 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=2 false_code_size=3 btfss main__select__29___byte, main__select__29___bit goto main__30 ; line_number = 176 ; outputs := outputs | temp movf main__temp,w iorwf outputs,f goto main__31 main__30: ; line_number = 178 ; outputs := outputs & (temp ^ 0xff) movlw 255 xorwf main__temp,w andwf outputs,f main__31: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__29 (data:X0=>X0 code:XX=>XX) ; line_number = 175 ; if command@3 done goto main__38 ; line_number = 179 ; case 3 main__35: ; # 0011 xxxx (Do Nothing): ; line_number = 181 ; do_nothing main__38: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 94 ; switch command >> 4 done goto main__87 ; line_number = 182 ; case 1 main__82: ; # 01xx xxxx: ; line_number = 184 ; switch (command >> 4) & 3 start movlw main__48>>8 movwf __pclath main__49 equ shared___globals+30 swapf main__command,w andlw 3 addlw main__48 movwf __pcl ; page_group 4 main__48: goto main__44 goto main__45 goto main__46 goto main__47 ; line_number = 185 ; case 0 main__44: ; # 0100 llll (Set Outputs Low): ; line_number = 187 ; outputs := outputs & 0xf0 | (command ^ complement_mask) & 0xf main__39 equ shared___globals+30 movlw 240 andwf outputs,w movwf main__39 movf main__command,w xorwf complement_mask,w andlw 15 iorwf main__39,w movwf outputs goto main__50 ; line_number = 188 ; case 1 main__45: ; # 0101 hhhh (Set Outputs High): ; line_number = 190 ; outputs := ((command << 4) ^ (complement_mask & 0xf0)) | outputs & 0xf main__40 equ shared___globals+30 main__41 equ shared___globals+31 swapf main__command,w movwf main__41 movlw 240 andwf main__41,f movlw 240 andwf complement_mask,w xorwf main__41,w movwf main__40 movlw 15 andwf outputs,w iorwf main__40,w movwf outputs goto main__50 ; line_number = 192 ; case 2 main__46: ; # 0110 llll (Set Direction Low): ; line_number = 194 ; direction := direction & 0xf0 | command & 0xf main__42 equ shared___globals+30 movlw 240 andwf direction,w movwf main__42 movlw 15 andwf main__command,w iorwf main__42,w movwf direction ; line_number = 195 ; call direction_set() call direction_set goto main__50 ; line_number = 196 ; case 3 main__47: ; # 0111 hhhh (Set Direction High): ; line_number = 198 ; direction := (command << 4) | direction & 0xf main__43 equ shared___globals+30 swapf main__command,w movwf main__43 movlw 240 andwf main__43,f movlw 15 andwf direction,w iorwf main__43,w movwf direction ; line_number = 199 ; call direction_set() call direction_set main__50: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 184 ; switch (command >> 4) & 3 done goto main__87 ; line_number = 200 ; case 2 main__83: ; # 10xx xxxx: ; line_number = 202 ; do_nothing goto main__87 ; line_number = 203 ; case 3 main__84: ; # 11xx xxxx: ; line_number = 205 ; switch (command >> 3) & 7 start movlw main__78>>8 movwf __pclath main__79 equ shared___globals+30 rrf main__command,w movwf main__79 rrf main__79,f rrf main__79,w andlw 7 addlw main__78 movwf __pcl ; page_group 8 main__78: goto main__74 goto main__74 goto main__74 goto main__74 goto main__74 goto main__75 goto main__76 goto main__77 ; line_number = 206 ; default main__74: ; # 110x xxxx or 1110 0xxx: ; line_number = 208 ; do_nothing goto main__80 ; line_number = 209 ; case 5 main__75: ; # 1110 1xxx: ; line_number = 211 ; if command = 0xef start ; Left minus Right movlw 17 addwf main__command,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=8 true_test=true body_code.delay=0 (non-uniform delay) btfss __z___byte, __z___bit goto main__53 ; # 1110 1111 (Read Interrupt Bits): ; line_number = 213 ; temp := 0 movlw 0 movwf main__temp ; line_number = 214 ; if interrupt_pending start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc interrupt_pending___byte, interrupt_pending___bit ; line_number = 215 ; temp@0 := 1 main__select__51___byte equ main__temp main__select__51___bit equ 0 bsf main__select__51___byte, main__select__51___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) ; line_number = 214 ; if interrupt_pending done ; line_number = 216 ; if interrupt_enable start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc interrupt_enable___byte, interrupt_enable___bit ; line_number = 217 ; temp@1 := 1 main__select__52___byte equ main__temp main__select__52___bit equ 1 bsf main__select__52___byte, main__select__52___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) ; line_number = 216 ; if interrupt_enable done ; line_number = 218 ; call byte_put(temp) movf main__temp,w call byte_put ; Recombine size1 = 0 || size2 = 0 main__53: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 211 ; if command = 0xef done goto main__80 ; line_number = 219 ; case 6 main__76: ; # 1111 0xxx: ; # Switching between register banks generates bulky code; ; # Keep code generation in bank 0 by assigning command to ; # temp: ; line_number = 224 ; temp := command movf main__command,w movwf main__temp ; line_number = 225 ; switch temp & 7 start movlw main__61>>8 movwf __pclath movlw 7 andwf main__temp,w addlw main__61 movwf __pcl ; page_group 8 ; Add 3 NOP's until start of new page nop nop nop main__61: goto main__58 goto main__58 goto main__58 goto main__58 goto main__59 goto main__59 goto main__60 goto main__60 ; line_number = 226 ; case 0, 1, 2, 3 main__58: ; # 1111 00ep (Set Interrupt Bits): ; line_number = 228 ; interrupt_enable := temp@1 bcf interrupt_enable___byte, interrupt_enable___bit main__select__54___byte equ main__temp main__select__54___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__54___byte, main__select__54___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__54 (data:X0=>X0 code:XX=>XX) ; line_number = 229 ; interrupt_pending := temp@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__55___byte equ main__temp main__select__55___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__55___byte, main__select__55___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__55 (data:X0=>X0 code:XX=>XX) goto main__62 ; line_number = 230 ; case 4, 5 main__59: ; # 1111 010p (Set Interrupt Pending): ; line_number = 232 ; interrupt_pending := temp@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__56___byte equ main__temp main__select__56___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__56___byte, main__select__56___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__56 (data:X0=>X0 code:XX=>XX) goto main__62 ; line_number = 233 ; case 6, 7 main__60: ; # 1111 011e (Set Interrupt Enable): ; line_number = 235 ; interrupt_enable := temp@0 bcf interrupt_enable___byte, interrupt_enable___bit main__select__57___byte equ main__temp main__select__57___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__57___byte, main__select__57___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__57 (data:X0=>X0 code:XX=>XX) main__62: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 225 ; switch temp & 7 done goto main__80 ; line_number = 236 ; case 7 main__77: ; line_number = 237 ; switch command & 7 start movlw main__72>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__72 movwf __pcl ; page_group 8 main__72: goto main__64 goto main__65 goto main__66 goto main__67 goto main__68 goto main__69 goto main__70 goto main__71 ; line_number = 238 ; case 0 main__64: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1000 (Clock Decrement): ; line_number = 240 ; _osccal := _osccal - _osccal_lsb movlw 252 addwf _osccal,f goto main__73 ; line_number = 241 ; case 1 main__65: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1001 (Clock Increment): ; line_number = 243 ; _osccal := _osccal + _osccal_lsb movlw 4 addwf _osccal,f goto main__73 ; line_number = 244 ; case 2 main__66: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 1111 1010 (Clock Read): ; line_number = 246 ; call byte_put(_osccal) movf _osccal,w bcf __rp0___byte, __rp0___bit call byte_put goto main__73 ; line_number = 247 ; case 3 main__67: ; # 1111 1011 (Clock Pulse): ; line_number = 249 ; call byte_put(0) movlw 0 call byte_put goto main__73 ; line_number = 250 ; case 4 main__68: ; # 1111 1100 (ID Next): ; line_number = 252 ; temp := 0 movlw 0 movwf main__temp ; line_number = 253 ; if index < id.size start movlw 47 subwf index,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=0 (non-uniform delay) btfsc __c___byte, __c___bit goto main__63 ; line_number = 254 ; temp := id[index] movf index,w call id movwf main__temp ; line_number = 255 ; index := index + 1 incf index,f main__63: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; line_number = 253 ; if index < id.size done ; line_number = 256 ; call byte_put(temp) movf main__temp,w call byte_put goto main__73 ; line_number = 257 ; case 5 main__69: ; # 1111 1101 (ID Reset): ; line_number = 259 ; index := 0 movlw 0 movwf index goto main__73 ; line_number = 260 ; case 6 main__70: ; # 1111 1110 (Glitch Read): ; line_number = 262 ; call byte_put(glitch) movf glitch,w call byte_put ; line_number = 263 ; glitch := 0 movlw 0 movwf glitch goto main__73 ; line_number = 264 ; case 7 main__71: ; # 1111 1111 (Glitch): ; line_number = 266 ; if glitch != 0xff start ; Left minus Right incf glitch,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 267 ; glitch := glitch + 1 incf glitch,f ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 266 ; if glitch != 0xff done main__73: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 237 ; switch command & 7 done main__80: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 205 ; switch (command >> 3) & 7 done main__87: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 90 ; switch command >> 6 done ; line_number = 85 ; loop_forever wrap-up ; Need to adjust code banks to match front of loop bcf __rp0___byte, __rp0___bit goto main__1 ; line_number = 85 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 270 ; procedure direction_set direction_set: ; arguments_none ; line_number = 272 ; returns_nothing ; # This procedure will set the direction appropriately. ; line_number = 276 ; local temp byte direction_set__temp equ shared___globals+24 ; # Deal with port C: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 279 ; temp := 0 movlw 0 movwf direction_set__temp ; line_number = 280 ; if direction@4 start direction_set__select__2___byte equ direction direction_set__select__2___bit equ 4 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__2___byte, direction_set__select__2___bit ; line_number = 281 ; temp@io4_bit := 1 direction_set__select__1___byte equ direction_set__temp direction_set__select__1___bit equ 0 bsf direction_set__select__1___byte, direction_set__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__2 (data:X0=>X0 code:XX=>XX) ; line_number = 280 ; if direction@4 done ; line_number = 282 ; if direction@5 start direction_set__select__4___byte equ direction direction_set__select__4___bit equ 5 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__4___byte, direction_set__select__4___bit ; line_number = 283 ; temp@io5_bit := 1 direction_set__select__3___byte equ direction_set__temp direction_set__select__3___bit equ 1 bsf direction_set__select__3___byte, direction_set__select__3___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__4 (data:X0=>X0 code:XX=>XX) ; line_number = 282 ; if direction@5 done ; line_number = 284 ; if direction@6 start direction_set__select__6___byte equ direction direction_set__select__6___bit equ 6 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__6___byte, direction_set__select__6___bit ; line_number = 285 ; temp@io6_bit := 1 direction_set__select__5___byte equ direction_set__temp direction_set__select__5___bit equ 2 bsf direction_set__select__5___byte, direction_set__select__5___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__6 (data:X0=>X0 code:XX=>XX) ; line_number = 284 ; if direction@6 done ; line_number = 286 ; if direction@7 start direction_set__select__8___byte equ direction direction_set__select__8___bit equ 7 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__8___byte, direction_set__select__8___bit ; line_number = 287 ; temp@io7_bit := 1 direction_set__select__7___byte equ direction_set__temp direction_set__select__7___bit equ 3 bsf direction_set__select__7___byte, direction_set__select__7___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__8 (data:X0=>X0 code:XX=>XX) ; line_number = 286 ; if direction@7 done ; line_number = 288 ; _trisc := temp movf direction_set__temp,w bsf __rp0___byte, __rp0___bit movwf _trisc ; # Deal with port A: ; line_number = 291 ; temp := 0 movlw 0 bcf __rp0___byte, __rp0___bit movwf direction_set__temp ; line_number = 292 ; temp@serial_in_bit := 1 direction_set__select__9___byte equ direction_set__temp direction_set__select__9___bit equ 3 bsf direction_set__select__9___byte, direction_set__select__9___bit ; line_number = 293 ; if direction@0 start direction_set__select__11___byte equ direction direction_set__select__11___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__11___byte, direction_set__select__11___bit ; line_number = 294 ; temp@io0_bit := 1 direction_set__select__10___byte equ direction_set__temp direction_set__select__10___bit equ 5 bsf direction_set__select__10___byte, direction_set__select__10___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__11 (data:X0=>X0 code:XX=>XX) ; line_number = 293 ; if direction@0 done ; line_number = 295 ; if direction@1 start direction_set__select__13___byte equ direction direction_set__select__13___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__13___byte, direction_set__select__13___bit ; line_number = 296 ; temp@io1_bit := 1 direction_set__select__12___byte equ direction_set__temp direction_set__select__12___bit equ 4 bsf direction_set__select__12___byte, direction_set__select__12___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__13 (data:X0=>X0 code:XX=>XX) ; line_number = 295 ; if direction@1 done ; line_number = 297 ; if direction@2 start direction_set__select__15___byte equ direction direction_set__select__15___bit equ 2 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__15___byte, direction_set__select__15___bit ; line_number = 298 ; temp@io2_bit:= 1 direction_set__select__14___byte equ direction_set__temp direction_set__select__14___bit equ 1 bsf direction_set__select__14___byte, direction_set__select__14___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__15 (data:X0=>X0 code:XX=>XX) ; line_number = 297 ; if direction@2 done ; line_number = 299 ; if direction@3 start direction_set__select__17___byte equ direction direction_set__select__17___bit equ 3 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc direction_set__select__17___byte, direction_set__select__17___bit ; line_number = 300 ; temp@io3_bit := 1 direction_set__select__16___byte equ direction_set__temp direction_set__select__16___bit equ 2 bsf direction_set__select__16___byte, direction_set__select__16___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=direction_set__select__17 (data:X0=>X0 code:XX=>XX) ; line_number = 299 ; if direction@3 done ; line_number = 301 ; _trisa := temp movf direction_set__temp,w bsf __rp0___byte, __rp0___bit movwf _trisa ; delay after procedure statements=non-uniform bcf __rp0___byte, __rp0___bit ; Implied return retlw 0 ; line_number = 304 ; procedure reset reset: ; arguments_none ; line_number = 306 ; returns_nothing ; # This procedure will initialize all global registers: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 310 ; _cmcon := 7 movlw 7 movwf _cmcon ; # Initialize global registers: ; line_number = 313 ; index := 0 movlw 0 movwf index ; line_number = 314 ; loop_exactly state_size start reset__1 equ shared___globals+32 movlw 12 movwf reset__1 reset__2: ; line_number = 315 ; state[index] := 0 ; index_fsr_first movf index,w addlw state movwf __fsr movlw 0 movwf __indf ; line_number = 316 ; index := index + 1 incf index,f ; line_number = 314 ; loop_exactly state_size wrap-up decfsz reset__1,f goto reset__2 ; line_number = 314 ; loop_exactly state_size done ; line_number = 318 ; interrupt_enable := 0 bcf interrupt_enable___byte, interrupt_enable___bit ; line_number = 319 ; interrupt_pending := 0 bcf interrupt_pending___byte, interrupt_pending___bit ; line_number = 320 ; debug_counter := 0 movlw 0 movwf debug_counter ; line_number = 321 ; debug_index := 0 movlw 0 movwf debug_index ; line_number = 322 ; debug_character := 0 movlw 0 movwf debug_character ; # This sets TRISA and TRISC: ; line_number = 325 ; call direction_set() call direction_set ; # Initialize remaining registers: ; line_number = 328 ; glitch := 0 movlw 0 movwf glitch ; line_number = 329 ; index := 0 movlw 0 movwf index ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 332 ; procedure delay delay: ; arguments_none ; line_number = 334 ; returns_nothing ; line_number = 335 ; exact_delay delay_instructions ; # This procedure delays 1/3 of a bit. ; line_number = 339 ; local temp byte delay__temp equ shared___globals+25 ; line_number = 340 ; local previous byte delay__previous equ shared___globals+26 ; line_number = 341 ; local current byte delay__current equ shared___globals+27 ; line_number = 342 ; local not_current byte delay__not_current equ shared___globals+28 ; line_number = 343 ; local changed byte delay__changed equ shared___globals+29 ; # Kick the dog: ; before procedure statements delay=0, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 346 ; watch_dog_reset done ; Delay at watch_dog_reset is 0 clrwdt ; # Read inputs: ; line_number = 349 ; raw := 0 ; Delay at assignment is 1 movlw 0 movwf raw ; line_number = 350 ; if io7 start ; Delay at if is 3 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io7___byte, io7___bit ; line_number = 351 ; raw@7 := 1 ; Delay at assignment is 0 delay__select__1___byte equ raw delay__select__1___bit equ 7 bsf delay__select__1___byte, delay__select__1___bit ; code.delay=5 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io7 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=5 ; line_number = 350 ; if io7 done ; line_number = 352 ; if io6 start ; Delay at if is 5 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io6___byte, io6___bit ; line_number = 353 ; raw@6 := 1 ; Delay at assignment is 0 delay__select__2___byte equ raw delay__select__2___bit equ 6 bsf delay__select__2___byte, delay__select__2___bit ; code.delay=7 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io6 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=7 ; line_number = 352 ; if io6 done ; line_number = 354 ; if io5 start ; Delay at if is 7 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io5___byte, io5___bit ; line_number = 355 ; raw@5 := 1 ; Delay at assignment is 0 delay__select__3___byte equ raw delay__select__3___bit equ 5 bsf delay__select__3___byte, delay__select__3___bit ; code.delay=9 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io5 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=9 ; line_number = 354 ; if io5 done ; line_number = 356 ; if io4 start ; Delay at if is 9 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io4___byte, io4___bit ; line_number = 357 ; raw@4 := 1 ; Delay at assignment is 0 delay__select__4___byte equ raw delay__select__4___bit equ 4 bsf delay__select__4___byte, delay__select__4___bit ; code.delay=11 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io4 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=11 ; line_number = 356 ; if io4 done ; line_number = 358 ; if io3 start ; Delay at if is 11 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io3___byte, io3___bit ; line_number = 359 ; raw@3 := 1 ; Delay at assignment is 0 delay__select__5___byte equ raw delay__select__5___bit equ 3 bsf delay__select__5___byte, delay__select__5___bit ; code.delay=13 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io3 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=13 ; line_number = 358 ; if io3 done ; line_number = 360 ; if io2 start ; Delay at if is 13 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io2___byte, io2___bit ; line_number = 361 ; raw@2 := 1 ; Delay at assignment is 0 delay__select__6___byte equ raw delay__select__6___bit equ 2 bsf delay__select__6___byte, delay__select__6___bit ; code.delay=15 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io2 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=15 ; line_number = 360 ; if io2 done ; line_number = 362 ; if io1 start ; Delay at if is 15 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io1___byte, io1___bit ; line_number = 363 ; raw@1 := 1 ; Delay at assignment is 0 delay__select__7___byte equ raw delay__select__7___bit equ 1 bsf delay__select__7___byte, delay__select__7___bit ; code.delay=17 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io1 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=17 ; line_number = 362 ; if io1 done ; line_number = 364 ; if io0 start ; Delay at if is 17 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc io0___byte, io0___bit ; line_number = 365 ; raw@0 := 1 ; Delay at assignment is 0 delay__select__8___byte equ raw delay__select__8___bit equ 0 bsf delay__select__8___byte, delay__select__8___bit ; code.delay=19 back_code.delay=0 ; <=bit_code_emit@symbol; sym=io0 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=19 ; line_number = 364 ; if io0 done ; # Write out port C: ; line_number = 368 ; temp := 0 ; Delay at assignment is 19 movlw 0 movwf delay__temp ; line_number = 369 ; if outputs@7 start ; Delay at if is 21 delay__select__10___byte equ outputs delay__select__10___bit equ 7 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__10___byte, delay__select__10___bit ; line_number = 370 ; temp@io7_bit := 1 ; Delay at assignment is 0 delay__select__9___byte equ delay__temp delay__select__9___bit equ 3 bsf delay__select__9___byte, delay__select__9___bit ; code.delay=23 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__10 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=23 ; line_number = 369 ; if outputs@7 done ; line_number = 371 ; if outputs@6 start ; Delay at if is 23 delay__select__12___byte equ outputs delay__select__12___bit equ 6 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__12___byte, delay__select__12___bit ; line_number = 372 ; temp@io6_bit := 1 ; Delay at assignment is 0 delay__select__11___byte equ delay__temp delay__select__11___bit equ 2 bsf delay__select__11___byte, delay__select__11___bit ; code.delay=25 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__12 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=25 ; line_number = 371 ; if outputs@6 done ; line_number = 373 ; if outputs@5 start ; Delay at if is 25 delay__select__14___byte equ outputs delay__select__14___bit equ 5 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__14___byte, delay__select__14___bit ; line_number = 374 ; temp@io5_bit := 1 ; Delay at assignment is 0 delay__select__13___byte equ delay__temp delay__select__13___bit equ 1 bsf delay__select__13___byte, delay__select__13___bit ; code.delay=27 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__14 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=27 ; line_number = 373 ; if outputs@5 done ; line_number = 375 ; if outputs@4 start ; Delay at if is 27 delay__select__16___byte equ outputs delay__select__16___bit equ 4 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__16___byte, delay__select__16___bit ; line_number = 376 ; temp@io4_bit := 1 ; Delay at assignment is 0 delay__select__15___byte equ delay__temp delay__select__15___bit equ 0 bsf delay__select__15___byte, delay__select__15___bit ; code.delay=29 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__16 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=29 ; line_number = 375 ; if outputs@4 done ; line_number = 377 ; if debug_out start ; Delay at if is 29 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc debug_out___byte, debug_out___bit ; line_number = 378 ; temp@debug_out_bit := 1 ; Delay at assignment is 0 delay__select__17___byte equ delay__temp delay__select__17___bit equ 4 bsf delay__select__17___byte, delay__select__17___bit ; code.delay=31 back_code.delay=0 ; <=bit_code_emit@symbol; sym=debug_out (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=31 ; line_number = 377 ; if debug_out done ; line_number = 379 ; _portc := temp ; Delay at assignment is 31 movf delay__temp,w movwf _portc ; # Write out port A: ; line_number = 382 ; temp := 0 ; Delay at assignment is 33 movlw 0 movwf delay__temp ; line_number = 383 ; if outputs@3 start ; Delay at if is 35 delay__select__19___byte equ outputs delay__select__19___bit equ 3 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__19___byte, delay__select__19___bit ; line_number = 384 ; temp@io3_bit := 1 ; Delay at assignment is 0 delay__select__18___byte equ delay__temp delay__select__18___bit equ 2 bsf delay__select__18___byte, delay__select__18___bit ; code.delay=37 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__19 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=37 ; line_number = 383 ; if outputs@3 done ; line_number = 385 ; if outputs@2 start ; Delay at if is 37 delay__select__21___byte equ outputs delay__select__21___bit equ 2 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__21___byte, delay__select__21___bit ; line_number = 386 ; temp@io2_bit := 1 ; Delay at assignment is 0 delay__select__20___byte equ delay__temp delay__select__20___bit equ 1 bsf delay__select__20___byte, delay__select__20___bit ; code.delay=39 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__21 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=39 ; line_number = 385 ; if outputs@2 done ; line_number = 387 ; if outputs@1 start ; Delay at if is 39 delay__select__23___byte equ outputs delay__select__23___bit equ 1 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__23___byte, delay__select__23___bit ; line_number = 388 ; temp@io1_bit := 1 ; Delay at assignment is 0 delay__select__22___byte equ delay__temp delay__select__22___bit equ 4 bsf delay__select__22___byte, delay__select__22___bit ; code.delay=41 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__23 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=41 ; line_number = 387 ; if outputs@1 done ; line_number = 389 ; if outputs@0 start ; Delay at if is 41 delay__select__25___byte equ outputs delay__select__25___bit equ 0 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc delay__select__25___byte, delay__select__25___bit ; line_number = 390 ; temp@io0_bit := 1 ; Delay at assignment is 0 delay__select__24___byte equ delay__temp delay__select__24___bit equ 5 bsf delay__select__24___byte, delay__select__24___bit ; code.delay=43 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__25 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=43 ; line_number = 389 ; if outputs@0 done ; line_number = 391 ; if serial_out start ; Delay at if is 43 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc serial_out___byte, serial_out___bit ; line_number = 392 ; temp@serial_out_bit := 1 ; Delay at assignment is 0 delay__select__26___byte equ delay__temp delay__select__26___bit equ 0 bsf delay__select__26___byte, delay__select__26___bit ; code.delay=45 back_code.delay=0 ; <=bit_code_emit@symbol; sym=serial_out (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=45 ; line_number = 391 ; if serial_out done ; line_number = 393 ; _porta := temp ; Delay at assignment is 45 movf delay__temp,w movwf _porta ; # Setup for interrupts: ; line_number = 396 ; previous := current ; Delay at assignment is 47 movf delay__current,w movwf delay__previous ; # Read the I/O port once: ; line_number = 398 ; current := raw ^ complement_mask ; Delay at assignment is 49 movf raw,w xorwf complement_mask,w movwf delay__current ; line_number = 399 ; not_current := current ^ 0xf ; Delay at assignment is 52 movlw 15 xorwf delay__current,w movwf delay__not_current ; line_number = 400 ; changed := current ^ previous ; Delay at assignment is 55 movf delay__current,w xorwf delay__previous,w movwf delay__changed ; # See about triggering the interrupt_pending flag: ; line_number = 403 ; if (low_mask & not_current) | (high_mask & current) | (changed & current & rising_mask) | (changed & not_current & falling_mask) != 0 start ; Delay at if is 58 ; Left minus Right delay__27 equ shared___globals+33 movf low_mask,w andwf delay__not_current,w movwf delay__27 movf high_mask,w andwf delay__current,w iorwf delay__27,f movf delay__changed,w andwf delay__current,w andwf rising_mask,w iorwf delay__27,f movf delay__changed,w andwf delay__not_current,w andwf falling_mask,w iorwf delay__27,w ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 406 ; interrupt_pending := 1 ; Delay at assignment is 0 bsf interrupt_pending___byte, interrupt_pending___bit ; code.delay=74 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=74 ; line_number = 403 ; if (low_mask & not_current) | (high_mask & current) | (changed & current & rising_mask) | (changed & not_current & falling_mask) != 0 done ; # Send an interrupt if interrupts are enabled: ; line_number = 409 ; if interrupt_pending start ; Delay at if is 74 ; (after recombine) true_delay=5, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=6 true_test=true body_code.delay=5 (uniform delay) btfsc interrupt_pending___byte, interrupt_pending___bit goto delay__30 ; Delay 4 cycles goto delay__32 delay__32: goto delay__33 delay__33: goto delay__31 delay__30: ; line_number = 410 ; if interrupt_enable start ; Delay at if is 0 ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc interrupt_enable___byte, interrupt_enable___bit goto delay__28 ; Delay 1 cycles nop goto delay__29 delay__28: ; # Shove serial out to low: ; line_number = 412 ; interrupt_enable := 0 ; Delay at assignment is 0 bcf interrupt_enable___byte, interrupt_enable___bit ; line_number = 413 ; serial_out := 0 ; Delay at assignment is 1 bcf serial_out___byte, serial_out___bit delay__29: ; code.delay=5 back_code.delay=0 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=0 code delay=5 ; line_number = 410 ; if interrupt_enable done delay__31: ; code.delay=82 back_code.delay=0 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) ; if final true delay=5 false delay=0 code delay=82 ; line_number = 409 ; if interrupt_pending done ; # Provide debug information: ; line_number = 416 ; switch debug_counter start movlw delay__62>>8 movwf __pclath movf debug_counter,w addlw delay__62 movwf __pcl ; page_group 39 ; Add 29 NOP's until start of new page nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop delay__62: goto delay__48 goto delay__61 goto delay__61 goto delay__49 goto delay__50 goto delay__61 goto delay__49 goto delay__50 goto delay__61 goto delay__49 goto delay__50 goto delay__61 goto delay__49 goto delay__50 goto delay__61 goto delay__49 goto delay__50 goto delay__61 goto delay__49 goto delay__50 goto delay__61 goto delay__49 goto delay__50 goto delay__61 goto delay__49 goto delay__50 goto delay__61 goto delay__49 goto delay__51 goto delay__61 goto delay__52 goto delay__53 goto delay__54 goto delay__55 goto delay__56 goto delay__57 goto delay__58 goto delay__59 goto delay__60 ; case_data[0] delay=1{0 } ; case_data[1] delay=4{3 6 9 12 15 18 21 24 27 } ; case_data[2] delay=3{4 7 10 13 16 19 22 25 } ; case_data[3] delay=3{28 } ; case_data[4] delay=5{30 } ; case_data[5] delay=6{31 } ; case_data[6] delay=4{32 } ; case_data[7] delay=9{33 } ; case_data[8] delay=7{34 } ; case_data[9] delay=7{35 } ; case_data[10] delay=1{36 } ; case_data[11] delay=7{37 } ; case_data[12] delay=2{38 } ; case_data[13] delay=0 ; Maximum Case Delay = 9 ; line_number = 417 ; case 0 delay__48: ; # Send out start bit: ; line_number = 419 ; debug_out := 0 ; Delay at assignment is 0 bcf debug_out___byte, debug_out___bit ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 delay__64: addlw 255 btfss __z___byte, __z___bit goto delay__64 goto delay__63 ; line_number = 420 ; case 3, 6, 9, 12, 15, 18, 21, 24, 27 delay__49: ; # Send out data bit or stop bit: ; line_number = 422 ; if debug_character@0 start ; Delay at if is 0 delay__select__34___byte equ debug_character delay__select__34___bit equ 0 ; (after recombine) true_delay=1, false_delay=1 uniform_delay=true ; CASE: true_size=1 && false_size=1 ; SUBCASE: Double test; true, then false btfsc delay__select__34___byte, delay__select__34___bit ; line_number = 423 ; debug_out := 1 ; Delay at assignment is 0 bsf debug_out___byte, debug_out___bit btfss delay__select__34___byte, delay__select__34___bit ; line_number = 425 ; debug_out := 0 ; Delay at assignment is 0 bcf debug_out___byte, debug_out___bit ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__34 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=1 code delay=4 ; line_number = 422 ; if debug_character@0 done ; Delay 5 cycles goto delay__65 delay__65: goto delay__66 delay__66: nop goto delay__63 ; line_number = 426 ; case 4, 7, 10, 13, 16, 19, 22, 25 delay__50: ; # Select next bit of debug_character: ; line_number = 428 ; debug_character := debug_character >> 1 ; Delay at assignment is 0 ; Assignment of variable to self (no code needed) rrf debug_character,f bcf debug_character, 7 ; line_number = 429 ; debug_character@7 := 1 ; Delay at assignment is 2 delay__select__35___byte equ debug_character delay__select__35___bit equ 7 bsf delay__select__35___byte, delay__select__35___bit ; Delay 6 cycles goto delay__67 delay__67: goto delay__68 delay__68: goto delay__69 delay__69: goto delay__63 ; line_number = 430 ; case 28 delay__51: ; line_number = 431 ; debug_character := debug_index >> 1 ; Delay at assignment is 0 rrf debug_index,w movwf debug_character bcf debug_character, 7 ; Delay 6 cycles goto delay__70 delay__70: goto delay__71 delay__71: goto delay__72 delay__72: goto delay__63 ; line_number = 432 ; case 30 delay__52: ; line_number = 433 ; debug_character := state[debug_character] ; Delay at assignment is 0 movf debug_character,w addlw state movwf __fsr movf __indf,w movwf debug_character ; Delay 4 cycles goto delay__73 delay__73: goto delay__74 delay__74: goto delay__63 ; line_number = 434 ; case 31 delay__53: ; line_number = 435 ; if !(debug_index@0) start ; Delay at if is 0 delay__select__36___byte equ debug_index delay__select__36___bit equ 0 ; (after recombine) true_delay=0, false_delay=3 uniform_delay=true ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=3 true_test=false body_code.delay=3 (uniform delay) btfss delay__select__36___byte, delay__select__36___bit goto delay__37 ; Delay 2 cycles goto delay__39 delay__39: goto delay__38 delay__37: ; line_number = 436 ; debug_character := debug_character >> 4 ; Delay at assignment is 0 ; Assignment of variable to self (no code needed) swapf debug_character,f movlw 15 andwf debug_character,f delay__38: ; code.delay=6 back_code.delay=0 ; <=bit_code_emit@symbol; sym=delay__select__36 (data:X0=>X0 code:XX=>XX) ; if final true delay=3 false delay=0 code delay=6 ; line_number = 435 ; if !(debug_index@0) done ; Delay 3 cycles goto delay__75 delay__75: nop goto delay__63 ; line_number = 437 ; case 32 delay__54: ; line_number = 438 ; debug_character := (debug_character & 0xf) + '0' ; Delay at assignment is 0 movlw 15 andwf debug_character,w addlw 48 movwf debug_character ; Delay 5 cycles goto delay__76 delay__76: goto delay__77 delay__77: nop goto delay__63 ; line_number = 439 ; case 33 delay__55: ; line_number = 440 ; if debug_character > '9' start ; Delay at if is 0 movlw 57 subwf debug_character,w btfsc __z___byte, __z___bit bcf __c___byte, __c___bit ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc __c___byte, __c___bit goto delay__40 ; Delay 1 cycles nop goto delay__41 delay__40: ; line_number = 441 ; debug_character := debug_character + 'A' - '0' - 10 ; Delay at assignment is 0 movlw 7 addwf debug_character,f delay__41: ; code.delay=9 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=2 false delay=0 code delay=9 ; line_number = 440 ; if debug_character > '9' done goto delay__63 ; line_number = 442 ; case 34 delay__56: ; line_number = 443 ; if debug_index >= state_size2 start ; Delay at if is 0 movlw 24 subwf debug_index,w ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc __c___byte, __c___bit goto delay__42 ; Delay 1 cycles nop goto delay__43 delay__42: ; line_number = 444 ; debug_character := '\r\' ; Delay at assignment is 0 movlw 13 movwf debug_character delay__43: ; code.delay=7 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=2 false delay=0 code delay=7 ; line_number = 443 ; if debug_index >= state_size2 done ; Delay 2 cycles goto delay__78 delay__78: goto delay__63 ; line_number = 445 ; case 35 delay__57: ; line_number = 446 ; if debug_index >= state_size2 + 1 start ; Delay at if is 0 ; Expression is strictly a constant movlw 25 subwf debug_index,w ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc __c___byte, __c___bit goto delay__44 ; Delay 1 cycles nop goto delay__45 delay__44: ; # Turn off cursor and blink mode: ; line_number = 448 ; debug_character := 0x88 ; Delay at assignment is 0 movlw 136 movwf debug_character delay__45: ; code.delay=7 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=2 false delay=0 code delay=7 ; line_number = 446 ; if debug_index >= state_size2 + 1 done ; Delay 2 cycles goto delay__79 delay__79: goto delay__63 ; line_number = 449 ; case 36 delay__58: ; line_number = 450 ; debug_index := debug_index + 1 ; Delay at assignment is 0 incf debug_index,f ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 delay__80: addlw 255 btfss __z___byte, __z___bit goto delay__80 goto delay__63 ; line_number = 451 ; case 37 delay__59: ; line_number = 452 ; if debug_index >= state_size2 + 2 start ; Delay at if is 0 ; Expression is strictly a constant movlw 26 subwf debug_index,w ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc __c___byte, __c___bit goto delay__46 ; Delay 1 cycles nop goto delay__47 delay__46: ; line_number = 453 ; debug_index := 0 ; Delay at assignment is 0 movlw 0 movwf debug_index delay__47: ; code.delay=7 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=2 false delay=0 code delay=7 ; line_number = 452 ; if debug_index >= state_size2 + 2 done ; Delay 2 cycles goto delay__81 delay__81: goto delay__63 ; line_number = 454 ; case 38 delay__60: ; line_number = 455 ; debug_counter := 0xff ; Delay at assignment is 0 movlw 255 movwf debug_counter ; Delay 7 cycles goto delay__82 delay__82: goto delay__83 delay__83: goto delay__84 delay__84: nop goto delay__63 ; line_number = 456 ; default delay__61: ; line_number = 457 ; do_nothing ; Delay 9 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 delay__85: addlw 255 btfss __z___byte, __z___bit goto delay__85 nop goto delay__63 delay__63: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 416 ; switch debug_counter done ; line_number = 458 ; debug_counter := debug_counter + 1 ; Delay at assignment is 101 bcf __rp0___byte, __rp0___bit incf debug_counter,f ; delay after procedure statements=103 ; Delay 28 cycles ; Delay loop takes 7 * 4 = 28 cycles movlw 7 delay__86: addlw 255 btfss __z___byte, __z___bit goto delay__86 ; Implied return retlw 0 ; Final delay = 133 ; line_number = 461 ; constant zeros8 = "\0,0,0,0,0,0,0,0\" ; zeros8 = '\0,0,0,0,0,0,0,0\' ; line_number = 462 ; constant module_name = "\9\Digital8B" ; module_name = '\9\Digital8B' ; line_number = 463 ; constant vendor_name = "\13\Mondotronics" ; vendor_name = '\13\Mondotronics' ; line_number = 464 ; string id = "\1,0,32,1,3,1,0,0\" ~ zeros8 ~ zeros8 ~ module_name ~ vendor_name start ; id = '\1,0\ \1,3,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,9\Digital8B\13\Mondotronics' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 47 id___base: retlw 1 retlw 0 retlw 32 retlw 1 retlw 3 retlw 1 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 9 retlw 68 retlw 105 retlw 103 retlw 105 retlw 116 retlw 97 retlw 108 retlw 56 retlw 66 retlw 13 retlw 77 retlw 111 retlw 110 retlw 100 retlw 111 retlw 116 retlw 114 retlw 111 retlw 110 retlw 105 retlw 99 retlw 115 ; line_number = 464 ; string id = "\1,0,32,1,3,1,0,0\" ~ zeros8 ~ zeros8 ~ module_name ~ vendor_name start ; line_number = 466 ; string mask = "\1,2,4,8,16,32,64,128\" start ; mask = '\1,2,4,8,16\ @\128\' mask: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw mask___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw mask___base ; Index to the correct return value movwf __pcl ; page_group 8 mask___base: retlw 1 retlw 2 retlw 4 retlw 8 retlw 16 retlw 32 retlw 64 retlw 128 ; line_number = 466 ; string mask = "\1,2,4,8,16,32,64,128\" start ; Appending 2 delayed procedures to code bank 0 ; buffer = 'bit_bang' ; line_number = 33 ; procedure byte_get byte_get: ; arguments_none ; line_number = 35 ; returns byte ; # This procedure will wait for a byte to be received from ; # serial_in_bit. It calls the delay procedure for all delays. ; # This procedure will keep calling the {delay} routine until ; # data is received. ; line_number = 42 ; local count byte byte_get__count equ shared___globals ; line_number = 43 ; local byte byte byte_get__byte equ shared___globals+1 ; # Why does the delay procedure wait for a third of bit? Well, it ; # has to do with the loop immediately below. If we catch the ; # start bit at the beginning of a 1/3 bit time, we will be ; # sampling data at approximately 1/3 of the way into each bit. ; # Conversely, if we catch the start near the end of a 1/3 bit ; # bit time, we will be sampling data at approximately 2/3 of the ; # way into each bit. So, what this means is that our bit sample ; # times will be somewhere between 1/3 and 2/3 of bit (i.e. in ; # the middle of the bit. ; # It would be nice to tweak the code to shorter delay times ; # (1/4 bit, 1/5 bit, etc.) but then it gets too hard to get ; # the bookeeping done in the delay routine. A PIC running at ; # 4MHz (=1MIPS), only has 138 instructions available for the ; # delay routine when at 1/3 of bit. ; # Wait for a start bit: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 62 ; waiting := 1 bsf waiting___byte, waiting___bit ; line_number = 63 ; receiving := 1 bsf receiving___byte, receiving___bit ; line_number = 64 ; while serial_in start byte_get__1: ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss serial_in___byte, serial_in___bit goto byte_get__2 ; line_number = 65 ; delay instructions_per_delay - 3 start ; Delay expression evaluates to 135 ; line_number = 66 ; call delay() ; Delay at call is 0 call delay ; line_number = 65 ; delay instructions_per_delay - 3 done goto byte_get__1 ; Recombine size1 = 0 || size2 = 0 byte_get__2: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; line_number = 64 ; while serial_in done ; line_number = 67 ; waiting := 0 bcf waiting___byte, waiting___bit ; # Clear out any preceeding interrupt condition: ; line_number = 70 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; # Skip over start bit: ; line_number = 73 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # There are two instructions of set-up for following loop_exactly: ; line_number = 75 ; call delay() ; Delay at call is 0 call delay ; line_number = 76 ; call delay() ; Delay at call is 135 call delay ; line_number = 77 ; call delay() ; Delay at call is 270 call delay ; line_number = 78 ; byte := 0 ; Delay at assignment is 405 movlw 0 movwf byte_get__byte ; Delay 7 cycles goto byte_get__3 byte_get__3: goto byte_get__4 byte_get__4: goto byte_get__5 byte_get__5: nop ; line_number = 73 ; delay instructions_per_bit - 2 done ; # Read in 8 bits of data: ; line_number = 81 ; loop_exactly 8 start byte_get__6 equ shared___globals+34 movlw 8 movwf byte_get__6 byte_get__7: ; # There are 3 instrucitons of loop_exactly overhead: ; line_number = 83 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 84 ; call delay() ; Delay at call is 0 call delay ; line_number = 85 ; byte := byte >> 1 ; Delay at assignment is 135 ; Assignment of variable to self (no code needed) rrf byte_get__byte,f bcf byte_get__byte, 7 ; line_number = 86 ; if serial_in start ; Delay at if is 137 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc serial_in___byte, serial_in___bit ; line_number = 87 ; byte@7 := 1 ; Delay at assignment is 0 byte_get__select__8___byte equ byte_get__byte byte_get__select__8___bit equ 7 bsf byte_get__select__8___byte, byte_get__select__8___bit ; code.delay=139 back_code.delay=0 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=139 ; line_number = 86 ; if serial_in done ; line_number = 88 ; call delay() ; Delay at call is 139 call delay ; line_number = 89 ; call delay() ; Delay at call is 274 call delay ; Delay 4 cycles goto byte_get__9 byte_get__9: goto byte_get__10 byte_get__10: ; line_number = 83 ; delay instructions_per_bit - 3 done ; line_number = 81 ; loop_exactly 8 wrap-up decfsz byte_get__6,f goto byte_get__7 ; line_number = 81 ; loop_exactly 8 done ; # Skip over 2/3's of stop bit; 3 cycles for return: ; line_number = 92 ; delay instructions_per_delay*2 - 3 start ; Delay expression evaluates to 273 ; line_number = 93 ; call delay() ; Delay at call is 0 call delay ; line_number = 94 ; call delay() ; Delay at call is 135 call delay ; Delay 3 cycles goto byte_get__11 byte_get__11: nop ; line_number = 92 ; delay instructions_per_delay*2 - 3 done ; line_number = 95 ; command_previous := command_last movf command_last,w movwf command_previous ; line_number = 96 ; command_last := byte movf byte_get__byte,w movwf command_last ; line_number = 97 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; line_number = 98 ; return byte start ; line_number = 98 movf byte_get__byte,w return ; line_number = 98 ; return byte done ; delay after procedure statements=non-uniform ; line_number = 101 ; procedure byte_put byte_put: ; Last argument is sitting in W; save into argument variable movwf byte_put__byte ; delay=4294967295 ; line_number = 102 ; argument byte byte byte_put__byte equ shared___globals+3 ; line_number = 103 ; returns_nothing ; # This procedure will send {byte} to {serial_out} pin. The {delay} ; # procedure is called to provide the appropriate bit timing. ; line_number = 108 ; local count byte byte_put__count equ shared___globals+2 ; # {receiving} will be 1 if the last get/put routine was a get. ; # Before we start transmitting a response back, we want to ensure ; # that there has been enough time to turn the line around. ; # We delay the first 1/3 of a bit to pad out the 9-2/3 bits ; # from get_byte to 10 bits. We delay another 3 bits just to ; # ensure that slow interpreters do not get overrun. ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 116 ; sent_previous := sent_last movf sent_last,w movwf sent_previous ; line_number = 117 ; sent_last := byte movf byte_put__byte,w movwf sent_last ; line_number = 118 ; if receiving start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=4 true_test=true body_code.delay=0 (non-uniform delay) btfss receiving___byte, receiving___bit goto byte_put__3 ; line_number = 119 ; receiving := 0 bcf receiving___byte, receiving___bit ; # 10 = 1 + 3*3 = 3-1/3 extra bits of delay: ; line_number = 121 ; loop_exactly 10 start byte_put__1 equ shared___globals+35 movlw 10 movwf byte_put__1 byte_put__2: ; line_number = 122 ; call delay() call delay ; line_number = 121 ; loop_exactly 10 wrap-up decfsz byte_put__1,f goto byte_put__2 ; line_number = 121 ; loop_exactly 10 done ; Recombine size1 = 0 || size2 = 0 byte_put__3: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=receiving (data:X0=>X0 code:XX=>XX) ; line_number = 118 ; if receiving done ; # Send the start bit: ; line_number = 125 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # The loop_exactly setup after this is 2 instructions: ; line_number = 127 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; line_number = 128 ; call delay() ; Delay at call is 1 call delay ; line_number = 129 ; call delay() ; Delay at call is 136 call delay ; line_number = 130 ; call delay() ; Delay at call is 271 call delay ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__4: addlw 255 btfss __z___byte, __z___bit goto byte_put__4 ; line_number = 125 ; delay instructions_per_bit - 2 done ; # Send the data: ; line_number = 133 ; loop_exactly 8 start byte_put__5 equ shared___globals+35 movlw 8 movwf byte_put__5 byte_put__6: ; # Loop_exactly overhead is 3 instructions: ; line_number = 135 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 136 ; if byte@0 start ; Delay at if is 0 byte_put__select__7___byte equ byte_put__byte byte_put__select__7___bit equ 0 ; (after recombine) true_delay=1, false_delay=1 uniform_delay=true ; CASE: true_size=1 && false_size=1 ; SUBCASE: Double test; true, then false btfsc byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 137 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit btfss byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 139 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=byte_put__select__7 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=1 code delay=4 ; line_number = 136 ; if byte@0 done ; line_number = 140 ; byte := byte >> 1 ; Delay at assignment is 4 ; Assignment of variable to self (no code needed) rrf byte_put__byte,f bcf byte_put__byte, 7 ; line_number = 141 ; call delay() ; Delay at call is 6 call delay ; line_number = 142 ; call delay() ; Delay at call is 141 call delay ; line_number = 143 ; call delay() ; Delay at call is 276 call delay ; Delay 2 cycles goto byte_put__8 byte_put__8: ; line_number = 135 ; delay instructions_per_bit - 3 done ; line_number = 133 ; loop_exactly 8 wrap-up decfsz byte_put__5,f goto byte_put__6 ; line_number = 133 ; loop_exactly 8 done ; # Send the stop bit: ; line_number = 146 ; delay instructions_per_bit start ; Delay expression evaluates to 416 ; line_number = 147 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit ; line_number = 148 ; call delay() ; Delay at call is 1 call delay ; line_number = 149 ; call delay() ; Delay at call is 136 call delay ; line_number = 150 ; call delay() ; Delay at call is 271 call delay ; Delay 10 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__9: addlw 255 btfss __z___byte, __z___bit goto byte_put__9 goto byte_put__10 byte_put__10: ; line_number = 146 ; delay instructions_per_bit done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Configuration bits ; fill = 0x0 ; bg = bg11 (0x3000) ; cpd = off (0x100) ; cp = off (0x80) ; boden = off (0x0) ; mclre = off (0x0) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = int_no_clk (0x4) ; 12692 = 0x3194 __config 12692 ; Define start addresses for data regions ; Region="shared___globals" Address=32" Size=64 Bytes=36 Bits=3 Available=27 ; Region="shared___globals" Address=32" Size=64 Bytes=36 Bits=3 Available=27 ; Region="shared___globals" Address=32" Size=64 Bytes=36 Bits=3 Available=27 end