radix dec ; Code bank 0; Start address: 0; End address: 1023 org 0 ; Define start addresses for data regions shared___globals equ 32 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2000-2004 by Wayne C. Gramlich & William T. Benson. ; # All rights reserved. ; buffer = 'compass8' ; line_number = 6 ; library _pic16f630 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f630' ; line_number = 5 ; processor pic16f630 ; line_number = 6 ; configure_address 0x2007 ; line_number = 7 ; configure_fill 0x0000 ; line_number = 8 ; configure_option bg: bg11 = 0x3000 ; line_number = 9 ; configure_option bg: bg10 = 0x2000 ; line_number = 10 ; configure_option bg: bg01 = 0x1000 ; line_number = 11 ; configure_option bg: bg00 = 0x0000 ; line_number = 12 ; configure_option cpd: on = 0x000 ; line_number = 13 ; configure_option cpd: off = 0x100 ; line_number = 14 ; configure_option cp: on = 0x00 ; line_number = 15 ; configure_option cp: off = 0x80 ; line_number = 16 ; configure_option boden: on = 0x40 ; line_number = 17 ; configure_option boden: off = 0x00 ; line_number = 18 ; configure_option mclre: on = 0x20 ; line_number = 19 ; configure_option mclre: off = 0x00 ; line_number = 20 ; configure_option pwrte: on = 0x00 ; line_number = 21 ; configure_option pwrte: off = 0x10 ; line_number = 22 ; configure_option wdte: on = 8 ; line_number = 23 ; configure_option wdte: off = 0 ; line_number = 24 ; configure_option fosc: rc_clk = 7 ; line_number = 25 ; configure_option fosc: rc_no_clk = 6 ; line_number = 26 ; configure_option fosc: int_clk = 5 ; line_number = 27 ; configure_option fosc: int_no_clk = 4 ; line_number = 28 ; configure_option fosc: ec = 3 ; line_number = 29 ; configure_option fosc: hs = 2 ; line_number = 30 ; configure_option fosc: xt = 1 ; line_number = 31 ; configure_option fosc: lp = 0 ; line_number = 32 ; code_bank 0x0 : 0x3ff ; line_number = 33 ; data_bank 0x0 : 0x7f ; line_number = 34 ; data_bank 0x80 : 0xff ; line_number = 35 ; shared_region 0x20 : 0x5f ; line_number = 36 ; interrupts_possible ; line_number = 37 ; osccal_register_symbol _osccal ; line_number = 38 ; osccal_at_address 0x3ff ; line_number = 39 ; packages pdip=14, soic=14, tssop=14 ; line_number = 40 ; pin vdd, power_supply ; line_number = 41 ; pin_bindings pdip=1, soic=1, tssop=1 ; line_number = 42 ; pin ra5_in, ra5_out, t1cki, osc1, clkin, ra5_unused ; line_number = 43 ; pin_bindings pdip=2, soic=2, tssop=2 ; line_number = 44 ; bind_to _porta@5 ; line_number = 45 ; or_if ra5_in _trisa 16 ; line_number = 46 ; or_if ra5_out _trisa 0 ; line_number = 47 ; pin ra4_in, ra4_out, t1g, osc2, clkout, ra4_unused ; line_number = 48 ; pin_bindings pdip=3, soic=3, tssop=3 ; line_number = 49 ; bind_to _porta@4 ; line_number = 50 ; or_if ra4_in _trisa 8 ; line_number = 51 ; or_if ra4_out _trisa 0 ; line_number = 52 ; pin ra3_in, mclr, vpp, ra3_unused ; line_number = 53 ; pin_bindings pdip=4, soic=4, tssop=4 ; line_number = 54 ; bind_to _porta@3 ; line_number = 55 ; or_if ra3_in _trisa 4 ; line_number = 56 ; pin rc5_in, rc5_out, rc5_unused ; line_number = 57 ; pin_bindings pdip=5, soic=5, tssop=5 ; line_number = 58 ; bind_to _portc@5 ; line_number = 59 ; or_if rc5_in _trisc 32 ; line_number = 60 ; or_if rc5_out _trisc 0 ; line_number = 61 ; pin rc4_in, rc4_out, rc4_unused ; line_number = 62 ; pin_bindings pdip=6, soic=6, tssop=6 ; line_number = 63 ; bind_to _portc@4 ; line_number = 64 ; or_if rc4_in _trisc 16 ; line_number = 65 ; or_if rc4_out _trisc 0 ; line_number = 66 ; pin rc3_in, rc3_out, r3_unused ; line_number = 67 ; pin_bindings pdip=7, soic=7, tssop=7 ; line_number = 68 ; bind_to _portc@3 ; line_number = 69 ; or_if rc3_in _trisc 8 ; line_number = 70 ; or_if rc3_out _trisc 0 ; line_number = 71 ; pin rc2_in, rc2_out, rc2_unused ; line_number = 72 ; pin_bindings pdip=8, soic=8, tssop=8 ; line_number = 73 ; bind_to _portc@2 ; line_number = 74 ; or_if rc2_in _trisc 4 ; line_number = 75 ; or_if rc2_out _trisc 0 ; line_number = 76 ; pin rc1_in, rc1_out, rc1_unused ; line_number = 77 ; pin_bindings pdip=9, soic=9, tssop=9 ; line_number = 78 ; bind_to _portc@1 ; line_number = 79 ; or_if rc1_in _trisc 2 ; line_number = 80 ; or_if rc1_out _trisc 0 ; line_number = 81 ; pin rc0_in, rc0_out, rc0_unused ; line_number = 82 ; pin_bindings pdip=10, soic=10, tssop=10 ; line_number = 83 ; bind_to _portc@0 ; line_number = 84 ; or_if rc0_in _trisc 1 ; line_number = 85 ; or_if rc0_out _trisc 0 ; line_number = 86 ; pin ra2_in, ra2_out, cout, t0cki, int, ra2_unused ; line_number = 87 ; pin_bindings pdip=11, soic=11, tssop=11 ; line_number = 88 ; bind_to _porta@2 ; line_number = 89 ; or_if ra2_in _trisa 4 ; line_number = 90 ; or_if ra2_out _trisa 0 ; line_number = 91 ; pin ra1_in, ra1_out, cin_minus, vref, icspclk, ra1_unused ; line_number = 92 ; pin_bindings pdip=12, soic=12, tssop=12 ; line_number = 93 ; bind_to _porta@1 ; line_number = 94 ; or_if ra1_in _trisa 2 ; line_number = 95 ; or_if ra1_out _trisa 0 ; line_number = 96 ; pin ra0_in, ra0_out, cin_plus, icspdat, ra0_unused ; line_number = 97 ; pin_bindings pdip=13, soic=13, tssop=13 ; line_number = 98 ; bind_to _porta@0 ; line_number = 99 ; or_if ra0_in _trisa 1 ; line_number = 100 ; or_if ra0_out _trisa 0 ; line_number = 101 ; pin vss, ground ; line_number = 102 ; pin_bindings pdip=14, soic=14, tssop=14 ; line_number = 107 ; library _pic16f630_676 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # Shared register definitions for the PIC16F630 and PIC16F676. ; buffer = '_pic16f630_676' ; line_number = 7 ; register _indf = _indf equ 0 ; line_number = 9 ; register _tmr0 = _tmr0 equ 1 ; line_number = 11 ; register _pcl = _pcl equ 2 ; line_number = 13 ; register _status = _status equ 3 ; line_number = 14 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 15 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 16 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 17 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 18 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 19 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 21 ; register _fsr = _fsr equ 4 ; line_number = 23 ; register _porta = _porta equ 5 ; line_number = 24 ; register _ra = _ra equ 5 ; line_number = 25 ; bind _ra5 = _porta@5 _ra5___byte equ _porta _ra5___bit equ 5 ; line_number = 26 ; bind _ra4 = _porta@4 _ra4___byte equ _porta _ra4___bit equ 4 ; line_number = 27 ; bind _ra3 = _porta@3 _ra3___byte equ _porta _ra3___bit equ 3 ; line_number = 28 ; bind _ra2 = _porta@2 _ra2___byte equ _porta _ra2___bit equ 2 ; line_number = 29 ; bind _ra1 = _porta@1 _ra1___byte equ _porta _ra1___bit equ 1 ; line_number = 30 ; bind _ra0 = _porta@0 _ra0___byte equ _porta _ra0___bit equ 0 ; line_number = 32 ; register _portc = _portc equ 7 ; line_number = 33 ; register _rc = _rc equ 7 ; line_number = 34 ; bind _rc5 = _portc@5 _rc5___byte equ _portc _rc5___bit equ 5 ; line_number = 35 ; bind _rc4 = _portc@4 _rc4___byte equ _portc _rc4___bit equ 4 ; line_number = 36 ; bind _rc3 = _portc@3 _rc3___byte equ _portc _rc3___bit equ 3 ; line_number = 37 ; bind _rc2 = _portc@2 _rc2___byte equ _portc _rc2___bit equ 2 ; line_number = 38 ; bind _rc1 = _portc@1 _rc1___byte equ _portc _rc1___bit equ 1 ; line_number = 39 ; bind _rc0 = _portc@0 _rc0___byte equ _portc _rc0___bit equ 0 ; line_number = 41 ; register _pclath = _pclath equ 10 ; line_number = 43 ; register _intcon = _intcon equ 11 ; line_number = 44 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 45 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 46 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 47 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 48 ; bind _raie = _intcon@3 _raie___byte equ _intcon _raie___bit equ 3 ; line_number = 49 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 50 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 51 ; bind _raif = _intcon@0 _raif___byte equ _intcon _raif___bit equ 0 ; line_number = 53 ; register _pir1 = _pir1 equ 12 ; line_number = 54 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 55 ; bind _cmif = _pir1@3 _cmif___byte equ _pir1 _cmif___bit equ 3 ; line_number = 56 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 58 ; register _tmr1l = _tmr1l equ 14 ; line_number = 60 ; register _tmr1h = _tmr1h equ 15 ; line_number = 62 ; register _t1con = _t1con equ 16 ; line_number = 63 ; bind _t1ge = _t1con@6 _t1ge___byte equ _t1con _t1ge___bit equ 6 ; line_number = 64 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 65 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 66 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 67 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 68 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 69 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 71 ; register _cmcon = _cmcon equ 25 ; line_number = 72 ; bind _cout = _cmcon@6 _cout___byte equ _cmcon _cout___bit equ 6 ; line_number = 73 ; bind _cinv = _cmcon@4 _cinv___byte equ _cmcon _cinv___bit equ 4 ; line_number = 74 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 75 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 76 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 77 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 81 ; register _option_reg = _option_reg equ 128 ; line_number = 82 ; bind _rapu = _option_reg@7 _rapu___byte equ _option_reg _rapu___bit equ 7 ; line_number = 83 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 84 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 85 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 86 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 87 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 88 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 89 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 91 ; register _trisa = _trisa equ 133 ; line_number = 92 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 93 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 94 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 95 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 96 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 97 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 99 ; register _trisc = _trisc equ 135 ; line_number = 100 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 101 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 102 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 103 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 104 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 105 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 107 ; register _pie1 = _pie1 equ 140 ; line_number = 108 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 109 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 110 ; bind _cmie = _pie1@3 _cmie___byte equ _pie1 _cmie___bit equ 3 ; line_number = 111 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 113 ; register _pcon = _pcon equ 142 ; line_number = 114 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 115 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 117 ; register _osccal = _osccal equ 144 ; line_number = 118 ; bind _cal5 = _osccal@7 _cal5___byte equ _osccal _cal5___bit equ 7 ; line_number = 119 ; bind _cal4 = _osccal@6 _cal4___byte equ _osccal _cal4___bit equ 6 ; line_number = 120 ; bind _cal3 = _osccal@5 _cal3___byte equ _osccal _cal3___bit equ 5 ; line_number = 121 ; bind _cal2 = _osccal@4 _cal2___byte equ _osccal _cal2___bit equ 4 ; line_number = 122 ; bind _cal1 = _osccal@3 _cal1___byte equ _osccal _cal1___bit equ 3 ; line_number = 123 ; bind _cal0 = _osccal@2 _cal0___byte equ _osccal _cal0___bit equ 2 ; line_number = 124 ; constant _osccal_lsb = 4 _osccal_lsb equ 4 ; line_number = 126 ; register _wpua = _wpua equ 149 ; line_number = 127 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 128 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 129 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 130 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 131 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 133 ; register _ioca = _ioca equ 150 ; line_number = 134 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 135 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 136 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 137 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 138 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 139 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 141 ; register _vrcon = _vrcon equ 153 ; line_number = 142 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 143 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 144 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 145 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 146 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 147 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 149 ; register _eedata = _eedata equ 154 ; line_number = 151 ; register _eeadr = _eeadr equ 155 ; line_number = 153 ; register _eecon1 = _eecon1 equ 156 ; line_number = 154 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 155 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 156 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 157 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 159 ; register _eecon2 = _eecon2 equ 157 ; buffer = '_pic16f630' ; line_number = 107 ; library _pic16f630_676 exited ; buffer = 'compass8' ; line_number = 6 ; library _pic16f630 exited ; line_number = 7 ; library clock4mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock4mhz' ; line_number = 9 ; constant clock_rate = 4000000 clock_rate equ 4000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 1000000 ; buffer = 'compass8' ; line_number = 7 ; library clock4mhz exited ; line_number = 8 ; library bit_bang entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library provides bit bang routines for sending and receiving ; # serial data at 2400 baud in 8N1 format (1 start bit, 8 data bits, ; # No parity bit, 1 stop stop bit.) ; # ; # This library requires that the pins {serial_in} and {serial_out} ; # be defined. In addition, the variable {instruction_rate} needs ; # to be defined. Lastly, there needs to be a {delay} procedure ; # with an "exact_delay delay_instructions" clause in it. The {delay} ; # routine should invoke "watch_dog_reset" so that the watch dog time ; # can be set. ; # Define some constants that we will be needing: ; buffer = 'bit_bang' ; line_number = 17 ; constant baud_rate = 2400 baud_rate equ 2400 ; line_number = 18 ; constant instructions_per_bit = instruction_rate / baud_rate instructions_per_bit equ 416 ; line_number = 19 ; constant delays_per_bit = 3 delays_per_bit equ 3 ; line_number = 20 ; constant instructions_per_delay = instructions_per_bit / delays_per_bit instructions_per_delay equ 138 ; line_number = 21 ; constant extra_instructions = 5 extra_instructions equ 5 ; line_number = 22 ; constant delay_instructions = instructions_per_delay - extra_instructions delay_instructions equ 133 ; # The {receiving} bit is sent when data is being received. ; # It gets cleared whenever data gets sent. It is used to ; # determine whether additional delay is needed to turn a ; # line around for slow interpretted chips like the Basic ; # Stamp 2 and the OOPIC. ; line_number = 30 ; global receiving bit receiving___byte equ shared___globals+63 receiving___bit equ 0 ; line_number = 31 ; global waiting bit waiting___byte equ shared___globals+63 waiting___bit equ 1 ; Delaying code generation for procedure byte_get ; Delaying code generation for procedure byte_put ; buffer = 'compass8' ; line_number = 8 ; library bit_bang exited ; line_number = 10 ; package pdip ; line_number = 11 ; pin 1 = power_supply ; line_number = 12 ; pin 2 = ra5_in, name = south, mask = south_pin_mask south___byte equ _porta south___bit equ 5 south_pin_mask equ 32 ; line_number = 13 ; pin 3 = ra4_in, name = west, mask = west_pin_mask west___byte equ _porta west___bit equ 4 west_pin_mask equ 16 ; line_number = 14 ; pin 4 = ra3_in, name = serial_in serial_in___byte equ _porta serial_in___bit equ 3 ; line_number = 15 ; pin 5 = rc5_out, name = east_led east_led___byte equ _portc east_led___bit equ 5 ; line_number = 16 ; pin 6 = rc4_out, name = north_led north_led___byte equ _portc north_led___bit equ 4 ; line_number = 17 ; pin 7 = rc3_out, name = west_led west_led___byte equ _portc west_led___bit equ 3 ; line_number = 18 ; pin 8 = rc2_out, name = sout_led sout_led___byte equ _portc sout_led___bit equ 2 ; line_number = 19 ; pin 9 = rc1_unused ; line_number = 20 ; pin 10 = rc0_unused ; line_number = 21 ; pin 11 = ra2_out, name = serial_out serial_out___byte equ _porta serial_out___bit equ 2 ; line_number = 22 ; pin 12 = ra1_in, name = east, mask = east_pin_mask east___byte equ _porta east___bit equ 1 east_pin_mask equ 2 ; line_number = 23 ; pin 13 = ra0_in, name = north, mask = north_pin_mask north___byte equ _porta north___bit equ 0 north_pin_mask equ 1 ; line_number = 24 ; pin 14 = ground ; line_number = 26 ; constant port_mask = north_pin_mask | east_pin_mask | south_pin_mask | west_pin_mask port_mask equ 51 ; # Bearing constants: ; line_number = 30 ; constant north_bearing = 0 north_bearing equ 0 ; line_number = 31 ; constant north_east_bearing = 1 north_east_bearing equ 1 ; line_number = 32 ; constant east_bearing = 2 east_bearing equ 2 ; line_number = 33 ; constant south_east_bearing = 3 south_east_bearing equ 3 ; line_number = 34 ; constant south_bearing = 4 south_bearing equ 4 ; line_number = 35 ; constant south_west_bearing = 5 south_west_bearing equ 5 ; line_number = 36 ; constant west_bearing = 6 west_bearing equ 6 ; line_number = 37 ; constant north_west_bearing = 7 north_west_bearing equ 7 ; # Bearing mask constants: ; line_number = 40 ; constant north_mask = 1 << north_bearing north_mask equ 1 ; line_number = 41 ; constant north_east_mask = 1 << north_east_bearing north_east_mask equ 2 ; line_number = 42 ; constant east_mask = 1 << east_bearing east_mask equ 4 ; line_number = 43 ; constant south_east_mask = 1 << south_east_bearing south_east_mask equ 8 ; line_number = 44 ; constant south_mask = 1 << south_bearing south_mask equ 16 ; line_number = 45 ; constant south_west_mask = 1 << south_west_bearing south_west_mask equ 32 ; line_number = 46 ; constant west_mask = 1 << west_bearing west_mask equ 64 ; line_number = 47 ; constant north_west_mask = 1 << north_west_bearing north_west_mask equ 128 ; # Global variables go here: ; line_number = 50 ; global raw byte raw equ shared___globals+4 ; line_number = 51 ; global interrupts byte interrupts equ shared___globals+5 ; line_number = 52 ; global mask byte mask equ shared___globals+6 ; line_number = 53 ; global bearing byte bearing equ shared___globals+7 ; # Interrupt and shaft direction bits: ; line_number = 56 ; global interrupt_pending bit interrupt_pending___byte equ shared___globals+63 interrupt_pending___bit equ 2 ; line_number = 57 ; global interrupt_enable bit interrupt_enable___byte equ shared___globals+63 interrupt_enable___bit equ 3 ; line_number = 59 ; global command_previous byte command_previous equ shared___globals+8 ; line_number = 60 ; global command_last byte command_last equ shared___globals+9 ; line_number = 61 ; global sent_previous byte sent_previous equ shared___globals+10 ; line_number = 62 ; global sent_last byte sent_last equ shared___globals+11 ; line_number = 64 ; procedure main main: ; Need to calibrate the oscillator call 1023 bsf __rp0___byte, __rp0___bit movwf _osccal ; Initialize some registers movlw 31 movwf _trisa clrf _trisc ; arguments_none ; line_number = 66 ; returns_nothing ; line_number = 68 ; local command byte main__command equ shared___globals+12 ; line_number = 69 ; local glitch byte main__glitch equ shared___globals+13 ; line_number = 70 ; local id_index byte main__id_index equ shared___globals+14 ; line_number = 71 ; local high byte main__high equ shared___globals+15 ; line_number = 72 ; local index byte main__index equ shared___globals+16 ; line_number = 73 ; local result byte main__result equ shared___globals+17 ; line_number = 74 ; local temp byte main__temp equ shared___globals+18 ; # Initialize everything: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) ; line_number = 77 ; interrupts := 0 movlw 0 bcf __rp0___byte, __rp0___bit movwf interrupts ; line_number = 78 ; interrupt_enable := 0 bcf interrupt_enable___byte, interrupt_enable___bit ; line_number = 79 ; interrupt_pending := 0 bcf interrupt_pending___byte, interrupt_pending___bit ; line_number = 80 ; glitch := 0 movlw 0 movwf main__glitch ; line_number = 81 ; id_index := 0 movlw 0 movwf main__id_index ; # Loop waiting for commands: ; line_number = 84 ; loop_forever start main__1: ; # Get a command byte: ; line_number = 86 ; command := byte_get() call byte_get movwf main__command ; # Dispatch on command: ; line_number = 89 ; switch command >> 6 start movlw main__47>>8 movwf __pclath main__48 equ shared___globals+20 swapf main__command,w movwf main__48 rrf main__48,f rrf main__48,w andlw 3 addlw main__47 movwf __pcl ; page_group 4 main__47: goto main__44 goto main__45 goto main__45 goto main__46 ; line_number = 90 ; case 0 main__44: ; # Command = 00xx xxxx: ; line_number = 92 ; switch (command >> 3) & 7 start movlw main__11>>8 movwf __pclath main__12 equ shared___globals+20 rrf main__command,w movwf main__12 rrf main__12,f rrf main__12,w andlw 7 addlw main__11 movwf __pcl ; page_group 8 main__11: goto main__9 goto main__10 goto main__10 goto main__10 goto main__10 goto main__10 goto main__10 goto main__10 ; line_number = 93 ; case 0 main__9: ; # Command = 0000 0xxx: ; line_number = 95 ; switch command & 7 start movlw main__7>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__7 movwf __pcl ; page_group 8 main__7: goto main__2 goto main__3 goto main__4 goto main__5 goto main__6 goto main__6 goto main__6 goto main__6 ; line_number = 96 ; case 0 main__2: ; # Read Bearing (Command = 0000 0000): ; line_number = 98 ; call byte_put(bearing) movf bearing,w call byte_put goto main__8 ; line_number = 99 ; case 1 main__3: ; # Read Interrupt Mask (Command = 0000 0001): ; line_number = 101 ; call byte_put(interrupts) movf interrupts,w call byte_put goto main__8 ; line_number = 102 ; case 2 main__4: ; # Read Raw (Command = 0000 0010): ; line_number = 104 ; call byte_put(raw) movf raw,w call byte_put goto main__8 ; line_number = 105 ; case 3 main__5: ; # Set Intterupt Mask (Command = 0000 0011): ; line_number = 107 ; interrupts := byte_get() call byte_get movwf interrupts goto main__8 ; line_number = 108 ; case 4, 5, 6, 7 main__6: ; line_number = 109 ; do_nothing main__8: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 95 ; switch command & 7 done goto main__13 ; line_number = 110 ; case 1, 2, 3, 4, 5, 6, 7 main__10: ; line_number = 111 ; do_nothing main__13: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 92 ; switch (command >> 3) & 7 done goto main__49 ; line_number = 112 ; case 1, 2 main__45: ; # Command = 01xx xxxx or10xx xxxx: ; line_number = 114 ; do_nothing goto main__49 ; line_number = 115 ; case 3 main__46: ; # Command = 11xx xxxx: ; line_number = 117 ; switch (command >> 3) & 7 start movlw main__41>>8 movwf __pclath main__42 equ shared___globals+20 rrf main__command,w movwf main__42 rrf main__42,f rrf main__42,w andlw 7 addlw main__41 movwf __pcl ; page_group 8 main__41: goto main__43 goto main__43 goto main__43 goto main__43 goto main__43 goto main__38 goto main__39 goto main__40 ; line_number = 118 ; case 5 main__38: ; # Command = 1110 1xxx: ; line_number = 120 ; if (command & 7) = 7 start ; Left minus Right movlw 7 andwf main__command,w addlw 249 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=8 true_test=true body_code.delay=0 (non-uniform delay) btfss __z___byte, __z___bit goto main__16 ; # Return Interrupt Bits (Command = 1110 1111): ; line_number = 122 ; result := 0 movlw 0 movwf main__result ; line_number = 123 ; if interrupt_enable start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc interrupt_enable___byte, interrupt_enable___bit ; line_number = 124 ; result@1 := 1 main__select__14___byte equ main__result main__select__14___bit equ 1 bsf main__select__14___byte, main__select__14___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) ; line_number = 123 ; if interrupt_enable done ; line_number = 125 ; if interrupt_pending start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc interrupt_pending___byte, interrupt_pending___bit ; line_number = 126 ; result@0 := 1 main__select__15___byte equ main__result main__select__15___bit equ 0 bsf main__select__15___byte, main__select__15___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) ; line_number = 125 ; if interrupt_pending done ; line_number = 127 ; call byte_put(result) movf main__result,w call byte_put ; Recombine size1 = 0 || size2 = 0 main__16: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 120 ; if (command & 7) = 7 done goto main__43 ; line_number = 128 ; case 6 main__39: ; # Shared Interrupt commands. ; line_number = 130 ; switch (command >> 1) & 3 start movlw main__24>>8 movwf __pclath main__25 equ shared___globals+20 rrf main__command,w andlw 3 addlw main__24 movwf __pcl ; page_group 4 main__24: goto main__21 goto main__21 goto main__22 goto main__23 ; line_number = 131 ; case 0, 1 main__21: ; # Set Interrupt Bits (Command = 1110 00ep): ; line_number = 133 ; interrupt_enable := command@1 bcf interrupt_enable___byte, interrupt_enable___bit main__select__17___byte equ main__command main__select__17___bit equ 1 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__17___byte, main__select__17___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__17 (data:X0=>X0 code:XX=>XX) ; line_number = 134 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__18___byte equ main__command main__select__18___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__18___byte, main__select__18___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__18 (data:X0=>X0 code:XX=>XX) goto main__26 ; line_number = 135 ; case 2 main__22: ; # Set Interrupt Pending (Command = 1110 010p): ; line_number = 137 ; interrupt_pending := command@0 bcf interrupt_pending___byte, interrupt_pending___bit main__select__19___byte equ main__command main__select__19___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__19___byte, main__select__19___bit bsf interrupt_pending___byte, interrupt_pending___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__19 (data:X0=>X0 code:XX=>XX) goto main__26 ; line_number = 138 ; case 3 main__23: ; # Set Interrupt Enable (Command = 1110 011e): ; line_number = 140 ; interrupt_enable := command@0 bcf interrupt_enable___byte, interrupt_enable___bit main__select__20___byte equ main__command main__select__20___bit equ 0 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: True.size=1 False.size=0 btfsc main__select__20___byte, main__select__20___bit bsf interrupt_enable___byte, interrupt_enable___bit ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=main__select__20 (data:X0=>X0 code:XX=>XX) main__26: ; switch end:(data:X0=>X0 code:XX=>XX) ; line_number = 130 ; switch (command >> 1) & 3 done goto main__43 ; line_number = 141 ; case 7 main__40: ; # Shared commands (Command = 1111 1ccc): ; line_number = 143 ; switch command & 7 start movlw main__36>>8 movwf __pclath movlw 7 andwf main__command,w addlw main__36 movwf __pcl ; page_group 8 main__36: goto main__28 goto main__29 goto main__30 goto main__31 goto main__32 goto main__33 goto main__34 goto main__35 ; line_number = 144 ; case 0 main__28: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Decrement (Command = 1111 1000): ; line_number = 146 ; _osccal := _osccal - _osccal_lsb movlw 252 addwf _osccal,f goto main__37 ; line_number = 147 ; case 1 main__29: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Increment (Command = 1111 1001): ; line_number = 149 ; _osccal := _osccal + _osccal_lsb movlw 4 addwf _osccal,f goto main__37 ; line_number = 150 ; case 2 main__30: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # Clock Read (Command = 1111 1010): ; line_number = 152 ; call byte_put(_osccal) movf _osccal,w bcf __rp0___byte, __rp0___bit call byte_put goto main__37 ; line_number = 153 ; case 3 main__31: ; # Clock Pulse (Command = 1111 1011): ; line_number = 155 ; call byte_put(0) movlw 0 call byte_put goto main__37 ; line_number = 156 ; case 4 main__32: ; # ID Next (Command = 1111 1100): ; line_number = 158 ; temp := 0 movlw 0 movwf main__temp ; line_number = 159 ; if id_index < id.size start movlw 50 subwf main__id_index,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true.size=0 && false.size>1 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=0 (non-uniform delay) btfsc __c___byte, __c___bit goto main__27 ; line_number = 160 ; temp := id[id_index] movf main__id_index,w call id movwf main__temp ; line_number = 161 ; id_index := id_index + 1 incf main__id_index,f main__27: ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) ; line_number = 159 ; if id_index < id.size done ; line_number = 162 ; call byte_put(temp) movf main__temp,w call byte_put goto main__37 ; line_number = 163 ; case 5 main__33: ; # ID Reset (Command = 1111 1101): ; line_number = 165 ; id_index := 0 movlw 0 movwf main__id_index goto main__37 ; line_number = 166 ; case 6 main__34: ; # Glitch Read (Command = 1111 1110): ; line_number = 168 ; call byte_put(glitch) movf main__glitch,w call byte_put ; line_number = 169 ; glitch := 0 movlw 0 movwf main__glitch goto main__37 ; line_number = 170 ; case 7 main__35: ; # Glitch (Command = 1111 1111): ; line_number = 172 ; if glitch != 0xff start ; Left minus Right incf main__glitch,w ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 173 ; glitch := glitch + 1 incf main__glitch,f ; Recombine size1 = 0 || size2 = 0 ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; line_number = 172 ; if glitch != 0xff done main__37: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 143 ; switch command & 7 done main__43: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 117 ; switch (command >> 3) & 7 done main__49: ; switch end:(data:X0=>X? code:XX=>XX) ; line_number = 89 ; switch command >> 6 done ; line_number = 84 ; loop_forever wrap-up ; Need to adjust code banks to match front of loop bcf __rp0___byte, __rp0___bit goto main__1 ; line_number = 84 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 176 ; procedure delay delay: ; arguments_none ; line_number = 178 ; returns_nothing ; line_number = 179 ; exact_delay delay_instructions ; # This procedure will delay for 1/3 of a bit time. ; line_number = 183 ; local temp byte delay__temp equ shared___globals+19 ; # Kick the dog: ; before procedure statements delay=0, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 186 ; watch_dog_reset done ; Delay at watch_dog_reset is 0 clrwdt ; line_number = 188 ; raw := (_porta & port_mask) ^ port_mask ; Delay at assignment is 1 movlw 51 andwf _porta,w xorlw 51 movwf raw ; line_number = 189 ; if raw & north_pin_mask != 0 start ; Delay at if is 5 ; Left minus Right movlw 1 andwf raw,w ; (after recombine) true_delay=15, false_delay=9 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=58 false_code_size=23 btfsc __z___byte, __z___bit goto delay__21 ; Delay 5 cycles goto delay__23 delay__23: goto delay__24 delay__24: nop ; line_number = 190 ; if raw & east_pin_mask != 0 start ; Delay at if is 0 ; Left minus Right movlw 2 andwf raw,w ; (after recombine) true_delay=9, false_delay=4 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=12 false_code_size=4 btfsc __z___byte, __z___bit goto delay__17 ; Delay 4 cycles goto delay__19 delay__19: goto delay__20 delay__20: ; line_number = 191 ; bearing := north_east_bearing ; Delay at assignment is 0 movlw 1 movwf bearing ; line_number = 192 ; mask := north_east_mask ; Delay at assignment is 2 movlw 2 movwf mask goto delay__18 delay__17: ; line_number = 193 ; Left minus Right movlw 16 andwf raw,w ; (after recombine) true_delay=3, false_delay=4 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=3 false_code_size=4 btfss __z___byte, __z___bit goto delay__15 ; line_number = 197 ; bearing := north_bearing ; Delay at assignment is 0 clrf bearing ; line_number = 198 ; mask := north_mask ; Delay at assignment is 1 movlw 1 movwf mask ; Delay 0 cycles goto delay__16 delay__15: ; line_number = 194 ; bearing := north_west_bearing ; Delay at assignment is 0 movlw 7 movwf bearing ; line_number = 195 ; mask := north_west_mask ; Delay at assignment is 2 movlw 128 movwf mask delay__16: ; code.delay=9 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit delay__18: ; code.delay=9 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=4 false delay=9 code delay=9 ; line_number = 190 ; if raw & east_pin_mask != 0 done goto delay__22 delay__21: ; line_number = 199 ; Left minus Right movlw 32 andwf raw,w ; (after recombine) true_delay=9, false_delay=9 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=26 false_code_size=26 btfss __z___byte, __z___bit goto delay__13 ; line_number = 209 ; Left minus Right movlw 2 andwf raw,w ; (after recombine) true_delay=10, false_delay=4 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=14 false_code_size=4 btfsc __z___byte, __z___bit goto delay__3 ; Delay 5 cycles goto delay__5 delay__5: goto delay__6 delay__6: nop ; line_number = 210 ; bearing := east_bearing ; Delay at assignment is 0 movlw 2 movwf bearing ; line_number = 211 ; mask := east_mask ; Delay at assignment is 2 movlw 4 movwf mask goto delay__4 delay__3: ; line_number = 212 ; Left minus Right movlw 16 andwf raw,w ; (after recombine) true_delay=4, false_delay=4 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=4 false_code_size=4 btfss __z___byte, __z___bit goto delay__1 ; line_number = 216 ; bearing := 0xff ; Delay at assignment is 0 movlw 255 movwf bearing ; line_number = 217 ; mask := 0xff ; Delay at assignment is 2 movlw 255 movwf mask goto delay__2 delay__1: ; line_number = 213 ; bearing := west_bearing ; Delay at assignment is 0 movlw 6 movwf bearing ; line_number = 214 ; mask := west_mask ; Delay at assignment is 2 movlw 64 movwf mask nop delay__2: ; code.delay=10 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit delay__4: ; code.delay=9 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit goto delay__14 delay__13: ; line_number = 200 ; if raw & east_pin_mask != 0 start ; Delay at if is 0 ; Left minus Right movlw 2 andwf raw,w ; (after recombine) true_delay=10, false_delay=4 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=14 false_code_size=4 btfsc __z___byte, __z___bit goto delay__9 ; Delay 5 cycles goto delay__11 delay__11: goto delay__12 delay__12: nop ; line_number = 201 ; bearing := south_east_bearing ; Delay at assignment is 0 movlw 3 movwf bearing ; line_number = 202 ; mask := south_east_mask ; Delay at assignment is 2 movlw 8 movwf mask goto delay__10 delay__9: ; line_number = 203 ; Left minus Right movlw 16 andwf raw,w ; (after recombine) true_delay=4, false_delay=4 uniform_delay=true ; CASE: true_code_size > 1 && false_code_size > 1 ; true_code_size=4 false_code_size=4 btfss __z___byte, __z___bit goto delay__7 ; line_number = 207 ; bearing := south_bearing ; Delay at assignment is 0 movlw 4 movwf bearing ; line_number = 208 ; mask := south_mask ; Delay at assignment is 2 movlw 16 movwf mask goto delay__8 delay__7: ; line_number = 204 ; bearing := south_west_bearing ; Delay at assignment is 0 movlw 5 movwf bearing ; line_number = 205 ; mask := south_west_mask ; Delay at assignment is 2 movlw 32 movwf mask nop delay__8: ; code.delay=10 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit delay__10: ; code.delay=9 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=4 false delay=10 code delay=9 ; line_number = 200 ; if raw & east_pin_mask != 0 done nop delay__14: ; code.delay=15 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit delay__22: ; code.delay=19 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=9 false delay=15 code delay=19 ; line_number = 189 ; if raw & north_pin_mask != 0 done ; # Deal with interrupts: ; line_number = 220 ; if interrupts & mask != 0 start ; Delay at if is 19 ; Left minus Right movf interrupts,w andwf mask,w ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true ; CASE: true_code.size=0 && false_code.size=1 btfss __z___byte, __z___bit ; line_number = 221 ; interrupt_pending := 1 ; Delay at assignment is 0 bsf interrupt_pending___byte, interrupt_pending___bit ; code.delay=23 back_code.delay=0 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) ; Uniform delay broke in relation_code_emit ; if final true delay=1 false delay=0 code delay=23 ; line_number = 220 ; if interrupts & mask != 0 done ; line_number = 222 ; if interrupt_enable && interrupt_pending start ; Delay at if is 23 ; (after recombine) true_delay=5, false_delay=2 uniform_delay=true ; CASE: true.size>1 false.size=1; false=GOTO ; Uniform delay btfsc interrupt_enable___byte, interrupt_enable___bit goto delay__28 goto delay__25 ; Delay 2 cycles goto delay__30 delay__30: goto delay__29 delay__28: ; &&||: index=1 true_delay=2 false_delay=0 goto_delay=2 ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) btfsc interrupt_pending___byte, interrupt_pending___bit goto delay__26 ; Delay 1 cycles nop goto delay__27 delay__26: ; line_number = 223 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; line_number = 224 ; interrupt_enable := 0 ; Delay at assignment is 1 bcf interrupt_enable___byte, interrupt_enable___bit delay__27: delay__25: ; code.delay=5 back_code.delay=0 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) ; &&||: index=0 true_delay=2 false_delay=0 goto_delay=2 ; &&||:: index=0 new_delay=5 goto_delay=2 delay__29: ; code.delay=4294967295 back_code.delay=0 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) ; if final true delay=2 false delay=0 code delay=23 ; line_number = 222 ; if interrupt_enable && interrupt_pending done ; delay after procedure statements=23 ; Delay 108 cycles ; Delay loop takes 27 * 4 = 108 cycles movlw 27 delay__31: addlw 255 btfss __z___byte, __z___bit goto delay__31 ; Implied return retlw 0 ; Final delay = 133 ; line_number = 227 ; constant zero8 = "\0,0,0,0,0,0,0,0\" ; zero8 = '\0,0,0,0,0,0,0,0\' ; line_number = 228 ; constant module_name = "\9\Compass8D" ; module_name = '\9\Compass8D' ; line_number = 229 ; constant vendor_name = "\15\Gramlich&Benson" ; vendor_name = '\15\Gramlich&Benson' ; line_number = 231 ; string id = "\1,0,22,0,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; id = '\1,0,22,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,9\Compass8D\15\Gramlich&Benson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 50 id___base: retlw 1 retlw 0 retlw 22 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 0 retlw 9 retlw 67 retlw 111 retlw 109 retlw 112 retlw 97 retlw 115 retlw 115 retlw 56 retlw 68 retlw 15 retlw 71 retlw 114 retlw 97 retlw 109 retlw 108 retlw 105 retlw 99 retlw 104 retlw 38 retlw 66 retlw 101 retlw 110 retlw 115 retlw 111 retlw 110 ; line_number = 231 ; string id = "\1,0,22,0,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start ; Appending 2 delayed procedures to code bank 0 ; buffer = 'bit_bang' ; line_number = 33 ; procedure byte_get byte_get: ; arguments_none ; line_number = 35 ; returns byte ; # This procedure will wait for a byte to be received from ; # serial_in_bit. It calls the delay procedure for all delays. ; # This procedure will keep calling the {delay} routine until ; # data is received. ; line_number = 42 ; local count byte byte_get__count equ shared___globals ; line_number = 43 ; local byte byte byte_get__byte equ shared___globals+1 ; # Why does the delay procedure wait for a third of bit? Well, it ; # has to do with the loop immediately below. If we catch the ; # start bit at the beginning of a 1/3 bit time, we will be ; # sampling data at approximately 1/3 of the way into each bit. ; # Conversely, if we catch the start near the end of a 1/3 bit ; # bit time, we will be sampling data at approximately 2/3 of the ; # way into each bit. So, what this means is that our bit sample ; # times will be somewhere between 1/3 and 2/3 of bit (i.e. in ; # the middle of the bit. ; # It would be nice to tweak the code to shorter delay times ; # (1/4 bit, 1/5 bit, etc.) but then it gets too hard to get ; # the bookeeping done in the delay routine. A PIC running at ; # 4MHz (=1MIPS), only has 138 instructions available for the ; # delay routine when at 1/3 of bit. ; # Wait for a start bit: ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 62 ; waiting := 1 bsf waiting___byte, waiting___bit ; line_number = 63 ; receiving := 1 bsf receiving___byte, receiving___bit ; line_number = 64 ; while serial_in start byte_get__1: ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) btfss serial_in___byte, serial_in___bit goto byte_get__2 ; line_number = 65 ; delay instructions_per_delay - 3 start ; Delay expression evaluates to 135 ; line_number = 66 ; call delay() ; Delay at call is 0 call delay ; line_number = 65 ; delay instructions_per_delay - 3 done goto byte_get__1 ; Recombine size1 = 0 || size2 = 0 byte_get__2: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; line_number = 64 ; while serial_in done ; line_number = 67 ; waiting := 0 bcf waiting___byte, waiting___bit ; # Clear out any preceeding interrupt condition: ; line_number = 70 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; # Skip over start bit: ; line_number = 73 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # There are two instructions of set-up for following loop_exactly: ; line_number = 75 ; call delay() ; Delay at call is 0 call delay ; line_number = 76 ; call delay() ; Delay at call is 135 call delay ; line_number = 77 ; call delay() ; Delay at call is 270 call delay ; line_number = 78 ; byte := 0 ; Delay at assignment is 405 movlw 0 movwf byte_get__byte ; Delay 7 cycles goto byte_get__3 byte_get__3: goto byte_get__4 byte_get__4: goto byte_get__5 byte_get__5: nop ; line_number = 73 ; delay instructions_per_bit - 2 done ; # Read in 8 bits of data: ; line_number = 81 ; loop_exactly 8 start byte_get__6 equ shared___globals+21 movlw 8 movwf byte_get__6 byte_get__7: ; # There are 3 instrucitons of loop_exactly overhead: ; line_number = 83 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 84 ; call delay() ; Delay at call is 0 call delay ; line_number = 85 ; byte := byte >> 1 ; Delay at assignment is 135 ; Assignment of variable to self (no code needed) rrf byte_get__byte,f bcf byte_get__byte, 7 ; line_number = 86 ; if serial_in start ; Delay at if is 137 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true ; CASE: True.size=1 False.size=0 btfsc serial_in___byte, serial_in___bit ; line_number = 87 ; byte@7 := 1 ; Delay at assignment is 0 byte_get__select__8___byte equ byte_get__byte byte_get__select__8___bit equ 7 bsf byte_get__select__8___byte, byte_get__select__8___bit ; code.delay=139 back_code.delay=0 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=0 code delay=139 ; line_number = 86 ; if serial_in done ; line_number = 88 ; call delay() ; Delay at call is 139 call delay ; line_number = 89 ; call delay() ; Delay at call is 274 call delay ; Delay 4 cycles goto byte_get__9 byte_get__9: goto byte_get__10 byte_get__10: ; line_number = 83 ; delay instructions_per_bit - 3 done ; line_number = 81 ; loop_exactly 8 wrap-up decfsz byte_get__6,f goto byte_get__7 ; line_number = 81 ; loop_exactly 8 done ; # Skip over 2/3's of stop bit; 3 cycles for return: ; line_number = 92 ; delay instructions_per_delay*2 - 3 start ; Delay expression evaluates to 273 ; line_number = 93 ; call delay() ; Delay at call is 0 call delay ; line_number = 94 ; call delay() ; Delay at call is 135 call delay ; Delay 3 cycles goto byte_get__11 byte_get__11: nop ; line_number = 92 ; delay instructions_per_delay*2 - 3 done ; line_number = 95 ; command_previous := command_last movf command_last,w movwf command_previous ; line_number = 96 ; command_last := byte movf byte_get__byte,w movwf command_last ; line_number = 97 ; serial_out := 1 bsf serial_out___byte, serial_out___bit ; line_number = 98 ; return byte start ; line_number = 98 movf byte_get__byte,w return ; line_number = 98 ; return byte done ; delay after procedure statements=non-uniform ; line_number = 101 ; procedure byte_put byte_put: ; Last argument is sitting in W; save into argument variable movwf byte_put__byte ; delay=4294967295 ; line_number = 102 ; argument byte byte byte_put__byte equ shared___globals+3 ; line_number = 103 ; returns_nothing ; # This procedure will send {byte} to {serial_out} pin. The {delay} ; # procedure is called to provide the appropriate bit timing. ; line_number = 108 ; local count byte byte_put__count equ shared___globals+2 ; # {receiving} will be 1 if the last get/put routine was a get. ; # Before we start transmitting a response back, we want to ensure ; # that there has been enough time to turn the line around. ; # We delay the first 1/3 of a bit to pad out the 9-2/3 bits ; # from get_byte to 10 bits. We delay another 3 bits just to ; # ensure that slow interpreters do not get overrun. ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) ; line_number = 116 ; sent_previous := sent_last movf sent_last,w movwf sent_previous ; line_number = 117 ; sent_last := byte movf byte_put__byte,w movwf sent_last ; line_number = 118 ; if receiving start ; (after recombine) true_delay=non-uniform, false_delay=non-uniform ; CASE: true_code.size = 0 && false_code.size > 1 ; bit_code_emit_helper1: body_code.size=4 true_test=true body_code.delay=0 (non-uniform delay) btfss receiving___byte, receiving___bit goto byte_put__3 ; line_number = 119 ; receiving := 0 bcf receiving___byte, receiving___bit ; # 10 = 1 + 3*3 = 3-1/3 extra bits of delay: ; line_number = 121 ; loop_exactly 10 start byte_put__1 equ shared___globals+22 movlw 10 movwf byte_put__1 byte_put__2: ; line_number = 122 ; call delay() call delay ; line_number = 121 ; loop_exactly 10 wrap-up decfsz byte_put__1,f goto byte_put__2 ; line_number = 121 ; loop_exactly 10 done ; Recombine size1 = 0 || size2 = 0 byte_put__3: ; code.delay=4294967295 back_code.delay=4294967295 ; <=bit_code_emit@symbol; sym=receiving (data:X0=>X0 code:XX=>XX) ; line_number = 118 ; if receiving done ; # Send the start bit: ; line_number = 125 ; delay instructions_per_bit - 2 start ; Delay expression evaluates to 414 ; # The loop_exactly setup after this is 2 instructions: ; line_number = 127 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; line_number = 128 ; call delay() ; Delay at call is 1 call delay ; line_number = 129 ; call delay() ; Delay at call is 136 call delay ; line_number = 130 ; call delay() ; Delay at call is 271 call delay ; Delay 8 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__4: addlw 255 btfss __z___byte, __z___bit goto byte_put__4 ; line_number = 125 ; delay instructions_per_bit - 2 done ; # Send the data: ; line_number = 133 ; loop_exactly 8 start byte_put__5 equ shared___globals+22 movlw 8 movwf byte_put__5 byte_put__6: ; # Loop_exactly overhead is 3 instructions: ; line_number = 135 ; delay instructions_per_bit - 3 start ; Delay expression evaluates to 413 ; line_number = 136 ; if byte@0 start ; Delay at if is 0 byte_put__select__7___byte equ byte_put__byte byte_put__select__7___bit equ 0 ; (after recombine) true_delay=1, false_delay=1 uniform_delay=true ; CASE: true_size=1 && false_size=1 ; SUBCASE: Double test; true, then false btfsc byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 137 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit btfss byte_put__select__7___byte, byte_put__select__7___bit ; line_number = 139 ; serial_out := 0 ; Delay at assignment is 0 bcf serial_out___byte, serial_out___bit ; code.delay=4 back_code.delay=0 ; <=bit_code_emit@symbol; sym=byte_put__select__7 (data:X0=>X0 code:XX=>XX) ; if final true delay=1 false delay=1 code delay=4 ; line_number = 136 ; if byte@0 done ; line_number = 140 ; byte := byte >> 1 ; Delay at assignment is 4 ; Assignment of variable to self (no code needed) rrf byte_put__byte,f bcf byte_put__byte, 7 ; line_number = 141 ; call delay() ; Delay at call is 6 call delay ; line_number = 142 ; call delay() ; Delay at call is 141 call delay ; line_number = 143 ; call delay() ; Delay at call is 276 call delay ; Delay 2 cycles goto byte_put__8 byte_put__8: ; line_number = 135 ; delay instructions_per_bit - 3 done ; line_number = 133 ; loop_exactly 8 wrap-up decfsz byte_put__5,f goto byte_put__6 ; line_number = 133 ; loop_exactly 8 done ; # Send the stop bit: ; line_number = 146 ; delay instructions_per_bit start ; Delay expression evaluates to 416 ; line_number = 147 ; serial_out := 1 ; Delay at assignment is 0 bsf serial_out___byte, serial_out___bit ; line_number = 148 ; call delay() ; Delay at call is 1 call delay ; line_number = 149 ; call delay() ; Delay at call is 136 call delay ; line_number = 150 ; call delay() ; Delay at call is 271 call delay ; Delay 10 cycles ; Delay loop takes 2 * 4 = 8 cycles movlw 2 byte_put__9: addlw 255 btfss __z___byte, __z___bit goto byte_put__9 goto byte_put__10 byte_put__10: ; line_number = 146 ; delay instructions_per_bit done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Configuration bits ; fill = 0x0 ; bg = bg11 (0x3000) ; cpd = off (0x100) ; cp = off (0x80) ; boden = off (0x0) ; mclre = off (0x0) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = int_no_clk (0x4) ; 12692 = 0x3194 __config 12692 ; Define start addresses for data regions ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 end