1 radix dec 2 ; Code bank 0; Start address: 0; End address: 1023 3 0000 : org 0 4 5 ; Define start addresses for data regions 6 00000020 = shared___globals equ 32 7 00000000 = __indf equ 0 8 00000002 = __pcl equ 2 9 00000003 = __status equ 3 10 00000004 = __fsr equ 4 11 00000003 = __c___byte equ 3 12 00000000 = __c___bit equ 0 13 00000003 = __z___byte equ 3 14 00000002 = __z___bit equ 2 15 00000003 = __rp0___byte equ 3 16 00000005 = __rp0___bit equ 5 17 00000003 = __rp1___byte equ 3 18 00000006 = __rp1___bit equ 6 19 00000003 = __irp___byte equ 3 20 00000007 = __irp___bit equ 7 21 0000000a = __pclath equ 10 22 0000000a = __cb0___byte equ 10 23 00000003 = __cb0___bit equ 3 24 0000000a = __cb1___byte equ 10 25 00000004 = __cb1___bit equ 4 26 27 ; # Copyright (c) 2000-2004 by Wayne C. Gramlich & William T. Benson. 28 ; # All rights reserved. 29 30 ; buffer = 'compass8' 31 ; line_number = 6 32 ; library _pic16f630 entered 33 ; # Copyright (c) 2004 by Wayne C. Gramlich 34 ; # All rights reserved. 35 36 ; buffer = '_pic16f630' 37 ; line_number = 5 38 ; processor pic16f630 39 ; line_number = 6 40 ; configure_address 0x2007 41 ; line_number = 7 42 ; configure_fill 0x0000 43 ; line_number = 8 44 ; configure_option bg: bg11 = 0x3000 45 ; line_number = 9 46 ; configure_option bg: bg10 = 0x2000 47 ; line_number = 10 48 ; configure_option bg: bg01 = 0x1000 49 ; line_number = 11 50 ; configure_option bg: bg00 = 0x0000 51 ; line_number = 12 52 ; configure_option cpd: on = 0x000 53 ; line_number = 13 54 ; configure_option cpd: off = 0x100 55 ; line_number = 14 56 ; configure_option cp: on = 0x00 57 ; line_number = 15 58 ; configure_option cp: off = 0x80 59 ; line_number = 16 60 ; configure_option boden: on = 0x40 61 ; line_number = 17 62 ; configure_option boden: off = 0x00 63 ; line_number = 18 64 ; configure_option mclre: on = 0x20 65 ; line_number = 19 66 ; configure_option mclre: off = 0x00 67 ; line_number = 20 68 ; configure_option pwrte: on = 0x00 69 ; line_number = 21 70 ; configure_option pwrte: off = 0x10 71 ; line_number = 22 72 ; configure_option wdte: on = 8 73 ; line_number = 23 74 ; configure_option wdte: off = 0 75 ; line_number = 24 76 ; configure_option fosc: rc_clk = 7 77 ; line_number = 25 78 ; configure_option fosc: rc_no_clk = 6 79 ; line_number = 26 80 ; configure_option fosc: int_clk = 5 81 ; line_number = 27 82 ; configure_option fosc: int_no_clk = 4 83 ; line_number = 28 84 ; configure_option fosc: ec = 3 85 ; line_number = 29 86 ; configure_option fosc: hs = 2 87 ; line_number = 30 88 ; configure_option fosc: xt = 1 89 ; line_number = 31 90 ; configure_option fosc: lp = 0 91 ; line_number = 32 92 ; code_bank 0x0 : 0x3ff 93 ; line_number = 33 94 ; data_bank 0x0 : 0x7f 95 ; line_number = 34 96 ; data_bank 0x80 : 0xff 97 ; line_number = 35 98 ; shared_region 0x20 : 0x5f 99 ; line_number = 36 100 ; interrupts_possible 101 ; line_number = 37 102 ; osccal_register_symbol _osccal 103 ; line_number = 38 104 ; osccal_at_address 0x3ff 105 ; line_number = 39 106 ; packages pdip=14, soic=14, tssop=14 107 ; line_number = 40 108 ; pin vdd, power_supply 109 ; line_number = 41 110 ; pin_bindings pdip=1, soic=1, tssop=1 111 ; line_number = 42 112 ; pin ra5_in, ra5_out, t1cki, osc1, clkin, ra5_unused 113 ; line_number = 43 114 ; pin_bindings pdip=2, soic=2, tssop=2 115 ; line_number = 44 116 ; bind_to _porta@5 117 ; line_number = 45 118 ; or_if ra5_in _trisa 16 119 ; line_number = 46 120 ; or_if ra5_out _trisa 0 121 ; line_number = 47 122 ; pin ra4_in, ra4_out, t1g, osc2, clkout, ra4_unused 123 ; line_number = 48 124 ; pin_bindings pdip=3, soic=3, tssop=3 125 ; line_number = 49 126 ; bind_to _porta@4 127 ; line_number = 50 128 ; or_if ra4_in _trisa 8 129 ; line_number = 51 130 ; or_if ra4_out _trisa 0 131 ; line_number = 52 132 ; pin ra3_in, mclr, vpp, ra3_unused 133 ; line_number = 53 134 ; pin_bindings pdip=4, soic=4, tssop=4 135 ; line_number = 54 136 ; bind_to _porta@3 137 ; line_number = 55 138 ; or_if ra3_in _trisa 4 139 ; line_number = 56 140 ; pin rc5_in, rc5_out, rc5_unused 141 ; line_number = 57 142 ; pin_bindings pdip=5, soic=5, tssop=5 143 ; line_number = 58 144 ; bind_to _portc@5 145 ; line_number = 59 146 ; or_if rc5_in _trisc 32 147 ; line_number = 60 148 ; or_if rc5_out _trisc 0 149 ; line_number = 61 150 ; pin rc4_in, rc4_out, rc4_unused 151 ; line_number = 62 152 ; pin_bindings pdip=6, soic=6, tssop=6 153 ; line_number = 63 154 ; bind_to _portc@4 155 ; line_number = 64 156 ; or_if rc4_in _trisc 16 157 ; line_number = 65 158 ; or_if rc4_out _trisc 0 159 ; line_number = 66 160 ; pin rc3_in, rc3_out, r3_unused 161 ; line_number = 67 162 ; pin_bindings pdip=7, soic=7, tssop=7 163 ; line_number = 68 164 ; bind_to _portc@3 165 ; line_number = 69 166 ; or_if rc3_in _trisc 8 167 ; line_number = 70 168 ; or_if rc3_out _trisc 0 169 ; line_number = 71 170 ; pin rc2_in, rc2_out, rc2_unused 171 ; line_number = 72 172 ; pin_bindings pdip=8, soic=8, tssop=8 173 ; line_number = 73 174 ; bind_to _portc@2 175 ; line_number = 74 176 ; or_if rc2_in _trisc 4 177 ; line_number = 75 178 ; or_if rc2_out _trisc 0 179 ; line_number = 76 180 ; pin rc1_in, rc1_out, rc1_unused 181 ; line_number = 77 182 ; pin_bindings pdip=9, soic=9, tssop=9 183 ; line_number = 78 184 ; bind_to _portc@1 185 ; line_number = 79 186 ; or_if rc1_in _trisc 2 187 ; line_number = 80 188 ; or_if rc1_out _trisc 0 189 ; line_number = 81 190 ; pin rc0_in, rc0_out, rc0_unused 191 ; line_number = 82 192 ; pin_bindings pdip=10, soic=10, tssop=10 193 ; line_number = 83 194 ; bind_to _portc@0 195 ; line_number = 84 196 ; or_if rc0_in _trisc 1 197 ; line_number = 85 198 ; or_if rc0_out _trisc 0 199 ; line_number = 86 200 ; pin ra2_in, ra2_out, cout, t0cki, int, ra2_unused 201 ; line_number = 87 202 ; pin_bindings pdip=11, soic=11, tssop=11 203 ; line_number = 88 204 ; bind_to _porta@2 205 ; line_number = 89 206 ; or_if ra2_in _trisa 4 207 ; line_number = 90 208 ; or_if ra2_out _trisa 0 209 ; line_number = 91 210 ; pin ra1_in, ra1_out, cin_minus, vref, icspclk, ra1_unused 211 ; line_number = 92 212 ; pin_bindings pdip=12, soic=12, tssop=12 213 ; line_number = 93 214 ; bind_to _porta@1 215 ; line_number = 94 216 ; or_if ra1_in _trisa 2 217 ; line_number = 95 218 ; or_if ra1_out _trisa 0 219 ; line_number = 96 220 ; pin ra0_in, ra0_out, cin_plus, icspdat, ra0_unused 221 ; line_number = 97 222 ; pin_bindings pdip=13, soic=13, tssop=13 223 ; line_number = 98 224 ; bind_to _porta@0 225 ; line_number = 99 226 ; or_if ra0_in _trisa 1 227 ; line_number = 100 228 ; or_if ra0_out _trisa 0 229 ; line_number = 101 230 ; pin vss, ground 231 ; line_number = 102 232 ; pin_bindings pdip=14, soic=14, tssop=14 233 234 235 ; line_number = 107 236 ; library _pic16f630_676 entered 237 ; # Copyright (c) 2004 by Wayne C. Gramlich 238 ; # All rights reserved. 239 240 ; # Shared register definitions for the PIC16F630 and PIC16F676. 241 242 ; buffer = '_pic16f630_676' 243 ; line_number = 7 244 ; register _indf = 245 00000000 = _indf equ 0 246 247 ; line_number = 9 248 ; register _tmr0 = 249 00000001 = _tmr0 equ 1 250 251 ; line_number = 11 252 ; register _pcl = 253 00000002 = _pcl equ 2 254 255 ; line_number = 13 256 ; register _status = 257 00000003 = _status equ 3 258 ; line_number = 14 259 ; bind _rp0 = _status@5 260 00000003 = _rp0___byte equ _status 261 00000005 = _rp0___bit equ 5 262 ; line_number = 15 263 ; bind _to = _status@4 264 00000003 = _to___byte equ _status 265 00000004 = _to___bit equ 4 266 ; line_number = 16 267 ; bind _pd = _status@3 268 00000003 = _pd___byte equ _status 269 00000003 = _pd___bit equ 3 270 ; line_number = 17 271 ; bind _z = _status@2 272 00000003 = _z___byte equ _status 273 00000002 = _z___bit equ 2 274 ; line_number = 18 275 ; bind _dc = _status@1 276 00000003 = _dc___byte equ _status 277 00000001 = _dc___bit equ 1 278 ; line_number = 19 279 ; bind _c = _status@0 280 00000003 = _c___byte equ _status 281 00000000 = _c___bit equ 0 282 283 ; line_number = 21 284 ; register _fsr = 285 00000004 = _fsr equ 4 286 287 ; line_number = 23 288 ; register _porta = 289 00000005 = _porta equ 5 290 ; line_number = 24 291 ; register _ra = 292 00000005 = _ra equ 5 293 ; line_number = 25 294 ; bind _ra5 = _porta@5 295 00000005 = _ra5___byte equ _porta 296 00000005 = _ra5___bit equ 5 297 ; line_number = 26 298 ; bind _ra4 = _porta@4 299 00000005 = _ra4___byte equ _porta 300 00000004 = _ra4___bit equ 4 301 ; line_number = 27 302 ; bind _ra3 = _porta@3 303 00000005 = _ra3___byte equ _porta 304 00000003 = _ra3___bit equ 3 305 ; line_number = 28 306 ; bind _ra2 = _porta@2 307 00000005 = _ra2___byte equ _porta 308 00000002 = _ra2___bit equ 2 309 ; line_number = 29 310 ; bind _ra1 = _porta@1 311 00000005 = _ra1___byte equ _porta 312 00000001 = _ra1___bit equ 1 313 ; line_number = 30 314 ; bind _ra0 = _porta@0 315 00000005 = _ra0___byte equ _porta 316 00000000 = _ra0___bit equ 0 317 318 ; line_number = 32 319 ; register _portc = 320 00000007 = _portc equ 7 321 ; line_number = 33 322 ; register _rc = 323 00000007 = _rc equ 7 324 ; line_number = 34 325 ; bind _rc5 = _portc@5 326 00000007 = _rc5___byte equ _portc 327 00000005 = _rc5___bit equ 5 328 ; line_number = 35 329 ; bind _rc4 = _portc@4 330 00000007 = _rc4___byte equ _portc 331 00000004 = _rc4___bit equ 4 332 ; line_number = 36 333 ; bind _rc3 = _portc@3 334 00000007 = _rc3___byte equ _portc 335 00000003 = _rc3___bit equ 3 336 ; line_number = 37 337 ; bind _rc2 = _portc@2 338 00000007 = _rc2___byte equ _portc 339 00000002 = _rc2___bit equ 2 340 ; line_number = 38 341 ; bind _rc1 = _portc@1 342 00000007 = _rc1___byte equ _portc 343 00000001 = _rc1___bit equ 1 344 ; line_number = 39 345 ; bind _rc0 = _portc@0 346 00000007 = _rc0___byte equ _portc 347 00000000 = _rc0___bit equ 0 348 349 ; line_number = 41 350 ; register _pclath = 351 0000000a = _pclath equ 10 352 353 ; line_number = 43 354 ; register _intcon = 355 0000000b = _intcon equ 11 356 ; line_number = 44 357 ; bind _gie = _intcon@7 358 0000000b = _gie___byte equ _intcon 359 00000007 = _gie___bit equ 7 360 ; line_number = 45 361 ; bind _peie = _intcon@6 362 0000000b = _peie___byte equ _intcon 363 00000006 = _peie___bit equ 6 364 ; line_number = 46 365 ; bind _t0ie = _intcon@5 366 0000000b = _t0ie___byte equ _intcon 367 00000005 = _t0ie___bit equ 5 368 ; line_number = 47 369 ; bind _inte = _intcon@4 370 0000000b = _inte___byte equ _intcon 371 00000004 = _inte___bit equ 4 372 ; line_number = 48 373 ; bind _raie = _intcon@3 374 0000000b = _raie___byte equ _intcon 375 00000003 = _raie___bit equ 3 376 ; line_number = 49 377 ; bind _t0if = _intcon@2 378 0000000b = _t0if___byte equ _intcon 379 00000002 = _t0if___bit equ 2 380 ; line_number = 50 381 ; bind _intf = _intcon@1 382 0000000b = _intf___byte equ _intcon 383 00000001 = _intf___bit equ 1 384 ; line_number = 51 385 ; bind _raif = _intcon@0 386 0000000b = _raif___byte equ _intcon 387 00000000 = _raif___bit equ 0 388 389 ; line_number = 53 390 ; register _pir1 = 391 0000000c = _pir1 equ 12 392 ; line_number = 54 393 ; bind _eeif = _pir1@7 394 0000000c = _eeif___byte equ _pir1 395 00000007 = _eeif___bit equ 7 396 ; line_number = 55 397 ; bind _cmif = _pir1@3 398 0000000c = _cmif___byte equ _pir1 399 00000003 = _cmif___bit equ 3 400 ; line_number = 56 401 ; bind _tmr1if = _pir1@0 402 0000000c = _tmr1if___byte equ _pir1 403 00000000 = _tmr1if___bit equ 0 404 405 ; line_number = 58 406 ; register _tmr1l = 407 0000000e = _tmr1l equ 14 408 409 ; line_number = 60 410 ; register _tmr1h = 411 0000000f = _tmr1h equ 15 412 413 ; line_number = 62 414 ; register _t1con = 415 00000010 = _t1con equ 16 416 ; line_number = 63 417 ; bind _t1ge = _t1con@6 418 00000010 = _t1ge___byte equ _t1con 419 00000006 = _t1ge___bit equ 6 420 ; line_number = 64 421 ; bind _t1ckps1 = _t1con@5 422 00000010 = _t1ckps1___byte equ _t1con 423 00000005 = _t1ckps1___bit equ 5 424 ; line_number = 65 425 ; bind _t1ckps0 = _t1con@4 426 00000010 = _t1ckps0___byte equ _t1con 427 00000004 = _t1ckps0___bit equ 4 428 ; line_number = 66 429 ; bind _t1oscen = _t1con@3 430 00000010 = _t1oscen___byte equ _t1con 431 00000003 = _t1oscen___bit equ 3 432 ; line_number = 67 433 ; bind _t1sync = _t1con@2 434 00000010 = _t1sync___byte equ _t1con 435 00000002 = _t1sync___bit equ 2 436 ; line_number = 68 437 ; bind _tmr1cs = _t1con@1 438 00000010 = _tmr1cs___byte equ _t1con 439 00000001 = _tmr1cs___bit equ 1 440 ; line_number = 69 441 ; bind _tmr1on = _t1con@0 442 00000010 = _tmr1on___byte equ _t1con 443 00000000 = _tmr1on___bit equ 0 444 445 ; line_number = 71 446 ; register _cmcon = 447 00000019 = _cmcon equ 25 448 ; line_number = 72 449 ; bind _cout = _cmcon@6 450 00000019 = _cout___byte equ _cmcon 451 00000006 = _cout___bit equ 6 452 ; line_number = 73 453 ; bind _cinv = _cmcon@4 454 00000019 = _cinv___byte equ _cmcon 455 00000004 = _cinv___bit equ 4 456 ; line_number = 74 457 ; bind _cis = _cmcon@3 458 00000019 = _cis___byte equ _cmcon 459 00000003 = _cis___bit equ 3 460 ; line_number = 75 461 ; bind _cm2 = _cmcon@2 462 00000019 = _cm2___byte equ _cmcon 463 00000002 = _cm2___bit equ 2 464 ; line_number = 76 465 ; bind _cm1 = _cmcon@1 466 00000019 = _cm1___byte equ _cmcon 467 00000001 = _cm1___bit equ 1 468 ; line_number = 77 469 ; bind _cm0 = _cmcon@0 470 00000019 = _cm0___byte equ _cmcon 471 00000000 = _cm0___bit equ 0 472 473 ; # Data bank 1 (0x80-0xff): 474 475 ; line_number = 81 476 ; register _option_reg = 477 00000080 = _option_reg equ 128 478 ; line_number = 82 479 ; bind _rapu = _option_reg@7 480 00000080 = _rapu___byte equ _option_reg 481 00000007 = _rapu___bit equ 7 482 ; line_number = 83 483 ; bind _intedg = _option_reg@6 484 00000080 = _intedg___byte equ _option_reg 485 00000006 = _intedg___bit equ 6 486 ; line_number = 84 487 ; bind _t0cs = _option_reg@5 488 00000080 = _t0cs___byte equ _option_reg 489 00000005 = _t0cs___bit equ 5 490 ; line_number = 85 491 ; bind _t0se = _option_reg@4 492 00000080 = _t0se___byte equ _option_reg 493 00000004 = _t0se___bit equ 4 494 ; line_number = 86 495 ; bind _psa = _option_reg@3 496 00000080 = _psa___byte equ _option_reg 497 00000003 = _psa___bit equ 3 498 ; line_number = 87 499 ; bind _ps2 = _option_reg@2 500 00000080 = _ps2___byte equ _option_reg 501 00000002 = _ps2___bit equ 2 502 ; line_number = 88 503 ; bind _ps1 = _option_reg@1 504 00000080 = _ps1___byte equ _option_reg 505 00000001 = _ps1___bit equ 1 506 ; line_number = 89 507 ; bind _ps0 = _option_reg@0 508 00000080 = _ps0___byte equ _option_reg 509 00000000 = _ps0___bit equ 0 510 511 ; line_number = 91 512 ; register _trisa = 513 00000085 = _trisa equ 133 514 ; line_number = 92 515 ; bind _trisa5 = _trisa@5 516 00000085 = _trisa5___byte equ _trisa 517 00000005 = _trisa5___bit equ 5 518 ; line_number = 93 519 ; bind _trisa4 = _trisa@4 520 00000085 = _trisa4___byte equ _trisa 521 00000004 = _trisa4___bit equ 4 522 ; line_number = 94 523 ; bind _trisa3 = _trisa@3 524 00000085 = _trisa3___byte equ _trisa 525 00000003 = _trisa3___bit equ 3 526 ; line_number = 95 527 ; bind _trisa2 = _trisa@2 528 00000085 = _trisa2___byte equ _trisa 529 00000002 = _trisa2___bit equ 2 530 ; line_number = 96 531 ; bind _trisa1 = _trisa@1 532 00000085 = _trisa1___byte equ _trisa 533 00000001 = _trisa1___bit equ 1 534 ; line_number = 97 535 ; bind _trisa0 = _trisa@0 536 00000085 = _trisa0___byte equ _trisa 537 00000000 = _trisa0___bit equ 0 538 539 ; line_number = 99 540 ; register _trisc = 541 00000087 = _trisc equ 135 542 ; line_number = 100 543 ; bind _trisc5 = _trisc@5 544 00000087 = _trisc5___byte equ _trisc 545 00000005 = _trisc5___bit equ 5 546 ; line_number = 101 547 ; bind _trisc4 = _trisc@4 548 00000087 = _trisc4___byte equ _trisc 549 00000004 = _trisc4___bit equ 4 550 ; line_number = 102 551 ; bind _trisc3 = _trisc@3 552 00000087 = _trisc3___byte equ _trisc 553 00000003 = _trisc3___bit equ 3 554 ; line_number = 103 555 ; bind _trisc2 = _trisc@2 556 00000087 = _trisc2___byte equ _trisc 557 00000002 = _trisc2___bit equ 2 558 ; line_number = 104 559 ; bind _trisc1 = _trisc@1 560 00000087 = _trisc1___byte equ _trisc 561 00000001 = _trisc1___bit equ 1 562 ; line_number = 105 563 ; bind _trisc0 = _trisc@0 564 00000087 = _trisc0___byte equ _trisc 565 00000000 = _trisc0___bit equ 0 566 567 ; line_number = 107 568 ; register _pie1 = 569 0000008c = _pie1 equ 140 570 ; line_number = 108 571 ; bind _eeie = _pie1@7 572 0000008c = _eeie___byte equ _pie1 573 00000007 = _eeie___bit equ 7 574 ; line_number = 109 575 ; bind _adie = _pie1@6 576 0000008c = _adie___byte equ _pie1 577 00000006 = _adie___bit equ 6 578 ; line_number = 110 579 ; bind _cmie = _pie1@3 580 0000008c = _cmie___byte equ _pie1 581 00000003 = _cmie___bit equ 3 582 ; line_number = 111 583 ; bind _tmr1ie = _pie1@0 584 0000008c = _tmr1ie___byte equ _pie1 585 00000000 = _tmr1ie___bit equ 0 586 587 ; line_number = 113 588 ; register _pcon = 589 0000008e = _pcon equ 142 590 ; line_number = 114 591 ; bind _por = _pcon@1 592 0000008e = _por___byte equ _pcon 593 00000001 = _por___bit equ 1 594 ; line_number = 115 595 ; bind _bor = _pcon@0 596 0000008e = _bor___byte equ _pcon 597 00000000 = _bor___bit equ 0 598 599 ; line_number = 117 600 ; register _osccal = 601 00000090 = _osccal equ 144 602 ; line_number = 118 603 ; bind _cal5 = _osccal@7 604 00000090 = _cal5___byte equ _osccal 605 00000007 = _cal5___bit equ 7 606 ; line_number = 119 607 ; bind _cal4 = _osccal@6 608 00000090 = _cal4___byte equ _osccal 609 00000006 = _cal4___bit equ 6 610 ; line_number = 120 611 ; bind _cal3 = _osccal@5 612 00000090 = _cal3___byte equ _osccal 613 00000005 = _cal3___bit equ 5 614 ; line_number = 121 615 ; bind _cal2 = _osccal@4 616 00000090 = _cal2___byte equ _osccal 617 00000004 = _cal2___bit equ 4 618 ; line_number = 122 619 ; bind _cal1 = _osccal@3 620 00000090 = _cal1___byte equ _osccal 621 00000003 = _cal1___bit equ 3 622 ; line_number = 123 623 ; bind _cal0 = _osccal@2 624 00000090 = _cal0___byte equ _osccal 625 00000002 = _cal0___bit equ 2 626 ; line_number = 124 627 ; constant _osccal_lsb = 4 628 00000004 = _osccal_lsb equ 4 629 630 ; line_number = 126 631 ; register _wpua = 632 00000095 = _wpua equ 149 633 ; line_number = 127 634 ; bind _wpua5 = _wpua@5 635 00000095 = _wpua5___byte equ _wpua 636 00000005 = _wpua5___bit equ 5 637 ; line_number = 128 638 ; bind _wpua4 = _wpua@4 639 00000095 = _wpua4___byte equ _wpua 640 00000004 = _wpua4___bit equ 4 641 ; line_number = 129 642 ; bind _wpua2 = _wpua@2 643 00000095 = _wpua2___byte equ _wpua 644 00000002 = _wpua2___bit equ 2 645 ; line_number = 130 646 ; bind _wpua1 = _wpua@1 647 00000095 = _wpua1___byte equ _wpua 648 00000001 = _wpua1___bit equ 1 649 ; line_number = 131 650 ; bind _wpua0 = _wpua@0 651 00000095 = _wpua0___byte equ _wpua 652 00000000 = _wpua0___bit equ 0 653 654 ; line_number = 133 655 ; register _ioca = 656 00000096 = _ioca equ 150 657 ; line_number = 134 658 ; bind _ioca5 = _ioca@5 659 00000096 = _ioca5___byte equ _ioca 660 00000005 = _ioca5___bit equ 5 661 ; line_number = 135 662 ; bind _ioca4 = _ioca@4 663 00000096 = _ioca4___byte equ _ioca 664 00000004 = _ioca4___bit equ 4 665 ; line_number = 136 666 ; bind _ioca3 = _ioca@3 667 00000096 = _ioca3___byte equ _ioca 668 00000003 = _ioca3___bit equ 3 669 ; line_number = 137 670 ; bind _ioca2 = _ioca@2 671 00000096 = _ioca2___byte equ _ioca 672 00000002 = _ioca2___bit equ 2 673 ; line_number = 138 674 ; bind _ioca1 = _ioca@1 675 00000096 = _ioca1___byte equ _ioca 676 00000001 = _ioca1___bit equ 1 677 ; line_number = 139 678 ; bind _ioca0 = _ioca@0 679 00000096 = _ioca0___byte equ _ioca 680 00000000 = _ioca0___bit equ 0 681 682 ; line_number = 141 683 ; register _vrcon = 684 00000099 = _vrcon equ 153 685 ; line_number = 142 686 ; bind _vren = _vrcon@7 687 00000099 = _vren___byte equ _vrcon 688 00000007 = _vren___bit equ 7 689 ; line_number = 143 690 ; bind _vrr = _vrcon@5 691 00000099 = _vrr___byte equ _vrcon 692 00000005 = _vrr___bit equ 5 693 ; line_number = 144 694 ; bind _vr3 = _vrcon@3 695 00000099 = _vr3___byte equ _vrcon 696 00000003 = _vr3___bit equ 3 697 ; line_number = 145 698 ; bind _vr2 = _vrcon@2 699 00000099 = _vr2___byte equ _vrcon 700 00000002 = _vr2___bit equ 2 701 ; line_number = 146 702 ; bind _vr1 = _vrcon@1 703 00000099 = _vr1___byte equ _vrcon 704 00000001 = _vr1___bit equ 1 705 ; line_number = 147 706 ; bind _vr0 = _vrcon@0 707 00000099 = _vr0___byte equ _vrcon 708 00000000 = _vr0___bit equ 0 709 710 ; line_number = 149 711 ; register _eedata = 712 0000009a = _eedata equ 154 713 714 ; line_number = 151 715 ; register _eeadr = 716 0000009b = _eeadr equ 155 717 718 ; line_number = 153 719 ; register _eecon1 = 720 0000009c = _eecon1 equ 156 721 ; line_number = 154 722 ; bind _wrerr = _eecon1@3 723 0000009c = _wrerr___byte equ _eecon1 724 00000003 = _wrerr___bit equ 3 725 ; line_number = 155 726 ; bind _wren = _eecon1@2 727 0000009c = _wren___byte equ _eecon1 728 00000002 = _wren___bit equ 2 729 ; line_number = 156 730 ; bind _wr = _eecon1@1 731 0000009c = _wr___byte equ _eecon1 732 00000001 = _wr___bit equ 1 733 ; line_number = 157 734 ; bind _rd = _eecon1@0 735 0000009c = _rd___byte equ _eecon1 736 00000000 = _rd___bit equ 0 737 738 ; line_number = 159 739 ; register _eecon2 = 740 0000009d = _eecon2 equ 157 741 742 743 ; buffer = '_pic16f630' 744 ; line_number = 107 745 ; library _pic16f630_676 exited 746 747 748 ; buffer = 'compass8' 749 ; line_number = 6 750 ; library _pic16f630 exited 751 ; line_number = 7 752 ; library clock4mhz entered 753 ; # Copyright (c) 2004 by Wayne C. Gramlich 754 ; # All rights reserved. 755 756 ; # This library defines the contstants {clock_rate}, {instruction_rate}, 757 ; # and {clocks_per_instruction}. 758 759 ; # Define processor constants: 760 ; buffer = 'clock4mhz' 761 ; line_number = 9 762 ; constant clock_rate = 4000000 763 003d0900 = clock_rate equ 4000000 764 ; line_number = 10 765 ; constant clocks_per_instruction = 4 766 00000004 = clocks_per_instruction equ 4 767 ; line_number = 11 768 ; constant instruction_rate = clock_rate / clocks_per_instruction 769 000f4240 = instruction_rate equ 1000000 770 771 772 ; buffer = 'compass8' 773 ; line_number = 7 774 ; library clock4mhz exited 775 ; line_number = 8 776 ; library bit_bang entered 777 ; # Copyright (c) 2004 by Wayne C. Gramlich 778 ; # All rights reserved. 779 780 ; # This library provides bit bang routines for sending and receiving 781 ; # serial data at 2400 baud in 8N1 format (1 start bit, 8 data bits, 782 ; # No parity bit, 1 stop stop bit.) 783 ; # 784 ; # This library requires that the pins {serial_in} and {serial_out} 785 ; # be defined. In addition, the variable {instruction_rate} needs 786 ; # to be defined. Lastly, there needs to be a {delay} procedure 787 ; # with an "exact_delay delay_instructions" clause in it. The {delay} 788 ; # routine should invoke "watch_dog_reset" so that the watch dog time 789 ; # can be set. 790 791 ; # Define some constants that we will be needing: 792 ; buffer = 'bit_bang' 793 ; line_number = 17 794 ; constant baud_rate = 2400 795 00000960 = baud_rate equ 2400 796 ; line_number = 18 797 ; constant instructions_per_bit = instruction_rate / baud_rate 798 000001a0 = instructions_per_bit equ 416 799 ; line_number = 19 800 ; constant delays_per_bit = 3 801 00000003 = delays_per_bit equ 3 802 ; line_number = 20 803 ; constant instructions_per_delay = instructions_per_bit / delays_per_bit 804 0000008a = instructions_per_delay equ 138 805 ; line_number = 21 806 ; constant extra_instructions = 5 807 00000005 = extra_instructions equ 5 808 ; line_number = 22 809 ; constant delay_instructions = instructions_per_delay - extra_instructions 810 00000085 = delay_instructions equ 133 811 812 ; # The {receiving} bit is sent when data is being received. 813 ; # It gets cleared whenever data gets sent. It is used to 814 ; # determine whether additional delay is needed to turn a 815 ; # line around for slow interpretted chips like the Basic 816 ; # Stamp 2 and the OOPIC. 817 818 ; line_number = 30 819 ; global receiving bit 820 0000005f = receiving___byte equ shared___globals+63 821 00000000 = receiving___bit equ 0 822 ; line_number = 31 823 ; global waiting bit 824 0000005f = waiting___byte equ shared___globals+63 825 00000001 = waiting___bit equ 1 826 827 ; Delaying code generation for procedure byte_get 828 ; Delaying code generation for procedure byte_put 829 830 ; buffer = 'compass8' 831 ; line_number = 8 832 ; library bit_bang exited 833 834 ; line_number = 10 835 ; package pdip 836 ; line_number = 11 837 ; pin 1 = power_supply 838 ; line_number = 12 839 ; pin 2 = ra5_in, name = south, mask = south_pin_mask 840 00000005 = south___byte equ _porta 841 00000005 = south___bit equ 5 842 00000020 = south_pin_mask equ 32 843 ; line_number = 13 844 ; pin 3 = ra4_in, name = west, mask = west_pin_mask 845 00000005 = west___byte equ _porta 846 00000004 = west___bit equ 4 847 00000010 = west_pin_mask equ 16 848 ; line_number = 14 849 ; pin 4 = ra3_in, name = serial_in 850 00000005 = serial_in___byte equ _porta 851 00000003 = serial_in___bit equ 3 852 ; line_number = 15 853 ; pin 5 = rc5_out, name = east_led 854 00000007 = east_led___byte equ _portc 855 00000005 = east_led___bit equ 5 856 ; line_number = 16 857 ; pin 6 = rc4_out, name = north_led 858 00000007 = north_led___byte equ _portc 859 00000004 = north_led___bit equ 4 860 ; line_number = 17 861 ; pin 7 = rc3_out, name = west_led 862 00000007 = west_led___byte equ _portc 863 00000003 = west_led___bit equ 3 864 ; line_number = 18 865 ; pin 8 = rc2_out, name = sout_led 866 00000007 = sout_led___byte equ _portc 867 00000002 = sout_led___bit equ 2 868 ; line_number = 19 869 ; pin 9 = rc1_unused 870 ; line_number = 20 871 ; pin 10 = rc0_unused 872 ; line_number = 21 873 ; pin 11 = ra2_out, name = serial_out 874 00000005 = serial_out___byte equ _porta 875 00000002 = serial_out___bit equ 2 876 ; line_number = 22 877 ; pin 12 = ra1_in, name = east, mask = east_pin_mask 878 00000005 = east___byte equ _porta 879 00000001 = east___bit equ 1 880 00000002 = east_pin_mask equ 2 881 ; line_number = 23 882 ; pin 13 = ra0_in, name = north, mask = north_pin_mask 883 00000005 = north___byte equ _porta 884 00000000 = north___bit equ 0 885 00000001 = north_pin_mask equ 1 886 ; line_number = 24 887 ; pin 14 = ground 888 889 ; line_number = 26 890 ; constant port_mask = north_pin_mask | east_pin_mask | south_pin_mask | west_pin_mask 891 00000033 = port_mask equ 51 892 893 ; # Bearing constants: 894 ; line_number = 30 895 ; constant north_bearing = 0 896 00000000 = north_bearing equ 0 897 ; line_number = 31 898 ; constant north_east_bearing = 1 899 00000001 = north_east_bearing equ 1 900 ; line_number = 32 901 ; constant east_bearing = 2 902 00000002 = east_bearing equ 2 903 ; line_number = 33 904 ; constant south_east_bearing = 3 905 00000003 = south_east_bearing equ 3 906 ; line_number = 34 907 ; constant south_bearing = 4 908 00000004 = south_bearing equ 4 909 ; line_number = 35 910 ; constant south_west_bearing = 5 911 00000005 = south_west_bearing equ 5 912 ; line_number = 36 913 ; constant west_bearing = 6 914 00000006 = west_bearing equ 6 915 ; line_number = 37 916 ; constant north_west_bearing = 7 917 00000007 = north_west_bearing equ 7 918 919 ; # Bearing mask constants: 920 ; line_number = 40 921 ; constant north_mask = 1 << north_bearing 922 00000001 = north_mask equ 1 923 ; line_number = 41 924 ; constant north_east_mask = 1 << north_east_bearing 925 00000002 = north_east_mask equ 2 926 ; line_number = 42 927 ; constant east_mask = 1 << east_bearing 928 00000004 = east_mask equ 4 929 ; line_number = 43 930 ; constant south_east_mask = 1 << south_east_bearing 931 00000008 = south_east_mask equ 8 932 ; line_number = 44 933 ; constant south_mask = 1 << south_bearing 934 00000010 = south_mask equ 16 935 ; line_number = 45 936 ; constant south_west_mask = 1 << south_west_bearing 937 00000020 = south_west_mask equ 32 938 ; line_number = 46 939 ; constant west_mask = 1 << west_bearing 940 00000040 = west_mask equ 64 941 ; line_number = 47 942 ; constant north_west_mask = 1 << north_west_bearing 943 00000080 = north_west_mask equ 128 944 945 ; # Global variables go here: 946 ; line_number = 50 947 ; global raw byte 948 00000024 = raw equ shared___globals+4 949 ; line_number = 51 950 ; global interrupts byte 951 00000025 = interrupts equ shared___globals+5 952 ; line_number = 52 953 ; global mask byte 954 00000026 = mask equ shared___globals+6 955 ; line_number = 53 956 ; global bearing byte 957 00000027 = bearing equ shared___globals+7 958 959 ; # Interrupt and shaft direction bits: 960 ; line_number = 56 961 ; global interrupt_pending bit 962 0000005f = interrupt_pending___byte equ shared___globals+63 963 00000002 = interrupt_pending___bit equ 2 964 ; line_number = 57 965 ; global interrupt_enable bit 966 0000005f = interrupt_enable___byte equ shared___globals+63 967 00000003 = interrupt_enable___bit equ 3 968 969 ; line_number = 59 970 ; global command_previous byte 971 00000028 = command_previous equ shared___globals+8 972 ; line_number = 60 973 ; global command_last byte 974 00000029 = command_last equ shared___globals+9 975 ; line_number = 61 976 ; global sent_previous byte 977 0000002a = sent_previous equ shared___globals+10 978 ; line_number = 62 979 ; global sent_last byte 980 0000002b = sent_last equ shared___globals+11 981 982 ; line_number = 64 983 ; procedure main 984 0000 : main: 985 ; Need to calibrate the oscillator 986 0000 23ff call 1023 987 0001 1683 bsf __rp0___byte, __rp0___bit 988 0002 0090 movwf _osccal 989 ; Initialize some registers 990 0003 301f movlw 31 991 0004 0085 movwf _trisa 992 0005 0187 clrf _trisc 993 ; arguments_none 994 ; line_number = 66 995 ; returns_nothing 996 997 ; line_number = 68 998 ; local command byte 999 0000002c = main__command equ shared___globals+12 1000 ; line_number = 69 1001 ; local glitch byte 1002 0000002d = main__glitch equ shared___globals+13 1003 ; line_number = 70 1004 ; local id_index byte 1005 0000002e = main__id_index equ shared___globals+14 1006 ; line_number = 71 1007 ; local high byte 1008 0000002f = main__high equ shared___globals+15 1009 ; line_number = 72 1010 ; local index byte 1011 00000030 = main__index equ shared___globals+16 1012 ; line_number = 73 1013 ; local result byte 1014 00000031 = main__result equ shared___globals+17 1015 ; line_number = 74 1016 ; local temp byte 1017 00000032 = main__temp equ shared___globals+18 1018 1019 ; # Initialize everything: 1020 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) 1021 ; line_number = 77 1022 ; interrupts := 0 1023 0006 3000 movlw 0 1024 0007 1283 bcf __rp0___byte, __rp0___bit 1025 0008 00a5 movwf interrupts 1026 ; line_number = 78 1027 ; interrupt_enable := 0 1028 0009 11df bcf interrupt_enable___byte, interrupt_enable___bit 1029 ; line_number = 79 1030 ; interrupt_pending := 0 1031 000a 115f bcf interrupt_pending___byte, interrupt_pending___bit 1032 ; line_number = 80 1033 ; glitch := 0 1034 000b 3000 movlw 0 1035 000c 00ad movwf main__glitch 1036 ; line_number = 81 1037 ; id_index := 0 1038 000d 3000 movlw 0 1039 000e 00ae movwf main__id_index 1040 1041 ; # Loop waiting for commands: 1042 ; line_number = 84 1043 ; loop_forever start 1044 000f : main__1: 1045 ; # Get a command byte: 1046 ; line_number = 86 1047 ; command := byte_get() 1048 000f 2166 call byte_get 1049 0010 00ac movwf main__command 1050 1051 ; # Dispatch on command: 1052 ; line_number = 89 1053 ; switch command >> 6 start 1054 0011 3000 movlw main__47>>8 1055 0012 008a movwf __pclath 1056 00000034 = main__48 equ shared___globals+20 1057 0013 0e2c swapf main__command,w 1058 0014 00b4 movwf main__48 1059 0015 0cb4 rrf main__48,f 1060 0016 0c34 rrf main__48,w 1061 0017 3903 andlw 3 1062 0018 3e1a addlw main__47 1063 0019 0082 movwf __pcl 1064 ; page_group 4 1065 001a : main__47: 1066 001a 281e goto main__44 1067 001b 284b goto main__45 1068 001c 284b goto main__45 1069 001d 284c goto main__46 1070 ; line_number = 90 1071 ; case 0 1072 001e : main__44: 1073 ; # Command = 00xx xxxx: 1074 ; line_number = 92 1075 ; switch (command >> 3) & 7 start 1076 001e 3000 movlw main__11>>8 1077 001f 008a movwf __pclath 1078 00000034 = main__12 equ shared___globals+20 1079 0020 0c2c rrf main__command,w 1080 0021 00b4 movwf main__12 1081 0022 0cb4 rrf main__12,f 1082 0023 0c34 rrf main__12,w 1083 0024 3907 andlw 7 1084 0025 3e27 addlw main__11 1085 0026 0082 movwf __pcl 1086 ; page_group 8 1087 0027 : main__11: 1088 0027 282f goto main__9 1089 0028 284a goto main__10 1090 0029 284a goto main__10 1091 002a 284a goto main__10 1092 002b 284a goto main__10 1093 002c 284a goto main__10 1094 002d 284a goto main__10 1095 002e 284a goto main__10 1096 ; line_number = 93 1097 ; case 0 1098 002f : main__9: 1099 ; # Command = 0000 0xxx: 1100 ; line_number = 95 1101 ; switch command & 7 start 1102 002f 3000 movlw main__7>>8 1103 0030 008a movwf __pclath 1104 0031 3007 movlw 7 1105 0032 052c andwf main__command,w 1106 0033 3e35 addlw main__7 1107 0034 0082 movwf __pcl 1108 ; page_group 8 1109 0035 : main__7: 1110 0035 283d goto main__2 1111 0036 2840 goto main__3 1112 0037 2843 goto main__4 1113 0038 2846 goto main__5 1114 0039 2849 goto main__6 1115 003a 2849 goto main__6 1116 003b 2849 goto main__6 1117 003c 2849 goto main__6 1118 ; line_number = 96 1119 ; case 0 1120 003d : main__2: 1121 ; # Read Bearing (Command = 0000 0000): 1122 ; line_number = 98 1123 ; call byte_put(bearing) 1124 003d 0827 movf bearing,w 1125 003e 218f call byte_put 1126 003f 2849 goto main__8 1127 ; line_number = 99 1128 ; case 1 1129 0040 : main__3: 1130 ; # Read Interrupt Mask (Command = 0000 0001): 1131 ; line_number = 101 1132 ; call byte_put(interrupts) 1133 0040 0825 movf interrupts,w 1134 0041 218f call byte_put 1135 0042 2849 goto main__8 1136 ; line_number = 102 1137 ; case 2 1138 0043 : main__4: 1139 ; # Read Raw (Command = 0000 0010): 1140 ; line_number = 104 1141 ; call byte_put(raw) 1142 0043 0824 movf raw,w 1143 0044 218f call byte_put 1144 0045 2849 goto main__8 1145 ; line_number = 105 1146 ; case 3 1147 0046 : main__5: 1148 ; # Set Intterupt Mask (Command = 0000 0011): 1149 ; line_number = 107 1150 ; interrupts := byte_get() 1151 0046 2166 call byte_get 1152 0047 00a5 movwf interrupts 1153 0048 2849 goto main__8 1154 ; line_number = 108 1155 ; case 4, 5, 6, 7 1156 0049 : main__6: 1157 ; line_number = 109 1158 ; do_nothing 1159 0049 : main__8: 1160 ; switch end:(data:X0=>X? code:XX=>XX) 1161 ; line_number = 95 1162 ; switch command & 7 done 1163 0049 284a goto main__13 1164 ; line_number = 110 1165 ; case 1, 2, 3, 4, 5, 6, 7 1166 004a : main__10: 1167 ; line_number = 111 1168 ; do_nothing 1169 004a : main__13: 1170 ; switch end:(data:X0=>X? code:XX=>XX) 1171 ; line_number = 92 1172 ; switch (command >> 3) & 7 done 1173 004a 28ba goto main__49 1174 ; line_number = 112 1175 ; case 1, 2 1176 004b : main__45: 1177 ; # Command = 01xx xxxx or10xx xxxx: 1178 ; line_number = 114 1179 ; do_nothing 1180 004b 28ba goto main__49 1181 ; line_number = 115 1182 ; case 3 1183 004c : main__46: 1184 ; # Command = 11xx xxxx: 1185 ; line_number = 117 1186 ; switch (command >> 3) & 7 start 1187 004c 3000 movlw main__41>>8 1188 004d 008a movwf __pclath 1189 00000034 = main__42 equ shared___globals+20 1190 004e 0c2c rrf main__command,w 1191 004f 00b4 movwf main__42 1192 0050 0cb4 rrf main__42,f 1193 0051 0c34 rrf main__42,w 1194 0052 3907 andlw 7 1195 0053 3e55 addlw main__41 1196 0054 0082 movwf __pcl 1197 ; page_group 8 1198 0055 : main__41: 1199 0055 28ba goto main__43 1200 0056 28ba goto main__43 1201 0057 28ba goto main__43 1202 0058 28ba goto main__43 1203 0059 28ba goto main__43 1204 005a 285d goto main__38 1205 005b 286b goto main__39 1206 005c 2884 goto main__40 1207 ; line_number = 118 1208 ; case 5 1209 005d : main__38: 1210 ; # Command = 1110 1xxx: 1211 ; line_number = 120 1212 ; if (command & 7) = 7 start 1213 ; Left minus Right 1214 005d 3007 movlw 7 1215 005e 052c andwf main__command,w 1216 005f 3ef9 addlw 249 1217 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1218 ; CASE: true_code.size = 0 && false_code.size > 1 1219 ; bit_code_emit_helper1: body_code.size=8 true_test=true body_code.delay=0 (non-uniform delay) 1220 0060 1d03 btfss __z___byte, __z___bit 1221 0061 286a goto main__16 1222 ; # Return Interrupt Bits (Command = 1110 1111): 1223 ; line_number = 122 1224 ; result := 0 1225 0062 3000 movlw 0 1226 0063 00b1 movwf main__result 1227 ; line_number = 123 1228 ; if interrupt_enable start 1229 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1230 ; CASE: True.size=1 False.size=0 1231 0064 19df btfsc interrupt_enable___byte, interrupt_enable___bit 1232 ; line_number = 124 1233 ; result@1 := 1 1234 00000031 = main__select__14___byte equ main__result 1235 00000001 = main__select__14___bit equ 1 1236 0065 14b1 bsf main__select__14___byte, main__select__14___bit 1237 ; Recombine size1 = 0 || size2 = 0 1238 ; code.delay=4294967295 back_code.delay=4294967295 1239 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) 1240 ; line_number = 123 1241 ; if interrupt_enable done 1242 ; line_number = 125 1243 ; if interrupt_pending start 1244 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1245 ; CASE: True.size=1 False.size=0 1246 0066 195f btfsc interrupt_pending___byte, interrupt_pending___bit 1247 ; line_number = 126 1248 ; result@0 := 1 1249 00000031 = main__select__15___byte equ main__result 1250 00000000 = main__select__15___bit equ 0 1251 0067 1431 bsf main__select__15___byte, main__select__15___bit 1252 ; Recombine size1 = 0 || size2 = 0 1253 ; code.delay=4294967295 back_code.delay=4294967295 1254 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) 1255 ; line_number = 125 1256 ; if interrupt_pending done 1257 ; line_number = 127 1258 ; call byte_put(result) 1259 0068 0831 movf main__result,w 1260 0069 218f call byte_put 1261 ; Recombine size1 = 0 || size2 = 0 1262 006a : main__16: 1263 ; code.delay=4294967295 back_code.delay=4294967295 1264 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1265 ; line_number = 120 1266 ; if (command & 7) = 7 done 1267 006a 28ba goto main__43 1268 ; line_number = 128 1269 ; case 6 1270 006b : main__39: 1271 ; # Shared Interrupt commands. 1272 ; line_number = 130 1273 ; switch (command >> 1) & 3 start 1274 006b 3000 movlw main__24>>8 1275 006c 008a movwf __pclath 1276 00000034 = main__25 equ shared___globals+20 1277 006d 0c2c rrf main__command,w 1278 006e 3903 andlw 3 1279 006f 3e71 addlw main__24 1280 0070 0082 movwf __pcl 1281 ; page_group 4 1282 0071 : main__24: 1283 0071 2875 goto main__21 1284 0072 2875 goto main__21 1285 0073 287c goto main__22 1286 0074 2880 goto main__23 1287 ; line_number = 131 1288 ; case 0, 1 1289 0075 : main__21: 1290 ; # Set Interrupt Bits (Command = 1110 00ep): 1291 ; line_number = 133 1292 ; interrupt_enable := command@1 1293 0075 11df bcf interrupt_enable___byte, interrupt_enable___bit 1294 0000002c = main__select__17___byte equ main__command 1295 00000001 = main__select__17___bit equ 1 1296 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1297 ; CASE: True.size=1 False.size=0 1298 0076 18ac btfsc main__select__17___byte, main__select__17___bit 1299 0077 15df bsf interrupt_enable___byte, interrupt_enable___bit 1300 ; Recombine size1 = 0 || size2 = 0 1301 ; code.delay=4294967295 back_code.delay=4294967295 1302 ; <=bit_code_emit@symbol; sym=main__select__17 (data:X0=>X0 code:XX=>XX) 1303 ; line_number = 134 1304 ; interrupt_pending := command@0 1305 0078 115f bcf interrupt_pending___byte, interrupt_pending___bit 1306 0000002c = main__select__18___byte equ main__command 1307 00000000 = main__select__18___bit equ 0 1308 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1309 ; CASE: True.size=1 False.size=0 1310 0079 182c btfsc main__select__18___byte, main__select__18___bit 1311 007a 155f bsf interrupt_pending___byte, interrupt_pending___bit 1312 ; Recombine size1 = 0 || size2 = 0 1313 ; code.delay=4294967295 back_code.delay=4294967295 1314 ; <=bit_code_emit@symbol; sym=main__select__18 (data:X0=>X0 code:XX=>XX) 1315 007b 2883 goto main__26 1316 ; line_number = 135 1317 ; case 2 1318 007c : main__22: 1319 ; # Set Interrupt Pending (Command = 1110 010p): 1320 ; line_number = 137 1321 ; interrupt_pending := command@0 1322 007c 115f bcf interrupt_pending___byte, interrupt_pending___bit 1323 0000002c = main__select__19___byte equ main__command 1324 00000000 = main__select__19___bit equ 0 1325 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1326 ; CASE: True.size=1 False.size=0 1327 007d 182c btfsc main__select__19___byte, main__select__19___bit 1328 007e 155f bsf interrupt_pending___byte, interrupt_pending___bit 1329 ; Recombine size1 = 0 || size2 = 0 1330 ; code.delay=4294967295 back_code.delay=4294967295 1331 ; <=bit_code_emit@symbol; sym=main__select__19 (data:X0=>X0 code:XX=>XX) 1332 007f 2883 goto main__26 1333 ; line_number = 138 1334 ; case 3 1335 0080 : main__23: 1336 ; # Set Interrupt Enable (Command = 1110 011e): 1337 ; line_number = 140 1338 ; interrupt_enable := command@0 1339 0080 11df bcf interrupt_enable___byte, interrupt_enable___bit 1340 0000002c = main__select__20___byte equ main__command 1341 00000000 = main__select__20___bit equ 0 1342 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1343 ; CASE: True.size=1 False.size=0 1344 0081 182c btfsc main__select__20___byte, main__select__20___bit 1345 0082 15df bsf interrupt_enable___byte, interrupt_enable___bit 1346 ; Recombine size1 = 0 || size2 = 0 1347 ; code.delay=4294967295 back_code.delay=4294967295 1348 ; <=bit_code_emit@symbol; sym=main__select__20 (data:X0=>X0 code:XX=>XX) 1349 0083 : main__26: 1350 ; switch end:(data:X0=>X0 code:XX=>XX) 1351 ; line_number = 130 1352 ; switch (command >> 1) & 3 done 1353 0083 28ba goto main__43 1354 ; line_number = 141 1355 ; case 7 1356 0084 : main__40: 1357 ; # Shared commands (Command = 1111 1ccc): 1358 ; line_number = 143 1359 ; switch command & 7 start 1360 0084 3000 movlw main__36>>8 1361 0085 008a movwf __pclath 1362 0086 3007 movlw 7 1363 0087 052c andwf main__command,w 1364 0088 3e8a addlw main__36 1365 0089 0082 movwf __pcl 1366 ; page_group 8 1367 008a : main__36: 1368 008a 2892 goto main__28 1369 008b 2896 goto main__29 1370 008c 289a goto main__30 1371 008d 289f goto main__31 1372 008e 28a2 goto main__32 1373 008f 28af goto main__33 1374 0090 28b2 goto main__34 1375 0091 28b7 goto main__35 1376 ; line_number = 144 1377 ; case 0 1378 0092 : main__28: 1379 ; This case body wants this bit set 1380 0092 1683 bsf __rp0___byte, __rp0___bit 1381 ; # Clock Decrement (Command = 1111 1000): 1382 ; line_number = 146 1383 ; _osccal := _osccal - _osccal_lsb 1384 0093 30fc movlw 252 1385 0094 0790 addwf _osccal,f 1386 0095 28ba goto main__37 1387 ; line_number = 147 1388 ; case 1 1389 0096 : main__29: 1390 ; This case body wants this bit set 1391 0096 1683 bsf __rp0___byte, __rp0___bit 1392 ; # Clock Increment (Command = 1111 1001): 1393 ; line_number = 149 1394 ; _osccal := _osccal + _osccal_lsb 1395 0097 3004 movlw 4 1396 0098 0790 addwf _osccal,f 1397 0099 28ba goto main__37 1398 ; line_number = 150 1399 ; case 2 1400 009a : main__30: 1401 ; This case body wants this bit set 1402 009a 1683 bsf __rp0___byte, __rp0___bit 1403 ; # Clock Read (Command = 1111 1010): 1404 ; line_number = 152 1405 ; call byte_put(_osccal) 1406 009b 0810 movf _osccal,w 1407 009c 1283 bcf __rp0___byte, __rp0___bit 1408 009d 218f call byte_put 1409 009e 28ba goto main__37 1410 ; line_number = 153 1411 ; case 3 1412 009f : main__31: 1413 ; # Clock Pulse (Command = 1111 1011): 1414 ; line_number = 155 1415 ; call byte_put(0) 1416 009f 3000 movlw 0 1417 00a0 218f call byte_put 1418 00a1 28ba goto main__37 1419 ; line_number = 156 1420 ; case 4 1421 00a2 : main__32: 1422 ; # ID Next (Command = 1111 1100): 1423 ; line_number = 158 1424 ; temp := 0 1425 00a2 3000 movlw 0 1426 00a3 00b2 movwf main__temp 1427 ; line_number = 159 1428 ; if id_index < id.size start 1429 00a4 3032 movlw 50 1430 00a5 022e subwf main__id_index,w 1431 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1432 ; CASE: true.size=0 && false.size>1 1433 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=0 (non-uniform delay) 1434 00a6 1803 btfsc __c___byte, __c___bit 1435 00a7 28ac goto main__27 1436 ; line_number = 160 1437 ; temp := id[id_index] 1438 00a8 082e movf main__id_index,w 1439 00a9 212e call id 1440 00aa 00b2 movwf main__temp 1441 ; line_number = 161 1442 ; id_index := id_index + 1 1443 00ab 0aae incf main__id_index,f 1444 00ac : main__27: 1445 ; Recombine size1 = 0 || size2 = 0 1446 ; code.delay=4294967295 back_code.delay=4294967295 1447 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) 1448 ; line_number = 159 1449 ; if id_index < id.size done 1450 ; line_number = 162 1451 ; call byte_put(temp) 1452 00ac 0832 movf main__temp,w 1453 00ad 218f call byte_put 1454 00ae 28ba goto main__37 1455 ; line_number = 163 1456 ; case 5 1457 00af : main__33: 1458 ; # ID Reset (Command = 1111 1101): 1459 ; line_number = 165 1460 ; id_index := 0 1461 00af 3000 movlw 0 1462 00b0 00ae movwf main__id_index 1463 00b1 28ba goto main__37 1464 ; line_number = 166 1465 ; case 6 1466 00b2 : main__34: 1467 ; # Glitch Read (Command = 1111 1110): 1468 ; line_number = 168 1469 ; call byte_put(glitch) 1470 00b2 082d movf main__glitch,w 1471 00b3 218f call byte_put 1472 ; line_number = 169 1473 ; glitch := 0 1474 00b4 3000 movlw 0 1475 00b5 00ad movwf main__glitch 1476 00b6 28ba goto main__37 1477 ; line_number = 170 1478 ; case 7 1479 00b7 : main__35: 1480 ; # Glitch (Command = 1111 1111): 1481 ; line_number = 172 1482 ; if glitch != 0xff start 1483 ; Left minus Right 1484 00b7 0a2d incf main__glitch,w 1485 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1486 ; CASE: true_code.size=0 && false_code.size=1 1487 00b8 1d03 btfss __z___byte, __z___bit 1488 ; line_number = 173 1489 ; glitch := glitch + 1 1490 00b9 0aad incf main__glitch,f 1491 1492 1493 ; Recombine size1 = 0 || size2 = 0 1494 ; code.delay=4294967295 back_code.delay=4294967295 1495 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1496 ; line_number = 172 1497 ; if glitch != 0xff done 1498 00ba : main__37: 1499 ; switch end:(data:X0=>X? code:XX=>XX) 1500 ; line_number = 143 1501 ; switch command & 7 done 1502 00ba : main__43: 1503 ; switch end:(data:X0=>X? code:XX=>XX) 1504 ; line_number = 117 1505 ; switch (command >> 3) & 7 done 1506 00ba : main__49: 1507 ; switch end:(data:X0=>X? code:XX=>XX) 1508 ; line_number = 89 1509 ; switch command >> 6 done 1510 ; line_number = 84 1511 ; loop_forever wrap-up 1512 ; Need to adjust code banks to match front of loop 1513 00ba 1283 bcf __rp0___byte, __rp0___bit 1514 00bb 280f goto main__1 1515 ; line_number = 84 1516 ; loop_forever done 1517 ; delay after procedure statements=non-uniform 1518 1519 1520 1521 1522 ; line_number = 176 1523 ; procedure delay 1524 00bc : delay: 1525 ; arguments_none 1526 ; line_number = 178 1527 ; returns_nothing 1528 ; line_number = 179 1529 ; exact_delay delay_instructions 1530 1531 ; # This procedure will delay for 1/3 of a bit time. 1532 1533 ; line_number = 183 1534 ; local temp byte 1535 00000033 = delay__temp equ shared___globals+19 1536 1537 ; # Kick the dog: 1538 ; before procedure statements delay=0, bit states=(data:X0=>X0 code:XX=>XX) 1539 ; line_number = 186 1540 ; watch_dog_reset done 1541 ; Delay at watch_dog_reset is 0 1542 00bc 0064 clrwdt 1543 1544 ; line_number = 188 1545 ; raw := (_porta & port_mask) ^ port_mask 1546 ; Delay at assignment is 1 1547 00bd 3033 movlw 51 1548 00be 0505 andwf _porta,w 1549 00bf 3a33 xorlw 51 1550 00c0 00a4 movwf raw 1551 ; line_number = 189 1552 ; if raw & north_pin_mask != 0 start 1553 ; Delay at if is 5 1554 ; Left minus Right 1555 00c1 3001 movlw 1 1556 00c2 0524 andwf raw,w 1557 ; (after recombine) true_delay=15, false_delay=9 uniform_delay=true 1558 ; CASE: true_code_size > 1 && false_code_size > 1 1559 ; true_code_size=58 false_code_size=23 1560 00c3 1903 btfsc __z___byte, __z___bit 1561 00c4 28e0 goto delay__21 1562 ; Delay 5 cycles 1563 00c5 28c6 goto delay__23 1564 00c6 : delay__23: 1565 00c6 28c7 goto delay__24 1566 00c7 : delay__24: 1567 00c7 0000 nop 1568 ; line_number = 190 1569 ; if raw & east_pin_mask != 0 start 1570 ; Delay at if is 0 1571 ; Left minus Right 1572 00c8 3002 movlw 2 1573 00c9 0524 andwf raw,w 1574 ; (after recombine) true_delay=9, false_delay=4 uniform_delay=true 1575 ; CASE: true_code_size > 1 && false_code_size > 1 1576 ; true_code_size=12 false_code_size=4 1577 00ca 1903 btfsc __z___byte, __z___bit 1578 00cb 28d3 goto delay__17 1579 ; Delay 4 cycles 1580 00cc 28cd goto delay__19 1581 00cd : delay__19: 1582 00cd 28ce goto delay__20 1583 00ce : delay__20: 1584 ; line_number = 191 1585 ; bearing := north_east_bearing 1586 ; Delay at assignment is 0 1587 00ce 3001 movlw 1 1588 00cf 00a7 movwf bearing 1589 ; line_number = 192 1590 ; mask := north_east_mask 1591 ; Delay at assignment is 2 1592 00d0 3002 movlw 2 1593 00d1 00a6 movwf mask 1594 00d2 28df goto delay__18 1595 00d3 : delay__17: 1596 ; line_number = 193 1597 ; Left minus Right 1598 00d3 3010 movlw 16 1599 00d4 0524 andwf raw,w 1600 ; (after recombine) true_delay=3, false_delay=4 uniform_delay=true 1601 ; CASE: true_code_size > 1 && false_code_size > 1 1602 ; true_code_size=3 false_code_size=4 1603 00d5 1d03 btfss __z___byte, __z___bit 1604 00d6 28db goto delay__15 1605 ; line_number = 197 1606 ; bearing := north_bearing 1607 ; Delay at assignment is 0 1608 00d7 01a7 clrf bearing 1609 ; line_number = 198 1610 ; mask := north_mask 1611 ; Delay at assignment is 1 1612 00d8 3001 movlw 1 1613 00d9 00a6 movwf mask 1614 ; Delay 0 cycles 1615 00da 28df goto delay__16 1616 00db : delay__15: 1617 ; line_number = 194 1618 ; bearing := north_west_bearing 1619 ; Delay at assignment is 0 1620 00db 3007 movlw 7 1621 00dc 00a7 movwf bearing 1622 ; line_number = 195 1623 ; mask := north_west_mask 1624 ; Delay at assignment is 2 1625 00dd 3080 movlw 128 1626 00de 00a6 movwf mask 1627 00df : delay__16: 1628 ; code.delay=9 back_code.delay=0 1629 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1630 ; Uniform delay broke in relation_code_emit 1631 00df : delay__18: 1632 ; code.delay=9 back_code.delay=0 1633 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1634 ; Uniform delay broke in relation_code_emit 1635 ; if final true delay=4 false delay=9 code delay=9 1636 ; line_number = 190 1637 ; if raw & east_pin_mask != 0 done 1638 00df 291a goto delay__22 1639 00e0 : delay__21: 1640 ; line_number = 199 1641 ; Left minus Right 1642 00e0 3020 movlw 32 1643 00e1 0524 andwf raw,w 1644 ; (after recombine) true_delay=9, false_delay=9 uniform_delay=true 1645 ; CASE: true_code_size > 1 && false_code_size > 1 1646 ; true_code_size=26 false_code_size=26 1647 00e2 1d03 btfss __z___byte, __z___bit 1648 00e3 28ff goto delay__13 1649 ; line_number = 209 1650 ; Left minus Right 1651 00e4 3002 movlw 2 1652 00e5 0524 andwf raw,w 1653 ; (after recombine) true_delay=10, false_delay=4 uniform_delay=true 1654 ; CASE: true_code_size > 1 && false_code_size > 1 1655 ; true_code_size=14 false_code_size=4 1656 00e6 1903 btfsc __z___byte, __z___bit 1657 00e7 28f0 goto delay__3 1658 ; Delay 5 cycles 1659 00e8 28e9 goto delay__5 1660 00e9 : delay__5: 1661 00e9 28ea goto delay__6 1662 00ea : delay__6: 1663 00ea 0000 nop 1664 ; line_number = 210 1665 ; bearing := east_bearing 1666 ; Delay at assignment is 0 1667 00eb 3002 movlw 2 1668 00ec 00a7 movwf bearing 1669 ; line_number = 211 1670 ; mask := east_mask 1671 ; Delay at assignment is 2 1672 00ed 3004 movlw 4 1673 00ee 00a6 movwf mask 1674 00ef 28fe goto delay__4 1675 00f0 : delay__3: 1676 ; line_number = 212 1677 ; Left minus Right 1678 00f0 3010 movlw 16 1679 00f1 0524 andwf raw,w 1680 ; (after recombine) true_delay=4, false_delay=4 uniform_delay=true 1681 ; CASE: true_code_size > 1 && false_code_size > 1 1682 ; true_code_size=4 false_code_size=4 1683 00f2 1d03 btfss __z___byte, __z___bit 1684 00f3 28f9 goto delay__1 1685 ; line_number = 216 1686 ; bearing := 0xff 1687 ; Delay at assignment is 0 1688 00f4 30ff movlw 255 1689 00f5 00a7 movwf bearing 1690 ; line_number = 217 1691 ; mask := 0xff 1692 ; Delay at assignment is 2 1693 00f6 30ff movlw 255 1694 00f7 00a6 movwf mask 1695 1696 00f8 28fe goto delay__2 1697 00f9 : delay__1: 1698 ; line_number = 213 1699 ; bearing := west_bearing 1700 ; Delay at assignment is 0 1701 00f9 3006 movlw 6 1702 00fa 00a7 movwf bearing 1703 ; line_number = 214 1704 ; mask := west_mask 1705 ; Delay at assignment is 2 1706 00fb 3040 movlw 64 1707 00fc 00a6 movwf mask 1708 00fd 0000 nop 1709 00fe : delay__2: 1710 ; code.delay=10 back_code.delay=0 1711 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1712 ; Uniform delay broke in relation_code_emit 1713 00fe : delay__4: 1714 ; code.delay=9 back_code.delay=0 1715 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1716 ; Uniform delay broke in relation_code_emit 1717 00fe 291a goto delay__14 1718 00ff : delay__13: 1719 ; line_number = 200 1720 ; if raw & east_pin_mask != 0 start 1721 ; Delay at if is 0 1722 ; Left minus Right 1723 00ff 3002 movlw 2 1724 0100 0524 andwf raw,w 1725 ; (after recombine) true_delay=10, false_delay=4 uniform_delay=true 1726 ; CASE: true_code_size > 1 && false_code_size > 1 1727 ; true_code_size=14 false_code_size=4 1728 0101 1903 btfsc __z___byte, __z___bit 1729 0102 290b goto delay__9 1730 ; Delay 5 cycles 1731 0103 2904 goto delay__11 1732 0104 : delay__11: 1733 0104 2905 goto delay__12 1734 0105 : delay__12: 1735 0105 0000 nop 1736 ; line_number = 201 1737 ; bearing := south_east_bearing 1738 ; Delay at assignment is 0 1739 0106 3003 movlw 3 1740 0107 00a7 movwf bearing 1741 ; line_number = 202 1742 ; mask := south_east_mask 1743 ; Delay at assignment is 2 1744 0108 3008 movlw 8 1745 0109 00a6 movwf mask 1746 010a 2919 goto delay__10 1747 010b : delay__9: 1748 ; line_number = 203 1749 ; Left minus Right 1750 010b 3010 movlw 16 1751 010c 0524 andwf raw,w 1752 ; (after recombine) true_delay=4, false_delay=4 uniform_delay=true 1753 ; CASE: true_code_size > 1 && false_code_size > 1 1754 ; true_code_size=4 false_code_size=4 1755 010d 1d03 btfss __z___byte, __z___bit 1756 010e 2914 goto delay__7 1757 ; line_number = 207 1758 ; bearing := south_bearing 1759 ; Delay at assignment is 0 1760 010f 3004 movlw 4 1761 0110 00a7 movwf bearing 1762 ; line_number = 208 1763 ; mask := south_mask 1764 ; Delay at assignment is 2 1765 0111 3010 movlw 16 1766 0112 00a6 movwf mask 1767 0113 2919 goto delay__8 1768 0114 : delay__7: 1769 ; line_number = 204 1770 ; bearing := south_west_bearing 1771 ; Delay at assignment is 0 1772 0114 3005 movlw 5 1773 0115 00a7 movwf bearing 1774 ; line_number = 205 1775 ; mask := south_west_mask 1776 ; Delay at assignment is 2 1777 0116 3020 movlw 32 1778 0117 00a6 movwf mask 1779 0118 0000 nop 1780 0119 : delay__8: 1781 ; code.delay=10 back_code.delay=0 1782 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1783 ; Uniform delay broke in relation_code_emit 1784 0119 : delay__10: 1785 ; code.delay=9 back_code.delay=0 1786 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1787 ; Uniform delay broke in relation_code_emit 1788 ; if final true delay=4 false delay=10 code delay=9 1789 ; line_number = 200 1790 ; if raw & east_pin_mask != 0 done 1791 0119 0000 nop 1792 011a : delay__14: 1793 ; code.delay=15 back_code.delay=0 1794 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1795 ; Uniform delay broke in relation_code_emit 1796 011a : delay__22: 1797 ; code.delay=19 back_code.delay=0 1798 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1799 ; Uniform delay broke in relation_code_emit 1800 ; if final true delay=9 false delay=15 code delay=19 1801 ; line_number = 189 1802 ; if raw & north_pin_mask != 0 done 1803 ; # Deal with interrupts: 1804 ; line_number = 220 1805 ; if interrupts & mask != 0 start 1806 ; Delay at if is 19 1807 ; Left minus Right 1808 011a 0825 movf interrupts,w 1809 011b 0526 andwf mask,w 1810 ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true 1811 ; CASE: true_code.size=0 && false_code.size=1 1812 011c 1d03 btfss __z___byte, __z___bit 1813 ; line_number = 221 1814 ; interrupt_pending := 1 1815 ; Delay at assignment is 0 1816 011d 155f bsf interrupt_pending___byte, interrupt_pending___bit 1817 ; code.delay=23 back_code.delay=0 1818 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1819 ; Uniform delay broke in relation_code_emit 1820 ; if final true delay=1 false delay=0 code delay=23 1821 ; line_number = 220 1822 ; if interrupts & mask != 0 done 1823 ; line_number = 222 1824 ; if interrupt_enable && interrupt_pending start 1825 ; Delay at if is 23 1826 ; (after recombine) true_delay=5, false_delay=2 uniform_delay=true 1827 ; CASE: true.size>1 false.size=1; false=GOTO 1828 ; Uniform delay 1829 011e 19df btfsc interrupt_enable___byte, interrupt_enable___bit 1830 011f 2923 goto delay__28 1831 0120 2929 goto delay__25 1832 ; Delay 2 cycles 1833 0121 2922 goto delay__30 1834 0122 : delay__30: 1835 0122 2929 goto delay__29 1836 0123 : delay__28: 1837 ; &&||: index=1 true_delay=2 false_delay=0 goto_delay=2 1838 ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true 1839 ; CASE: true_code.size = 0 && false_code.size > 1 1840 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) 1841 0123 195f btfsc interrupt_pending___byte, interrupt_pending___bit 1842 0124 2927 goto delay__26 1843 ; Delay 1 cycles 1844 0125 0000 nop 1845 0126 2929 goto delay__27 1846 0127 : delay__26: 1847 ; line_number = 223 1848 ; serial_out := 0 1849 ; Delay at assignment is 0 1850 0127 1105 bcf serial_out___byte, serial_out___bit 1851 ; line_number = 224 1852 ; interrupt_enable := 0 1853 ; Delay at assignment is 1 1854 0128 11df bcf interrupt_enable___byte, interrupt_enable___bit 1855 1856 1857 0129 : delay__27: 1858 0129 : delay__25: 1859 ; code.delay=5 back_code.delay=0 1860 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) 1861 ; &&||: index=0 true_delay=2 false_delay=0 goto_delay=2 1862 ; &&||:: index=0 new_delay=5 goto_delay=2 1863 0129 : delay__29: 1864 ; code.delay=4294967295 back_code.delay=0 1865 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) 1866 ; if final true delay=2 false delay=0 code delay=23 1867 ; line_number = 222 1868 ; if interrupt_enable && interrupt_pending done 1869 ; delay after procedure statements=23 1870 ; Delay 108 cycles 1871 ; Delay loop takes 27 * 4 = 108 cycles 1872 0129 301b movlw 27 1873 012a : delay__31: 1874 012a 3eff addlw 255 1875 012b 1d03 btfss __z___byte, __z___bit 1876 012c 292a goto delay__31 1877 ; Implied return 1878 012d 3400 retlw 0 1879 ; Final delay = 133 1880 1881 1882 1883 1884 ; line_number = 227 1885 ; constant zero8 = "\0,0,0,0,0,0,0,0\" 1886 ; zero8 = '\0,0,0,0,0,0,0,0\' 1887 ; line_number = 228 1888 ; constant module_name = "\9\Compass8D" 1889 ; module_name = '\9\Compass8D' 1890 ; line_number = 229 1891 ; constant vendor_name = "\15\Gramlich&Benson" 1892 ; vendor_name = '\15\Gramlich&Benson' 1893 1894 ; line_number = 231 1895 ; string id = "\1,0,22,0,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start 1896 ; id = '\1,0,22,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,9\Compass8D\15\Gramlich&Benson' 1897 012e : id: 1898 ; Temporarily save index into FSR 1899 012e 0084 movwf __fsr 1900 ; Initialize PCLATH to point to this code page 1901 012f 3001 movlw id___base>>8 1902 0130 008a movwf __pclath 1903 ; Restore index from FSR 1904 0131 0804 movf __fsr,w 1905 0132 3e34 addlw id___base 1906 ; Index to the correct return value 1907 0133 0082 movwf __pcl 1908 ; page_group 50 1909 0134 : id___base: 1910 0134 3401 retlw 1 1911 0135 3400 retlw 0 1912 0136 3416 retlw 22 1913 0137 3400 retlw 0 1914 0138 3400 retlw 0 1915 0139 3400 retlw 0 1916 013a 3400 retlw 0 1917 013b 3400 retlw 0 1918 013c 3400 retlw 0 1919 013d 3400 retlw 0 1920 013e 3400 retlw 0 1921 013f 3400 retlw 0 1922 0140 3400 retlw 0 1923 0141 3400 retlw 0 1924 0142 3400 retlw 0 1925 0143 3400 retlw 0 1926 0144 3400 retlw 0 1927 0145 3400 retlw 0 1928 0146 3400 retlw 0 1929 0147 3400 retlw 0 1930 0148 3400 retlw 0 1931 0149 3400 retlw 0 1932 014a 3400 retlw 0 1933 014b 3400 retlw 0 1934 014c 3409 retlw 9 1935 014d 3443 retlw 67 1936 014e 346f retlw 111 1937 014f 346d retlw 109 1938 0150 3470 retlw 112 1939 0151 3461 retlw 97 1940 0152 3473 retlw 115 1941 0153 3473 retlw 115 1942 0154 3438 retlw 56 1943 0155 3444 retlw 68 1944 0156 340f retlw 15 1945 0157 3447 retlw 71 1946 0158 3472 retlw 114 1947 0159 3461 retlw 97 1948 015a 346d retlw 109 1949 015b 346c retlw 108 1950 015c 3469 retlw 105 1951 015d 3463 retlw 99 1952 015e 3468 retlw 104 1953 015f 3426 retlw 38 1954 0160 3442 retlw 66 1955 0161 3465 retlw 101 1956 0162 346e retlw 110 1957 0163 3473 retlw 115 1958 0164 346f retlw 111 1959 0165 346e retlw 110 1960 ; line_number = 231 1961 ; string id = "\1,0,22,0,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start 1962 1963 1964 ; Appending 2 delayed procedures to code bank 0 1965 ; buffer = 'bit_bang' 1966 ; line_number = 33 1967 ; procedure byte_get 1968 0166 : byte_get: 1969 ; arguments_none 1970 ; line_number = 35 1971 ; returns byte 1972 1973 ; # This procedure will wait for a byte to be received from 1974 ; # serial_in_bit. It calls the delay procedure for all delays. 1975 ; # This procedure will keep calling the {delay} routine until 1976 ; # data is received. 1977 1978 ; line_number = 42 1979 ; local count byte 1980 00000020 = byte_get__count equ shared___globals 1981 ; line_number = 43 1982 ; local byte byte 1983 00000021 = byte_get__byte equ shared___globals+1 1984 1985 ; # Why does the delay procedure wait for a third of bit? Well, it 1986 ; # has to do with the loop immediately below. If we catch the 1987 ; # start bit at the beginning of a 1/3 bit time, we will be 1988 ; # sampling data at approximately 1/3 of the way into each bit. 1989 ; # Conversely, if we catch the start near the end of a 1/3 bit 1990 ; # bit time, we will be sampling data at approximately 2/3 of the 1991 ; # way into each bit. So, what this means is that our bit sample 1992 ; # times will be somewhere between 1/3 and 2/3 of bit (i.e. in 1993 ; # the middle of the bit. 1994 1995 ; # It would be nice to tweak the code to shorter delay times 1996 ; # (1/4 bit, 1/5 bit, etc.) but then it gets too hard to get 1997 ; # the bookeeping done in the delay routine. A PIC running at 1998 ; # 4MHz (=1MIPS), only has 138 instructions available for the 1999 ; # delay routine when at 1/3 of bit. 2000 2001 ; # Wait for a start bit: 2002 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) 2003 ; line_number = 62 2004 ; waiting := 1 2005 0166 14df bsf waiting___byte, waiting___bit 2006 ; line_number = 63 2007 ; receiving := 1 2008 0167 145f bsf receiving___byte, receiving___bit 2009 ; line_number = 64 2010 ; while serial_in start 2011 0168 : byte_get__1: 2012 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 2013 ; CASE: true_code.size = 0 && false_code.size > 1 2014 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) 2015 0168 1d85 btfss serial_in___byte, serial_in___bit 2016 0169 296c goto byte_get__2 2017 ; line_number = 65 2018 ; delay instructions_per_delay - 3 start 2019 ; Delay expression evaluates to 135 2020 ; line_number = 66 2021 ; call delay() 2022 ; Delay at call is 0 2023 016a 20bc call delay 2024 ; line_number = 65 2025 ; delay instructions_per_delay - 3 done 2026 016b 2968 goto byte_get__1 2027 ; Recombine size1 = 0 || size2 = 0 2028 016c : byte_get__2: 2029 ; code.delay=4294967295 back_code.delay=4294967295 2030 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) 2031 ; line_number = 64 2032 ; while serial_in done 2033 ; line_number = 67 2034 ; waiting := 0 2035 016c 10df bcf waiting___byte, waiting___bit 2036 2037 ; # Clear out any preceeding interrupt condition: 2038 ; line_number = 70 2039 ; serial_out := 1 2040 016d 1505 bsf serial_out___byte, serial_out___bit 2041 2042 ; # Skip over start bit: 2043 ; line_number = 73 2044 ; delay instructions_per_bit - 2 start 2045 ; Delay expression evaluates to 414 2046 ; # There are two instructions of set-up for following loop_exactly: 2047 ; line_number = 75 2048 ; call delay() 2049 ; Delay at call is 0 2050 016e 20bc call delay 2051 ; line_number = 76 2052 ; call delay() 2053 ; Delay at call is 135 2054 016f 20bc call delay 2055 ; line_number = 77 2056 ; call delay() 2057 ; Delay at call is 270 2058 0170 20bc call delay 2059 ; line_number = 78 2060 ; byte := 0 2061 ; Delay at assignment is 405 2062 0171 3000 movlw 0 2063 0172 00a1 movwf byte_get__byte 2064 2065 ; Delay 7 cycles 2066 0173 2974 goto byte_get__3 2067 0174 : byte_get__3: 2068 0174 2975 goto byte_get__4 2069 0175 : byte_get__4: 2070 0175 2976 goto byte_get__5 2071 0176 : byte_get__5: 2072 0176 0000 nop 2073 ; line_number = 73 2074 ; delay instructions_per_bit - 2 done 2075 ; # Read in 8 bits of data: 2076 ; line_number = 81 2077 ; loop_exactly 8 start 2078 00000035 = byte_get__6 equ shared___globals+21 2079 0177 3008 movlw 8 2080 0178 00b5 movwf byte_get__6 2081 0179 : byte_get__7: 2082 ; # There are 3 instrucitons of loop_exactly overhead: 2083 ; line_number = 83 2084 ; delay instructions_per_bit - 3 start 2085 ; Delay expression evaluates to 413 2086 ; line_number = 84 2087 ; call delay() 2088 ; Delay at call is 0 2089 0179 20bc call delay 2090 ; line_number = 85 2091 ; byte := byte >> 1 2092 ; Delay at assignment is 135 2093 ; Assignment of variable to self (no code needed) 2094 017a 0ca1 rrf byte_get__byte,f 2095 017b 13a1 bcf byte_get__byte, 7 2096 ; line_number = 86 2097 ; if serial_in start 2098 ; Delay at if is 137 2099 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true 2100 ; CASE: True.size=1 False.size=0 2101 017c 1985 btfsc serial_in___byte, serial_in___bit 2102 ; line_number = 87 2103 ; byte@7 := 1 2104 ; Delay at assignment is 0 2105 00000021 = byte_get__select__8___byte equ byte_get__byte 2106 00000007 = byte_get__select__8___bit equ 7 2107 017d 17a1 bsf byte_get__select__8___byte, byte_get__select__8___bit 2108 ; code.delay=139 back_code.delay=0 2109 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) 2110 ; if final true delay=1 false delay=0 code delay=139 2111 ; line_number = 86 2112 ; if serial_in done 2113 ; line_number = 88 2114 ; call delay() 2115 ; Delay at call is 139 2116 017e 20bc call delay 2117 ; line_number = 89 2118 ; call delay() 2119 ; Delay at call is 274 2120 017f 20bc call delay 2121 2122 ; Delay 4 cycles 2123 0180 2981 goto byte_get__9 2124 0181 : byte_get__9: 2125 0181 2982 goto byte_get__10 2126 0182 : byte_get__10: 2127 ; line_number = 83 2128 ; delay instructions_per_bit - 3 done 2129 ; line_number = 81 2130 ; loop_exactly 8 wrap-up 2131 0182 0bb5 decfsz byte_get__6,f 2132 0183 2979 goto byte_get__7 2133 ; line_number = 81 2134 ; loop_exactly 8 done 2135 ; # Skip over 2/3's of stop bit; 3 cycles for return: 2136 ; line_number = 92 2137 ; delay instructions_per_delay*2 - 3 start 2138 ; Delay expression evaluates to 273 2139 ; line_number = 93 2140 ; call delay() 2141 ; Delay at call is 0 2142 0184 20bc call delay 2143 ; line_number = 94 2144 ; call delay() 2145 ; Delay at call is 135 2146 0185 20bc call delay 2147 ; Delay 3 cycles 2148 0186 2987 goto byte_get__11 2149 0187 : byte_get__11: 2150 0187 0000 nop 2151 ; line_number = 92 2152 ; delay instructions_per_delay*2 - 3 done 2153 ; line_number = 95 2154 ; command_previous := command_last 2155 0188 0829 movf command_last,w 2156 0189 00a8 movwf command_previous 2157 ; line_number = 96 2158 ; command_last := byte 2159 018a 0821 movf byte_get__byte,w 2160 018b 00a9 movwf command_last 2161 ; line_number = 97 2162 ; serial_out := 1 2163 018c 1505 bsf serial_out___byte, serial_out___bit 2164 ; line_number = 98 2165 ; return byte start 2166 ; line_number = 98 2167 018d 0821 movf byte_get__byte,w 2168 018e 0008 return 2169 ; line_number = 98 2170 ; return byte done 2171 2172 2173 ; delay after procedure statements=non-uniform 2174 2175 2176 2177 2178 ; line_number = 101 2179 ; procedure byte_put 2180 018f : byte_put: 2181 ; Last argument is sitting in W; save into argument variable 2182 018f 00a3 movwf byte_put__byte 2183 ; delay=4294967295 2184 ; line_number = 102 2185 ; argument byte byte 2186 00000023 = byte_put__byte equ shared___globals+3 2187 ; line_number = 103 2188 ; returns_nothing 2189 2190 ; # This procedure will send {byte} to {serial_out} pin. The {delay} 2191 ; # procedure is called to provide the appropriate bit timing. 2192 2193 ; line_number = 108 2194 ; local count byte 2195 00000022 = byte_put__count equ shared___globals+2 2196 2197 ; # {receiving} will be 1 if the last get/put routine was a get. 2198 ; # Before we start transmitting a response back, we want to ensure 2199 ; # that there has been enough time to turn the line around. 2200 ; # We delay the first 1/3 of a bit to pad out the 9-2/3 bits 2201 ; # from get_byte to 10 bits. We delay another 3 bits just to 2202 ; # ensure that slow interpreters do not get overrun. 2203 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) 2204 ; line_number = 116 2205 ; sent_previous := sent_last 2206 0190 082b movf sent_last,w 2207 0191 00aa movwf sent_previous 2208 ; line_number = 117 2209 ; sent_last := byte 2210 0192 0823 movf byte_put__byte,w 2211 0193 00ab movwf sent_last 2212 ; line_number = 118 2213 ; if receiving start 2214 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 2215 ; CASE: true_code.size = 0 && false_code.size > 1 2216 ; bit_code_emit_helper1: body_code.size=4 true_test=true body_code.delay=0 (non-uniform delay) 2217 0194 1c5f btfss receiving___byte, receiving___bit 2218 0195 299c goto byte_put__3 2219 ; line_number = 119 2220 ; receiving := 0 2221 0196 105f bcf receiving___byte, receiving___bit 2222 ; # 10 = 1 + 3*3 = 3-1/3 extra bits of delay: 2223 ; line_number = 121 2224 ; loop_exactly 10 start 2225 00000036 = byte_put__1 equ shared___globals+22 2226 0197 300a movlw 10 2227 0198 00b6 movwf byte_put__1 2228 0199 : byte_put__2: 2229 ; line_number = 122 2230 ; call delay() 2231 0199 20bc call delay 2232 2233 ; line_number = 121 2234 ; loop_exactly 10 wrap-up 2235 019a 0bb6 decfsz byte_put__1,f 2236 019b 2999 goto byte_put__2 2237 ; line_number = 121 2238 ; loop_exactly 10 done 2239 ; Recombine size1 = 0 || size2 = 0 2240 019c : byte_put__3: 2241 ; code.delay=4294967295 back_code.delay=4294967295 2242 ; <=bit_code_emit@symbol; sym=receiving (data:X0=>X0 code:XX=>XX) 2243 ; line_number = 118 2244 ; if receiving done 2245 ; # Send the start bit: 2246 ; line_number = 125 2247 ; delay instructions_per_bit - 2 start 2248 ; Delay expression evaluates to 414 2249 ; # The loop_exactly setup after this is 2 instructions: 2250 ; line_number = 127 2251 ; serial_out := 0 2252 ; Delay at assignment is 0 2253 019c 1105 bcf serial_out___byte, serial_out___bit 2254 ; line_number = 128 2255 ; call delay() 2256 ; Delay at call is 1 2257 019d 20bc call delay 2258 ; line_number = 129 2259 ; call delay() 2260 ; Delay at call is 136 2261 019e 20bc call delay 2262 ; line_number = 130 2263 ; call delay() 2264 ; Delay at call is 271 2265 019f 20bc call delay 2266 2267 ; Delay 8 cycles 2268 ; Delay loop takes 2 * 4 = 8 cycles 2269 01a0 3002 movlw 2 2270 01a1 : byte_put__4: 2271 01a1 3eff addlw 255 2272 01a2 1d03 btfss __z___byte, __z___bit 2273 01a3 29a1 goto byte_put__4 2274 ; line_number = 125 2275 ; delay instructions_per_bit - 2 done 2276 ; # Send the data: 2277 ; line_number = 133 2278 ; loop_exactly 8 start 2279 00000036 = byte_put__5 equ shared___globals+22 2280 01a4 3008 movlw 8 2281 01a5 00b6 movwf byte_put__5 2282 01a6 : byte_put__6: 2283 ; # Loop_exactly overhead is 3 instructions: 2284 ; line_number = 135 2285 ; delay instructions_per_bit - 3 start 2286 ; Delay expression evaluates to 413 2287 ; line_number = 136 2288 ; if byte@0 start 2289 ; Delay at if is 0 2290 00000023 = byte_put__select__7___byte equ byte_put__byte 2291 00000000 = byte_put__select__7___bit equ 0 2292 ; (after recombine) true_delay=1, false_delay=1 uniform_delay=true 2293 ; CASE: true_size=1 && false_size=1 2294 ; SUBCASE: Double test; true, then false 2295 01a6 1823 btfsc byte_put__select__7___byte, byte_put__select__7___bit 2296 ; line_number = 137 2297 ; serial_out := 1 2298 ; Delay at assignment is 0 2299 01a7 1505 bsf serial_out___byte, serial_out___bit 2300 01a8 1c23 btfss byte_put__select__7___byte, byte_put__select__7___bit 2301 ; line_number = 139 2302 ; serial_out := 0 2303 ; Delay at assignment is 0 2304 01a9 1105 bcf serial_out___byte, serial_out___bit 2305 ; code.delay=4 back_code.delay=0 2306 ; <=bit_code_emit@symbol; sym=byte_put__select__7 (data:X0=>X0 code:XX=>XX) 2307 ; if final true delay=1 false delay=1 code delay=4 2308 ; line_number = 136 2309 ; if byte@0 done 2310 ; line_number = 140 2311 ; byte := byte >> 1 2312 ; Delay at assignment is 4 2313 ; Assignment of variable to self (no code needed) 2314 01aa 0ca3 rrf byte_put__byte,f 2315 01ab 13a3 bcf byte_put__byte, 7 2316 ; line_number = 141 2317 ; call delay() 2318 ; Delay at call is 6 2319 01ac 20bc call delay 2320 ; line_number = 142 2321 ; call delay() 2322 ; Delay at call is 141 2323 01ad 20bc call delay 2324 ; line_number = 143 2325 ; call delay() 2326 ; Delay at call is 276 2327 01ae 20bc call delay 2328 2329 ; Delay 2 cycles 2330 01af 29b0 goto byte_put__8 2331 01b0 : byte_put__8: 2332 ; line_number = 135 2333 ; delay instructions_per_bit - 3 done 2334 ; line_number = 133 2335 ; loop_exactly 8 wrap-up 2336 01b0 0bb6 decfsz byte_put__5,f 2337 01b1 29a6 goto byte_put__6 2338 ; line_number = 133 2339 ; loop_exactly 8 done 2340 ; # Send the stop bit: 2341 ; line_number = 146 2342 ; delay instructions_per_bit start 2343 ; Delay expression evaluates to 416 2344 ; line_number = 147 2345 ; serial_out := 1 2346 ; Delay at assignment is 0 2347 01b2 1505 bsf serial_out___byte, serial_out___bit 2348 ; line_number = 148 2349 ; call delay() 2350 ; Delay at call is 1 2351 01b3 20bc call delay 2352 ; line_number = 149 2353 ; call delay() 2354 ; Delay at call is 136 2355 01b4 20bc call delay 2356 ; line_number = 150 2357 ; call delay() 2358 ; Delay at call is 271 2359 01b5 20bc call delay 2360 2361 2362 ; Delay 10 cycles 2363 ; Delay loop takes 2 * 4 = 8 cycles 2364 01b6 3002 movlw 2 2365 01b7 : byte_put__9: 2366 01b7 3eff addlw 255 2367 01b8 1d03 btfss __z___byte, __z___bit 2368 01b9 29b7 goto byte_put__9 2369 01ba 29bb goto byte_put__10 2370 01bb : byte_put__10: 2371 ; line_number = 146 2372 ; delay instructions_per_bit done 2373 ; delay after procedure statements=non-uniform 2374 ; Implied return 2375 01bb 3400 retlw 0 2376 2377 2378 2379 2380 ; Configuration bits 2381 ; fill = 0x0 2382 ; bg = bg11 (0x3000) 2383 ; cpd = off (0x100) 2384 ; cp = off (0x80) 2385 ; boden = off (0x0) 2386 ; mclre = off (0x0) 2387 ; pwrte = off (0x10) 2388 ; wdte = off (0x0) 2389 ; fosc = int_no_clk (0x4) 2390 ; 12692 = 0x3194 2391 3194 = __config 12692 2392 ; Define start addresses for data regions 2393 ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 2394 ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 2395 ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 2396 end