1 radix dec 2 ; Code bank 0; Start address: 0; End address: 1023 3 0000 : org 0 4 5 ; Define start addresses for data regions 6 00000020 = shared___globals equ 32 7 00000000 = __indf equ 0 8 00000002 = __pcl equ 2 9 00000003 = __status equ 3 10 00000004 = __fsr equ 4 11 00000003 = __c___byte equ 3 12 00000000 = __c___bit equ 0 13 00000003 = __z___byte equ 3 14 00000002 = __z___bit equ 2 15 00000003 = __rp0___byte equ 3 16 00000005 = __rp0___bit equ 5 17 00000003 = __rp1___byte equ 3 18 00000006 = __rp1___bit equ 6 19 00000003 = __irp___byte equ 3 20 00000007 = __irp___bit equ 7 21 0000000a = __pclath equ 10 22 0000000a = __cb0___byte equ 10 23 00000003 = __cb0___bit equ 3 24 0000000a = __cb1___byte equ 10 25 00000004 = __cb1___bit equ 4 26 27 ; # Copyright (c) 2000-2004 by Wayne C. Gramlich & William T. Benson. 28 ; # All rights reserved. 29 30 ; buffer = 'compass8' 31 ; line_number = 6 32 ; library _pic12f629 entered 33 34 ; # Copyright (c) 2004 by Wayne C. Gramlich 35 ; # All rights reserved. 36 37 ; buffer = '_pic12f629' 38 ; line_number = 6 39 ; processor pic12f675 40 ; line_number = 7 41 ; configure_address 0x2007 42 ; line_number = 8 43 ; configure_fill 0x0 44 ; line_number = 9 45 ; configure_option bg: bg11 = 0x3000 46 ; line_number = 10 47 ; configure_option bg: bg00 = 0x0000 48 ; line_number = 11 49 ; configure_option cpd: on = 0x000 50 ; line_number = 12 51 ; configure_option cpd: off = 0x100 52 ; line_number = 13 53 ; configure_option cp: on = 0x00 54 ; line_number = 14 55 ; configure_option cp: off = 0x80 56 ; line_number = 15 57 ; configure_option boden: on = 0x40 58 ; line_number = 16 59 ; configure_option boden: off = 0x00 60 ; line_number = 17 61 ; configure_option mclre: on = 0x20 62 ; line_number = 18 63 ; configure_option mclre: off = 0x00 64 ; line_number = 19 65 ; configure_option pwrte: on = 0x00 66 ; line_number = 20 67 ; configure_option pwrte: off = 0x10 68 ; line_number = 21 69 ; configure_option wdte: on = 8 70 ; line_number = 22 71 ; configure_option wdte: off = 0 72 ; line_number = 23 73 ; configure_option fosc: rc_clk = 7 74 ; line_number = 24 75 ; configure_option fosc: rc_no_clk = 6 76 ; line_number = 25 77 ; configure_option fosc: int_clk = 5 78 ; line_number = 26 79 ; configure_option fosc: int_no_clk = 4 80 ; line_number = 27 81 ; configure_option fosc: ec = 3 82 ; line_number = 28 83 ; configure_option fosc: hs = 2 84 ; line_number = 29 85 ; configure_option fosc: xt = 1 86 ; line_number = 30 87 ; configure_option fosc: lp = 0 88 ; line_number = 31 89 ; code_bank 0x0 : 0x3ff 90 ; line_number = 32 91 ; data_bank 0x0 : 0x7f 92 ; line_number = 33 93 ; data_bank 0x80 : 0xff 94 ; line_number = 34 95 ; shared_region 0x20 : 0x5f 96 ; line_number = 35 97 ; interrupts_possible 98 ; line_number = 36 99 ; osccal_register_symbol _osccal 100 ; line_number = 37 101 ; osccal_at_address 0x3ff 102 ; line_number = 38 103 ; packages pdip=8, soic=8, dfn_s=8 104 ; line_number = 39 105 ; pin vdd, power_supply 106 ; line_number = 40 107 ; pin_bindings pdip=1, soic=1, dfn_s=1 108 ; line_number = 41 109 ; pin gp5_in, gp5_out, t1cki, osc1, clkin, gp5_unused 110 ; line_number = 42 111 ; pin_bindings pdip=2, soic=2, dfn_s=2 112 ; line_number = 43 113 ; bind_to _gpio@5 114 ; line_number = 44 115 ; or_if gp5_in _trisio 16 116 ; line_number = 45 117 ; or_if gp5_out _trisio 0 118 ; line_number = 46 119 ; pin gp4_in, gp4_out, t1g, osc2, clkout, gp4_unused 120 ; line_number = 47 121 ; pin_bindings pdip=3, soic=3, dfn_s=3 122 ; line_number = 48 123 ; bind_to _gpio@4 124 ; line_number = 49 125 ; or_if gp4_in _trisio 8 126 ; line_number = 50 127 ; or_if gp4_out _trisio 0 128 ; line_number = 51 129 ; pin gp3_in, mclr, vpp, rp3_unused 130 ; line_number = 52 131 ; pin_bindings pdip=4, soic=4, dfn_s=4 132 ; line_number = 53 133 ; bind_to _gpio@4 134 ; line_number = 54 135 ; or_if gp3_in _trisio 4 136 ; line_number = 55 137 ; pin gp2_in, gp2_out, t0cki, int, cout, gp2_unused 138 ; line_number = 56 139 ; pin_bindings pdip=5, soic=5, dfn_s=5 140 ; line_number = 57 141 ; bind_to _gpio@2 142 ; line_number = 58 143 ; or_if gp2_in _trisio 4 144 ; line_number = 59 145 ; or_if gp2_out _trisio 0 146 ; line_number = 60 147 ; pin gp1_in, gp1_out, cin_minus, gp1_unused 148 ; line_number = 61 149 ; pin_bindings pdip=6, soic=6, dfn_s=6 150 ; line_number = 62 151 ; bind_to _gpio@1 152 ; line_number = 63 153 ; or_if gp1_in _trisio 2 154 ; line_number = 64 155 ; or_if gp1_out _trisio 0 156 ; line_number = 65 157 ; pin gp0_in, gp0_out, gp0_unused 158 ; line_number = 66 159 ; pin_bindings pdip=7, soic=7, dfn_s=7 160 ; line_number = 67 161 ; bind_to _gpio@0 162 ; line_number = 68 163 ; or_if gp0_in _trisio 1 164 ; line_number = 69 165 ; or_if gp0_out _trisio 0 166 ; line_number = 70 167 ; pin vss, ground 168 ; line_number = 71 169 ; pin_bindings pdip=8, soic=8, dfn_s=8 170 171 172 ; line_number = 76 173 ; library _pic12f629_675 entered 174 ; # Copyright (c) 2004 by Wayne C. Gramlich 175 ; # All rights reserved. 176 177 ; # Shared register definitions for the PIC12F629 and PIC12F675. 178 179 ; buffer = '_pic12f629_675' 180 ; line_number = 7 181 ; register _indf = 182 00000000 = _indf equ 0 183 184 ; line_number = 9 185 ; register _tmr0 = 186 00000001 = _tmr0 equ 1 187 188 ; line_number = 11 189 ; register _pcl = 190 00000002 = _pcl equ 2 191 192 ; line_number = 13 193 ; register _status = 194 00000003 = _status equ 3 195 ; line_number = 14 196 ; bind _rp0 = _status@5 197 00000003 = _rp0___byte equ _status 198 00000005 = _rp0___bit equ 5 199 ; line_number = 15 200 ; bind _to = _status@4 201 00000003 = _to___byte equ _status 202 00000004 = _to___bit equ 4 203 ; line_number = 16 204 ; bind _pd = _status@3 205 00000003 = _pd___byte equ _status 206 00000003 = _pd___bit equ 3 207 ; line_number = 17 208 ; bind _z = _status@2 209 00000003 = _z___byte equ _status 210 00000002 = _z___bit equ 2 211 ; line_number = 18 212 ; bind _dc = _status@1 213 00000003 = _dc___byte equ _status 214 00000001 = _dc___bit equ 1 215 ; line_number = 19 216 ; bind _c = _status@0 217 00000003 = _c___byte equ _status 218 00000000 = _c___bit equ 0 219 220 ; line_number = 21 221 ; register _fsr = 222 00000004 = _fsr equ 4 223 224 ; line_number = 23 225 ; register _gpio = 226 00000005 = _gpio equ 5 227 ; line_number = 24 228 ; bind _gpio5 = _gpio@5 229 00000005 = _gpio5___byte equ _gpio 230 00000005 = _gpio5___bit equ 5 231 ; line_number = 25 232 ; bind _gpio4 = _gpio@4 233 00000005 = _gpio4___byte equ _gpio 234 00000004 = _gpio4___bit equ 4 235 ; line_number = 26 236 ; bind _gpio3 = _gpio@3 237 00000005 = _gpio3___byte equ _gpio 238 00000003 = _gpio3___bit equ 3 239 ; line_number = 27 240 ; bind _gpio2 = _gpio@2 241 00000005 = _gpio2___byte equ _gpio 242 00000002 = _gpio2___bit equ 2 243 ; line_number = 28 244 ; bind _gpio1 = _gpio@1 245 00000005 = _gpio1___byte equ _gpio 246 00000001 = _gpio1___bit equ 1 247 ; line_number = 29 248 ; bind _gpio0 = _gpio@0 249 00000005 = _gpio0___byte equ _gpio 250 00000000 = _gpio0___bit equ 0 251 252 ; line_number = 31 253 ; register _pclath = 254 0000000a = _pclath equ 10 255 256 ; line_number = 33 257 ; register _intcon = 258 0000000b = _intcon equ 11 259 ; line_number = 34 260 ; bind _gie = _intcon@7 261 0000000b = _gie___byte equ _intcon 262 00000007 = _gie___bit equ 7 263 ; line_number = 35 264 ; bind _peie = _intcon@6 265 0000000b = _peie___byte equ _intcon 266 00000006 = _peie___bit equ 6 267 ; line_number = 36 268 ; bind _t0ie = _intcon@5 269 0000000b = _t0ie___byte equ _intcon 270 00000005 = _t0ie___bit equ 5 271 ; line_number = 37 272 ; bind _inte = _intcon@4 273 0000000b = _inte___byte equ _intcon 274 00000004 = _inte___bit equ 4 275 ; line_number = 38 276 ; bind _gpie = _intcon@3 277 0000000b = _gpie___byte equ _intcon 278 00000003 = _gpie___bit equ 3 279 ; line_number = 39 280 ; bind _t0if = _intcon@2 281 0000000b = _t0if___byte equ _intcon 282 00000002 = _t0if___bit equ 2 283 ; line_number = 40 284 ; bind _intf = _intcon@1 285 0000000b = _intf___byte equ _intcon 286 00000001 = _intf___bit equ 1 287 ; line_number = 41 288 ; bind _gpif = _intcon@0 289 0000000b = _gpif___byte equ _intcon 290 00000000 = _gpif___bit equ 0 291 292 ; line_number = 43 293 ; register _pir1 = 294 0000000c = _pir1 equ 12 295 ; line_number = 44 296 ; bind _eeif = _pir1@7 297 0000000c = _eeif___byte equ _pir1 298 00000007 = _eeif___bit equ 7 299 ; line_number = 45 300 ; bind _cmif = _pir1@3 301 0000000c = _cmif___byte equ _pir1 302 00000003 = _cmif___bit equ 3 303 ; line_number = 46 304 ; bind _tmr1if = _pir1@0 305 0000000c = _tmr1if___byte equ _pir1 306 00000000 = _tmr1if___bit equ 0 307 308 ; line_number = 48 309 ; register _tmr1l = 310 0000000e = _tmr1l equ 14 311 312 ; line_number = 50 313 ; register _tmr1h = 314 0000000f = _tmr1h equ 15 315 316 ; line_number = 52 317 ; register _t1con = 318 00000010 = _t1con equ 16 319 ; line_number = 53 320 ; bind _t1ge = _t1con@6 321 00000010 = _t1ge___byte equ _t1con 322 00000006 = _t1ge___bit equ 6 323 ; line_number = 54 324 ; bind _t1ckps1 = _t1con@5 325 00000010 = _t1ckps1___byte equ _t1con 326 00000005 = _t1ckps1___bit equ 5 327 ; line_number = 55 328 ; bind _t1ckps0 = _t1con@4 329 00000010 = _t1ckps0___byte equ _t1con 330 00000004 = _t1ckps0___bit equ 4 331 ; line_number = 56 332 ; bind _t1oscen = _t1con@3 333 00000010 = _t1oscen___byte equ _t1con 334 00000003 = _t1oscen___bit equ 3 335 ; line_number = 57 336 ; bind _t1sync = _t1con@2 337 00000010 = _t1sync___byte equ _t1con 338 00000002 = _t1sync___bit equ 2 339 ; line_number = 58 340 ; bind _tmr1cs = _t1con@1 341 00000010 = _tmr1cs___byte equ _t1con 342 00000001 = _tmr1cs___bit equ 1 343 ; line_number = 59 344 ; bind _tmr1on = _t1con@0 345 00000010 = _tmr1on___byte equ _t1con 346 00000000 = _tmr1on___bit equ 0 347 348 ; line_number = 61 349 ; register _cmcon = 350 00000019 = _cmcon equ 25 351 ; line_number = 62 352 ; bind _cout = _cmcon@6 353 00000019 = _cout___byte equ _cmcon 354 00000006 = _cout___bit equ 6 355 ; line_number = 63 356 ; bind _cinv = _cmcon@4 357 00000019 = _cinv___byte equ _cmcon 358 00000004 = _cinv___bit equ 4 359 ; line_number = 64 360 ; bind _cis = _cmcon@3 361 00000019 = _cis___byte equ _cmcon 362 00000003 = _cis___bit equ 3 363 ; line_number = 65 364 ; bind _cm2 = _cmcon@2 365 00000019 = _cm2___byte equ _cmcon 366 00000002 = _cm2___bit equ 2 367 ; line_number = 66 368 ; bind _cm1 = _cmcon@1 369 00000019 = _cm1___byte equ _cmcon 370 00000001 = _cm1___bit equ 1 371 ; line_number = 67 372 ; bind _cm0 = _cmcon@0 373 00000019 = _cm0___byte equ _cmcon 374 00000000 = _cm0___bit equ 0 375 376 ; line_number = 69 377 ; register _adcon0 = 378 0000001f = _adcon0 equ 31 379 ; line_number = 70 380 ; bind _adfm = _adcon0@7 381 0000001f = _adfm___byte equ _adcon0 382 00000007 = _adfm___bit equ 7 383 ; line_number = 71 384 ; bind _vcfg = _adcon0@6 385 0000001f = _vcfg___byte equ _adcon0 386 00000006 = _vcfg___bit equ 6 387 ; line_number = 72 388 ; bind _csh1 = _adcon0@3 389 0000001f = _csh1___byte equ _adcon0 390 00000003 = _csh1___bit equ 3 391 ; line_number = 73 392 ; bind _csh0 = _adcon0@2 393 0000001f = _csh0___byte equ _adcon0 394 00000002 = _csh0___bit equ 2 395 ; line_number = 74 396 ; bind _go = _adcon0@1 397 0000001f = _go___byte equ _adcon0 398 00000001 = _go___bit equ 1 399 ; line_number = 75 400 ; bind _adon = _adcon0@0 401 0000001f = _adon___byte equ _adcon0 402 00000000 = _adon___bit equ 0 403 404 ; # Data bank 1 (0x80-0xff): 405 406 ; line_number = 79 407 ; register _option_reg = 408 00000081 = _option_reg equ 129 409 ; line_number = 80 410 ; bind _gppu = _option_reg@7 411 00000081 = _gppu___byte equ _option_reg 412 00000007 = _gppu___bit equ 7 413 ; line_number = 81 414 ; bind _intedg = _option_reg@6 415 00000081 = _intedg___byte equ _option_reg 416 00000006 = _intedg___bit equ 6 417 ; line_number = 82 418 ; bind _t0cs = _option_reg@5 419 00000081 = _t0cs___byte equ _option_reg 420 00000005 = _t0cs___bit equ 5 421 ; line_number = 83 422 ; bind _t0se = _option_reg@4 423 00000081 = _t0se___byte equ _option_reg 424 00000004 = _t0se___bit equ 4 425 ; line_number = 84 426 ; bind _psa = _option_reg@3 427 00000081 = _psa___byte equ _option_reg 428 00000003 = _psa___bit equ 3 429 ; line_number = 85 430 ; bind _ps2 = _option_reg@2 431 00000081 = _ps2___byte equ _option_reg 432 00000002 = _ps2___bit equ 2 433 ; line_number = 86 434 ; bind _ps1 = _option_reg@1 435 00000081 = _ps1___byte equ _option_reg 436 00000001 = _ps1___bit equ 1 437 ; line_number = 87 438 ; bind _ps0 = _option_reg@0 439 00000081 = _ps0___byte equ _option_reg 440 00000000 = _ps0___bit equ 0 441 442 ; line_number = 89 443 ; register _trisio = 444 00000085 = _trisio equ 133 445 ; line_number = 90 446 ; bind _trisio5 = _trisio@5 447 00000085 = _trisio5___byte equ _trisio 448 00000005 = _trisio5___bit equ 5 449 ; line_number = 91 450 ; bind _trisio4 = _trisio@4 451 00000085 = _trisio4___byte equ _trisio 452 00000004 = _trisio4___bit equ 4 453 ; line_number = 92 454 ; bind _trisio3 = _trisio@3 455 00000085 = _trisio3___byte equ _trisio 456 00000003 = _trisio3___bit equ 3 457 ; line_number = 93 458 ; bind _trisio2 = _trisio@2 459 00000085 = _trisio2___byte equ _trisio 460 00000002 = _trisio2___bit equ 2 461 ; line_number = 94 462 ; bind _trisio1 = _trisio@1 463 00000085 = _trisio1___byte equ _trisio 464 00000001 = _trisio1___bit equ 1 465 ; line_number = 95 466 ; bind _trisio0 = _trisio@0 467 00000085 = _trisio0___byte equ _trisio 468 00000000 = _trisio0___bit equ 0 469 470 ; line_number = 97 471 ; register _pie1 = 472 0000008c = _pie1 equ 140 473 ; line_number = 98 474 ; bind _eeie = _pie1@7 475 0000008c = _eeie___byte equ _pie1 476 00000007 = _eeie___bit equ 7 477 ; line_number = 99 478 ; bind _cmie = _pie1@3 479 0000008c = _cmie___byte equ _pie1 480 00000003 = _cmie___bit equ 3 481 ; line_number = 100 482 ; bind _tmr1ie = _pie1@0 483 0000008c = _tmr1ie___byte equ _pie1 484 00000000 = _tmr1ie___bit equ 0 485 486 ; line_number = 102 487 ; register _pcon = 488 0000008e = _pcon equ 142 489 ; line_number = 103 490 ; bind _por = _pcon@1 491 0000008e = _por___byte equ _pcon 492 00000001 = _por___bit equ 1 493 ; line_number = 104 494 ; bind _bor = _pcon@0 495 0000008e = _bor___byte equ _pcon 496 00000000 = _bor___bit equ 0 497 498 ; line_number = 106 499 ; register _osccal = 500 00000090 = _osccal equ 144 501 ; line_number = 107 502 ; bind _cal5 = _osccal@7 503 00000090 = _cal5___byte equ _osccal 504 00000007 = _cal5___bit equ 7 505 ; line_number = 108 506 ; bind _cal4 = _osccal@6 507 00000090 = _cal4___byte equ _osccal 508 00000006 = _cal4___bit equ 6 509 ; line_number = 109 510 ; bind _cal3 = _osccal@5 511 00000090 = _cal3___byte equ _osccal 512 00000005 = _cal3___bit equ 5 513 ; line_number = 110 514 ; bind _cal2 = _osccal@4 515 00000090 = _cal2___byte equ _osccal 516 00000004 = _cal2___bit equ 4 517 ; line_number = 111 518 ; bind _cal1 = _osccal@3 519 00000090 = _cal1___byte equ _osccal 520 00000003 = _cal1___bit equ 3 521 ; line_number = 112 522 ; bind _cal0 = _osccal@2 523 00000090 = _cal0___byte equ _osccal 524 00000002 = _cal0___bit equ 2 525 ; line_number = 113 526 ; constant _osccal_lsb = 4 527 00000004 = _osccal_lsb equ 4 528 529 ; line_number = 115 530 ; register _wpua = 531 00000095 = _wpua equ 149 532 ; line_number = 116 533 ; bind _wpua5 = _wpua@5 534 00000095 = _wpua5___byte equ _wpua 535 00000005 = _wpua5___bit equ 5 536 ; line_number = 117 537 ; bind _wpua4 = _wpua@4 538 00000095 = _wpua4___byte equ _wpua 539 00000004 = _wpua4___bit equ 4 540 ; line_number = 118 541 ; bind _wpua2 = _wpua@2 542 00000095 = _wpua2___byte equ _wpua 543 00000002 = _wpua2___bit equ 2 544 ; line_number = 119 545 ; bind _wpua1 = _wpua@1 546 00000095 = _wpua1___byte equ _wpua 547 00000001 = _wpua1___bit equ 1 548 ; line_number = 120 549 ; bind _wpua0 = _wpua@0 550 00000095 = _wpua0___byte equ _wpua 551 00000000 = _wpua0___bit equ 0 552 553 ; line_number = 122 554 ; register _ioca = 555 00000096 = _ioca equ 150 556 ; line_number = 123 557 ; bind _ioca5 = _ioca@5 558 00000096 = _ioca5___byte equ _ioca 559 00000005 = _ioca5___bit equ 5 560 ; line_number = 124 561 ; bind _ioca4 = _ioca@4 562 00000096 = _ioca4___byte equ _ioca 563 00000004 = _ioca4___bit equ 4 564 ; line_number = 125 565 ; bind _ioca3 = _ioca@3 566 00000096 = _ioca3___byte equ _ioca 567 00000003 = _ioca3___bit equ 3 568 ; line_number = 126 569 ; bind _ioca2 = _ioca@2 570 00000096 = _ioca2___byte equ _ioca 571 00000002 = _ioca2___bit equ 2 572 ; line_number = 127 573 ; bind _ioca1 = _ioca@1 574 00000096 = _ioca1___byte equ _ioca 575 00000001 = _ioca1___bit equ 1 576 ; line_number = 128 577 ; bind _ioca0 = _ioca@0 578 00000096 = _ioca0___byte equ _ioca 579 00000000 = _ioca0___bit equ 0 580 581 ; line_number = 130 582 ; register _vrcon = 583 00000099 = _vrcon equ 153 584 ; line_number = 131 585 ; bind _vren = _vrcon@7 586 00000099 = _vren___byte equ _vrcon 587 00000007 = _vren___bit equ 7 588 ; line_number = 132 589 ; bind _vrr = _vrcon@5 590 00000099 = _vrr___byte equ _vrcon 591 00000005 = _vrr___bit equ 5 592 ; line_number = 133 593 ; bind _vr3 = _vrcon@3 594 00000099 = _vr3___byte equ _vrcon 595 00000003 = _vr3___bit equ 3 596 ; line_number = 134 597 ; bind _vr2 = _vrcon@2 598 00000099 = _vr2___byte equ _vrcon 599 00000002 = _vr2___bit equ 2 600 ; line_number = 135 601 ; bind _vr1 = _vrcon@1 602 00000099 = _vr1___byte equ _vrcon 603 00000001 = _vr1___bit equ 1 604 ; line_number = 136 605 ; bind _vr0 = _vrcon@0 606 00000099 = _vr0___byte equ _vrcon 607 00000000 = _vr0___bit equ 0 608 609 ; line_number = 138 610 ; register _eedata = 611 0000009a = _eedata equ 154 612 613 ; line_number = 140 614 ; register _eeadr = 615 0000009b = _eeadr equ 155 616 617 ; line_number = 142 618 ; register _eecon1 = 619 0000009c = _eecon1 equ 156 620 ; line_number = 143 621 ; bind _wrerr = _eecon1@3 622 0000009c = _wrerr___byte equ _eecon1 623 00000003 = _wrerr___bit equ 3 624 ; line_number = 144 625 ; bind _wren = _eecon1@2 626 0000009c = _wren___byte equ _eecon1 627 00000002 = _wren___bit equ 2 628 ; line_number = 145 629 ; bind _wr = _eecon1@1 630 0000009c = _wr___byte equ _eecon1 631 00000001 = _wr___bit equ 1 632 ; line_number = 146 633 ; bind _rd = _eecon1@0 634 0000009c = _rd___byte equ _eecon1 635 00000000 = _rd___bit equ 0 636 637 ; line_number = 148 638 ; register _eecon2 = 639 0000009d = _eecon2 equ 157 640 641 642 ; buffer = '_pic12f629' 643 ; line_number = 76 644 ; library _pic12f629_675 exited 645 646 647 648 ; buffer = 'compass8' 649 ; line_number = 6 650 ; library _pic12f629 exited 651 ; line_number = 7 652 ; library clock4mhz entered 653 ; # Copyright (c) 2004 by Wayne C. Gramlich 654 ; # All rights reserved. 655 656 ; # This library defines the contstants {clock_rate}, {instruction_rate}, 657 ; # and {clocks_per_instruction}. 658 659 ; # Define processor constants: 660 ; buffer = 'clock4mhz' 661 ; line_number = 9 662 ; constant clock_rate = 4000000 663 003d0900 = clock_rate equ 4000000 664 ; line_number = 10 665 ; constant clocks_per_instruction = 4 666 00000004 = clocks_per_instruction equ 4 667 ; line_number = 11 668 ; constant instruction_rate = clock_rate / clocks_per_instruction 669 000f4240 = instruction_rate equ 1000000 670 671 672 ; buffer = 'compass8' 673 ; line_number = 7 674 ; library clock4mhz exited 675 ; line_number = 8 676 ; library bit_bang entered 677 ; # Copyright (c) 2004 by Wayne C. Gramlich 678 ; # All rights reserved. 679 680 ; # This library provides bit bang routines for sending and receiving 681 ; # serial data at 2400 baud in 8N1 format (1 start bit, 8 data bits, 682 ; # No parity bit, 1 stop stop bit.) 683 ; # 684 ; # This library requires that the pins {serial_in} and {serial_out} 685 ; # be defined. In addition, the variable {instruction_rate} needs 686 ; # to be defined. Lastly, there needs to be a {delay} procedure 687 ; # with an "exact_delay delay_instructions" clause in it. The {delay} 688 ; # routine should invoke "watch_dog_reset" so that the watch dog time 689 ; # can be set. 690 691 ; # Define some constants that we will be needing: 692 ; buffer = 'bit_bang' 693 ; line_number = 17 694 ; constant baud_rate = 2400 695 00000960 = baud_rate equ 2400 696 ; line_number = 18 697 ; constant instructions_per_bit = instruction_rate / baud_rate 698 000001a0 = instructions_per_bit equ 416 699 ; line_number = 19 700 ; constant delays_per_bit = 3 701 00000003 = delays_per_bit equ 3 702 ; line_number = 20 703 ; constant instructions_per_delay = instructions_per_bit / delays_per_bit 704 0000008a = instructions_per_delay equ 138 705 ; line_number = 21 706 ; constant extra_instructions = 5 707 00000005 = extra_instructions equ 5 708 ; line_number = 22 709 ; constant delay_instructions = instructions_per_delay - extra_instructions 710 00000085 = delay_instructions equ 133 711 712 ; # The {receiving} bit is sent when data is being received. 713 ; # It gets cleared whenever data gets sent. It is used to 714 ; # determine whether additional delay is needed to turn a 715 ; # line around for slow interpretted chips like the Basic 716 ; # Stamp 2 and the OOPIC. 717 718 ; line_number = 30 719 ; global receiving bit 720 0000005f = receiving___byte equ shared___globals+63 721 00000000 = receiving___bit equ 0 722 ; line_number = 31 723 ; global waiting bit 724 0000005f = waiting___byte equ shared___globals+63 725 00000001 = waiting___bit equ 1 726 727 ; Delaying code generation for procedure byte_get 728 ; Delaying code generation for procedure byte_put 729 730 ; buffer = 'compass8' 731 ; line_number = 8 732 ; library bit_bang exited 733 734 ; line_number = 10 735 ; package pdip 736 ; line_number = 11 737 ; pin 1 = power_supply 738 ; line_number = 12 739 ; pin 2 = gp5_out, name = serial_out 740 00000005 = serial_out___byte equ _gpio 741 00000005 = serial_out___bit equ 5 742 ; line_number = 13 743 ; pin 3 = gp4_in, name = serial_in 744 00000005 = serial_in___byte equ _gpio 745 00000004 = serial_in___bit equ 4 746 ; line_number = 14 747 ; pin 4 = gp3_in, name = south, mask = south_pin_mask 748 00000005 = south___byte equ _gpio 749 00000004 = south___bit equ 4 750 00000010 = south_pin_mask equ 16 751 ; line_number = 15 752 ; pin 5 = gp2_in, name = west, mask = west_pin_mask 753 00000005 = west___byte equ _gpio 754 00000002 = west___bit equ 2 755 00000004 = west_pin_mask equ 4 756 ; line_number = 16 757 ; pin 6 = gp1_in, name = east, mask = east_pin_mask 758 00000005 = east___byte equ _gpio 759 00000001 = east___bit equ 1 760 00000002 = east_pin_mask equ 2 761 ; line_number = 17 762 ; pin 7 = gp0_in, name = north, mask = north_pin_mask 763 00000005 = north___byte equ _gpio 764 00000000 = north___bit equ 0 765 00000001 = north_pin_mask equ 1 766 ; line_number = 18 767 ; pin 8 = ground 768 769 ; line_number = 20 770 ; constant port_mask = north_pin_mask | east_pin_mask | south_pin_mask | west_pin_mask 771 00000017 = port_mask equ 23 772 773 ; # Bearing constants: 774 ; line_number = 24 775 ; constant north_bearing = 0 776 00000000 = north_bearing equ 0 777 ; line_number = 25 778 ; constant north_east_bearing = 1 779 00000001 = north_east_bearing equ 1 780 ; line_number = 26 781 ; constant east_bearing = 2 782 00000002 = east_bearing equ 2 783 ; line_number = 27 784 ; constant south_east_bearing = 3 785 00000003 = south_east_bearing equ 3 786 ; line_number = 28 787 ; constant south_bearing = 4 788 00000004 = south_bearing equ 4 789 ; line_number = 29 790 ; constant south_west_bearing = 5 791 00000005 = south_west_bearing equ 5 792 ; line_number = 30 793 ; constant west_bearing = 6 794 00000006 = west_bearing equ 6 795 ; line_number = 31 796 ; constant north_west_bearing = 7 797 00000007 = north_west_bearing equ 7 798 799 ; # Bearing mask constants: 800 ; line_number = 34 801 ; constant north_mask = 1 << north_bearing 802 00000001 = north_mask equ 1 803 ; line_number = 35 804 ; constant north_east_mask = 1 << north_east_bearing 805 00000002 = north_east_mask equ 2 806 ; line_number = 36 807 ; constant east_mask = 1 << east_bearing 808 00000004 = east_mask equ 4 809 ; line_number = 37 810 ; constant south_east_mask = 1 << south_east_bearing 811 00000008 = south_east_mask equ 8 812 ; line_number = 38 813 ; constant south_mask = 1 << south_bearing 814 00000010 = south_mask equ 16 815 ; line_number = 39 816 ; constant south_west_mask = 1 << south_west_bearing 817 00000020 = south_west_mask equ 32 818 ; line_number = 40 819 ; constant west_mask = 1 << west_bearing 820 00000040 = west_mask equ 64 821 ; line_number = 41 822 ; constant north_west_mask = 1 << north_west_bearing 823 00000080 = north_west_mask equ 128 824 825 ; # Global variables go here: 826 ; line_number = 44 827 ; global raw byte 828 00000024 = raw equ shared___globals+4 829 ; line_number = 45 830 ; global interrupts byte 831 00000025 = interrupts equ shared___globals+5 832 ; line_number = 46 833 ; global mask byte 834 00000026 = mask equ shared___globals+6 835 ; line_number = 47 836 ; global bearing byte 837 00000027 = bearing equ shared___globals+7 838 839 ; # Interrupt and shaft direction bits: 840 ; line_number = 50 841 ; global interrupt_pending bit 842 0000005f = interrupt_pending___byte equ shared___globals+63 843 00000002 = interrupt_pending___bit equ 2 844 ; line_number = 51 845 ; global interrupt_enable bit 846 0000005f = interrupt_enable___byte equ shared___globals+63 847 00000003 = interrupt_enable___bit equ 3 848 849 ; line_number = 53 850 ; global command_previous byte 851 00000028 = command_previous equ shared___globals+8 852 ; line_number = 54 853 ; global command_last byte 854 00000029 = command_last equ shared___globals+9 855 ; line_number = 55 856 ; global sent_previous byte 857 0000002a = sent_previous equ shared___globals+10 858 ; line_number = 56 859 ; global sent_last byte 860 0000002b = sent_last equ shared___globals+11 861 862 ; line_number = 58 863 ; procedure main 864 0000 : main: 865 ; Need to calibrate the oscillator 866 0000 23ff call 1023 867 0001 1683 bsf __rp0___byte, __rp0___bit 868 0002 0090 movwf _osccal 869 ; Initialize some registers 870 0003 300f movlw 15 871 0004 0085 movwf _trisio 872 ; arguments_none 873 ; line_number = 60 874 ; returns_nothing 875 876 ; line_number = 62 877 ; local command byte 878 0000002c = main__command equ shared___globals+12 879 ; line_number = 63 880 ; local glitch byte 881 0000002d = main__glitch equ shared___globals+13 882 ; line_number = 64 883 ; local id_index byte 884 0000002e = main__id_index equ shared___globals+14 885 ; line_number = 65 886 ; local high byte 887 0000002f = main__high equ shared___globals+15 888 ; line_number = 66 889 ; local index byte 890 00000030 = main__index equ shared___globals+16 891 ; line_number = 67 892 ; local result byte 893 00000031 = main__result equ shared___globals+17 894 ; line_number = 68 895 ; local temp byte 896 00000032 = main__temp equ shared___globals+18 897 898 ; # Initialize everything: 899 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) 900 ; line_number = 71 901 ; interrupts := 0 902 0005 3000 movlw 0 903 0006 1283 bcf __rp0___byte, __rp0___bit 904 0007 00a5 movwf interrupts 905 ; line_number = 72 906 ; interrupt_enable := 0 907 0008 11df bcf interrupt_enable___byte, interrupt_enable___bit 908 ; line_number = 73 909 ; interrupt_pending := 0 910 0009 115f bcf interrupt_pending___byte, interrupt_pending___bit 911 ; line_number = 74 912 ; glitch := 0 913 000a 3000 movlw 0 914 000b 00ad movwf main__glitch 915 ; line_number = 75 916 ; id_index := 0 917 000c 3000 movlw 0 918 000d 00ae movwf main__id_index 919 920 ; # Loop waiting for commands: 921 ; line_number = 78 922 ; loop_forever start 923 000e : main__1: 924 ; # Get a command byte: 925 ; line_number = 80 926 ; command := byte_get() 927 000e 2165 call byte_get 928 000f 00ac movwf main__command 929 930 ; # Dispatch on command: 931 ; line_number = 83 932 ; switch command >> 6 start 933 0010 3000 movlw main__47>>8 934 0011 008a movwf __pclath 935 00000034 = main__48 equ shared___globals+20 936 0012 0e2c swapf main__command,w 937 0013 00b4 movwf main__48 938 0014 0cb4 rrf main__48,f 939 0015 0c34 rrf main__48,w 940 0016 3903 andlw 3 941 0017 3e19 addlw main__47 942 0018 0082 movwf __pcl 943 ; page_group 4 944 0019 : main__47: 945 0019 281d goto main__44 946 001a 284a goto main__45 947 001b 284a goto main__45 948 001c 284b goto main__46 949 ; line_number = 84 950 ; case 0 951 001d : main__44: 952 ; # Command = 00xx xxxx: 953 ; line_number = 86 954 ; switch (command >> 3) & 7 start 955 001d 3000 movlw main__11>>8 956 001e 008a movwf __pclath 957 00000034 = main__12 equ shared___globals+20 958 001f 0c2c rrf main__command,w 959 0020 00b4 movwf main__12 960 0021 0cb4 rrf main__12,f 961 0022 0c34 rrf main__12,w 962 0023 3907 andlw 7 963 0024 3e26 addlw main__11 964 0025 0082 movwf __pcl 965 ; page_group 8 966 0026 : main__11: 967 0026 282e goto main__9 968 0027 2849 goto main__10 969 0028 2849 goto main__10 970 0029 2849 goto main__10 971 002a 2849 goto main__10 972 002b 2849 goto main__10 973 002c 2849 goto main__10 974 002d 2849 goto main__10 975 ; line_number = 87 976 ; case 0 977 002e : main__9: 978 ; # Command = 0000 0xxx: 979 ; line_number = 89 980 ; switch command & 7 start 981 002e 3000 movlw main__7>>8 982 002f 008a movwf __pclath 983 0030 3007 movlw 7 984 0031 052c andwf main__command,w 985 0032 3e34 addlw main__7 986 0033 0082 movwf __pcl 987 ; page_group 8 988 0034 : main__7: 989 0034 283c goto main__2 990 0035 283f goto main__3 991 0036 2842 goto main__4 992 0037 2845 goto main__5 993 0038 2848 goto main__6 994 0039 2848 goto main__6 995 003a 2848 goto main__6 996 003b 2848 goto main__6 997 ; line_number = 90 998 ; case 0 999 003c : main__2: 1000 ; # Read Bearing (Command = 0000 0000): 1001 ; line_number = 92 1002 ; call byte_put(bearing) 1003 003c 0827 movf bearing,w 1004 003d 218e call byte_put 1005 003e 2848 goto main__8 1006 ; line_number = 93 1007 ; case 1 1008 003f : main__3: 1009 ; # Read Interrupt Mask (Command = 0000 0001): 1010 ; line_number = 95 1011 ; call byte_put(interrupts) 1012 003f 0825 movf interrupts,w 1013 0040 218e call byte_put 1014 0041 2848 goto main__8 1015 ; line_number = 96 1016 ; case 2 1017 0042 : main__4: 1018 ; # Read Raw (Command = 0000 0010): 1019 ; line_number = 98 1020 ; call byte_put(raw) 1021 0042 0824 movf raw,w 1022 0043 218e call byte_put 1023 0044 2848 goto main__8 1024 ; line_number = 99 1025 ; case 3 1026 0045 : main__5: 1027 ; # Set Intterupt Mask (Command = 0000 0011): 1028 ; line_number = 101 1029 ; interrupts := byte_get() 1030 0045 2165 call byte_get 1031 0046 00a5 movwf interrupts 1032 0047 2848 goto main__8 1033 ; line_number = 102 1034 ; case 4, 5, 6, 7 1035 0048 : main__6: 1036 ; line_number = 103 1037 ; do_nothing 1038 0048 : main__8: 1039 ; switch end:(data:X0=>X? code:XX=>XX) 1040 ; line_number = 89 1041 ; switch command & 7 done 1042 0048 2849 goto main__13 1043 ; line_number = 104 1044 ; case 1, 2, 3, 4, 5, 6, 7 1045 0049 : main__10: 1046 ; line_number = 105 1047 ; do_nothing 1048 0049 : main__13: 1049 ; switch end:(data:X0=>X? code:XX=>XX) 1050 ; line_number = 86 1051 ; switch (command >> 3) & 7 done 1052 0049 28b9 goto main__49 1053 ; line_number = 106 1054 ; case 1, 2 1055 004a : main__45: 1056 ; # Command = 01xx xxxx or10xx xxxx: 1057 ; line_number = 108 1058 ; do_nothing 1059 004a 28b9 goto main__49 1060 ; line_number = 109 1061 ; case 3 1062 004b : main__46: 1063 ; # Command = 11xx xxxx: 1064 ; line_number = 111 1065 ; switch (command >> 3) & 7 start 1066 004b 3000 movlw main__41>>8 1067 004c 008a movwf __pclath 1068 00000034 = main__42 equ shared___globals+20 1069 004d 0c2c rrf main__command,w 1070 004e 00b4 movwf main__42 1071 004f 0cb4 rrf main__42,f 1072 0050 0c34 rrf main__42,w 1073 0051 3907 andlw 7 1074 0052 3e54 addlw main__41 1075 0053 0082 movwf __pcl 1076 ; page_group 8 1077 0054 : main__41: 1078 0054 28b9 goto main__43 1079 0055 28b9 goto main__43 1080 0056 28b9 goto main__43 1081 0057 28b9 goto main__43 1082 0058 28b9 goto main__43 1083 0059 285c goto main__38 1084 005a 286a goto main__39 1085 005b 2883 goto main__40 1086 ; line_number = 112 1087 ; case 5 1088 005c : main__38: 1089 ; # Command = 1110 1xxx: 1090 ; line_number = 114 1091 ; if (command & 7) = 7 start 1092 ; Left minus Right 1093 005c 3007 movlw 7 1094 005d 052c andwf main__command,w 1095 005e 3ef9 addlw 249 1096 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1097 ; CASE: true_code.size = 0 && false_code.size > 1 1098 ; bit_code_emit_helper1: body_code.size=8 true_test=true body_code.delay=0 (non-uniform delay) 1099 005f 1d03 btfss __z___byte, __z___bit 1100 0060 2869 goto main__16 1101 ; # Return Interrupt Bits (Command = 1110 1111): 1102 ; line_number = 116 1103 ; result := 0 1104 0061 3000 movlw 0 1105 0062 00b1 movwf main__result 1106 ; line_number = 117 1107 ; if interrupt_enable start 1108 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1109 ; CASE: True.size=1 False.size=0 1110 0063 19df btfsc interrupt_enable___byte, interrupt_enable___bit 1111 ; line_number = 118 1112 ; result@1 := 1 1113 00000031 = main__select__14___byte equ main__result 1114 00000001 = main__select__14___bit equ 1 1115 0064 14b1 bsf main__select__14___byte, main__select__14___bit 1116 ; Recombine size1 = 0 || size2 = 0 1117 ; code.delay=4294967295 back_code.delay=4294967295 1118 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) 1119 ; line_number = 117 1120 ; if interrupt_enable done 1121 ; line_number = 119 1122 ; if interrupt_pending start 1123 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1124 ; CASE: True.size=1 False.size=0 1125 0065 195f btfsc interrupt_pending___byte, interrupt_pending___bit 1126 ; line_number = 120 1127 ; result@0 := 1 1128 00000031 = main__select__15___byte equ main__result 1129 00000000 = main__select__15___bit equ 0 1130 0066 1431 bsf main__select__15___byte, main__select__15___bit 1131 ; Recombine size1 = 0 || size2 = 0 1132 ; code.delay=4294967295 back_code.delay=4294967295 1133 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) 1134 ; line_number = 119 1135 ; if interrupt_pending done 1136 ; line_number = 121 1137 ; call byte_put(result) 1138 0067 0831 movf main__result,w 1139 0068 218e call byte_put 1140 ; Recombine size1 = 0 || size2 = 0 1141 0069 : main__16: 1142 ; code.delay=4294967295 back_code.delay=4294967295 1143 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1144 ; line_number = 114 1145 ; if (command & 7) = 7 done 1146 0069 28b9 goto main__43 1147 ; line_number = 122 1148 ; case 6 1149 006a : main__39: 1150 ; # Shared Interrupt commands. 1151 ; line_number = 124 1152 ; switch (command >> 1) & 3 start 1153 006a 3000 movlw main__24>>8 1154 006b 008a movwf __pclath 1155 00000034 = main__25 equ shared___globals+20 1156 006c 0c2c rrf main__command,w 1157 006d 3903 andlw 3 1158 006e 3e70 addlw main__24 1159 006f 0082 movwf __pcl 1160 ; page_group 4 1161 0070 : main__24: 1162 0070 2874 goto main__21 1163 0071 2874 goto main__21 1164 0072 287b goto main__22 1165 0073 287f goto main__23 1166 ; line_number = 125 1167 ; case 0, 1 1168 0074 : main__21: 1169 ; # Set Interrupt Bits (Command = 1110 00ep): 1170 ; line_number = 127 1171 ; interrupt_enable := command@1 1172 0074 11df bcf interrupt_enable___byte, interrupt_enable___bit 1173 0000002c = main__select__17___byte equ main__command 1174 00000001 = main__select__17___bit equ 1 1175 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1176 ; CASE: True.size=1 False.size=0 1177 0075 18ac btfsc main__select__17___byte, main__select__17___bit 1178 0076 15df bsf interrupt_enable___byte, interrupt_enable___bit 1179 ; Recombine size1 = 0 || size2 = 0 1180 ; code.delay=4294967295 back_code.delay=4294967295 1181 ; <=bit_code_emit@symbol; sym=main__select__17 (data:X0=>X0 code:XX=>XX) 1182 ; line_number = 128 1183 ; interrupt_pending := command@0 1184 0077 115f bcf interrupt_pending___byte, interrupt_pending___bit 1185 0000002c = main__select__18___byte equ main__command 1186 00000000 = main__select__18___bit equ 0 1187 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1188 ; CASE: True.size=1 False.size=0 1189 0078 182c btfsc main__select__18___byte, main__select__18___bit 1190 0079 155f bsf interrupt_pending___byte, interrupt_pending___bit 1191 ; Recombine size1 = 0 || size2 = 0 1192 ; code.delay=4294967295 back_code.delay=4294967295 1193 ; <=bit_code_emit@symbol; sym=main__select__18 (data:X0=>X0 code:XX=>XX) 1194 007a 2882 goto main__26 1195 ; line_number = 129 1196 ; case 2 1197 007b : main__22: 1198 ; # Set Interrupt Pending (Command = 1110 010p): 1199 ; line_number = 131 1200 ; interrupt_pending := command@0 1201 007b 115f bcf interrupt_pending___byte, interrupt_pending___bit 1202 0000002c = main__select__19___byte equ main__command 1203 00000000 = main__select__19___bit equ 0 1204 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1205 ; CASE: True.size=1 False.size=0 1206 007c 182c btfsc main__select__19___byte, main__select__19___bit 1207 007d 155f bsf interrupt_pending___byte, interrupt_pending___bit 1208 ; Recombine size1 = 0 || size2 = 0 1209 ; code.delay=4294967295 back_code.delay=4294967295 1210 ; <=bit_code_emit@symbol; sym=main__select__19 (data:X0=>X0 code:XX=>XX) 1211 007e 2882 goto main__26 1212 ; line_number = 132 1213 ; case 3 1214 007f : main__23: 1215 ; # Set Interrupt Enable (Command = 1110 011e): 1216 ; line_number = 134 1217 ; interrupt_enable := command@0 1218 007f 11df bcf interrupt_enable___byte, interrupt_enable___bit 1219 0000002c = main__select__20___byte equ main__command 1220 00000000 = main__select__20___bit equ 0 1221 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1222 ; CASE: True.size=1 False.size=0 1223 0080 182c btfsc main__select__20___byte, main__select__20___bit 1224 0081 15df bsf interrupt_enable___byte, interrupt_enable___bit 1225 ; Recombine size1 = 0 || size2 = 0 1226 ; code.delay=4294967295 back_code.delay=4294967295 1227 ; <=bit_code_emit@symbol; sym=main__select__20 (data:X0=>X0 code:XX=>XX) 1228 0082 : main__26: 1229 ; switch end:(data:X0=>X0 code:XX=>XX) 1230 ; line_number = 124 1231 ; switch (command >> 1) & 3 done 1232 0082 28b9 goto main__43 1233 ; line_number = 135 1234 ; case 7 1235 0083 : main__40: 1236 ; # Shared commands (Command = 1111 1ccc): 1237 ; line_number = 137 1238 ; switch command & 7 start 1239 0083 3000 movlw main__36>>8 1240 0084 008a movwf __pclath 1241 0085 3007 movlw 7 1242 0086 052c andwf main__command,w 1243 0087 3e89 addlw main__36 1244 0088 0082 movwf __pcl 1245 ; page_group 8 1246 0089 : main__36: 1247 0089 2891 goto main__28 1248 008a 2895 goto main__29 1249 008b 2899 goto main__30 1250 008c 289e goto main__31 1251 008d 28a1 goto main__32 1252 008e 28ae goto main__33 1253 008f 28b1 goto main__34 1254 0090 28b6 goto main__35 1255 ; line_number = 138 1256 ; case 0 1257 0091 : main__28: 1258 ; This case body wants this bit set 1259 0091 1683 bsf __rp0___byte, __rp0___bit 1260 ; # Clock Decrement (Command = 1111 1000): 1261 ; line_number = 140 1262 ; _osccal := _osccal - _osccal_lsb 1263 0092 30fc movlw 252 1264 0093 0790 addwf _osccal,f 1265 0094 28b9 goto main__37 1266 ; line_number = 141 1267 ; case 1 1268 0095 : main__29: 1269 ; This case body wants this bit set 1270 0095 1683 bsf __rp0___byte, __rp0___bit 1271 ; # Clock Increment (Command = 1111 1001): 1272 ; line_number = 143 1273 ; _osccal := _osccal + _osccal_lsb 1274 0096 3004 movlw 4 1275 0097 0790 addwf _osccal,f 1276 0098 28b9 goto main__37 1277 ; line_number = 144 1278 ; case 2 1279 0099 : main__30: 1280 ; This case body wants this bit set 1281 0099 1683 bsf __rp0___byte, __rp0___bit 1282 ; # Clock Read (Command = 1111 1010): 1283 ; line_number = 146 1284 ; call byte_put(_osccal) 1285 009a 0810 movf _osccal,w 1286 009b 1283 bcf __rp0___byte, __rp0___bit 1287 009c 218e call byte_put 1288 009d 28b9 goto main__37 1289 ; line_number = 147 1290 ; case 3 1291 009e : main__31: 1292 ; # Clock Pulse (Command = 1111 1011): 1293 ; line_number = 149 1294 ; call byte_put(0) 1295 009e 3000 movlw 0 1296 009f 218e call byte_put 1297 00a0 28b9 goto main__37 1298 ; line_number = 150 1299 ; case 4 1300 00a1 : main__32: 1301 ; # ID Next (Command = 1111 1100): 1302 ; line_number = 152 1303 ; temp := 0 1304 00a1 3000 movlw 0 1305 00a2 00b2 movwf main__temp 1306 ; line_number = 153 1307 ; if id_index < id.size start 1308 00a3 3032 movlw 50 1309 00a4 022e subwf main__id_index,w 1310 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1311 ; CASE: true.size=0 && false.size>1 1312 ; bit_code_emit_helper1: body_code.size=4 true_test=false body_code.delay=0 (non-uniform delay) 1313 00a5 1803 btfsc __c___byte, __c___bit 1314 00a6 28ab goto main__27 1315 ; line_number = 154 1316 ; temp := id[id_index] 1317 00a7 082e movf main__id_index,w 1318 00a8 212d call id 1319 00a9 00b2 movwf main__temp 1320 ; line_number = 155 1321 ; id_index := id_index + 1 1322 00aa 0aae incf main__id_index,f 1323 00ab : main__27: 1324 ; Recombine size1 = 0 || size2 = 0 1325 ; code.delay=4294967295 back_code.delay=4294967295 1326 ; <=bit_code_emit@symbol; sym=__c (data:X0=>X0 code:XX=>XX) 1327 ; line_number = 153 1328 ; if id_index < id.size done 1329 ; line_number = 156 1330 ; call byte_put(temp) 1331 00ab 0832 movf main__temp,w 1332 00ac 218e call byte_put 1333 00ad 28b9 goto main__37 1334 ; line_number = 157 1335 ; case 5 1336 00ae : main__33: 1337 ; # ID Reset (Command = 1111 1101): 1338 ; line_number = 159 1339 ; id_index := 0 1340 00ae 3000 movlw 0 1341 00af 00ae movwf main__id_index 1342 00b0 28b9 goto main__37 1343 ; line_number = 160 1344 ; case 6 1345 00b1 : main__34: 1346 ; # Glitch Read (Command = 1111 1110): 1347 ; line_number = 162 1348 ; call byte_put(glitch) 1349 00b1 082d movf main__glitch,w 1350 00b2 218e call byte_put 1351 ; line_number = 163 1352 ; glitch := 0 1353 00b3 3000 movlw 0 1354 00b4 00ad movwf main__glitch 1355 00b5 28b9 goto main__37 1356 ; line_number = 164 1357 ; case 7 1358 00b6 : main__35: 1359 ; # Glitch (Command = 1111 1111): 1360 ; line_number = 166 1361 ; if glitch != 0xff start 1362 ; Left minus Right 1363 00b6 0a2d incf main__glitch,w 1364 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1365 ; CASE: true_code.size=0 && false_code.size=1 1366 00b7 1d03 btfss __z___byte, __z___bit 1367 ; line_number = 167 1368 ; glitch := glitch + 1 1369 00b8 0aad incf main__glitch,f 1370 1371 1372 ; Recombine size1 = 0 || size2 = 0 1373 ; code.delay=4294967295 back_code.delay=4294967295 1374 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1375 ; line_number = 166 1376 ; if glitch != 0xff done 1377 00b9 : main__37: 1378 ; switch end:(data:X0=>X? code:XX=>XX) 1379 ; line_number = 137 1380 ; switch command & 7 done 1381 00b9 : main__43: 1382 ; switch end:(data:X0=>X? code:XX=>XX) 1383 ; line_number = 111 1384 ; switch (command >> 3) & 7 done 1385 00b9 : main__49: 1386 ; switch end:(data:X0=>X? code:XX=>XX) 1387 ; line_number = 83 1388 ; switch command >> 6 done 1389 ; line_number = 78 1390 ; loop_forever wrap-up 1391 ; Need to adjust code banks to match front of loop 1392 00b9 1283 bcf __rp0___byte, __rp0___bit 1393 00ba 280e goto main__1 1394 ; line_number = 78 1395 ; loop_forever done 1396 ; delay after procedure statements=non-uniform 1397 1398 1399 1400 1401 ; line_number = 170 1402 ; procedure delay 1403 00bb : delay: 1404 ; arguments_none 1405 ; line_number = 172 1406 ; returns_nothing 1407 ; line_number = 173 1408 ; exact_delay delay_instructions 1409 1410 ; # This procedure will delay for 1/3 of a bit time. 1411 1412 ; line_number = 177 1413 ; local temp byte 1414 00000033 = delay__temp equ shared___globals+19 1415 1416 ; # Kick the dog: 1417 ; before procedure statements delay=0, bit states=(data:X0=>X0 code:XX=>XX) 1418 ; line_number = 180 1419 ; watch_dog_reset done 1420 ; Delay at watch_dog_reset is 0 1421 00bb 0064 clrwdt 1422 1423 ; line_number = 182 1424 ; raw := (_gpio & port_mask) ^ port_mask 1425 ; Delay at assignment is 1 1426 00bc 3017 movlw 23 1427 00bd 0505 andwf _gpio,w 1428 00be 3a17 xorlw 23 1429 00bf 00a4 movwf raw 1430 ; line_number = 183 1431 ; if raw & north_pin_mask != 0 start 1432 ; Delay at if is 5 1433 ; Left minus Right 1434 00c0 3001 movlw 1 1435 00c1 0524 andwf raw,w 1436 ; (after recombine) true_delay=15, false_delay=9 uniform_delay=true 1437 ; CASE: true_code_size > 1 && false_code_size > 1 1438 ; true_code_size=58 false_code_size=23 1439 00c2 1903 btfsc __z___byte, __z___bit 1440 00c3 28df goto delay__21 1441 ; Delay 5 cycles 1442 00c4 28c5 goto delay__23 1443 00c5 : delay__23: 1444 00c5 28c6 goto delay__24 1445 00c6 : delay__24: 1446 00c6 0000 nop 1447 ; line_number = 184 1448 ; if raw & east_pin_mask != 0 start 1449 ; Delay at if is 0 1450 ; Left minus Right 1451 00c7 3002 movlw 2 1452 00c8 0524 andwf raw,w 1453 ; (after recombine) true_delay=9, false_delay=4 uniform_delay=true 1454 ; CASE: true_code_size > 1 && false_code_size > 1 1455 ; true_code_size=12 false_code_size=4 1456 00c9 1903 btfsc __z___byte, __z___bit 1457 00ca 28d2 goto delay__17 1458 ; Delay 4 cycles 1459 00cb 28cc goto delay__19 1460 00cc : delay__19: 1461 00cc 28cd goto delay__20 1462 00cd : delay__20: 1463 ; line_number = 185 1464 ; bearing := north_east_bearing 1465 ; Delay at assignment is 0 1466 00cd 3001 movlw 1 1467 00ce 00a7 movwf bearing 1468 ; line_number = 186 1469 ; mask := north_east_mask 1470 ; Delay at assignment is 2 1471 00cf 3002 movlw 2 1472 00d0 00a6 movwf mask 1473 00d1 28de goto delay__18 1474 00d2 : delay__17: 1475 ; line_number = 187 1476 ; Left minus Right 1477 00d2 3004 movlw 4 1478 00d3 0524 andwf raw,w 1479 ; (after recombine) true_delay=3, false_delay=4 uniform_delay=true 1480 ; CASE: true_code_size > 1 && false_code_size > 1 1481 ; true_code_size=3 false_code_size=4 1482 00d4 1d03 btfss __z___byte, __z___bit 1483 00d5 28da goto delay__15 1484 ; line_number = 191 1485 ; bearing := north_bearing 1486 ; Delay at assignment is 0 1487 00d6 01a7 clrf bearing 1488 ; line_number = 192 1489 ; mask := north_mask 1490 ; Delay at assignment is 1 1491 00d7 3001 movlw 1 1492 00d8 00a6 movwf mask 1493 ; Delay 0 cycles 1494 00d9 28de goto delay__16 1495 00da : delay__15: 1496 ; line_number = 188 1497 ; bearing := north_west_bearing 1498 ; Delay at assignment is 0 1499 00da 3007 movlw 7 1500 00db 00a7 movwf bearing 1501 ; line_number = 189 1502 ; mask := north_west_mask 1503 ; Delay at assignment is 2 1504 00dc 3080 movlw 128 1505 00dd 00a6 movwf mask 1506 00de : delay__16: 1507 ; code.delay=9 back_code.delay=0 1508 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1509 ; Uniform delay broke in relation_code_emit 1510 00de : delay__18: 1511 ; code.delay=9 back_code.delay=0 1512 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1513 ; Uniform delay broke in relation_code_emit 1514 ; if final true delay=4 false delay=9 code delay=9 1515 ; line_number = 184 1516 ; if raw & east_pin_mask != 0 done 1517 00de 2919 goto delay__22 1518 00df : delay__21: 1519 ; line_number = 193 1520 ; Left minus Right 1521 00df 3010 movlw 16 1522 00e0 0524 andwf raw,w 1523 ; (after recombine) true_delay=9, false_delay=9 uniform_delay=true 1524 ; CASE: true_code_size > 1 && false_code_size > 1 1525 ; true_code_size=26 false_code_size=26 1526 00e1 1d03 btfss __z___byte, __z___bit 1527 00e2 28fe goto delay__13 1528 ; line_number = 203 1529 ; Left minus Right 1530 00e3 3002 movlw 2 1531 00e4 0524 andwf raw,w 1532 ; (after recombine) true_delay=10, false_delay=4 uniform_delay=true 1533 ; CASE: true_code_size > 1 && false_code_size > 1 1534 ; true_code_size=14 false_code_size=4 1535 00e5 1903 btfsc __z___byte, __z___bit 1536 00e6 28ef goto delay__3 1537 ; Delay 5 cycles 1538 00e7 28e8 goto delay__5 1539 00e8 : delay__5: 1540 00e8 28e9 goto delay__6 1541 00e9 : delay__6: 1542 00e9 0000 nop 1543 ; line_number = 204 1544 ; bearing := east_bearing 1545 ; Delay at assignment is 0 1546 00ea 3002 movlw 2 1547 00eb 00a7 movwf bearing 1548 ; line_number = 205 1549 ; mask := east_mask 1550 ; Delay at assignment is 2 1551 00ec 3004 movlw 4 1552 00ed 00a6 movwf mask 1553 00ee 28fd goto delay__4 1554 00ef : delay__3: 1555 ; line_number = 206 1556 ; Left minus Right 1557 00ef 3004 movlw 4 1558 00f0 0524 andwf raw,w 1559 ; (after recombine) true_delay=4, false_delay=4 uniform_delay=true 1560 ; CASE: true_code_size > 1 && false_code_size > 1 1561 ; true_code_size=4 false_code_size=4 1562 00f1 1d03 btfss __z___byte, __z___bit 1563 00f2 28f8 goto delay__1 1564 ; line_number = 210 1565 ; bearing := 0xff 1566 ; Delay at assignment is 0 1567 00f3 30ff movlw 255 1568 00f4 00a7 movwf bearing 1569 ; line_number = 211 1570 ; mask := 0xff 1571 ; Delay at assignment is 2 1572 00f5 30ff movlw 255 1573 00f6 00a6 movwf mask 1574 1575 00f7 28fd goto delay__2 1576 00f8 : delay__1: 1577 ; line_number = 207 1578 ; bearing := west_bearing 1579 ; Delay at assignment is 0 1580 00f8 3006 movlw 6 1581 00f9 00a7 movwf bearing 1582 ; line_number = 208 1583 ; mask := west_mask 1584 ; Delay at assignment is 2 1585 00fa 3040 movlw 64 1586 00fb 00a6 movwf mask 1587 00fc 0000 nop 1588 00fd : delay__2: 1589 ; code.delay=10 back_code.delay=0 1590 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1591 ; Uniform delay broke in relation_code_emit 1592 00fd : delay__4: 1593 ; code.delay=9 back_code.delay=0 1594 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1595 ; Uniform delay broke in relation_code_emit 1596 00fd 2919 goto delay__14 1597 00fe : delay__13: 1598 ; line_number = 194 1599 ; if raw & east_pin_mask != 0 start 1600 ; Delay at if is 0 1601 ; Left minus Right 1602 00fe 3002 movlw 2 1603 00ff 0524 andwf raw,w 1604 ; (after recombine) true_delay=10, false_delay=4 uniform_delay=true 1605 ; CASE: true_code_size > 1 && false_code_size > 1 1606 ; true_code_size=14 false_code_size=4 1607 0100 1903 btfsc __z___byte, __z___bit 1608 0101 290a goto delay__9 1609 ; Delay 5 cycles 1610 0102 2903 goto delay__11 1611 0103 : delay__11: 1612 0103 2904 goto delay__12 1613 0104 : delay__12: 1614 0104 0000 nop 1615 ; line_number = 195 1616 ; bearing := south_east_bearing 1617 ; Delay at assignment is 0 1618 0105 3003 movlw 3 1619 0106 00a7 movwf bearing 1620 ; line_number = 196 1621 ; mask := south_east_mask 1622 ; Delay at assignment is 2 1623 0107 3008 movlw 8 1624 0108 00a6 movwf mask 1625 0109 2918 goto delay__10 1626 010a : delay__9: 1627 ; line_number = 197 1628 ; Left minus Right 1629 010a 3004 movlw 4 1630 010b 0524 andwf raw,w 1631 ; (after recombine) true_delay=4, false_delay=4 uniform_delay=true 1632 ; CASE: true_code_size > 1 && false_code_size > 1 1633 ; true_code_size=4 false_code_size=4 1634 010c 1d03 btfss __z___byte, __z___bit 1635 010d 2913 goto delay__7 1636 ; line_number = 201 1637 ; bearing := south_bearing 1638 ; Delay at assignment is 0 1639 010e 3004 movlw 4 1640 010f 00a7 movwf bearing 1641 ; line_number = 202 1642 ; mask := south_mask 1643 ; Delay at assignment is 2 1644 0110 3010 movlw 16 1645 0111 00a6 movwf mask 1646 0112 2918 goto delay__8 1647 0113 : delay__7: 1648 ; line_number = 198 1649 ; bearing := south_west_bearing 1650 ; Delay at assignment is 0 1651 0113 3005 movlw 5 1652 0114 00a7 movwf bearing 1653 ; line_number = 199 1654 ; mask := south_west_mask 1655 ; Delay at assignment is 2 1656 0115 3020 movlw 32 1657 0116 00a6 movwf mask 1658 0117 0000 nop 1659 0118 : delay__8: 1660 ; code.delay=10 back_code.delay=0 1661 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1662 ; Uniform delay broke in relation_code_emit 1663 0118 : delay__10: 1664 ; code.delay=9 back_code.delay=0 1665 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1666 ; Uniform delay broke in relation_code_emit 1667 ; if final true delay=4 false delay=10 code delay=9 1668 ; line_number = 194 1669 ; if raw & east_pin_mask != 0 done 1670 0118 0000 nop 1671 0119 : delay__14: 1672 ; code.delay=15 back_code.delay=0 1673 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1674 ; Uniform delay broke in relation_code_emit 1675 0119 : delay__22: 1676 ; code.delay=19 back_code.delay=0 1677 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1678 ; Uniform delay broke in relation_code_emit 1679 ; if final true delay=9 false delay=15 code delay=19 1680 ; line_number = 183 1681 ; if raw & north_pin_mask != 0 done 1682 ; # Deal with interrupts: 1683 ; line_number = 214 1684 ; if interrupts & mask != 0 start 1685 ; Delay at if is 19 1686 ; Left minus Right 1687 0119 0825 movf interrupts,w 1688 011a 0526 andwf mask,w 1689 ; (after recombine) true_delay=0, false_delay=1 uniform_delay=true 1690 ; CASE: true_code.size=0 && false_code.size=1 1691 011b 1d03 btfss __z___byte, __z___bit 1692 ; line_number = 215 1693 ; interrupt_pending := 1 1694 ; Delay at assignment is 0 1695 011c 155f bsf interrupt_pending___byte, interrupt_pending___bit 1696 ; code.delay=23 back_code.delay=0 1697 ; <=bit_code_emit@symbol; sym=__z (data:X0=>X0 code:XX=>XX) 1698 ; Uniform delay broke in relation_code_emit 1699 ; if final true delay=1 false delay=0 code delay=23 1700 ; line_number = 214 1701 ; if interrupts & mask != 0 done 1702 ; line_number = 216 1703 ; if interrupt_enable && interrupt_pending start 1704 ; Delay at if is 23 1705 ; (after recombine) true_delay=5, false_delay=2 uniform_delay=true 1706 ; CASE: true.size>1 false.size=1; false=GOTO 1707 ; Uniform delay 1708 011d 19df btfsc interrupt_enable___byte, interrupt_enable___bit 1709 011e 2922 goto delay__28 1710 011f 2928 goto delay__25 1711 ; Delay 2 cycles 1712 0120 2921 goto delay__30 1713 0121 : delay__30: 1714 0121 2928 goto delay__29 1715 0122 : delay__28: 1716 ; &&||: index=1 true_delay=2 false_delay=0 goto_delay=2 1717 ; (after recombine) true_delay=2, false_delay=0 uniform_delay=true 1718 ; CASE: true_code.size = 0 && false_code.size > 1 1719 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=2 (uniform delay) 1720 0122 195f btfsc interrupt_pending___byte, interrupt_pending___bit 1721 0123 2926 goto delay__26 1722 ; Delay 1 cycles 1723 0124 0000 nop 1724 0125 2928 goto delay__27 1725 0126 : delay__26: 1726 ; line_number = 217 1727 ; serial_out := 0 1728 ; Delay at assignment is 0 1729 0126 1285 bcf serial_out___byte, serial_out___bit 1730 ; line_number = 218 1731 ; interrupt_enable := 0 1732 ; Delay at assignment is 1 1733 0127 11df bcf interrupt_enable___byte, interrupt_enable___bit 1734 1735 1736 0128 : delay__27: 1737 0128 : delay__25: 1738 ; code.delay=5 back_code.delay=0 1739 ; <=bit_code_emit@symbol; sym=interrupt_pending (data:X0=>X0 code:XX=>XX) 1740 ; &&||: index=0 true_delay=2 false_delay=0 goto_delay=2 1741 ; &&||:: index=0 new_delay=5 goto_delay=2 1742 0128 : delay__29: 1743 ; code.delay=4294967295 back_code.delay=0 1744 ; <=bit_code_emit@symbol; sym=interrupt_enable (data:X0=>X0 code:XX=>XX) 1745 ; if final true delay=2 false delay=0 code delay=23 1746 ; line_number = 216 1747 ; if interrupt_enable && interrupt_pending done 1748 ; delay after procedure statements=23 1749 ; Delay 108 cycles 1750 ; Delay loop takes 27 * 4 = 108 cycles 1751 0128 301b movlw 27 1752 0129 : delay__31: 1753 0129 3eff addlw 255 1754 012a 1d03 btfss __z___byte, __z___bit 1755 012b 2929 goto delay__31 1756 ; Implied return 1757 012c 3400 retlw 0 1758 ; Final delay = 133 1759 1760 1761 1762 1763 ; line_number = 221 1764 ; constant zero8 = "\0,0,0,0,0,0,0,0\" 1765 ; zero8 = '\0,0,0,0,0,0,0,0\' 1766 ; line_number = 222 1767 ; constant module_name = "\9\Compass8A" 1768 ; module_name = '\9\Compass8A' 1769 ; line_number = 223 1770 ; constant vendor_name = "\15\Gramlich&Benson" 1771 ; vendor_name = '\15\Gramlich&Benson' 1772 1773 ; line_number = 225 1774 ; string id = "\1,0,22,0,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start 1775 ; id = '\1,0,22,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,9\Compass8A\15\Gramlich&Benson' 1776 012d : id: 1777 ; Temporarily save index into FSR 1778 012d 0084 movwf __fsr 1779 ; Initialize PCLATH to point to this code page 1780 012e 3001 movlw id___base>>8 1781 012f 008a movwf __pclath 1782 ; Restore index from FSR 1783 0130 0804 movf __fsr,w 1784 0131 3e33 addlw id___base 1785 ; Index to the correct return value 1786 0132 0082 movwf __pcl 1787 ; page_group 50 1788 0133 : id___base: 1789 0133 3401 retlw 1 1790 0134 3400 retlw 0 1791 0135 3416 retlw 22 1792 0136 3400 retlw 0 1793 0137 3400 retlw 0 1794 0138 3400 retlw 0 1795 0139 3400 retlw 0 1796 013a 3400 retlw 0 1797 013b 3400 retlw 0 1798 013c 3400 retlw 0 1799 013d 3400 retlw 0 1800 013e 3400 retlw 0 1801 013f 3400 retlw 0 1802 0140 3400 retlw 0 1803 0141 3400 retlw 0 1804 0142 3400 retlw 0 1805 0143 3400 retlw 0 1806 0144 3400 retlw 0 1807 0145 3400 retlw 0 1808 0146 3400 retlw 0 1809 0147 3400 retlw 0 1810 0148 3400 retlw 0 1811 0149 3400 retlw 0 1812 014a 3400 retlw 0 1813 014b 3409 retlw 9 1814 014c 3443 retlw 67 1815 014d 346f retlw 111 1816 014e 346d retlw 109 1817 014f 3470 retlw 112 1818 0150 3461 retlw 97 1819 0151 3473 retlw 115 1820 0152 3473 retlw 115 1821 0153 3438 retlw 56 1822 0154 3441 retlw 65 1823 0155 340f retlw 15 1824 0156 3447 retlw 71 1825 0157 3472 retlw 114 1826 0158 3461 retlw 97 1827 0159 346d retlw 109 1828 015a 346c retlw 108 1829 015b 3469 retlw 105 1830 015c 3463 retlw 99 1831 015d 3468 retlw 104 1832 015e 3426 retlw 38 1833 015f 3442 retlw 66 1834 0160 3465 retlw 101 1835 0161 346e retlw 110 1836 0162 3473 retlw 115 1837 0163 346f retlw 111 1838 0164 346e retlw 110 1839 ; line_number = 225 1840 ; string id = "\1,0,22,0,0,0,0,0\" ~ zero8 ~ zero8 ~ module_name ~ vendor_name start 1841 1842 1843 ; Appending 2 delayed procedures to code bank 0 1844 ; buffer = 'bit_bang' 1845 ; line_number = 33 1846 ; procedure byte_get 1847 0165 : byte_get: 1848 ; arguments_none 1849 ; line_number = 35 1850 ; returns byte 1851 1852 ; # This procedure will wait for a byte to be received from 1853 ; # serial_in_bit. It calls the delay procedure for all delays. 1854 ; # This procedure will keep calling the {delay} routine until 1855 ; # data is received. 1856 1857 ; line_number = 42 1858 ; local count byte 1859 00000020 = byte_get__count equ shared___globals 1860 ; line_number = 43 1861 ; local byte byte 1862 00000021 = byte_get__byte equ shared___globals+1 1863 1864 ; # Why does the delay procedure wait for a third of bit? Well, it 1865 ; # has to do with the loop immediately below. If we catch the 1866 ; # start bit at the beginning of a 1/3 bit time, we will be 1867 ; # sampling data at approximately 1/3 of the way into each bit. 1868 ; # Conversely, if we catch the start near the end of a 1/3 bit 1869 ; # bit time, we will be sampling data at approximately 2/3 of the 1870 ; # way into each bit. So, what this means is that our bit sample 1871 ; # times will be somewhere between 1/3 and 2/3 of bit (i.e. in 1872 ; # the middle of the bit. 1873 1874 ; # It would be nice to tweak the code to shorter delay times 1875 ; # (1/4 bit, 1/5 bit, etc.) but then it gets too hard to get 1876 ; # the bookeeping done in the delay routine. A PIC running at 1877 ; # 4MHz (=1MIPS), only has 138 instructions available for the 1878 ; # delay routine when at 1/3 of bit. 1879 1880 ; # Wait for a start bit: 1881 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) 1882 ; line_number = 62 1883 ; waiting := 1 1884 0165 14df bsf waiting___byte, waiting___bit 1885 ; line_number = 63 1886 ; receiving := 1 1887 0166 145f bsf receiving___byte, receiving___bit 1888 ; line_number = 64 1889 ; while serial_in start 1890 0167 : byte_get__1: 1891 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 1892 ; CASE: true_code.size = 0 && false_code.size > 1 1893 ; bit_code_emit_helper1: body_code.size=2 true_test=true body_code.delay=0 (non-uniform delay) 1894 0167 1e05 btfss serial_in___byte, serial_in___bit 1895 0168 296b goto byte_get__2 1896 ; line_number = 65 1897 ; delay instructions_per_delay - 3 start 1898 ; Delay expression evaluates to 135 1899 ; line_number = 66 1900 ; call delay() 1901 ; Delay at call is 0 1902 0169 20bb call delay 1903 ; line_number = 65 1904 ; delay instructions_per_delay - 3 done 1905 016a 2967 goto byte_get__1 1906 ; Recombine size1 = 0 || size2 = 0 1907 016b : byte_get__2: 1908 ; code.delay=4294967295 back_code.delay=4294967295 1909 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) 1910 ; line_number = 64 1911 ; while serial_in done 1912 ; line_number = 67 1913 ; waiting := 0 1914 016b 10df bcf waiting___byte, waiting___bit 1915 1916 ; # Clear out any preceeding interrupt condition: 1917 ; line_number = 70 1918 ; serial_out := 1 1919 016c 1685 bsf serial_out___byte, serial_out___bit 1920 1921 ; # Skip over start bit: 1922 ; line_number = 73 1923 ; delay instructions_per_bit - 2 start 1924 ; Delay expression evaluates to 414 1925 ; # There are two instructions of set-up for following loop_exactly: 1926 ; line_number = 75 1927 ; call delay() 1928 ; Delay at call is 0 1929 016d 20bb call delay 1930 ; line_number = 76 1931 ; call delay() 1932 ; Delay at call is 135 1933 016e 20bb call delay 1934 ; line_number = 77 1935 ; call delay() 1936 ; Delay at call is 270 1937 016f 20bb call delay 1938 ; line_number = 78 1939 ; byte := 0 1940 ; Delay at assignment is 405 1941 0170 3000 movlw 0 1942 0171 00a1 movwf byte_get__byte 1943 1944 ; Delay 7 cycles 1945 0172 2973 goto byte_get__3 1946 0173 : byte_get__3: 1947 0173 2974 goto byte_get__4 1948 0174 : byte_get__4: 1949 0174 2975 goto byte_get__5 1950 0175 : byte_get__5: 1951 0175 0000 nop 1952 ; line_number = 73 1953 ; delay instructions_per_bit - 2 done 1954 ; # Read in 8 bits of data: 1955 ; line_number = 81 1956 ; loop_exactly 8 start 1957 00000035 = byte_get__6 equ shared___globals+21 1958 0176 3008 movlw 8 1959 0177 00b5 movwf byte_get__6 1960 0178 : byte_get__7: 1961 ; # There are 3 instrucitons of loop_exactly overhead: 1962 ; line_number = 83 1963 ; delay instructions_per_bit - 3 start 1964 ; Delay expression evaluates to 413 1965 ; line_number = 84 1966 ; call delay() 1967 ; Delay at call is 0 1968 0178 20bb call delay 1969 ; line_number = 85 1970 ; byte := byte >> 1 1971 ; Delay at assignment is 135 1972 ; Assignment of variable to self (no code needed) 1973 0179 0ca1 rrf byte_get__byte,f 1974 017a 13a1 bcf byte_get__byte, 7 1975 ; line_number = 86 1976 ; if serial_in start 1977 ; Delay at if is 137 1978 ; (after recombine) true_delay=1, false_delay=0 uniform_delay=true 1979 ; CASE: True.size=1 False.size=0 1980 017b 1a05 btfsc serial_in___byte, serial_in___bit 1981 ; line_number = 87 1982 ; byte@7 := 1 1983 ; Delay at assignment is 0 1984 00000021 = byte_get__select__8___byte equ byte_get__byte 1985 00000007 = byte_get__select__8___bit equ 7 1986 017c 17a1 bsf byte_get__select__8___byte, byte_get__select__8___bit 1987 ; code.delay=139 back_code.delay=0 1988 ; <=bit_code_emit@symbol; sym=serial_in (data:X0=>X0 code:XX=>XX) 1989 ; if final true delay=1 false delay=0 code delay=139 1990 ; line_number = 86 1991 ; if serial_in done 1992 ; line_number = 88 1993 ; call delay() 1994 ; Delay at call is 139 1995 017d 20bb call delay 1996 ; line_number = 89 1997 ; call delay() 1998 ; Delay at call is 274 1999 017e 20bb call delay 2000 2001 ; Delay 4 cycles 2002 017f 2980 goto byte_get__9 2003 0180 : byte_get__9: 2004 0180 2981 goto byte_get__10 2005 0181 : byte_get__10: 2006 ; line_number = 83 2007 ; delay instructions_per_bit - 3 done 2008 ; line_number = 81 2009 ; loop_exactly 8 wrap-up 2010 0181 0bb5 decfsz byte_get__6,f 2011 0182 2978 goto byte_get__7 2012 ; line_number = 81 2013 ; loop_exactly 8 done 2014 ; # Skip over 2/3's of stop bit; 3 cycles for return: 2015 ; line_number = 92 2016 ; delay instructions_per_delay*2 - 3 start 2017 ; Delay expression evaluates to 273 2018 ; line_number = 93 2019 ; call delay() 2020 ; Delay at call is 0 2021 0183 20bb call delay 2022 ; line_number = 94 2023 ; call delay() 2024 ; Delay at call is 135 2025 0184 20bb call delay 2026 ; Delay 3 cycles 2027 0185 2986 goto byte_get__11 2028 0186 : byte_get__11: 2029 0186 0000 nop 2030 ; line_number = 92 2031 ; delay instructions_per_delay*2 - 3 done 2032 ; line_number = 95 2033 ; command_previous := command_last 2034 0187 0829 movf command_last,w 2035 0188 00a8 movwf command_previous 2036 ; line_number = 96 2037 ; command_last := byte 2038 0189 0821 movf byte_get__byte,w 2039 018a 00a9 movwf command_last 2040 ; line_number = 97 2041 ; serial_out := 1 2042 018b 1685 bsf serial_out___byte, serial_out___bit 2043 ; line_number = 98 2044 ; return byte start 2045 ; line_number = 98 2046 018c 0821 movf byte_get__byte,w 2047 018d 0008 return 2048 ; line_number = 98 2049 ; return byte done 2050 2051 2052 ; delay after procedure statements=non-uniform 2053 2054 2055 2056 2057 ; line_number = 101 2058 ; procedure byte_put 2059 018e : byte_put: 2060 ; Last argument is sitting in W; save into argument variable 2061 018e 00a3 movwf byte_put__byte 2062 ; delay=4294967295 2063 ; line_number = 102 2064 ; argument byte byte 2065 00000023 = byte_put__byte equ shared___globals+3 2066 ; line_number = 103 2067 ; returns_nothing 2068 2069 ; # This procedure will send {byte} to {serial_out} pin. The {delay} 2070 ; # procedure is called to provide the appropriate bit timing. 2071 2072 ; line_number = 108 2073 ; local count byte 2074 00000022 = byte_put__count equ shared___globals+2 2075 2076 ; # {receiving} will be 1 if the last get/put routine was a get. 2077 ; # Before we start transmitting a response back, we want to ensure 2078 ; # that there has been enough time to turn the line around. 2079 ; # We delay the first 1/3 of a bit to pad out the 9-2/3 bits 2080 ; # from get_byte to 10 bits. We delay another 3 bits just to 2081 ; # ensure that slow interpreters do not get overrun. 2082 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X0 code:XX=>XX) 2083 ; line_number = 116 2084 ; sent_previous := sent_last 2085 018f 082b movf sent_last,w 2086 0190 00aa movwf sent_previous 2087 ; line_number = 117 2088 ; sent_last := byte 2089 0191 0823 movf byte_put__byte,w 2090 0192 00ab movwf sent_last 2091 ; line_number = 118 2092 ; if receiving start 2093 ; (after recombine) true_delay=non-uniform, false_delay=non-uniform 2094 ; CASE: true_code.size = 0 && false_code.size > 1 2095 ; bit_code_emit_helper1: body_code.size=4 true_test=true body_code.delay=0 (non-uniform delay) 2096 0193 1c5f btfss receiving___byte, receiving___bit 2097 0194 299b goto byte_put__3 2098 ; line_number = 119 2099 ; receiving := 0 2100 0195 105f bcf receiving___byte, receiving___bit 2101 ; # 10 = 1 + 3*3 = 3-1/3 extra bits of delay: 2102 ; line_number = 121 2103 ; loop_exactly 10 start 2104 00000036 = byte_put__1 equ shared___globals+22 2105 0196 300a movlw 10 2106 0197 00b6 movwf byte_put__1 2107 0198 : byte_put__2: 2108 ; line_number = 122 2109 ; call delay() 2110 0198 20bb call delay 2111 2112 ; line_number = 121 2113 ; loop_exactly 10 wrap-up 2114 0199 0bb6 decfsz byte_put__1,f 2115 019a 2998 goto byte_put__2 2116 ; line_number = 121 2117 ; loop_exactly 10 done 2118 ; Recombine size1 = 0 || size2 = 0 2119 019b : byte_put__3: 2120 ; code.delay=4294967295 back_code.delay=4294967295 2121 ; <=bit_code_emit@symbol; sym=receiving (data:X0=>X0 code:XX=>XX) 2122 ; line_number = 118 2123 ; if receiving done 2124 ; # Send the start bit: 2125 ; line_number = 125 2126 ; delay instructions_per_bit - 2 start 2127 ; Delay expression evaluates to 414 2128 ; # The loop_exactly setup after this is 2 instructions: 2129 ; line_number = 127 2130 ; serial_out := 0 2131 ; Delay at assignment is 0 2132 019b 1285 bcf serial_out___byte, serial_out___bit 2133 ; line_number = 128 2134 ; call delay() 2135 ; Delay at call is 1 2136 019c 20bb call delay 2137 ; line_number = 129 2138 ; call delay() 2139 ; Delay at call is 136 2140 019d 20bb call delay 2141 ; line_number = 130 2142 ; call delay() 2143 ; Delay at call is 271 2144 019e 20bb call delay 2145 2146 ; Delay 8 cycles 2147 ; Delay loop takes 2 * 4 = 8 cycles 2148 019f 3002 movlw 2 2149 01a0 : byte_put__4: 2150 01a0 3eff addlw 255 2151 01a1 1d03 btfss __z___byte, __z___bit 2152 01a2 29a0 goto byte_put__4 2153 ; line_number = 125 2154 ; delay instructions_per_bit - 2 done 2155 ; # Send the data: 2156 ; line_number = 133 2157 ; loop_exactly 8 start 2158 00000036 = byte_put__5 equ shared___globals+22 2159 01a3 3008 movlw 8 2160 01a4 00b6 movwf byte_put__5 2161 01a5 : byte_put__6: 2162 ; # Loop_exactly overhead is 3 instructions: 2163 ; line_number = 135 2164 ; delay instructions_per_bit - 3 start 2165 ; Delay expression evaluates to 413 2166 ; line_number = 136 2167 ; if byte@0 start 2168 ; Delay at if is 0 2169 00000023 = byte_put__select__7___byte equ byte_put__byte 2170 00000000 = byte_put__select__7___bit equ 0 2171 ; (after recombine) true_delay=1, false_delay=1 uniform_delay=true 2172 ; CASE: true_size=1 && false_size=1 2173 ; SUBCASE: Double test; true, then false 2174 01a5 1823 btfsc byte_put__select__7___byte, byte_put__select__7___bit 2175 ; line_number = 137 2176 ; serial_out := 1 2177 ; Delay at assignment is 0 2178 01a6 1685 bsf serial_out___byte, serial_out___bit 2179 01a7 1c23 btfss byte_put__select__7___byte, byte_put__select__7___bit 2180 ; line_number = 139 2181 ; serial_out := 0 2182 ; Delay at assignment is 0 2183 01a8 1285 bcf serial_out___byte, serial_out___bit 2184 ; code.delay=4 back_code.delay=0 2185 ; <=bit_code_emit@symbol; sym=byte_put__select__7 (data:X0=>X0 code:XX=>XX) 2186 ; if final true delay=1 false delay=1 code delay=4 2187 ; line_number = 136 2188 ; if byte@0 done 2189 ; line_number = 140 2190 ; byte := byte >> 1 2191 ; Delay at assignment is 4 2192 ; Assignment of variable to self (no code needed) 2193 01a9 0ca3 rrf byte_put__byte,f 2194 01aa 13a3 bcf byte_put__byte, 7 2195 ; line_number = 141 2196 ; call delay() 2197 ; Delay at call is 6 2198 01ab 20bb call delay 2199 ; line_number = 142 2200 ; call delay() 2201 ; Delay at call is 141 2202 01ac 20bb call delay 2203 ; line_number = 143 2204 ; call delay() 2205 ; Delay at call is 276 2206 01ad 20bb call delay 2207 2208 ; Delay 2 cycles 2209 01ae 29af goto byte_put__8 2210 01af : byte_put__8: 2211 ; line_number = 135 2212 ; delay instructions_per_bit - 3 done 2213 ; line_number = 133 2214 ; loop_exactly 8 wrap-up 2215 01af 0bb6 decfsz byte_put__5,f 2216 01b0 29a5 goto byte_put__6 2217 ; line_number = 133 2218 ; loop_exactly 8 done 2219 ; # Send the stop bit: 2220 ; line_number = 146 2221 ; delay instructions_per_bit start 2222 ; Delay expression evaluates to 416 2223 ; line_number = 147 2224 ; serial_out := 1 2225 ; Delay at assignment is 0 2226 01b1 1685 bsf serial_out___byte, serial_out___bit 2227 ; line_number = 148 2228 ; call delay() 2229 ; Delay at call is 1 2230 01b2 20bb call delay 2231 ; line_number = 149 2232 ; call delay() 2233 ; Delay at call is 136 2234 01b3 20bb call delay 2235 ; line_number = 150 2236 ; call delay() 2237 ; Delay at call is 271 2238 01b4 20bb call delay 2239 2240 2241 ; Delay 10 cycles 2242 ; Delay loop takes 2 * 4 = 8 cycles 2243 01b5 3002 movlw 2 2244 01b6 : byte_put__9: 2245 01b6 3eff addlw 255 2246 01b7 1d03 btfss __z___byte, __z___bit 2247 01b8 29b6 goto byte_put__9 2248 01b9 29ba goto byte_put__10 2249 01ba : byte_put__10: 2250 ; line_number = 146 2251 ; delay instructions_per_bit done 2252 ; delay after procedure statements=non-uniform 2253 ; Implied return 2254 01ba 3400 retlw 0 2255 2256 2257 2258 2259 ; Configuration bits 2260 ; fill = 0x0 2261 ; bg = bg11 (0x3000) 2262 ; cpd = off (0x100) 2263 ; cp = off (0x80) 2264 ; boden = off (0x0) 2265 ; mclre = off (0x0) 2266 ; pwrte = off (0x10) 2267 ; wdte = off (0x0) 2268 ; fosc = int_no_clk (0x4) 2269 ; 12692 = 0x3194 2270 3194 = __config 12692 2271 ; Define start addresses for data regions 2272 ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 2273 ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 2274 ; Region="shared___globals" Address=32" Size=64 Bytes=23 Bits=4 Available=40 2275 end