radix dec ; Code bank 0; Start address: 0; End address: 4095 org 0 ; Define start addresses for data regions shared___globals equ 112 globals___0 equ 32 globals___1 equ 160 globals___2 equ 288 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2005-2006 by Wayne C. Gramlich ; # All rights reserved. ; buffer = 'bus' ; line_number = 6 ; library _pic16f688 entered ; # Copyright (c) 2004-2006 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f688' ; line_number = 6 ; processor pic16f688 ; line_number = 7 ; configure_address 0x2007 ; line_number = 8 ; configure_fill 0x3000 ; line_number = 9 ; configure_option fcmen: on = 0x800 ; line_number = 10 ; configure_option fcmen: off = 0x000 ; line_number = 11 ; configure_option ieso: on = 0x400 ; line_number = 12 ; configure_option ieso: off = 0x000 ; line_number = 13 ; configure_option boden: on = 0x300 ; line_number = 14 ; configure_option boden: partial = 0x200 ; line_number = 15 ; configure_option boden: sboden = 0x100 ; line_number = 16 ; configure_option boden: off = 0x000 ; line_number = 17 ; configure_option cpd: on = 0x00 ; line_number = 18 ; configure_option cpd: off = 0x80 ; line_number = 19 ; configure_option cp: on = 0x00 ; line_number = 20 ; configure_option cp: off = 0x40 ; line_number = 21 ; configure_option mclre: on = 0x20 ; line_number = 22 ; configure_option mclre: off = 0x00 ; line_number = 23 ; configure_option pwrte: on = 0x00 ; line_number = 24 ; configure_option pwrte: off = 0x10 ; line_number = 25 ; configure_option wdte: on = 8 ; line_number = 26 ; configure_option wdte: off = 0 ; line_number = 27 ; configure_option fosc: rc_clk = 7 ; line_number = 28 ; configure_option fosc: rc_no_clk = 6 ; line_number = 29 ; configure_option fosc: int_clk = 5 ; line_number = 30 ; configure_option fosc: int_no_clk = 4 ; line_number = 31 ; configure_option fosc: ec = 3 ; line_number = 32 ; configure_option fosc: hs = 2 ; line_number = 33 ; configure_option fosc: xt = 1 ; line_number = 34 ; configure_option fosc: lp = 0 ; line_number = 36 ; code_bank 0x0 : 0xfff ; line_number = 37 ; data_bank 0x0 : 0x7f ; line_number = 38 ; data_bank 0x80 : 0xff ; line_number = 39 ; data_bank 0x100 : 0x17f ; line_number = 40 ; data_bank 0x180 : 0x1ff ; line_number = 42 ; global_region 0x20 : 0x6f ; line_number = 43 ; icd2_global_region 0x20 : 0x6f ; line_number = 45 ; global_region 0xa0 : 0xef ; line_number = 46 ; icd2_global_region 0xa0 : 0xef ; line_number = 48 ; global_region 0x120 : 0x16f ; line_number = 49 ; icd2_global_region 0x120 : 0x164 ; line_number = 51 ; shared_region 0x70 : 0x7f ; line_number = 52 ; icd2_shared_region 0x71 : 0x7f ; line_number = 54 ; interrupts_possible ; line_number = 55 ; packages pdip=14, soic=14, tssop=14 ; line_number = 56 ; pin vdd, power_supply ; line_number = 57 ; pin_bindings pdip=1, soic=1, tssop=1 ; line_number = 58 ; pin ra5_in, ra5_nc, ra5_out, t1cki, osc1, clkin ; line_number = 59 ; pin_bindings pdip=2, soic=2, tssop=2 ; line_number = 60 ; bind_to _porta@5 ; line_number = 61 ; or_if ra5_in _trisa 32 ; line_number = 62 ; or_if ra5_nc _trisa 32 ; line_number = 63 ; or_if ra5_out _trisa 0 ; line_number = 64 ; or_if osc1 _trisa 32 ; line_number = 65 ; pin ra4_in, ra4_nc, ra4_out, t1g, osc2, an3, clkout ; line_number = 66 ; pin_bindings pdip=3, soic=3, tssop=3 ; line_number = 67 ; bind_to _porta@4 ; line_number = 68 ; or_if ra4_in _trisa 16 ; line_number = 69 ; or_if ra4_nc _trisa 16 ; line_number = 70 ; or_if ra4_out _trisa 0 ; line_number = 71 ; or_if an3 _trisa 16 ; line_number = 72 ; or_if osc2 _trisa 16 ; line_number = 73 ; or_if ra4_in _ansel 0 ; line_number = 74 ; or_if ra4_out _ansel 0 ; line_number = 75 ; or_if an3 _ansel 8 ; line_number = 76 ; or_if ra4_in _adcon0 0 ; line_number = 77 ; or_if ra4_out _adcon0 0 ; line_number = 78 ; or_if an3 _adcon0 1 ; line_number = 79 ; pin ra3_in, ra3_nc, mclr, vpp ; line_number = 80 ; pin_bindings pdip=4, soic=4, tssop=4 ; line_number = 81 ; bind_to _porta@3 ; line_number = 82 ; or_if ra3_in _trisa 8 ; line_number = 83 ; or_if ra3_nc _trisa 8 ; line_number = 84 ; pin rc5_in, rc5_nc, rc5_out, rx, dt ; line_number = 85 ; pin_bindings pdip=5, soic=5, tssop=5 ; line_number = 86 ; bind_to _portc@5 ; line_number = 87 ; or_if rc5_in _trisc 32 ; line_number = 88 ; or_if rc5_nc _trisc 32 ; line_number = 89 ; or_if rc5_out _trisc 0 ; line_number = 90 ; or_if rx _trisc 32 ; line_number = 91 ; pin rc4_in, rc4_nc, rc4_out, c2out, tx, ck ; line_number = 92 ; pin_bindings pdip=6, soic=6, tssop=6 ; line_number = 93 ; bind_to _portc@4 ; line_number = 94 ; or_if rc4_in _trisc 16 ; line_number = 95 ; or_if rc4_nc _trisc 16 ; line_number = 96 ; or_if rc4_out _trisc 0 ; # The UART documentation says TX must be marked as in input: ; line_number = 98 ; or_if tx _trisc 16 ; line_number = 99 ; pin rc3_in, rc3_nc, rc3_out, an7 ; line_number = 100 ; pin_bindings pdip=7, soic=7, tssop=7 ; line_number = 101 ; bind_to _portc@3 ; line_number = 102 ; or_if rc3_in _trisc 8 ; line_number = 103 ; or_if rc3_nc _trisc 8 ; line_number = 104 ; or_if rc3_out _trisc 0 ; line_number = 105 ; or_if an7 _trisc 8 ; line_number = 106 ; or_if rc3_in _ansel 0 ; line_number = 107 ; or_if rc3_out _ansel 0 ; line_number = 108 ; or_if an7 _ansel 128 ; line_number = 109 ; or_if rc3_in _adcon0 0 ; line_number = 110 ; or_if rc3_out _adcon0 0 ; line_number = 111 ; or_if an7 _adcon0 1 ; line_number = 112 ; pin rc2_in, rc2_nc, rc2_out, an6 ; line_number = 113 ; pin_bindings pdip=8, soic=8, tssop=8 ; line_number = 114 ; bind_to _portc@2 ; line_number = 115 ; or_if rc2_in _trisc 4 ; line_number = 116 ; or_if rc2_nc _trisc 4 ; line_number = 117 ; or_if rc2_out _trisc 0 ; line_number = 118 ; or_if an6 _trisc 4 ; line_number = 119 ; or_if rc2_in _ansel 0 ; line_number = 120 ; or_if rc2_out _ansel 0 ; line_number = 121 ; or_if an6 _ansel 64 ; line_number = 122 ; or_if rc2_in _adcon0 0 ; line_number = 123 ; or_if rc2_out _adcon0 0 ; line_number = 124 ; or_if an6 _adcon0 1 ; line_number = 125 ; pin rc1_in, rc1_nc, rc1_out, an5, c2in_minus ; line_number = 126 ; pin_bindings pdip=9, soic=9, tssop=9 ; line_number = 127 ; bind_to _portc@1 ; line_number = 128 ; or_if rc1_in _trisc 2 ; line_number = 129 ; or_if rc1_nc _trisc 2 ; line_number = 130 ; or_if rc1_out _trisc 0 ; line_number = 131 ; or_if rc1_in _cmcon0 7 ; line_number = 132 ; or_if rc1_out _cmcon0 7 ; line_number = 133 ; or_if an5 _trisc 2 ; line_number = 134 ; or_if rc1_in _ansel 0 ; line_number = 135 ; or_if rc1_out _ansel 0 ; line_number = 136 ; or_if an5 _ansel 32 ; line_number = 137 ; or_if rc1_in _adcon0 0 ; line_number = 138 ; or_if rc1_out _adcon0 0 ; line_number = 139 ; or_if an5 _adcon0 1 ; line_number = 140 ; pin rc0_in, rc0_nc, rc0_out, an4, c2in_plus ; line_number = 141 ; pin_bindings pdip=10, soic=10, tssop=10 ; line_number = 142 ; bind_to _portc@0 ; line_number = 143 ; or_if rc0_in _trisc 1 ; line_number = 144 ; or_if rc0_nc _trisc 1 ; line_number = 145 ; or_if rc0_out _trisc 0 ; line_number = 146 ; or_if rc0_in _cmcon0 7 ; line_number = 147 ; or_if rc0_out _cmcon0 7 ; line_number = 148 ; or_if an4 _trisc 1 ; line_number = 149 ; or_if rc0_in _ansel 0 ; line_number = 150 ; or_if rc0_out _ansel 0 ; line_number = 151 ; or_if an4 _ansel 16 ; line_number = 152 ; or_if rc0_in _adcon0 0 ; line_number = 153 ; or_if rc0_out _adcon0 0 ; line_number = 154 ; or_if an4 _adcon0 1 ; line_number = 155 ; pin ra2_in, ra2_nc, ra2_out, an2, c1out, t0cki, int ; line_number = 156 ; pin_bindings pdip=11, soic=11, tssop=11 ; line_number = 157 ; bind_to _porta@2 ; line_number = 158 ; or_if ra2_in _trisa 4 ; line_number = 159 ; or_if ra2_nc _trisa 4 ; line_number = 160 ; or_if ra2_out _trisa 0 ; line_number = 161 ; or_if an2 _trisa 4 ; line_number = 162 ; or_if ra2_in _ansel 0 ; line_number = 163 ; or_if ra2_out _ansel 0 ; line_number = 164 ; or_if an2 _ansel 4 ; line_number = 165 ; or_if ra2_in _adcon0 0 ; line_number = 166 ; or_if ra2_out _adcon0 0 ; line_number = 167 ; or_if an2 _adcon0 1 ; line_number = 168 ; pin ra1_in, ra1_nc, ra1_out, an1, c1in_minus, vref, icspclk ; line_number = 169 ; pin_bindings pdip=12, soic=12, tssop=12 ; line_number = 170 ; bind_to _porta@1 ; line_number = 171 ; or_if ra1_in _trisa 2 ; line_number = 172 ; or_if ra1_nc _trisa 2 ; line_number = 173 ; or_if ra1_out _trisa 0 ; line_number = 174 ; or_if ra1_in _cmcon0 7 ; line_number = 175 ; or_if ra1_out _cmcon0 7 ; line_number = 176 ; or_if an1 _trisa 2 ; line_number = 177 ; or_if vref _trisa 2 ; line_number = 178 ; or_if ra1_in _ansel 0 ; line_number = 179 ; or_if ra1_out _ansel 0 ; line_number = 180 ; or_if an1 _ansel 2 ; line_number = 181 ; or_if vref _ansel 2 ; line_number = 182 ; or_if ra1_in _adcon0 0 ; line_number = 183 ; or_if ra1_out _adcon0 0 ; line_number = 184 ; or_if an1 _adcon0 1 # Turn on _addon ; line_number = 185 ; or_if vref _adcon0 1 # Turn on _addon ; line_number = 186 ; or_if vref _adcon0 64 # Turn of _vcfg ; line_number = 187 ; pin ra0_in, ra0_nc, ra0_out, an0, c1in_plus, icspdat, ulpwu ; line_number = 188 ; pin_bindings pdip=13, soic=13, tssop=13 ; line_number = 189 ; bind_to _porta@0 ; line_number = 190 ; or_if ra0_in _trisa 1 ; line_number = 191 ; or_if ra0_nc _trisa 1 ; line_number = 192 ; or_if ra0_out _trisa 0 ; line_number = 193 ; or_if ra0_in _cmcon0 7 ; line_number = 194 ; or_if ra0_out _cmcon0 7 ; line_number = 195 ; or_if an0 _trisa 1 ; line_number = 196 ; or_if ra0_in _ansel 0 ; line_number = 197 ; or_if ra0_out _ansel 0 ; line_number = 198 ; or_if an0 _ansel 1 ; line_number = 199 ; or_if ra0_in _adcon0 0 ; line_number = 200 ; or_if ra0_out _adcon0 0 ; line_number = 201 ; or_if an0 _adcon0 1 ; line_number = 202 ; pin vss, ground ; line_number = 203 ; pin_bindings pdip=14, soic=14, tssop=14 ; line_number = 205 ; library _standard entered ; # Copyright (c) 2006 by Wayne C. Gramlich ; # All rights reserved. ; # Standard definition for uCL: ; buffer = '_standard' ; line_number = 8 ; constant _true = (1 = 1) _true equ 1 ; line_number = 9 ; constant _false = (0 != 0) _false equ 0 ; buffer = '_pic16f688' ; line_number = 205 ; library _standard exited ; # Register/bit bindings: ; # Databank 0 (0x0 - 0x7f): ; line_number = 216 ; register _indf = _indf equ 0 ; line_number = 218 ; register _tmr0 = _tmr0 equ 1 ; line_number = 220 ; register _pcl = _pcl equ 2 ; line_number = 222 ; register _status = _status equ 3 ; line_number = 223 ; bind _irp = _status@7 _irp___byte equ _status _irp___bit equ 7 ; line_number = 224 ; bind _rp1 = _status@5 _rp1___byte equ _status _rp1___bit equ 5 ; line_number = 225 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 226 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 227 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 228 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 229 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 230 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 232 ; register _fsr = _fsr equ 4 ; line_number = 234 ; register _porta = _porta equ 5 ; line_number = 235 ; register _ra = _ra equ 5 ; line_number = 236 ; bind _ra5 = _porta@5 _ra5___byte equ _porta _ra5___bit equ 5 ; line_number = 237 ; bind _ra4 = _porta@4 _ra4___byte equ _porta _ra4___bit equ 4 ; line_number = 238 ; bind _ra3 = _porta@3 _ra3___byte equ _porta _ra3___bit equ 3 ; line_number = 239 ; bind _ra2 = _porta@2 _ra2___byte equ _porta _ra2___bit equ 2 ; line_number = 240 ; bind _ra1 = _porta@1 _ra1___byte equ _porta _ra1___bit equ 1 ; line_number = 241 ; bind _ra0 = _porta@0 _ra0___byte equ _porta _ra0___bit equ 0 ; line_number = 243 ; register _portc = _portc equ 7 ; line_number = 244 ; register _rc = _rc equ 7 ; line_number = 245 ; bind _rc5 = _portc@5 _rc5___byte equ _portc _rc5___bit equ 5 ; line_number = 246 ; bind _rc4 = _portc@4 _rc4___byte equ _portc _rc4___bit equ 4 ; line_number = 247 ; bind _rc3 = _portc@3 _rc3___byte equ _portc _rc3___bit equ 3 ; line_number = 248 ; bind _rc2 = _portc@2 _rc2___byte equ _portc _rc2___bit equ 2 ; line_number = 249 ; bind _rc1 = _portc@1 _rc1___byte equ _portc _rc1___bit equ 1 ; line_number = 250 ; bind _rc0 = _portc@0 _rc0___byte equ _portc _rc0___bit equ 0 ; line_number = 252 ; register _pclath = _pclath equ 10 ; line_number = 254 ; register _intcon = _intcon equ 11 ; line_number = 255 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 256 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 257 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 258 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 259 ; bind _raie = _intcon@3 _raie___byte equ _intcon _raie___bit equ 3 ; line_number = 260 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 261 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 262 ; bind _raif = _intcon@0 _raif___byte equ _intcon _raif___bit equ 0 ; line_number = 264 ; register _pir1 = _pir1 equ 12 ; line_number = 265 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 266 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 267 ; bind _rcif = _pir1@5 _rcif___byte equ _pir1 _rcif___bit equ 5 ; line_number = 268 ; bind _c2if = _pir1@4 _c2if___byte equ _pir1 _c2if___bit equ 4 ; line_number = 269 ; bind _c1if = _pir1@3 _c1if___byte equ _pir1 _c1if___bit equ 3 ; line_number = 270 ; bind _osfif = _pir1@2 _osfif___byte equ _pir1 _osfif___bit equ 2 ; line_number = 271 ; bind _txif = _pir1@1 _txif___byte equ _pir1 _txif___bit equ 1 ; line_number = 272 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 274 ; register _tmr1l = _tmr1l equ 14 ; line_number = 276 ; register _tmr1h = _tmr1h equ 15 ; line_number = 278 ; register _t1con = _t1con equ 16 ; line_number = 279 ; bind t1ginv = _t1con@7 t1ginv___byte equ _t1con t1ginv___bit equ 7 ; line_number = 280 ; bind _tmr1ge = _t1con@6 _tmr1ge___byte equ _t1con _tmr1ge___bit equ 6 ; line_number = 281 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 282 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 283 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 284 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 285 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 286 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 288 ; register _baudctl = _baudctl equ 17 ; line_number = 289 ; bind _abdovf = _baudctl@7 _abdovf___byte equ _baudctl _abdovf___bit equ 7 ; line_number = 290 ; bind _rcidl = _baudctl@6 _rcidl___byte equ _baudctl _rcidl___bit equ 6 ; line_number = 291 ; bind _sckp = _baudctl@4 _sckp___byte equ _baudctl _sckp___bit equ 4 ; line_number = 292 ; bind _brg16 = _baudctl@3 _brg16___byte equ _baudctl _brg16___bit equ 3 ; line_number = 293 ; bind _wue = _baudctl@1 _wue___byte equ _baudctl _wue___bit equ 1 ; line_number = 294 ; bind _abden = _baudctl@0 _abden___byte equ _baudctl _abden___bit equ 0 ; line_number = 296 ; register _spbrgh = _spbrgh equ 18 ; line_number = 298 ; register _spbrg = _spbrg equ 19 ; line_number = 300 ; register _rcreg = _rcreg equ 20 ; line_number = 302 ; register _txreg = _txreg equ 21 ; line_number = 304 ; register _txsta = _txsta equ 22 ; line_number = 305 ; bind _csrc = _txsta@7 _csrc___byte equ _txsta _csrc___bit equ 7 ; line_number = 306 ; bind _tx9 = _txsta@6 _tx9___byte equ _txsta _tx9___bit equ 6 ; line_number = 307 ; bind _txen = _txsta@5 _txen___byte equ _txsta _txen___bit equ 5 ; line_number = 308 ; bind _sync = _txsta@4 _sync___byte equ _txsta _sync___bit equ 4 ; line_number = 309 ; bind _sendb = _txsta@3 _sendb___byte equ _txsta _sendb___bit equ 3 ; line_number = 310 ; bind _brgh = _txsta@2 _brgh___byte equ _txsta _brgh___bit equ 2 ; line_number = 311 ; bind _trmt = _txsta@1 _trmt___byte equ _txsta _trmt___bit equ 1 ; line_number = 312 ; bind _tx9d = _txsta@0 _tx9d___byte equ _txsta _tx9d___bit equ 0 ; line_number = 314 ; register _rcsta = _rcsta equ 23 ; line_number = 315 ; bind _spen = _rcsta@7 _spen___byte equ _rcsta _spen___bit equ 7 ; line_number = 316 ; bind _rx9 = _rcsta@6 _rx9___byte equ _rcsta _rx9___bit equ 6 ; line_number = 317 ; bind _sren = _rcsta@5 _sren___byte equ _rcsta _sren___bit equ 5 ; line_number = 318 ; bind _cren = _rcsta@4 _cren___byte equ _rcsta _cren___bit equ 4 ; line_number = 319 ; bind _adden = _rcsta@3 _adden___byte equ _rcsta _adden___bit equ 3 ; line_number = 320 ; bind _ferr = _rcsta@2 _ferr___byte equ _rcsta _ferr___bit equ 2 ; line_number = 321 ; bind _oerr = _rcsta@1 _oerr___byte equ _rcsta _oerr___bit equ 1 ; line_number = 322 ; bind _rx9d = _rcsta@0 _rx9d___byte equ _rcsta _rx9d___bit equ 0 ; line_number = 324 ; register _wdtcon = _wdtcon equ 24 ; line_number = 325 ; bind _wdtps3 = _wdtcon@4 _wdtps3___byte equ _wdtcon _wdtps3___bit equ 4 ; line_number = 326 ; bind _wdtps2 = _wdtcon@3 _wdtps2___byte equ _wdtcon _wdtps2___bit equ 3 ; line_number = 327 ; bind _wdtps1 = _wdtcon@2 _wdtps1___byte equ _wdtcon _wdtps1___bit equ 2 ; line_number = 328 ; bind _wdtps0 = _wdtcon@1 _wdtps0___byte equ _wdtcon _wdtps0___bit equ 1 ; line_number = 329 ; bind _swdten = _wdtcon@0 _swdten___byte equ _wdtcon _swdten___bit equ 0 ; line_number = 331 ; register _cmcon0 = _cmcon0 equ 25 ; line_number = 332 ; bind _c1out = _cmcon0@7 _c1out___byte equ _cmcon0 _c1out___bit equ 7 ; line_number = 333 ; bind _c2out = _cmcon0@6 _c2out___byte equ _cmcon0 _c2out___bit equ 6 ; line_number = 334 ; bind _c1inv = _cmcon0@5 _c1inv___byte equ _cmcon0 _c1inv___bit equ 5 ; line_number = 335 ; bind _c2inv = _cmcon0@4 _c2inv___byte equ _cmcon0 _c2inv___bit equ 4 ; line_number = 336 ; bind _cis = _cmcon0@3 _cis___byte equ _cmcon0 _cis___bit equ 3 ; line_number = 337 ; bind _cm2 = _cmcon0@2 _cm2___byte equ _cmcon0 _cm2___bit equ 2 ; line_number = 338 ; bind _cm1 = _cmcon0@1 _cm1___byte equ _cmcon0 _cm1___bit equ 1 ; line_number = 339 ; bind _cm0 = _cmcon0@0 _cm0___byte equ _cmcon0 _cm0___bit equ 0 ; line_number = 341 ; register _cmcon1 = _cmcon1 equ 26 ; line_number = 342 ; bind _t1gss = _cmcon1@0 _t1gss___byte equ _cmcon1 _t1gss___bit equ 0 ; line_number = 343 ; bind _c2sync = _cmcon1@1 _c2sync___byte equ _cmcon1 _c2sync___bit equ 1 ; line_number = 345 ; register _adresh = _adresh equ 30 ; line_number = 347 ; register _adcon0 = _adcon0 equ 31 ; line_number = 348 ; bind _adfm = _adcon0@7 _adfm___byte equ _adcon0 _adfm___bit equ 7 ; line_number = 349 ; bind _vcfg = _adcon0@6 _vcfg___byte equ _adcon0 _vcfg___bit equ 6 ; line_number = 350 ; bind _chs2 = _adcon0@4 _chs2___byte equ _adcon0 _chs2___bit equ 4 ; line_number = 351 ; bind _chs1 = _adcon0@3 _chs1___byte equ _adcon0 _chs1___bit equ 3 ; line_number = 352 ; bind _chs0 = _adcon0@2 _chs0___byte equ _adcon0 _chs0___bit equ 2 ; line_number = 353 ; bind _go = _adcon0@1 _go___byte equ _adcon0 _go___bit equ 1 ; line_number = 354 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 358 ; register _option_reg = _option_reg equ 129 ; line_number = 359 ; bind _rapu = _option_reg@7 _rapu___byte equ _option_reg _rapu___bit equ 7 ; line_number = 360 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 361 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 362 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 363 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 364 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 365 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 366 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 368 ; register _trisa = _trisa equ 133 ; line_number = 369 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 370 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 371 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 372 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 373 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 374 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 376 ; register _trisc = _trisc equ 135 ; line_number = 377 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 378 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 379 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 380 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 381 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 382 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 384 ; register _pie1 = _pie1 equ 140 ; line_number = 385 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 386 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 387 ; bind _rcie = _pie1@5 _rcie___byte equ _pie1 _rcie___bit equ 5 ; line_number = 388 ; bind _c2ie = _pie1@4 _c2ie___byte equ _pie1 _c2ie___bit equ 4 ; line_number = 389 ; bind _c1ie = _pie1@3 _c1ie___byte equ _pie1 _c1ie___bit equ 3 ; line_number = 390 ; bind _osfie = _pie1@2 _osfie___byte equ _pie1 _osfie___bit equ 2 ; line_number = 391 ; bind _txie = _pie1@1 _txie___byte equ _pie1 _txie___bit equ 1 ; line_number = 392 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 394 ; register _pcon = _pcon equ 142 ; line_number = 395 ; bind _ulpwue = _pcon@5 _ulpwue___byte equ _pcon _ulpwue___bit equ 5 ; line_number = 396 ; bind _sboden = _pcon@4 _sboden___byte equ _pcon _sboden___bit equ 4 ; line_number = 397 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 398 ; bind _bod = _pcon@0 _bod___byte equ _pcon _bod___bit equ 0 ; line_number = 400 ; register _osccon = _osccon equ 143 ; line_number = 401 ; bind _ircf2 = _osccon@6 _ircf2___byte equ _osccon _ircf2___bit equ 6 ; line_number = 402 ; bind _ircf1 = _osccon@5 _ircf1___byte equ _osccon _ircf1___bit equ 5 ; line_number = 403 ; bind _ircf0 = _osccon@4 _ircf0___byte equ _osccon _ircf0___bit equ 4 ; line_number = 404 ; bind _osts = _osccon@3 _osts___byte equ _osccon _osts___bit equ 3 ; line_number = 405 ; bind _hts = _osccon@2 _hts___byte equ _osccon _hts___bit equ 2 ; line_number = 406 ; bind _lts = _osccon@3 _lts___byte equ _osccon _lts___bit equ 3 ; line_number = 407 ; bind _scs = _osccon@2 _scs___byte equ _osccon _scs___bit equ 2 ; line_number = 409 ; register _osctune = _osctune equ 144 ; line_number = 410 ; bind _tun4 = _osctune@4 _tun4___byte equ _osctune _tun4___bit equ 4 ; line_number = 411 ; bind _tun3 = _osctune@3 _tun3___byte equ _osctune _tun3___bit equ 3 ; line_number = 412 ; bind _tun2 = _osctune@2 _tun2___byte equ _osctune _tun2___bit equ 2 ; line_number = 413 ; bind _tun1 = _osctune@1 _tun1___byte equ _osctune _tun1___bit equ 1 ; line_number = 414 ; bind _tun0 = _osctune@0 _tun0___byte equ _osctune _tun0___bit equ 0 ; line_number = 415 ; constant _osccal_lsb = 1 _osccal_lsb equ 1 ; line_number = 417 ; register _ansel = _ansel equ 145 ; line_number = 418 ; bind _ans7 = _ansel@7 _ans7___byte equ _ansel _ans7___bit equ 7 ; line_number = 419 ; bind _ans6 = _ansel@6 _ans6___byte equ _ansel _ans6___bit equ 6 ; line_number = 420 ; bind _ans5 = _ansel@5 _ans5___byte equ _ansel _ans5___bit equ 5 ; line_number = 421 ; bind _ans4 = _ansel@4 _ans4___byte equ _ansel _ans4___bit equ 4 ; line_number = 422 ; bind _ans3 = _ansel@3 _ans3___byte equ _ansel _ans3___bit equ 3 ; line_number = 423 ; bind _ans2 = _ansel@2 _ans2___byte equ _ansel _ans2___bit equ 2 ; line_number = 424 ; bind _ans1 = _ansel@1 _ans1___byte equ _ansel _ans1___bit equ 1 ; line_number = 425 ; bind _ans0 = _ansel@0 _ans0___byte equ _ansel _ans0___bit equ 0 ; line_number = 427 ; register _wpua = _wpua equ 149 ; line_number = 428 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 429 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 430 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 431 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 432 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 434 ; register _ioca = _ioca equ 150 ; line_number = 435 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 436 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 437 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 438 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 439 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 440 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 442 ; register _eedath = _eedath equ 151 ; line_number = 444 ; register _eeadrh = _eeadrh equ 152 ; line_number = 446 ; register _vrcon = _vrcon equ 153 ; line_number = 447 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 448 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 449 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 450 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 451 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 452 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 454 ; register _eedat = _eedat equ 154 ; line_number = 455 ; bind _eedat7 = _eedat@7 _eedat7___byte equ _eedat _eedat7___bit equ 7 ; line_number = 456 ; bind _eedat6 = _eedat@6 _eedat6___byte equ _eedat _eedat6___bit equ 6 ; line_number = 457 ; bind _eedat5 = _eedat@5 _eedat5___byte equ _eedat _eedat5___bit equ 5 ; line_number = 458 ; bind _eedat4 = _eedat@4 _eedat4___byte equ _eedat _eedat4___bit equ 4 ; line_number = 459 ; bind _eedat3 = _eedat@3 _eedat3___byte equ _eedat _eedat3___bit equ 3 ; line_number = 460 ; bind _eedat2 = _eedat@2 _eedat2___byte equ _eedat _eedat2___bit equ 2 ; line_number = 461 ; bind _eedat1 = _eedat@1 _eedat1___byte equ _eedat _eedat1___bit equ 1 ; line_number = 462 ; bind _eedat0 = _eedat@0 _eedat0___byte equ _eedat _eedat0___bit equ 0 ; line_number = 464 ; register _eeadr = _eeadr equ 155 ; line_number = 465 ; bind _eeadr7 = _eeadr@7 _eeadr7___byte equ _eeadr _eeadr7___bit equ 7 ; line_number = 466 ; bind _eeadr6 = _eeadr@6 _eeadr6___byte equ _eeadr _eeadr6___bit equ 6 ; line_number = 467 ; bind _eeadr5 = _eeadr@5 _eeadr5___byte equ _eeadr _eeadr5___bit equ 5 ; line_number = 468 ; bind _eeadr4 = _eeadr@4 _eeadr4___byte equ _eeadr _eeadr4___bit equ 4 ; line_number = 469 ; bind _eeadr3 = _eeadr@3 _eeadr3___byte equ _eeadr _eeadr3___bit equ 3 ; line_number = 470 ; bind _eeadr2 = _eeadr@2 _eeadr2___byte equ _eeadr _eeadr2___bit equ 2 ; line_number = 471 ; bind _eeadr1 = _eeadr@1 _eeadr1___byte equ _eeadr _eeadr1___bit equ 1 ; line_number = 472 ; bind _eeadr0 = _eeadr@0 _eeadr0___byte equ _eeadr _eeadr0___bit equ 0 ; line_number = 474 ; register _eecon1 = _eecon1 equ 156 ; line_number = 475 ; bind _eepgd = _eecon1@7 _eepgd___byte equ _eecon1 _eepgd___bit equ 7 ; line_number = 476 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 477 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 478 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 479 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 481 ; register _eecon2 = _eecon2 equ 157 ; line_number = 483 ; register _adresl = _adresl equ 158 ; line_number = 485 ; register _adcon1 = _adcon1 equ 159 ; line_number = 486 ; bind _adcs2 = _adcon1@6 _adcs2___byte equ _adcon1 _adcs2___bit equ 6 ; line_number = 487 ; bind _adcs1 = _adcon1@5 _adcs1___byte equ _adcon1 _adcs1___bit equ 5 ; line_number = 488 ; bind _adcs0 = _adcon1@4 _adcs0___byte equ _adcon1 _adcs0___bit equ 4 ; # Data Bank 2 (0x100 - 0x17f): ; buffer = 'bus' ; line_number = 6 ; library _pic16f688 exited ; line_number = 7 ; library clock16mhz entered ; # Copyright (c) 2006 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock16mhz' ; line_number = 9 ; constant clock_rate = 16000000 clock_rate equ 16000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 4000000 ; buffer = 'bus' ; line_number = 7 ; library clock16mhz exited ; line_number = 8 ; library _uart entered ; # Copyright (c) 2004 by Wayne C. Gramlich. ; # All rights reserved. ; # This library contains some procedures for accessing the UART. ; Delaying code generation for procedure _uart_byte_safe_get ; Delaying code generation for procedure _uart_byte_get ; Delaying code generation for procedure _uart_hex_put ; Delaying code generation for procedure _uart_nibble_put ; Delaying code generation for procedure _uart_space_put ; Delaying code generation for procedure _uart_crlf_put ; Delaying code generation for procedure _uart_byte_put ; line_number = 8 ; library _uart exited ; line_number = 9 ; constant _eusart_clock = clock_rate _eusart_clock equ 16000000 ; line_number = 10 ; constant _eusart_factor = 4 _eusart_factor equ 4 ; line_number = 11 ; library _eusart entered ; # Copyright (c) 2005 by Wayne C. Gramlich ; # All rights reserved. ; # This library contains a bunch of definitions for the Enhanced Universal ; # Asynchronous Serial Receiver/Transmitter (EUSART) that is available ; # on many of the PIC microcontrollers. ; # In order to use this module you have to get two constants defined ; # BEFORE including this library -- {_eusart_factor} and {_eusart_clock}. ; # {_eusart_clock} should be set to the frequency oscillator for the chip. ; # {_eusart_factor} should be set to 4, 16, or 64 depending upon whether ; # the {_brg16} and {_brgh} bits are set. Use the table below to select: ; # ; # _{brg16} {_brgh} _{eusart_factor} ; # 0 0 64 ; # 0 1 16 ; # 1 0 16 ; # 1 1 4 ; # 2400 baud: ; buffer = '_eusart' ; line_number = 23 ; constant _eusart_2400 = (_eusart_clock / (2400 * _eusart_factor)) - 1 _eusart_2400 equ 1665 ; line_number = 24 ; constant _eusart_2400_low = _eusart_2400 & 0xff _eusart_2400_low equ 129 ; line_number = 25 ; constant _eusart_2400_high = _eusart_2400 >> 8 _eusart_2400_high equ 6 ; line_number = 26 ; constant _eusart_2400_index = 0 _eusart_2400_index equ 0 ; # 4800 baud: ; line_number = 28 ; constant _eusart_4800 = (_eusart_clock / (4800 * _eusart_factor)) - 1 _eusart_4800 equ 832 ; line_number = 29 ; constant _eusart_4800_low = _eusart_4800 & 0xff _eusart_4800_low equ 64 ; line_number = 30 ; constant _eusart_4800_high = _eusart_4800 >> 8 _eusart_4800_high equ 3 ; line_number = 31 ; constant _eusart_4800_index = 1 _eusart_4800_index equ 1 ; # 9600 baud: ; line_number = 33 ; constant _eusart_9600 = (_eusart_clock / (9600 * _eusart_factor)) - 1 _eusart_9600 equ 415 ; line_number = 34 ; constant _eusart_9600_low = _eusart_9600 & 0xff _eusart_9600_low equ 159 ; line_number = 35 ; constant _eusart_9600_high = _eusart_9600 >> 8 _eusart_9600_high equ 1 ; line_number = 36 ; constant _eusart_9600_index = 2 _eusart_9600_index equ 2 ; # 19200 baud: ; line_number = 38 ; constant _eusart_19200 = (_eusart_clock / (19200 * _eusart_factor)) - 1 _eusart_19200 equ 207 ; line_number = 39 ; constant _eusart_19200_low = _eusart_19200 & 0xff _eusart_19200_low equ 207 ; line_number = 40 ; constant _eusart_19200_high = _eusart_19200 >> 8 _eusart_19200_high equ 0 ; line_number = 41 ; constant _eusart_19200_index = 3 _eusart_19200_index equ 3 ; # 38400 baud: ; line_number = 43 ; constant _eusart_38400 = (_eusart_clock / (38400 * _eusart_factor)) - 1 _eusart_38400 equ 103 ; line_number = 44 ; constant _eusart_38400_low = _eusart_38400 & 0xff _eusart_38400_low equ 103 ; line_number = 45 ; constant _eusart_38400_high = _eusart_38400 >> 8 _eusart_38400_high equ 0 ; line_number = 46 ; constant _eusart_38400_index = 4 _eusart_38400_index equ 4 ; # 57600 baud: ; line_number = 48 ; constant _eusart_57600 = (_eusart_clock / (57600 * _eusart_factor)) - 1 _eusart_57600 equ 68 ; line_number = 49 ; constant _eusart_57600_low = _eusart_57600 & 0xff _eusart_57600_low equ 68 ; line_number = 50 ; constant _eusart_57600_high = _eusart_57600 >> 8 _eusart_57600_high equ 0 ; line_number = 51 ; constant _eusart_57600_index = 5 _eusart_57600_index equ 5 ; # 115200 baud: ; line_number = 53 ; constant _eusart_115200 = (_eusart_clock / (115200 * _eusart_factor)) - 1 _eusart_115200 equ 33 ; line_number = 54 ; constant _eusart_115200_low = _eusart_115200 & 0xff _eusart_115200_low equ 33 ; line_number = 55 ; constant _eusart_115200_high = _eusart_115200 >> 8 _eusart_115200_high equ 0 ; line_number = 56 ; constant _eusart_115200_index = 6 _eusart_115200_index equ 6 ; # 203400 baud: ; line_number = 58 ; constant _eusart_230400 = (_eusart_clock / (230400 * _eusart_factor)) - 1 _eusart_230400 equ 16 ; line_number = 59 ; constant _eusart_230400_low = _eusart_230400 & 0xff _eusart_230400_low equ 16 ; line_number = 60 ; constant _eusart_230400_high = _eusart_230400 >> 8 _eusart_230400_high equ 0 ; line_number = 61 ; constant _eusart_230400_index = 7 _eusart_230400_index equ 7 ; # 406800 baud: ; line_number = 63 ; constant _eusart_406800 = (_eusart_clock / (406800 * _eusart_factor)) - 1 _eusart_406800 equ 8 ; line_number = 64 ; constant _eusart_406800_low = _eusart_406800 & 0xff _eusart_406800_low equ 8 ; line_number = 65 ; constant _eusart_406800_high = _eusart_406800 >> 8 _eusart_406800_high equ 0 ; line_number = 66 ; constant _eusart_406800_index = 8 _eusart_406800_index equ 8 ; # 500000 baud: ; line_number = 68 ; constant _eusart_500000 = (_eusart_clock / (500000 * _eusart_factor)) - 1 _eusart_500000 equ 7 ; line_number = 69 ; constant _eusart_500000_low = _eusart_500000 & 0xff _eusart_500000_low equ 7 ; line_number = 70 ; constant _eusart_500000_high = _eusart_500000 >> 8 _eusart_500000_high equ 0 ; line_number = 71 ; constant _eusart_500000_index = 8 _eusart_500000_index equ 8 ; # 62500 baud: ; line_number = 73 ; constant _eusart_625000 = (_eusart_clock / (625000 * _eusart_factor)) - 1 _eusart_625000 equ 5 ; line_number = 74 ; constant _eusart_625000_low = _eusart_625000 & 0xff _eusart_625000_low equ 5 ; line_number = 75 ; constant _eusart_625000_high = _eusart_625000 >> 8 _eusart_625000_high equ 0 ; line_number = 76 ; constant _eusart_625000_index = 9 _eusart_625000_index equ 9 ; # 833333 baud: ; line_number = 78 ; constant _eusart_833333 = (_eusart_clock / (833333 * _eusart_factor)) - 1 _eusart_833333 equ 3 ; line_number = 79 ; constant _eusart_833333_low = _eusart_833333 & 0xff _eusart_833333_low equ 3 ; line_number = 80 ; constant _eusart_833333_high = _eusart_833333 >> 8 _eusart_833333_high equ 0 ; line_number = 81 ; constant _eusart_833333_index = 10 _eusart_833333_index equ 10 ; # 1000000 baud (1MHz): ; line_number = 83 ; constant _eusart_1000000 = (_eusart_clock / (1000000 * _eusart_factor)) - 1 _eusart_1000000 equ 3 ; line_number = 84 ; constant _eusart_1000000_low = _eusart_1000000 & 0xff _eusart_1000000_low equ 3 ; line_number = 85 ; constant _eusart_1000000_high = _eusart_1000000 >> 8 _eusart_1000000_high equ 0 ; line_number = 86 ; constant _eusart_1000000_index = 11 _eusart_1000000_index equ 11 ; buffer = 'bus' ; line_number = 11 ; library _eusart exited ; line_number = 15 ; package pdip ; line_number = 16 ; pin 1 = power_supply ; line_number = 17 ; pin 2 = osc1 ; line_number = 18 ; pin 3 = osc2 ; line_number = 19 ; pin 4 = ra3_in, name=p6 p6___byte equ _porta p6___bit equ 3 ; line_number = 20 ; pin 5 = rx, name=rx rx___byte equ _portc rx___bit equ 5 ; line_number = 21 ; pin 6 = tx, name=tx tx___byte equ _portc tx___bit equ 4 ; line_number = 22 ; pin 7 = rc3_in, name=p3 p3___byte equ _portc p3___bit equ 3 ; line_number = 23 ; pin 8 = rc2_in, name=p2 p2___byte equ _portc p2___bit equ 2 ; line_number = 24 ; pin 9 = rc1_out, name=p1 p1___byte equ _portc p1___bit equ 1 ; line_number = 25 ; pin 10 = rc0_out, name=p0 p0___byte equ _portc p0___bit equ 0 ; line_number = 26 ; pin 11 = ra2_out, name=reset reset___byte equ _porta reset___bit equ 2 ; line_number = 27 ; pin 12 = ra1_out, name=p5 p5___byte equ _porta p5___bit equ 1 ; line_number = 28 ; pin 13 = ra0_in, name=p4 p4___byte equ _porta p4___bit equ 0 ; line_number = 29 ; pin 14 = ground ; line_number = 31 ; origin 0 org 0 ; line_number = 33 ; constant microsecond = clocks_per_instruction / 1000000 microsecond equ 0 ; line_number = 35 ; constant buffer_power = 5 buffer_power equ 5 ; line_number = 36 ; constant buffer_size = 1 << buffer_power buffer_size equ 32 ; line_number = 37 ; constant buffer_mask = buffer_size - 1 buffer_mask equ 31 ; line_number = 39 ; global lows[buffer_size] array[byte] lows equ globals___0+3 ; line_number = 40 ; global highs[buffer_size] array[byte] highs equ globals___0+35 ; line_number = 41 ; global buffer_in byte buffer_in equ globals___0+67 ; line_number = 42 ; global buffer_out byte buffer_out equ globals___0+68 ; line_number = 43 ; global buffer_amount byte buffer_amount equ globals___0+69 ; line_number = 45 ; global command byte command equ globals___0+70 ; line_number = 46 ; global response byte response equ globals___0+71 ; line_number = 48 ;info 48, 0 ; procedure main main: ; Initialize some registers clrf _adcon0 bsf __rp0___byte, __rp0___bit clrf _ansel movlw 7 bcf __rp0___byte, __rp0___bit movwf _cmcon0 movlw 57 bsf __rp0___byte, __rp0___bit movwf _trisa movlw 60 movwf _trisc ; arguments_none ; line_number = 50 ; returns_nothing ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>01 code:XX=cc=>XX) ; line_number = 52 ; p0 := _false ;info 52, 11 bcf __rp0___byte, __rp0___bit bcf p0___byte, p0___bit ; line_number = 53 ; p1 := _false ;info 53, 13 bcf p1___byte, p1___bit ; line_number = 54 ; p5 := _false ;info 54, 14 bcf p5___byte, p5___bit ; line_number = 55 ; command := 0 ;info 55, 15 clrf command ; line_number = 56 ; response := 0 ;info 56, 16 clrf response ; line_number = 58 ; buffer_in := 0 ;info 58, 17 clrf buffer_in ; line_number = 59 ; buffer_out := 0 ;info 59, 18 clrf buffer_out ; line_number = 60 ; buffer_amount := 0 ;info 60, 19 clrf buffer_amount ; # Warm up the UART: ; line_number = 63 ; _trisc@5 := _true ;info 63, 20 main__select__1___byte equ _trisc main__select__1___bit equ 5 bsf __rp0___byte, __rp0___bit bsf main__select__1___byte, main__select__1___bit ; line_number = 64 ; _trisc@4 := _true ;info 64, 22 main__select__2___byte equ _trisc main__select__2___bit equ 4 bsf main__select__2___byte, main__select__2___bit ; line_number = 66 ; _txsta := 0 ;info 66, 23 bcf __rp0___byte, __rp0___bit clrf _txsta ; line_number = 67 ; _tx9 := _true ;info 67, 25 bsf _tx9___byte, _tx9___bit ; #_tx9 := _false ; line_number = 69 ; _txen := _true ;info 69, 26 bsf _txen___byte, _txen___bit ; line_number = 70 ; _brgh := _true ;info 70, 27 bsf _brgh___byte, _brgh___bit ; line_number = 72 ; _rcsta := 0 ;info 72, 28 clrf _rcsta ; line_number = 73 ; _spen := _true ;info 73, 29 bsf _spen___byte, _spen___bit ; line_number = 74 ; _rx9 := _true ;info 74, 30 bsf _rx9___byte, _rx9___bit ; #_rx9 := _false ; line_number = 76 ; _cren := _true ;info 76, 31 bsf _cren___byte, _cren___bit ; #_adden := _true ; line_number = 78 ; _adden := _false ;info 78, 32 bcf _adden___byte, _adden___bit ; line_number = 80 ; _baudctl := 0 ;info 80, 33 clrf _baudctl ; line_number = 81 ; _brg16 := _true ;info 81, 34 bsf _brg16___byte, _brg16___bit ; #_spbrg := _eusart_19200_low ; #_spbrgh := _eusart_19200_high ; #_spbrg := _eusart_115200_low ; #_spbrgh := _eusart_115200_high ; #_spbrg := _eusart_230400_low ; #_spbrgh := _eusart_230400_high ; #_spbrg := _eusart_406800_low ; #_spbrgh := _eusart_406800_high ; line_number = 91 ; _spbrg := _eusart_500000_low ;info 91, 35 movlw 7 movwf _spbrg ; line_number = 92 ; _spbrgh := _eusart_500000_high ;info 92, 37 clrf _spbrgh ; #_spbrg := _eusart_500000_low ; #_spbrgh := _eusart_625000_high ; #_spbrg := _eusart_833333_low ; #_spbrgh := _eusart_833333_high ; #_spbrg := _eusart_1000000_low ; #_spbrgh := _eusart_1000000_high ; # For debugging only -- Just output pulses on {reset}: ; #loop_forever ; # reset := _false ; # reset := _true ; # For debugging only -- Just output pulses on {reset}: ; #loop_forever ; # p5 := _false ; # p5 := _true ; #loop_forever ; # if p6 ; # p5 := _true ; # reset := _true ; # else ; # p5 := _false ; # reset := _false ; line_number = 118 ; loop_forever start main__3: ; line_number = 119 ; if p6 start ;info 119, 38 ; =>bit_code_emit@symbol(): sym=p6 ; No 1TEST: true.size=7 false.size=7 ; No 2TEST: true.size=7 false.size=7 ; 2GOTO: Single test with two GOTO's btfss p6___byte, p6___bit goto main__8 ; # P6=1; wait for it to go low: ; line_number = 121 ; while p6 start main__6: ;info 121, 40 ; =>bit_code_emit@symbol(): sym=p6 ; No 1TEST: true.size=3 false.size=0 ; No 2TEST: true.size=3 false.size=0 ; 1GOTO: Single test with GOTO btfss p6___byte, p6___bit goto main__7 ; line_number = 122 ; if _rcif start ;info 122, 42 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfsc _rcif___byte, _rcif___bit ; line_number = 123 ; call byte_receive() ;info 123, 43 call byte_receive ; Recombine size1 = 0 || size2 = 0 ; line_number = 122 ; if _rcif done goto main__6 ; Recombine size1 = 0 || size2 = 0 main__7: ; line_number = 121 ; while p6 done ; line_number = 124 ; call process() ;info 124, 45 call process ; line_number = 125 ; p5 := _false ;info 125, 46 bcf p5___byte, p5___bit goto main__9 ; 2GOTO: Starting code 2 main__8: bcf __rp1___byte, __rp1___bit ; # P6=0; wait for it to go high: ; line_number = 128 ; while !p6 start main__4: ;info 128, 49 ; =>bit_code_emit@symbol(): sym=p6 ; No 1TEST: true.size=0 false.size=3 ; No 2TEST: true.size=0 false.size=3 ; 1GOTO: Single test with GOTO btfsc p6___byte, p6___bit goto main__5 ; line_number = 129 ; if _rcif start ;info 129, 51 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfsc _rcif___byte, _rcif___bit ; line_number = 130 ; call byte_receive() ;info 130, 52 call byte_receive ; Recombine size1 = 0 || size2 = 0 ; line_number = 129 ; if _rcif done goto main__4 main__5: ; Recombine size1 = 0 || size2 = 0 ; line_number = 128 ; while !p6 done ; line_number = 131 ; call process() ;info 131, 54 call process ; line_number = 132 ; p5 := _true ;info 132, 55 bsf p5___byte, p5___bit main__9: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 119 ; if p6 done ; line_number = 118 ; loop_forever wrap-up goto main__3 ; line_number = 118 ; loop_forever done ; delay after procedure statements=non-uniform ; # # Process commands: ; # loop_forever ; # # Wait for some data from the host: ; # while !p6 ; # if _rcif ; # call byte_receive() ; # call process() ; # ; # # Wait for some data from the host: ; # while p6 ; # if _rcif ; # call byte_receive() ; # call process() ; line_number = 149 ;info 149, 57 ; procedure process process: ; arguments_none ; line_number = 151 ; returns_nothing ; # This procedure will process the bits coming in on P4:2 and ; # respond with two bits on P1:0. ; line_number = 156 ; local low byte process__low equ globals___0+72 ; line_number = 157 ; local high byte process__high equ globals___0+73 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 159 ; p1 := _false ;info 159, 57 bcf p1___byte, p1___bit ; line_number = 160 ; p0 := _false ;info 160, 58 bcf p0___byte, p0___bit ; line_number = 162 ; if p4 start ;info 162, 59 ; =>bit_code_emit@symbol(): sym=p4 ; No 1TEST: true.size=36 false.size=16 ; No 2TEST: true.size=36 false.size=16 ; 2GOTO: Single test with two GOTO's btfss p4___byte, p4___bit goto process__12 ; # We have a command to process: ; line_number = 164 ; if p3 start ;info 164, 61 ; =>bit_code_emit@symbol(): sym=p3 ; No 1TEST: true.size=26 false.size=6 ; No 2TEST: true.size=26 false.size=6 ; 2GOTO: Single test with two GOTO's btfss p3___byte, p3___bit goto process__10 ; # Command 1x: ; line_number = 166 ; if p2 start ;info 166, 63 ; =>bit_code_emit@symbol(): sym=p2 ; No 1TEST: true.size=2 false.size=21 ; No 2TEST: true.size=2 false.size=21 ; 2GOTO: Single test with two GOTO's btfss p2___byte, p2___bit goto process__8 ; # Command 11 (Reset): ; line_number = 168 ; reset := _false ;info 168, 65 bcf reset___byte, reset___bit ; line_number = 169 ; delay 10 * microsecond start ;info 169, 66 ; Delay expression evaluates to 0 ; line_number = 170 ; do_nothing ;info 170, 66 ; line_number = 169 ; delay 10 * microsecond done ; line_number = 171 ; reset := _true ;info 171, 66 bsf reset___byte, reset___bit ; Recombine code1_bit_states != code2_bit_states goto process__9 ; 2GOTO: Starting code 2 process__8: ; # Command 10 (Receive Byte): ; line_number = 174 ; if buffer_amount = 0 start ;info 174, 68 ; Left minus Right movf buffer_amount,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=1 false.size=16 ; No 2TEST: true.size=1 false.size=16 ; 2GOTO: Single test with two GOTO's btfss __z___byte, __z___bit goto process__6 ; # Empty buffer: ; line_number = 176 ; p1 := _true ;info 176, 71 bsf p1___byte, p1___bit ; Recombine code1_bit_states != code2_bit_states goto process__7 ; 2GOTO: Starting code 2 process__6: ; # We've got one: ; line_number = 179 ; high := highs[buffer_out & buffer_mask] ;info 179, 73 movlw 31 andwf buffer_out,w addlw highs movwf __fsr movf __indf,w movwf process__high ; line_number = 180 ; if high@0 start ;info 180, 79 process__select__5___byte equ process__high process__select__5___bit equ 0 ; =>bit_code_emit@symbol(): sym=process__select__5 ; 1TEST: Single test with code in skip slot btfsc process__select__5___byte, process__select__5___bit ; line_number = 181 ; p0 := _true ;info 181, 80 bsf p0___byte, p0___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 180 ; if high@0 done ; line_number = 182 ; response := lows[buffer_out & buffer_mask] ;info 182, 81 movlw 31 andwf buffer_out,w addlw lows movwf __fsr movf __indf,w movwf response ; line_number = 183 ; buffer_out := buffer_out + 1 ;info 183, 87 incf buffer_out,f ; line_number = 184 ; buffer_amount := buffer_amount - 1 ;info 184, 88 decf buffer_amount,f process__7: ; 2GOTO: code1 final bitstates:(data:X0=cu=>X0 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 174 ; if buffer_amount = 0 done process__9: ; 2GOTO: code1 final bitstates:(data:X0=cu=>X0 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 166 ; if p2 done goto process__11 ; 2GOTO: Starting code 2 process__10: bcf __rp1___byte, __rp1___bit ; # Command 0x (Send a byte): ; line_number = 187 ; _tx9d := _false ;info 187, 91 bcf _tx9d___byte, _tx9d___bit ; line_number = 188 ; if p2 start ;info 188, 92 ; =>bit_code_emit@symbol(): sym=p2 ; 1TEST: Single test with code in skip slot btfsc p2___byte, p2___bit ; line_number = 189 ; _tx9d := _true ;info 189, 93 bsf _tx9d___byte, _tx9d___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 188 ; if p2 done ; line_number = 190 ; _txreg := command ;info 190, 94 movf command,w movwf _txreg ; line_number = 191 ; p1 := _true ;info 191, 96 bsf p1___byte, p1___bit process__11: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 164 ; if p3 done goto process__13 ; 2GOTO: Starting code 2 process__12: ; # We just need to shift command data in and the response data out: ; line_number = 194 ; command := command >> 2 ;info 194, 98 ; Assignment of variable to self (no code needed) rrf command,f rrf command,f movlw 63 andwf command,f ; line_number = 195 ; if p3 start ;info 195, 102 ; =>bit_code_emit@symbol(): sym=p3 ; 1TEST: Single test with code in skip slot btfsc p3___byte, p3___bit ; line_number = 196 ; command@7 := _true ;info 196, 103 process__select__1___byte equ command process__select__1___bit equ 7 bsf process__select__1___byte, process__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 195 ; if p3 done ; line_number = 197 ; if p2 start ;info 197, 104 ; =>bit_code_emit@symbol(): sym=p2 ; 1TEST: Single test with code in skip slot btfsc p2___byte, p2___bit ; line_number = 198 ; command@6 := _true ;info 198, 105 process__select__2___byte equ command process__select__2___bit equ 6 bsf process__select__2___byte, process__select__2___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 197 ; if p2 done ; line_number = 200 ; if response@7 start ;info 200, 106 process__select__3___byte equ response process__select__3___bit equ 7 ; =>bit_code_emit@symbol(): sym=process__select__3 ; 1TEST: Single test with code in skip slot btfsc process__select__3___byte, process__select__3___bit ; line_number = 201 ; p1 := _true ;info 201, 107 bsf p1___byte, p1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 200 ; if response@7 done ; line_number = 202 ; if response@6 start ;info 202, 108 process__select__4___byte equ response process__select__4___bit equ 6 ; =>bit_code_emit@symbol(): sym=process__select__4 ; 1TEST: Single test with code in skip slot btfsc process__select__4___byte, process__select__4___bit ; line_number = 203 ; p0 := _true ;info 203, 109 bsf p0___byte, p0___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 202 ; if response@6 done ; line_number = 204 ; response := response << 2 ;info 204, 110 ; Assignment of variable to self (no code needed) rlf response,f rlf response,f movlw 252 andwf response,f process__13: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 162 ; if p4 done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 207 ;info 207, 115 ; procedure byte_receive byte_receive: ; arguments_none ; line_number = 209 ; returns_nothing ; # This procedure will receive a 9-bit "byte" from the UART ; # and store the result into the {highs} and {lows} buffers. ; line_number = 214 ; local high byte byte_receive__high equ globals___0+74 ; line_number = 215 ; local low byte byte_receive__low equ globals___0+75 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 217 ; high := 0 ;info 217, 115 clrf byte_receive__high ; line_number = 218 ; if _rx9 start ;info 218, 116 ; =>bit_code_emit@symbol(): sym=_rx9 ; 1TEST: Single test with code in skip slot btfsc _rx9___byte, _rx9___bit ; line_number = 219 ; high := high + 1 ;info 219, 117 incf byte_receive__high,f ; Recombine size1 = 0 || size2 = 0 ; line_number = 218 ; if _rx9 done ; line_number = 220 ; highs[buffer_in & buffer_mask] := high ;info 220, 118 ; index_fsr_first movlw 31 andwf buffer_in,w addlw highs movwf __fsr movf byte_receive__high,w movwf __indf ; line_number = 221 ; lows[buffer_in & buffer_mask] := _rcreg ;info 221, 124 ; index_fsr_first movlw 31 andwf buffer_in,w addlw lows movwf __fsr movf _rcreg,w movwf __indf ; line_number = 222 ; buffer_in := buffer_in + 1 ;info 222, 130 incf buffer_in,f ; line_number = 223 ; buffer_amount := buffer_amount + 1 ;info 223, 131 incf buffer_amount,f ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Appending 7 delayed procedures to code bank 0 ; buffer = '_uart' ; line_number = 7 ;info 7, 133 ; procedure _uart_byte_safe_get _uart_byte_safe_get: ; arguments_none ; line_number = 9 ; returns byte ; # This procedure will the next byte from UART. If no byte ; # received in a reasonable time, 0xfc is returned. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 14 ; loop_exactly 255 start ;info 14, 133 _uart_byte_safe_get__1 equ globals___0+76 movlw 255 movwf _uart_byte_safe_get__1 _uart_byte_safe_get__2: ; line_number = 15 ; loop_exactly 255 start ;info 15, 135 _uart_byte_safe_get__3 equ globals___0+77 movlw 255 movwf _uart_byte_safe_get__3 _uart_byte_safe_get__4: ; line_number = 16 ; if _rcif start ;info 16, 137 ; =>bit_code_emit@symbol(): sym=_rcif ; No 1TEST: true.size=2 false.size=0 ; No 2TEST: true.size=2 false.size=0 ; 1GOTO: Single test with GOTO btfss _rcif___byte, _rcif___bit goto _uart_byte_safe_get__5 ; line_number = 17 ; return _rcreg start ; line_number = 17 ;info 17, 139 movf _rcreg,w return ; line_number = 17 ; return _rcreg done ; Recombine size1 = 0 || size2 = 0 _uart_byte_safe_get__5: ; line_number = 16 ; if _rcif done ; line_number = 15 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__3,f goto _uart_byte_safe_get__4 ; line_number = 15 ; loop_exactly 255 done ; line_number = 14 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__1,f goto _uart_byte_safe_get__2 ; line_number = 14 ; loop_exactly 255 done ; line_number = 18 ; return 0xfc start ; line_number = 18 ;info 18, 145 retlw 252 ; line_number = 18 ; return 0xfc done ; delay after procedure statements=non-uniform ; line_number = 21 ;info 21, 146 ; procedure _uart_byte_get _uart_byte_get: ; arguments_none ; line_number = 23 ; returns byte ; # This procedure will return the next byte from the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 27 ; while !_rcif start _uart_byte_get__1: ;info 27, 146 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfss _rcif___byte, _rcif___bit ; line_number = 28 ; do_nothing ;info 28, 147 goto _uart_byte_get__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 27 ; while !_rcif done ; line_number = 29 ; return _rcreg start ; line_number = 29 ;info 29, 148 movf _rcreg,w return ; line_number = 29 ; return _rcreg done ; delay after procedure statements=non-uniform ; line_number = 32 ;info 32, 150 ; procedure _uart_hex_put _uart_hex_put: ; Last argument is sitting in W; save into argument variable movwf _uart_hex_put__value ; delay=4294967295 ; line_number = 33 ; argument value byte _uart_hex_put__value equ globals___0 ; line_number = 34 ; returns_nothing ; # This procedure will output {value} to the UART as a 2-digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 39 ; call _uart_nibble_put(value >> 4) ;info 39, 151 _uart_hex_put__1 equ globals___0+78 swapf _uart_hex_put__value,w andlw 15 call _uart_nibble_put ; line_number = 40 ; call _uart_nibble_put(value & 0xf) ;info 40, 154 movlw 15 andwf _uart_hex_put__value,w call _uart_nibble_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 43 ;info 43, 158 ; procedure _uart_nibble_put _uart_nibble_put: ; Last argument is sitting in W; save into argument variable movwf _uart_nibble_put__nibble ; delay=4294967295 ; line_number = 44 ; argument nibble byte _uart_nibble_put__nibble equ globals___0+1 ; line_number = 45 ; returns_nothing ; # This procedure will output {value} to UART as a 1 digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 50 ; if nibble < 10 start ;info 50, 159 movlw 10 subwf _uart_nibble_put__nibble,w ; =>bit_code_emit@symbol(): sym=__c ; No 1TEST: true.size=1 false.size=1 ; 2TEST: two tests with code in both delay slots btfsc __c___byte, __c___bit ; line_number = 53 ; nibble := nibble - 10 + 'A' ;info 53, 162 movlw 55 btfss __c___byte, __c___bit ; line_number = 51 ; nibble := nibble + '0' ;info 51, 164 movlw 48 addwf _uart_nibble_put__nibble,f ; line_number = 50 ; if nibble < 10 done ; line_number = 54 ; call _uart_byte_put(nibble) ;info 54, 166 movf _uart_nibble_put__nibble,w call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 57 ;info 57, 169 ; procedure _uart_space_put _uart_space_put: ; arguments_none ; line_number = 59 ; returns_nothing ; # This procedure will output a space to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 63 ; call _uart_byte_put(' ') ;info 63, 169 movlw 32 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 66 ;info 66, 172 ; procedure _uart_crlf_put _uart_crlf_put: ; arguments_none ; line_number = 68 ; returns_nothing ; # This procedure will output a carriage return line feed sequecne to ; # the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 73 ; call _uart_byte_put('\cr\') ;info 73, 172 movlw 13 call _uart_byte_put ; line_number = 74 ; call _uart_byte_put('\lf\') ;info 74, 174 movlw 10 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 77 ;info 77, 177 ; procedure _uart_byte_put _uart_byte_put: ; Last argument is sitting in W; save into argument variable movwf _uart_byte_put__byte ; delay=4294967295 ; line_number = 78 ; argument byte byte _uart_byte_put__byte equ globals___0+2 ; line_number = 79 ; returns_nothing ; # This procedure will send {byte} out using to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 83 ; while !_txif start _uart_byte_put__1: ;info 83, 178 ; =>bit_code_emit@symbol(): sym=_txif ; 1TEST: Single test with code in skip slot btfss _txif___byte, _txif___bit ; line_number = 84 ; do_nothing ;info 84, 179 goto _uart_byte_put__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 83 ; while !_txif done ; line_number = 85 ; _txreg := byte ;info 85, 180 movf _uart_byte_put__byte,w movwf _txreg ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Configuration bits ; address = 0x2007, fill = 0x3000 ; fcmen = off (0x0) ; ieso = off (0x0) ; boden = off (0x0) ; cpd = off (0x80) ; cp = off (0x40) ; mclre = off (0x0) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = hs (0x2) ; 12498 = 0x30d2 __config 12498 ; Define start addresses for data regions ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 ; Region="globals___0" Address=32" Size=80 Bytes=79 Bits=0 Available=1 ; Region="globals___1" Address=160" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___2" Address=288" Size=80 Bytes=0 Bits=0 Available=80 ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 end