radix dec ; Code bank 0; Start address: 0; End address: 2047 org 0 ; Define start addresses for data regions shared___globals equ 112 globals___0 equ 32 globals___1 equ 160 globals___2 equ 272 globals___3 equ 400 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2006-2007 by Wayne C. Gramlich. ; # All rights reserved. ; # This module uses a PIC16f876A: ; buffer = 'shaft2' ; line_number = 6 ; library _pic16f876a entered ; # Copyright (c) 2004-2007 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f876a' ; line_number = 6 ; processor pic16f876a ; line_number = 7 ; configure_address 0x2007 ; line_number = 8 ; configure_fill 0x01030 ; line_number = 9 ; configure_option cp: off = 0x2000 ; line_number = 10 ; configure_option cp: on = 0x0000 ; line_number = 11 ; configure_option debug: on = 0x000 ; line_number = 12 ; configure_option debug: off = 0x800 ; line_number = 13 ; configure_option wrt: on = 0x000 ; line_number = 14 ; configure_option wrt: off = 0x300 ; line_number = 15 ; configure_option cpd: on = 0x000 ; line_number = 16 ; configure_option cpd: off = 0x100 ; line_number = 17 ; configure_option lvp: on = 0x80 ; line_number = 18 ; configure_option lvp: off = 0x00 ; line_number = 19 ; configure_option boren: on = 0x40 ; line_number = 20 ; configure_option boren: off = 0x00 ; line_number = 21 ; configure_option pwrte: on = 0 ; line_number = 22 ; configure_option pwrte: off = 8 ; line_number = 23 ; configure_option wdte: on = 4 ; line_number = 24 ; configure_option wdte: off = 0 ; line_number = 25 ; configure_option fosc: rc = 3 ; line_number = 26 ; configure_option fosc: hs = 2 ; line_number = 27 ; configure_option fosc: xt = 1 ; line_number = 28 ; configure_option fosc: lp = 0 ; line_number = 29 ; code_bank 0x0 : 0x7ff ; line_number = 30 ; code_bank 0x800 : 0xfff ; line_number = 31 ; code_bank 0x1000 : 0x17ff ; line_number = 32 ; code_bank 0x1800 : 0x1fff ; line_number = 33 ; data_bank 0x0 : 0x7f ; line_number = 34 ; data_bank 0x80 : 0xff ; line_number = 35 ; data_bank 0x100 : 0x17f ; line_number = 36 ; data_bank 0x180 : 0x1ff ; line_number = 37 ; global_region 0x20 : 0x6f ; line_number = 38 ; global_region 0xa0 : 0xef ; line_number = 39 ; global_region 0x110 : 0x16f ; line_number = 40 ; global_region 0x190 : 0x1ff ; line_number = 41 ; shared_region 0x70 : 0x7f ; line_number = 42 ; interrupts_possible ; line_number = 43 ; packages pdip = 28 ; line_number = 44 ; pin mclr, vpp, thv, mclr_unused ; line_number = 45 ; pin_bindings pdip = 1 ; line_number = 46 ; pin ra0_in, ra0_out, an0, ra0_unused ; line_number = 47 ; pin_bindings pdip = 2 ; line_number = 48 ; bind_to _porta@0 ; line_number = 49 ; or_if ra0_in _trisa 1 ; line_number = 50 ; or_if ra0_in _adcon1 7 ; line_number = 51 ; or_if ra0_in _adcon0 0 ; line_number = 52 ; or_if ra0_in _cmcon 7 ; line_number = 53 ; or_if ra0_out _trisa 0 ; line_number = 54 ; or_if ra0_out _adcon1 7 ; line_number = 55 ; or_if ra0_out _adcon0 0 ; line_number = 56 ; or_if ra0_out _cmcon 7 ; line_number = 57 ; or_if ra0_unused _trisa 1 ; line_number = 58 ; or_if ra0_unused _adcon1 7 ; line_number = 59 ; or_if ra0_unused _adcon0 0 ; line_number = 60 ; or_if ra0_unused _cmcon 7 ; line_number = 61 ; pin ra1_in, ra1_out, an1, ra1_unused ; line_number = 62 ; pin_bindings pdip = 3 ; line_number = 63 ; bind_to _porta@1 ; line_number = 64 ; or_if ra1_in _trisa 2 ; line_number = 65 ; or_if ra1_in _adcon1 7 ; line_number = 66 ; or_if ra1_in _adcon0 0 ; line_number = 67 ; or_if ra1_in _cmcon 7 ; line_number = 68 ; or_if ra1_out _trisa 0 ; line_number = 69 ; or_if ra1_out _adcon1 7 ; line_number = 70 ; or_if ra1_out _adcon0 0 ; line_number = 71 ; or_if ra1_out _cmcon 7 ; line_number = 72 ; or_if ra1_unused _trisa 2 ; line_number = 73 ; or_if ra1_unused _adcon1 7 ; line_number = 74 ; or_if ra1_unused _adcon0 0 ; line_number = 75 ; or_if ra1_unused _cmcon 7 ; line_number = 76 ; pin ra2_in, ra2_out, an2, vref_minus, ra2_unused ; line_number = 77 ; pin_bindings pdip = 4 ; line_number = 78 ; bind_to _porta@2 ; line_number = 79 ; or_if ra2_in _trisa 4 ; line_number = 80 ; or_if ra2_in _adcon1 7 ; line_number = 81 ; or_if ra2_in _adcon0 0 ; line_number = 82 ; or_if ra2_in _cmcon 7 ; line_number = 83 ; or_if ra2_out _trisa 0 ; line_number = 84 ; or_if ra2_out _adcon1 7 ; line_number = 85 ; or_if ra2_out _adcon0 0 ; line_number = 86 ; or_if ra2_out _cmcon 7 ; line_number = 87 ; or_if ra2_unused _trisa 4 ; line_number = 88 ; or_if ra2_unused _adcon1 7 ; line_number = 89 ; or_if ra2_unused _adcon0 0 ; line_number = 90 ; or_if ra2_unused _cmcon 7 ; line_number = 91 ; pin ra3_in, ra3_out, an3, vrev_plus, ra3_unused ; line_number = 92 ; pin_bindings pdip = 5 ; line_number = 93 ; bind_to _porta@3 ; line_number = 94 ; or_if ra3_in _trisa 8 ; line_number = 95 ; or_if ra3_in _adcon1 7 ; line_number = 96 ; or_if ra3_in _adcon0 0 ; line_number = 97 ; or_if ra3_in _cmcon 7 ; line_number = 98 ; or_if ra3_out _trisa 0 ; line_number = 99 ; or_if ra3_out _adcon1 7 ; line_number = 100 ; or_if ra3_out _adcon0 0 ; line_number = 101 ; or_if ra3_out _cmcon 7 ; line_number = 102 ; or_if ra3_unused _trisa 8 ; line_number = 103 ; or_if ra3_unused _adcon1 7 ; line_number = 104 ; or_if ra3_unused _adcon0 0 ; line_number = 105 ; or_if ra3_unused _cmcon 7 ; line_number = 106 ; pin ra4_in, ra4_out, t0cki, ra4_unused ; line_number = 107 ; pin_bindings pdip = 6 ; line_number = 108 ; bind_to _porta@4 ; line_number = 109 ; or_if ra4_in _trisa 16 ; line_number = 110 ; or_if ra4_in _adcon1 7 ; line_number = 111 ; or_if ra4_in _adcon0 0 ; line_number = 112 ; or_if ra4_out _trisa 0 ; line_number = 113 ; or_if ra4_out _adcon1 7 ; line_number = 114 ; or_if ra4_out _adcon0 0 ; line_number = 115 ; or_if ra4_unused _trisa 16 ; line_number = 116 ; or_if ra4_unused _adcon1 7 ; line_number = 117 ; or_if ra4_unused _adcon0 0 ; line_number = 118 ; pin ra5_in, ra5_out, an4, ra5_unused ; line_number = 119 ; pin_bindings pdip = 7 ; line_number = 120 ; bind_to _porta@5 ; line_number = 121 ; or_if ra5_in _trisa 32 ; line_number = 122 ; or_if ra5_in _adcon1 7 ; line_number = 123 ; or_if ra5_in _adcon1 0 ; line_number = 124 ; or_if ra5_out _trisa 0 ; line_number = 125 ; or_if ra5_out _adcon1 7 ; line_number = 126 ; or_if ra5_out _adcon0 0 ; line_number = 127 ; or_if ra5_unused _trisa 32 ; line_number = 128 ; or_if ra5_unused _adcon1 7 ; line_number = 129 ; or_if ra5_unused _adcon1 0 ; line_number = 130 ; pin vss, ground ; line_number = 131 ; pin_bindings pdip = 8 ; line_number = 132 ; pin osc1, clkin ; line_number = 133 ; pin_bindings pdip = 9 ; line_number = 134 ; pin osc2, clkout ; line_number = 135 ; pin_bindings pdip = 10 ; line_number = 136 ; pin rc0_in, rc0_out, t1oso, t1cki, rc0_unused ; line_number = 137 ; pin_bindings pdip = 11 ; line_number = 138 ; bind_to _portc@0 ; line_number = 139 ; or_if rc0_in _trisc 1 ; line_number = 140 ; or_if rc0_in _adcon1 7 ; line_number = 141 ; or_if rc0_in _adcon0 0 ; line_number = 142 ; or_if rc0_out _trisc 0 ; line_number = 143 ; or_if rc0_out _adcon1 7 ; line_number = 144 ; or_if rc0_out _adcon0 0 ; line_number = 145 ; or_if rc0_unused _trisc 1 ; line_number = 146 ; or_if rc0_unused _adcon1 7 ; line_number = 147 ; or_if rc0_unused _adcon0 0 ; line_number = 148 ; pin rc1_in, rc1_out, t1osi, ccp2, rc1_unused ; line_number = 149 ; pin_bindings pdip = 12 ; line_number = 150 ; bind_to _portc@1 ; line_number = 151 ; or_if rc1_in _trisc 2 ; line_number = 152 ; or_if rc1_in _adcon1 7 ; line_number = 153 ; or_if rc1_in _adcon0 0 ; line_number = 154 ; or_if rc1_out _trisc 0 ; line_number = 155 ; or_if rc1_out _adcon1 7 ; line_number = 156 ; or_if rc1_out _adcon0 0 ; line_number = 157 ; or_if rc1_unused _trisc 2 ; line_number = 158 ; or_if rc1_unused _adcon1 7 ; line_number = 159 ; or_if rc1_unused _adcon0 0 ; line_number = 160 ; pin rc2_in, rc2_out, ccp1, rc2_unused ; line_number = 161 ; pin_bindings pdip = 13 ; line_number = 162 ; bind_to _portc@2 ; line_number = 163 ; or_if rc2_in _trisc 4 ; line_number = 164 ; or_if rc2_in _adcon1 7 ; line_number = 165 ; or_if rc2_in _adcon0 0 ; line_number = 166 ; or_if rc2_out _trisc 0 ; line_number = 167 ; or_if rc2_out _adcon1 7 ; line_number = 168 ; or_if rc2_out _adcon0 0 ; line_number = 169 ; or_if rc2_unused _trisc 4 ; line_number = 170 ; or_if rc2_unused _adcon1 7 ; line_number = 171 ; or_if rc2_unused _adcon0 0 ; line_number = 172 ; pin rc3_in, rc3_out, sck_master, sck_slave, scl, rc3_unused ; line_number = 173 ; pin_bindings pdip = 14 ; line_number = 174 ; bind_to _portc@3 ; line_number = 175 ; or_if rc3_in _trisc 8 ; line_number = 176 ; or_if rc3_in _adcon1 7 ; line_number = 177 ; or_if rc3_in _adcon0 0 ; line_number = 178 ; or_if rc3_out _trisc 0 ; line_number = 179 ; or_if rc3_out _adcon1 7 ; line_number = 180 ; or_if rc3_out _adcon0 0 ; line_number = 181 ; or_if sck_slave _trisc 8 ; line_number = 182 ; or_if sck_slave _adcon1 7 ; line_number = 183 ; or_if sck_slave _adcon0 0 ; line_number = 184 ; or_if sck_master _trisc 0 ; line_number = 185 ; or_if sck_master _adcon1 7 ; line_number = 186 ; or_if sck_master _adcon0 0 ; line_number = 187 ; or_if rc3_unused _trisc 8 ; line_number = 188 ; or_if rc3_unused _adcon1 7 ; line_number = 189 ; or_if rc3_unused _adcon0 0 ; line_number = 190 ; pin rc4_in, rc4_out, sdi, sda, rc4_unused ; line_number = 191 ; pin_bindings pdip = 15 ; line_number = 192 ; bind_to _portc@4 ; line_number = 193 ; or_if rc4_in _trisc 16 ; line_number = 194 ; or_if rc4_in _adcon1 7 ; line_number = 195 ; or_if rc4_in _adcon0 0 ; line_number = 196 ; or_if rc4_out _trisc 0 ; line_number = 197 ; or_if rc4_out _adcon1 7 ; line_number = 198 ; or_if rc4_out _adcon0 0 ; line_number = 199 ; or_if sdi _trisc 16 ; line_number = 200 ; or_if sdi _adcon1 7 ; line_number = 201 ; or_if sdi _adcon0 0 ; line_number = 202 ; or_if rc4_unused _trisc 16 ; line_number = 203 ; or_if rc4_unused _adcon1 7 ; line_number = 204 ; or_if rc4_unused _adcon0 0 ; line_number = 205 ; pin rc5_in, rc5_out, sdo, rc5_unused ; line_number = 206 ; pin_bindings pdip = 16 ; line_number = 207 ; bind_to _portc@5 ; line_number = 208 ; or_if rc5_in _trisc 32 ; line_number = 209 ; or_if rc5_in _adcon1 7 ; line_number = 210 ; or_if rc5_in _adcon0 0 ; line_number = 211 ; or_if rc5_out _trisc 0 ; line_number = 212 ; or_if rc5_out _adcon1 7 ; line_number = 213 ; or_if rc5_out _adcon0 0 ; line_number = 214 ; or_if sdo _trisc 0 ; line_number = 215 ; or_if sdo _adcon1 7 ; line_number = 216 ; or_if sdo _adcon0 0 ; line_number = 217 ; or_if rc5_unused _trisc 32 ; line_number = 218 ; or_if rc5_unused _adcon1 7 ; line_number = 219 ; or_if rc5_unused _adcon0 0 ; line_number = 220 ; pin rc6_in, rc6_out, tx, ck, rc6_unused ; line_number = 221 ; pin_bindings pdip = 17 ; line_number = 222 ; bind_to _portc@6 ; line_number = 223 ; or_if rc6_in _trisc 64 ; line_number = 224 ; or_if rc6_in _adcon1 7 ; line_number = 225 ; or_if rc6_in _adcon0 0 ; line_number = 226 ; or_if rc6_out _trisc 0 ; line_number = 227 ; or_if rc6_out _adcon1 7 ; line_number = 228 ; or_if rc6_out _adcon0 0 ; line_number = 229 ; or_if tx _trisc 0 ; line_number = 230 ; or_if tx _adcon1 7 ; line_number = 231 ; or_if tx _adcon0 0 ; line_number = 232 ; or_if rc6_unused _trisc 64 ; line_number = 233 ; or_if rc6_unused _adcon1 7 ; line_number = 234 ; or_if rc6_unused _adcon0 0 ; line_number = 235 ; pin rc7_in, rc7_out, rx, dt, rc7_unused ; line_number = 236 ; pin_bindings pdip = 18 ; line_number = 237 ; bind_to _portc@7 ; line_number = 238 ; or_if rc7_in _trisc 128 ; line_number = 239 ; or_if rc7_in _adcon1 7 ; line_number = 240 ; or_if rc7_in _adcon0 0 ; line_number = 241 ; or_if rx _trisc 128 ; line_number = 242 ; or_if rx _adcon1 7 ; line_number = 243 ; or_if rx _adcon0 0 ; line_number = 244 ; or_if rc7_out _trisc 0 ; line_number = 245 ; or_if rc7_out _adcon1 7 ; line_number = 246 ; or_if rc7_out _adcon0 0 ; line_number = 247 ; or_if rc7_unused _trisc 128 ; line_number = 248 ; or_if rc7_unused _adcon1 7 ; line_number = 249 ; or_if rc7_unused _adcon0 0 ; line_number = 250 ; pin vss2, ground2 ; line_number = 251 ; pin_bindings pdip = 19 ; line_number = 252 ; pin vdd, power_supply ; line_number = 253 ; pin_bindings pdip = 20 ; line_number = 254 ; pin rb0_in, rb0_out, int, rb0_unused ; line_number = 255 ; pin_bindings pdip = 21 ; line_number = 256 ; bind_to _portb@0 ; line_number = 257 ; or_if rb0_in _trisb 1 ; line_number = 258 ; or_if rb0_in _adcon1 7 ; line_number = 259 ; or_if rb0_in _adcon0 0 ; line_number = 260 ; or_if rb0_out _trisb 0 ; line_number = 261 ; or_if rb0_out _adcon1 7 ; line_number = 262 ; or_if rb0_out _adcon0 0 ; line_number = 263 ; or_if rb0_unused _trisb 1 ; line_number = 264 ; or_if rb0_unused _adcon1 7 ; line_number = 265 ; or_if rb0_unused _adcon0 0 ; line_number = 266 ; pin rb1_in, rb1_out, rb1_unused ; line_number = 267 ; pin_bindings pdip = 22 ; line_number = 268 ; bind_to _portb@1 ; line_number = 269 ; or_if rb1_in _trisb 2 ; line_number = 270 ; or_if rb1_in _adcon1 7 ; line_number = 271 ; or_if rb1_in _adcon0 0 ; line_number = 272 ; or_if rb1_out _trisb 0 ; line_number = 273 ; or_if rb1_out _adcon1 7 ; line_number = 274 ; or_if rb1_out _adcon0 0 ; line_number = 275 ; or_if rb1_unused _trisb 2 ; line_number = 276 ; or_if rb1_unused _adcon1 7 ; line_number = 277 ; or_if rb1_unused _adcon0 0 ; line_number = 278 ; pin rb2_in, rb2_out, rb2_unused ; line_number = 279 ; pin_bindings pdip = 23 ; line_number = 280 ; bind_to _portb@2 ; line_number = 281 ; or_if rb2_in _trisb 4 ; line_number = 282 ; or_if rb2_in _adcon1 7 ; line_number = 283 ; or_if rb2_in _adcon0 0 ; line_number = 284 ; or_if rb2_out _trisb 0 ; line_number = 285 ; or_if rb2_out _adcon1 7 ; line_number = 286 ; or_if rb2_out _adcon0 0 ; line_number = 287 ; or_if rb2_unused _trisb 4 ; line_number = 288 ; or_if rb2_unused _adcon1 7 ; line_number = 289 ; or_if rb2_unused _adcon0 0 ; line_number = 290 ; pin rb3_in, rb3_out, pgm, rb3_unused ; line_number = 291 ; pin_bindings pdip = 24 ; line_number = 292 ; bind_to _portb@3 ; line_number = 293 ; or_if rb3_in _trisb 8 ; line_number = 294 ; or_if rb3_in _adcon1 7 ; line_number = 295 ; or_if rb3_in _adcon0 0 ; line_number = 296 ; or_if rb3_out _trisb 0 ; line_number = 297 ; or_if rb3_out _adcon1 7 ; line_number = 298 ; or_if rb3_out _adcon0 0 ; line_number = 299 ; or_if rb3_unused _trisb 8 ; line_number = 300 ; or_if rb3_unused _adcon1 7 ; line_number = 301 ; or_if rb3_unused _adcon0 0 ; line_number = 302 ; pin rb4_in, rb4_out, rb4_unused ; line_number = 303 ; pin_bindings pdip = 25 ; line_number = 304 ; bind_to _portb@4 ; line_number = 305 ; or_if rb4_in _trisb 16 ; line_number = 306 ; or_if rb4_in _adcon1 7 ; line_number = 307 ; or_if rb4_in _adcon0 0 ; line_number = 308 ; or_if rb4_out _trisb 0 ; line_number = 309 ; or_if rb4_out _adcon1 7 ; line_number = 310 ; or_if rb4_out _adcon0 0 ; line_number = 311 ; or_if rb4_unused _trisb 16 ; line_number = 312 ; or_if rb4_unused _adcon1 7 ; line_number = 313 ; or_if rb4_unused _adcon0 0 ; line_number = 314 ; pin rb5_in, rb5_out, rb5_unused ; line_number = 315 ; pin_bindings pdip = 26 ; line_number = 316 ; bind_to _portb@5 ; line_number = 317 ; or_if rb5_in _trisb 32 ; line_number = 318 ; or_if rb5_in _adcon1 7 ; line_number = 319 ; or_if rb5_in _adcon0 0 ; line_number = 320 ; or_if rb5_out _trisb 0 ; line_number = 321 ; or_if rb5_out _adcon1 7 ; line_number = 322 ; or_if rb5_out _adcon0 0 ; line_number = 323 ; or_if rb5_unused _trisb 32 ; line_number = 324 ; or_if rb5_unused _adcon1 7 ; line_number = 325 ; or_if rb5_unused _adcon0 0 ; line_number = 326 ; pin rb6_in, rb6_out, pgc, rb6_unused ; line_number = 327 ; pin_bindings pdip = 27 ; line_number = 328 ; bind_to _portb@6 ; line_number = 329 ; or_if rb6_in _trisb 64 ; line_number = 330 ; or_if rb6_in _adcon1 7 ; line_number = 331 ; or_if rb6_in _adcon0 0 ; line_number = 332 ; or_if rb6_out _trisb 0 ; line_number = 333 ; or_if rb6_out _adcon1 7 ; line_number = 334 ; or_if rb6_out _adcon0 0 ; line_number = 335 ; or_if rb6_unused _trisb 64 ; line_number = 336 ; or_if rb6_unused _adcon1 7 ; line_number = 337 ; or_if rb6_unused _adcon0 0 ; line_number = 338 ; pin rb7_in, rb7_out, pgd, rb7_unused ; line_number = 339 ; pin_bindings pdip = 28 ; line_number = 340 ; bind_to _portb@7 ; line_number = 341 ; or_if rb7_in _trisb 128 ; line_number = 342 ; or_if rb7_in _adcon1 7 ; line_number = 343 ; or_if rb7_in _adcon0 0 ; line_number = 344 ; or_if rb7_out _trisb 0 ; line_number = 345 ; or_if rb7_out _adcon1 7 ; line_number = 346 ; or_if rb7_out _adcon0 0 ; line_number = 347 ; or_if rb7_unused _trisb 128 ; line_number = 348 ; or_if rb7_unused _adcon1 7 ; line_number = 349 ; or_if rb7_unused _adcon0 0 ; # Register and pin definitions: ; line_number = 356 ; library _pic16f87x entered ; # Copyright (c) 2004-2006 by Wayne C. Gramlich ; # All rights reserved. ; # Common declarations for PIC16F87x series microcontrollers: ; buffer = '_pic16f87x' ; line_number = 8 ; library _standard entered ; # Copyright (c) 2006 by Wayne C. Gramlich ; # All rights reserved. ; # Standard definition for uCL: ; buffer = '_standard' ; line_number = 8 ; constant _true = (1 = 1) _true equ 1 ; line_number = 9 ; constant _false = (0 != 0) _false equ 0 ; buffer = '_pic16f87x' ; line_number = 8 ; library _standard exited ; # Register and pin definitions: ; # Bank 0: ; line_number = 14 ; register _indf = _indf equ 0 ; line_number = 16 ; register _tmr0 = _tmr0 equ 1 ; line_number = 18 ; register _pcl = _pcl equ 2 ; line_number = 20 ; register _status = _status equ 3 ; line_number = 21 ; bind _irp = _status@7 _irp___byte equ _status _irp___bit equ 7 ; line_number = 22 ; bind _rp1 = _status@6 _rp1___byte equ _status _rp1___bit equ 6 ; line_number = 23 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 24 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 25 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 26 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 27 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 28 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 30 ; register _fsr = _fsr equ 4 ; line_number = 32 ; register _porta = _porta equ 5 ; line_number = 34 ; register _portb = _portb equ 6 ; line_number = 36 ; register _portc = _portc equ 7 ; line_number = 38 ; register _pclath = _pclath equ 10 ; line_number = 40 ; register _intcon = _intcon equ 11 ; line_number = 41 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 42 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 43 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 44 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 45 ; bind _rbie = _intcon@3 _rbie___byte equ _intcon _rbie___bit equ 3 ; line_number = 46 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 47 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 48 ; bind _rbf = _intcon@0 _rbf___byte equ _intcon _rbf___bit equ 0 ; line_number = 50 ; register _pir1 = _pir1 equ 12 ; line_number = 51 ; bind _pspif = _pir1@7 _pspif___byte equ _pir1 _pspif___bit equ 7 ; line_number = 52 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 53 ; bind _rcif = _pir1@5 _rcif___byte equ _pir1 _rcif___bit equ 5 ; line_number = 54 ; bind _txif = _pir1@4 _txif___byte equ _pir1 _txif___bit equ 4 ; line_number = 55 ; bind _sspif = _pir1@3 _sspif___byte equ _pir1 _sspif___bit equ 3 ; line_number = 56 ; bind _ccpif = _pir1@2 _ccpif___byte equ _pir1 _ccpif___bit equ 2 ; line_number = 57 ; bind _tmr2if = _pir1@1 _tmr2if___byte equ _pir1 _tmr2if___bit equ 1 ; line_number = 58 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 60 ; register _pir2 = _pir2 equ 13 ; line_number = 61 ; bind _eeif = _pir2@4 _eeif___byte equ _pir2 _eeif___bit equ 4 ; line_number = 62 ; bind _bclif = _pir2@3 _bclif___byte equ _pir2 _bclif___bit equ 3 ; line_number = 63 ; bind _ccp2if = _pir2@0 _ccp2if___byte equ _pir2 _ccp2if___bit equ 0 ; line_number = 65 ; register _tmr1l = _tmr1l equ 14 ; line_number = 67 ; register _tmr1h = _tmr1h equ 15 ; line_number = 69 ; register _t1con = _t1con equ 16 ; line_number = 70 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 71 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 72 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 73 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 74 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 75 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 77 ; register _tmr2 = _tmr2 equ 17 ; line_number = 79 ; register _t2con = _t2con equ 18 ; line_number = 80 ; bind _toutps3 = _t2con@6 _toutps3___byte equ _t2con _toutps3___bit equ 6 ; line_number = 81 ; bind _toutps2 = _t2con@5 _toutps2___byte equ _t2con _toutps2___bit equ 5 ; line_number = 82 ; bind _toutps1 = _t2con@4 _toutps1___byte equ _t2con _toutps1___bit equ 4 ; line_number = 83 ; bind _toutps0 = _t2con@3 _toutps0___byte equ _t2con _toutps0___bit equ 3 ; line_number = 84 ; bind _tmr2on = _t2con@2 _tmr2on___byte equ _t2con _tmr2on___bit equ 2 ; line_number = 85 ; bind _t2ckps1 = _t2con@1 _t2ckps1___byte equ _t2con _t2ckps1___bit equ 1 ; line_number = 86 ; bind _t2ckps0 = _t2con@0 _t2ckps0___byte equ _t2con _t2ckps0___bit equ 0 ; line_number = 88 ; register _sspbuf = _sspbuf equ 19 ; line_number = 90 ; register _sspcon = _sspcon equ 20 ; line_number = 91 ; bind _wcol = _sspcon@7 _wcol___byte equ _sspcon _wcol___bit equ 7 ; line_number = 92 ; bind _sspov = _sspcon@6 _sspov___byte equ _sspcon _sspov___bit equ 6 ; line_number = 93 ; bind _sspen = _sspcon@5 _sspen___byte equ _sspcon _sspen___bit equ 5 ; line_number = 94 ; bind _ckp = _sspcon@4 _ckp___byte equ _sspcon _ckp___bit equ 4 ; line_number = 95 ; bind _sspm3 = _sspcon@3 _sspm3___byte equ _sspcon _sspm3___bit equ 3 ; line_number = 96 ; bind _sspm2 = _sspcon@2 _sspm2___byte equ _sspcon _sspm2___bit equ 2 ; line_number = 97 ; bind _sspm1 = _sspcon@1 _sspm1___byte equ _sspcon _sspm1___bit equ 1 ; line_number = 98 ; bind _sspm0 = _sspcon@0 _sspm0___byte equ _sspcon _sspm0___bit equ 0 ; line_number = 100 ; register _ccpr1l = _ccpr1l equ 21 ; line_number = 102 ; register _ccpr1h = _ccpr1h equ 22 ; line_number = 104 ; register _ccp1con = _ccp1con equ 23 ; line_number = 105 ; bind _ccp1x = _ccp1con@5 _ccp1x___byte equ _ccp1con _ccp1x___bit equ 5 ; line_number = 106 ; bind _ccp1y = _ccp1con@4 _ccp1y___byte equ _ccp1con _ccp1y___bit equ 4 ; line_number = 107 ; bind _ccp1m3 = _ccp1con@3 _ccp1m3___byte equ _ccp1con _ccp1m3___bit equ 3 ; line_number = 108 ; bind _ccp1m2 = _ccp1con@2 _ccp1m2___byte equ _ccp1con _ccp1m2___bit equ 2 ; line_number = 109 ; bind _ccp1m1 = _ccp1con@1 _ccp1m1___byte equ _ccp1con _ccp1m1___bit equ 1 ; line_number = 110 ; bind _ccp1m0 = _ccp1con@0 _ccp1m0___byte equ _ccp1con _ccp1m0___bit equ 0 ; line_number = 112 ; register _rcsta = _rcsta equ 24 ; line_number = 113 ; bind _spen = _rcsta@7 _spen___byte equ _rcsta _spen___bit equ 7 ; line_number = 114 ; bind _rx9 = _rcsta@6 _rx9___byte equ _rcsta _rx9___bit equ 6 ; line_number = 115 ; bind _sren = _rcsta@5 _sren___byte equ _rcsta _sren___bit equ 5 ; line_number = 116 ; bind _cren = _rcsta@4 _cren___byte equ _rcsta _cren___bit equ 4 ; line_number = 117 ; bind _adden = _rcsta@3 _adden___byte equ _rcsta _adden___bit equ 3 ; line_number = 118 ; bind _ferr = _rcsta@2 _ferr___byte equ _rcsta _ferr___bit equ 2 ; line_number = 119 ; bind _oerr = _rcsta@1 _oerr___byte equ _rcsta _oerr___bit equ 1 ; line_number = 120 ; bind _rx9d = _rcsta@0 _rx9d___byte equ _rcsta _rx9d___bit equ 0 ; line_number = 122 ; register _txreg = _txreg equ 25 ; line_number = 124 ; register _rcreg = _rcreg equ 26 ; line_number = 126 ; register _ccpr2l = _ccpr2l equ 27 ; line_number = 128 ; register _ccpr2h = _ccpr2h equ 28 ; line_number = 130 ; register _ccp2con = _ccp2con equ 29 ; line_number = 131 ; bind _ccp2x = _ccp2con@5 _ccp2x___byte equ _ccp2con _ccp2x___bit equ 5 ; line_number = 132 ; bind _ccp2y = _ccp2con@4 _ccp2y___byte equ _ccp2con _ccp2y___bit equ 4 ; line_number = 133 ; bind _ccp2m3 = _ccp2con@3 _ccp2m3___byte equ _ccp2con _ccp2m3___bit equ 3 ; line_number = 134 ; bind _ccp2m2 = _ccp2con@2 _ccp2m2___byte equ _ccp2con _ccp2m2___bit equ 2 ; line_number = 135 ; bind _ccp2m1 = _ccp2con@1 _ccp2m1___byte equ _ccp2con _ccp2m1___bit equ 1 ; line_number = 136 ; bind _ccp2m0 = _ccp2con@0 _ccp2m0___byte equ _ccp2con _ccp2m0___bit equ 0 ; line_number = 138 ; register _adresh = _adresh equ 30 ; line_number = 140 ; register _adcon0 = _adcon0 equ 31 ; line_number = 141 ; bind _adcs1 = _adcon0@7 _adcs1___byte equ _adcon0 _adcs1___bit equ 7 ; line_number = 142 ; bind _adcs0 = _adcon0@6 _adcs0___byte equ _adcon0 _adcs0___bit equ 6 ; line_number = 143 ; bind _chs2 = _adcon0@5 _chs2___byte equ _adcon0 _chs2___bit equ 5 ; line_number = 144 ; bind _chs1 = _adcon0@4 _chs1___byte equ _adcon0 _chs1___bit equ 4 ; line_number = 145 ; bind _chs0 = _adcon0@3 _chs0___byte equ _adcon0 _chs0___bit equ 3 ; line_number = 146 ; bind _go_done = _adcon0@2 _go_done___byte equ _adcon0 _go_done___bit equ 2 ; line_number = 147 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Bank 1: ; line_number = 151 ; register _option_reg = _option_reg equ 129 ; line_number = 152 ; bind _rbpu = _option_reg@7 _rbpu___byte equ _option_reg _rbpu___bit equ 7 ; line_number = 153 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 154 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 155 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 156 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 157 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 158 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 159 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 161 ; register _trisa = _trisa equ 133 ; line_number = 163 ; register _trisb = _trisb equ 134 ; line_number = 165 ; register _trisc = _trisc equ 135 ; line_number = 167 ; register _pie1 = _pie1 equ 140 ; line_number = 168 ; bind _pspie = _pie1@7 _pspie___byte equ _pie1 _pspie___bit equ 7 ; line_number = 169 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 170 ; bind _rcie = _pie1@5 _rcie___byte equ _pie1 _rcie___bit equ 5 ; line_number = 171 ; bind _txie = _pie1@4 _txie___byte equ _pie1 _txie___bit equ 4 ; line_number = 172 ; bind _sspie = _pie1@3 _sspie___byte equ _pie1 _sspie___bit equ 3 ; line_number = 173 ; bind _ccp1ie = _pie1@2 _ccp1ie___byte equ _pie1 _ccp1ie___bit equ 2 ; line_number = 174 ; bind _tmr2ie = _pie1@1 _tmr2ie___byte equ _pie1 _tmr2ie___bit equ 1 ; line_number = 175 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 177 ; register _pie2 = _pie2 equ 141 ; line_number = 178 ; bind _eeie = _pie2@4 _eeie___byte equ _pie2 _eeie___bit equ 4 ; line_number = 179 ; bind _bcie = _pie2@3 _bcie___byte equ _pie2 _bcie___bit equ 3 ; line_number = 180 ; bind _ccp2ie = _pie2@0 _ccp2ie___byte equ _pie2 _ccp2ie___bit equ 0 ; line_number = 182 ; register _pcon = _pcon equ 142 ; line_number = 183 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 184 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 186 ; register _sspcon2 = _sspcon2 equ 145 ; line_number = 187 ; bind _gcen = _sspcon2@7 _gcen___byte equ _sspcon2 _gcen___bit equ 7 ; line_number = 188 ; bind _ackstat = _sspcon2@6 _ackstat___byte equ _sspcon2 _ackstat___bit equ 6 ; line_number = 189 ; bind _ackdt = _sspcon2@5 _ackdt___byte equ _sspcon2 _ackdt___bit equ 5 ; line_number = 190 ; bind _acken = _sspcon2@4 _acken___byte equ _sspcon2 _acken___bit equ 4 ; line_number = 191 ; bind _rcen = _sspcon2@3 _rcen___byte equ _sspcon2 _rcen___bit equ 3 ; line_number = 192 ; bind _pen = _sspcon2@2 _pen___byte equ _sspcon2 _pen___bit equ 2 ; line_number = 193 ; bind _rsen = _sspcon2@1 _rsen___byte equ _sspcon2 _rsen___bit equ 1 ; line_number = 194 ; bind _sen = _sspcon2@0 _sen___byte equ _sspcon2 _sen___bit equ 0 ; line_number = 196 ; register _pr2 = _pr2 equ 146 ; line_number = 198 ; register _sspadd = _sspadd equ 147 ; line_number = 200 ; register _sspstat = _sspstat equ 148 ; line_number = 201 ; bind _smp = _sspstat@7 _smp___byte equ _sspstat _smp___bit equ 7 ; line_number = 202 ; bind _cke = _sspstat@6 _cke___byte equ _sspstat _cke___bit equ 6 ; line_number = 203 ; bind _da = _sspstat@5 _da___byte equ _sspstat _da___bit equ 5 ; line_number = 204 ; bind _p = _sspstat@4 _p___byte equ _sspstat _p___bit equ 4 ; line_number = 205 ; bind _s = _sspstat@3 _s___byte equ _sspstat _s___bit equ 3 ; line_number = 206 ; bind _rw = _sspstat@2 _rw___byte equ _sspstat _rw___bit equ 2 ; line_number = 207 ; bind _ua = _sspstat@1 _ua___byte equ _sspstat _ua___bit equ 1 ; line_number = 208 ; bind _bf = _sspstat@0 _bf___byte equ _sspstat _bf___bit equ 0 ; line_number = 210 ; register _txsta = _txsta equ 152 ; line_number = 211 ; bind _csrc = _txsta@7 _csrc___byte equ _txsta _csrc___bit equ 7 ; line_number = 212 ; bind _tx9 = _txsta@6 _tx9___byte equ _txsta _tx9___bit equ 6 ; line_number = 213 ; bind _txen = _txsta@5 _txen___byte equ _txsta _txen___bit equ 5 ; line_number = 214 ; bind _sync = _txsta@4 _sync___byte equ _txsta _sync___bit equ 4 ; line_number = 215 ; bind _brgh = _txsta@2 _brgh___byte equ _txsta _brgh___bit equ 2 ; line_number = 216 ; bind _trmt = _txsta@1 _trmt___byte equ _txsta _trmt___bit equ 1 ; line_number = 217 ; bind _tx9d = _txsta@0 _tx9d___byte equ _txsta _tx9d___bit equ 0 ; line_number = 219 ; register _spbrg = _spbrg equ 153 ; line_number = 221 ; register _cmcon = _cmcon equ 156 ; line_number = 222 ; bind _c2out = _cmcon@7 _c2out___byte equ _cmcon _c2out___bit equ 7 ; line_number = 223 ; bind _c1out = _cmcon@6 _c1out___byte equ _cmcon _c1out___bit equ 6 ; line_number = 224 ; bind _c2inv = _cmcon@5 _c2inv___byte equ _cmcon _c2inv___bit equ 5 ; line_number = 225 ; bind _c1inv = _cmcon@4 _c1inv___byte equ _cmcon _c1inv___bit equ 4 ; line_number = 226 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 227 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 228 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 229 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; line_number = 231 ; register _cvrcon = _cvrcon equ 157 ; line_number = 232 ; bind _cvren = _cvrcon@7 _cvren___byte equ _cvrcon _cvren___bit equ 7 ; line_number = 233 ; bind _cvroe = _cvrcon@6 _cvroe___byte equ _cvrcon _cvroe___bit equ 6 ; line_number = 234 ; bind _cvrr = _cvrcon@5 _cvrr___byte equ _cvrcon _cvrr___bit equ 5 ; line_number = 235 ; bind _cvr3 = _cvrcon@3 _cvr3___byte equ _cvrcon _cvr3___bit equ 3 ; line_number = 236 ; bind _cvr2 = _cvrcon@2 _cvr2___byte equ _cvrcon _cvr2___bit equ 2 ; line_number = 237 ; bind _cvr1 = _cvrcon@1 _cvr1___byte equ _cvrcon _cvr1___bit equ 1 ; line_number = 238 ; bind _cvr0 = _cvrcon@0 _cvr0___byte equ _cvrcon _cvr0___bit equ 0 ; line_number = 240 ; register _adresl = _adresl equ 158 ; line_number = 242 ; register _adcon1 = _adcon1 equ 159 ; line_number = 243 ; bind _adfm = _adcon1@7 _adfm___byte equ _adcon1 _adfm___bit equ 7 ; line_number = 244 ; bind _pcfg3 = _adcon1@3 _pcfg3___byte equ _adcon1 _pcfg3___bit equ 3 ; line_number = 245 ; bind _pcfg2 = _adcon1@2 _pcfg2___byte equ _adcon1 _pcfg2___bit equ 2 ; line_number = 246 ; bind _pcfg1 = _adcon1@1 _pcfg1___byte equ _adcon1 _pcfg1___bit equ 1 ; line_number = 247 ; bind _pcfg0 = _adcon1@0 _pcfg0___byte equ _adcon1 _pcfg0___bit equ 0 ; # Bank 2: ; line_number = 251 ; register _eedata = _eedata equ 268 ; line_number = 253 ; register _eeadr = _eeadr equ 269 ; line_number = 255 ; register _eedath = _eedath equ 270 ; line_number = 257 ; register _eeadrh = _eeadrh equ 271 ; # Bank 3: ; line_number = 261 ; register _eecon1 = _eecon1 equ 396 ; line_number = 262 ; bind _eepgd = _eecon1@7 _eepgd___byte equ _eecon1 _eepgd___bit equ 7 ; line_number = 263 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 264 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 265 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 266 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 268 ; register _eecon2 = _eecon2 equ 397 ; buffer = '_pic16f876a' ; line_number = 356 ; library _pic16f87x exited ; buffer = 'shaft2' ; line_number = 6 ; library _pic16f876a exited ; #library _pic16f767 ; # The system is running at 16MHz: ; line_number = 10 ; library clock16mhz entered ; # Copyright (c) 2006 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock16mhz' ; line_number = 9 ; constant clock_rate = 16000000 clock_rate equ 16000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 4000000 ; buffer = 'shaft2' ; line_number = 10 ; library clock16mhz exited ; # The library of bus access initialization routines for use by a PIC16F876A: ; line_number = 13 ; library rb2bus_pic16f876 entered ; # Copyright (c) 2006-2007 by Wayne C. Gramlich ; # All rights reserved. ; # This module provides some procedures for accessing a RoboBricks2 ; # bus via a UART. It is speicialized for the PIC16F876: ; # ; # It defines the following procedure: ; # ; # {rb2bus_initialize}({address}) The procedure that initializes the UART ; # for bus access. ; # Global variables used by {rb2bus} library and {rb2bus_picXXXX} libraries: ; buffer = 'rb2bus_pic16f876' ; line_number = 15 ; library rb2bus_globals entered ; # Copyright (c) 2006-2007 by Wayne C. Gramlich ; # All rights reserved. ; # These are the global variables used by both the {rb2bus} and ; # the various {rb2bus_picXXXX} libraries. Poll based firmware ; # uses both libraries, whereas interrupt driven software only ; # uses the {rb2bus_picXXX} libraries. ; buffer = 'rb2bus_globals' ; line_number = 11 ; global rb2bus_selected bit # rb2bus_selected___byte equ globals___0+79 rb2bus_selected___bit equ 0 ; line_number = 12 ; global rb2bus_error bit # Global error bit rb2bus_error___byte equ globals___0+79 rb2bus_error___bit equ 1 ; line_number = 13 ; global rb2bus_address byte # Bus address to respond to rb2bus_address equ globals___0 ; line_number = 14 ; global rb2bus_index byte # Index into id information rb2bus_index equ globals___0+1 ; buffer = 'rb2bus_pic16f876' ; line_number = 15 ; library rb2bus_globals exited ; # All other bus access procedures are defined in the {rb2bus} library ; # which is accessed below: ; # Baud_Rate = Fosc / (16(X+1)) ; # 16 * (X+1) = Fosc/Baud_Rate ; # X+1 = Fosc/(16*Baud_Rate) ; # X = Fosc/(16*Baud_rate) - 1 ; line_number = 25 ; constant baud_rate_500k = 500000 baud_rate_500k equ 500000 ; line_number = 26 ; constant spbrg_500k = clock_rate / (16 * baud_rate_500k) - 1 spbrg_500k equ 1 ; Delaying code generation for procedure rb2bus_initialize ; line_number = 64 ; constant rb2bus_eedata_address = 0xfe rb2bus_eedata_address equ 254 ; Delaying code generation for procedure rb2bus_eedata_read ; Delaying code generation for procedure rb2bus_eedata_write ; buffer = 'shaft2' ; line_number = 13 ; library rb2bus_pic16f876 exited ; # The library of bus access routines: ; line_number = 16 ; library rb2bus entered ; # Copyright (c) 2006-2007 by Wayne C. Gramlich ; # All rights reserved. ; # This module provides some procedures for accessing a RoboBricks2 ; # bus via a UART. ; # ; # This procedure defines the following procedures: ; # ; # {rb2bus_select_wait} This procedure waits for the module to become selected ; # {rb2bus_deselect} This procedure causes this module to be deselected. ; # {rb2bus_byte_get} This procedure will get a byte form the bus. ; # {rb2bus_byte_put} This procedure will send a byte to the bus. ; # ; # The global variable {rb2bus_error} is set to 1 whenever the procedures ; # feel like there is a command decoding error. ; # ; # The way to use these procedures is quite as follows: ; # ; # # Comamnd byte variable: ; # local command byte ; # ; # # Other initialize code goes here: ; # ; # # Process commands from bus master: ; # loop_forever ; # rb2bus_error := _true ; # while rb2bus_error ; # call rb2bus_select_wait() ; # command := rb2bus_byte_get() ; # ; # # Decode command: ; # switch command >> 6 ; # ... ; # case 5: ; # # 0000 0101 (Foo command): ; # if !rb2bus_error ; # # Do foo command: ; # ; # The key concept behind these procedures is to make command ; # decoding for the slave module easy. If the slave module ; # is in the middle of command decoding and the master suddenly ; # sends out a module select command, we need to gracefully recover ; # from the problem. A command should only be executed if ; # {rb2bus_error} is not set. If {rb2bus_error} is set, we want ; # to gracefully get back to the beginning of the loop without ; # doing any damage. Once {rb2bus_error} is set, all calls to ; # {rb2bus_byte_get} return 0 and all calls to {rb2bus_byte_put} ; # do nothing. At the beginning of the loop, {rb2bus_error} is ; # cleared by the {rb2bus_select_wait}() procedure and we have ; # recovered from the situation. ; buffer = 'rb2bus' ; line_number = 54 ; library rb2_constants entered ; # Copyright (c) 2006-2007 by Wayne C. Gramlich. ; # All rights reserved. ; buffer = 'rb2_constants' ; line_number = 6 ; constant rb2_ok = 0xa5 rb2_ok equ 165 ; line_number = 8 ; constant rb2_common_address_set = 0xfc rb2_common_address_set equ 252 ; line_number = 9 ; constant rb2_common_id_next = 0xfd rb2_common_id_next equ 253 ; line_number = 10 ; constant rb2_common_id_start = 0xfe rb2_common_id_start equ 254 ; line_number = 11 ; constant rb2_common_deselect = 0xff rb2_common_deselect equ 255 ; line_number = 13 ; constant rb2_laser1_address = 1 rb2_laser1_address equ 1 ; line_number = 15 ; constant rb2_minimotor2_address = 2 rb2_minimotor2_address equ 2 ; line_number = 16 ; constant rb2_midimotor2_address = 3 rb2_midimotor2_address equ 3 ; line_number = 17 ; constant rb2_motor0_speed_get = 0 rb2_motor0_speed_get equ 0 ; line_number = 18 ; constant rb2_motor0_speed_set = 1 rb2_motor0_speed_set equ 1 ; line_number = 19 ; constant rb2_motor1_speed_get = 2 rb2_motor1_speed_get equ 2 ; line_number = 20 ; constant rb2_motor1_speed_set = 3 rb2_motor1_speed_set equ 3 ; line_number = 21 ; constant rb2_duty_cycle_get = 4 rb2_duty_cycle_get equ 4 ; line_number = 22 ; constant rb2_duty_cycle_set = 8 rb2_duty_cycle_set equ 8 ; line_number = 24 ; constant rb2_irdistance2_address = 4 rb2_irdistance2_address equ 4 ; line_number = 25 ; constant rb2_irdistance2_raw0_get = 0 rb2_irdistance2_raw0_get equ 0 ; line_number = 26 ; constant rb2_irdistance2_raw1_get = 1 rb2_irdistance2_raw1_get equ 1 ; line_number = 27 ; constant rb2_irdistance2_smooth0_get = 2 rb2_irdistance2_smooth0_get equ 2 ; line_number = 28 ; constant rb2_irdistance2_smooth1_get = 3 rb2_irdistance2_smooth1_get equ 3 ; line_number = 29 ; constant rb2_irdistance2_linear0_get = 4 rb2_irdistance2_linear0_get equ 4 ; line_number = 30 ; constant rb2_irdistance2_linear1_get = 6 rb2_irdistance2_linear1_get equ 6 ; line_number = 32 ; constant rb2_shaft2_address = 5 rb2_shaft2_address equ 5 ; line_number = 33 ; constant rb2_shaft2_count_latch = 0 rb2_shaft2_count_latch equ 0 ; line_number = 34 ; constant rb2_shaft2_count_clear = 1 rb2_shaft2_count_clear equ 1 ; line_number = 35 ; constant rb2_shaft2_shaft0_high_get = 2 rb2_shaft2_shaft0_high_get equ 2 ; line_number = 36 ; constant rb2_shaft2_shaft1_high_get = 3 rb2_shaft2_shaft1_high_get equ 3 ; line_number = 37 ; constant rb2_shaft2_continue_get = 4 rb2_shaft2_continue_get equ 4 ; line_number = 38 ; constant rb2_shaft2_shaft0_low_get = rb2_shaft2_continue_get rb2_shaft2_shaft0_low_get equ 4 ; line_number = 39 ; constant rb2_shaft2_shaft1_low_get = rb2_shaft2_continue_get rb2_shaft2_shaft1_low_get equ 4 ; line_number = 40 ; constant rb2_shaft2_x_get = 0x10 rb2_shaft2_x_get equ 16 ; line_number = 41 ; constant rb2_shaft2_y_get = 0x11 rb2_shaft2_y_get equ 17 ; line_number = 42 ; constant rb2_shaft2_bearing16_get = 0x12 rb2_shaft2_bearing16_get equ 18 ; line_number = 43 ; constant rb2_shaft2_bearing8_get = 0x13 rb2_shaft2_bearing8_get equ 19 ; line_number = 44 ; constant rb2_shaft2_target_x_get = 0x14 rb2_shaft2_target_x_get equ 20 ; line_number = 45 ; constant rb2_shaft2_target_y_get = 0x15 rb2_shaft2_target_y_get equ 21 ; line_number = 46 ; constant rb2_shaft2_target_bearing16_get = 0x16 rb2_shaft2_target_bearing16_get equ 22 ; line_number = 47 ; constant rb2_shaft2_target_bearing8_get = 0x17 rb2_shaft2_target_bearing8_get equ 23 ; line_number = 48 ; constant rb2_shaft2_target_distance_get = 0x18 rb2_shaft2_target_distance_get equ 24 ; line_number = 49 ; constant rb2_shaft2_wheel_spacing_get = 0x19 rb2_shaft2_wheel_spacing_get equ 25 ; line_number = 50 ; constant rb2_shaft2_wheel_ticks_get = 0x1a rb2_shaft2_wheel_ticks_get equ 26 ; line_number = 51 ; constant rb2_shaft2_wheel_diameter_get = 0x1b rb2_shaft2_wheel_diameter_get equ 27 ; line_number = 52 ; constant rb2_shaft2_x_set = 0x20 rb2_shaft2_x_set equ 32 ; line_number = 53 ; constant rb2_shaft2_y_set = 0x21 rb2_shaft2_y_set equ 33 ; line_number = 54 ; constant rb2_shaft2_bearing16_set = 0x22 rb2_shaft2_bearing16_set equ 34 ; line_number = 55 ; constant rb2_shaft2_navigation_latch = 0x23 rb2_shaft2_navigation_latch equ 35 ; line_number = 56 ; constant rb2_shaft2_target_x_set = 0x24 rb2_shaft2_target_x_set equ 36 ; line_number = 57 ; constant rb2_shaft2_target_y_set = 0x25 rb2_shaft2_target_y_set equ 37 ; line_number = 58 ; constant rb2_shaft2_wheel_spacing_set = 0x29 rb2_shaft2_wheel_spacing_set equ 41 ; line_number = 59 ; constant rb2_shaft2_wheel_ticks_set = 0x2a rb2_shaft2_wheel_ticks_set equ 42 ; line_number = 60 ; constant rb2_shaft2_wheel_diameter_set = 0x2b rb2_shaft2_wheel_diameter_set equ 43 ; line_number = 63 ; constant rb2_orient5_address = 6 rb2_orient5_address equ 6 ; line_number = 65 ; constant rb2_compass8_address = 7 rb2_compass8_address equ 7 ; line_number = 67 ; constant rb2_io8_address = 8 rb2_io8_address equ 8 ; line_number = 68 ; constant rb2_io8_digital8_get = 0 rb2_io8_digital8_get equ 0 ; line_number = 69 ; constant rb2_io8_digital8_set = 1 rb2_io8_digital8_set equ 1 ; line_number = 70 ; constant rb2_io8_direction_get = 2 rb2_io8_direction_get equ 2 ; line_number = 71 ; constant rb2_io8_direction_set = 3 rb2_io8_direction_set equ 3 ; line_number = 72 ; constant rb2_io8_analog_mask_get = 4 rb2_io8_analog_mask_get equ 4 ; line_number = 73 ; constant rb2_io8_analog_mask_set = 5 rb2_io8_analog_mask_set equ 5 ; line_number = 74 ; constant rb2_io8_analog8_get = 0x10 rb2_io8_analog8_get equ 16 ; line_number = 75 ; constant rb2_io8_analog10_get = 0x18 rb2_io8_analog10_get equ 24 ; line_number = 76 ; constant rb2_low_set = 0x20 rb2_low_set equ 32 ; line_number = 77 ; constant rb2_high_set = 0x30 rb2_high_set equ 48 ; line_number = 79 ; constant rb2_sonar2_address = 9 rb2_sonar2_address equ 9 ; line_number = 81 ; constant rb2_voice1_address = 10 rb2_voice1_address equ 10 ; line_number = 83 ; constant rb2_servo4_address = 11 rb2_servo4_address equ 11 ; line_number = 84 ; constant rb2_servo4_servo0 = 0 rb2_servo4_servo0 equ 0 ; line_number = 85 ; constant rb2_servo4_servo1 = 1 rb2_servo4_servo1 equ 1 ; line_number = 86 ; constant rb2_servo4_servo2 = 2 rb2_servo4_servo2 equ 2 ; line_number = 87 ; constant rb2_servo4_servo3 = 3 rb2_servo4_servo3 equ 3 ; line_number = 88 ; constant rb2_servo4_quick_set = 0 rb2_servo4_quick_set equ 0 ; line_number = 89 ; constant rb2_servo4_quick_low = 0 rb2_servo4_quick_low equ 0 ; line_number = 90 ; constant rb2_servo4_quick_center = 40 rb2_servo4_quick_center equ 40 ; line_number = 91 ; constant rb2_servo4_quick_high = 0x7c rb2_servo4_quick_high equ 124 ; line_number = 92 ; constant rb2_servo4_high_low_set = 0x80 rb2_servo4_high_low_set equ 128 ; line_number = 93 ; constant rb2_servo4_short_high_low_set = 0x84 rb2_servo4_short_high_low_set equ 132 ; line_number = 94 ; constant rb2_servo4_high_set = 0x88 rb2_servo4_high_set equ 136 ; line_number = 95 ; constant rb2_servo4_low_set = 0x8c rb2_servo4_low_set equ 140 ; line_number = 96 ; constant rb2_servo4_enables_set = 0x90 rb2_servo4_enables_set equ 144 ; line_number = 97 ; constant rb2_servo4_enable0 = 1 rb2_servo4_enable0 equ 1 ; line_number = 98 ; constant rb2_servo4_enable1 = 2 rb2_servo4_enable1 equ 2 ; line_number = 99 ; constant rb2_servo4_enable2 = 4 rb2_servo4_enable2 equ 4 ; line_number = 100 ; constant rb2_servo4_enable3 = 8 rb2_servo4_enable3 equ 8 ; line_number = 101 ; constant rb2_servo4_enable_all = 0xf rb2_servo4_enable_all equ 15 ; line_number = 102 ; constant rb2_servo4_enable_none = 0 rb2_servo4_enable_none equ 0 ; line_number = 103 ; constant rb2_servo4_high_get = 0xa0 rb2_servo4_high_get equ 160 ; line_number = 104 ; constant rb2_servo4_low_get = 0xa4 rb2_servo4_low_get equ 164 ; line_number = 105 ; constant rb2_servo4_enables_get = 0xa8 rb2_servo4_enables_get equ 168 ; line_number = 107 ; constant rb2_controller28_address = 28 rb2_controller28_address equ 28 ; line_number = 109 ; constant rb2_lcd32_address = 32 rb2_lcd32_address equ 32 ; line_number = 110 ; constant rb2_lcd32_new_line = 0xa rb2_lcd32_new_line equ 10 ; line_number = 111 ; constant rb2_lcd32_form_feed = 0xc rb2_lcd32_form_feed equ 12 ; line_number = 112 ; constant rb2_lcd32_carriage_return = 0xd rb2_lcd32_carriage_return equ 13 ; line_number = 113 ; constant rb2_lcd32_column_set = 0x20 rb2_lcd32_column_set equ 32 ; buffer = 'rb2bus' ; line_number = 54 ; library rb2_constants exited ; line_number = 55 ; library rb2bus_globals Skipped (duplicate) ; Delaying code generation for procedure rb2bus_select_wait ; Delaying code generation for procedure rb2bus_deselect ; Delaying code generation for procedure rb2bus_byte_get ; Delaying code generation for procedure rb2bus_byte_put ; Delaying code generation for procedure rb2bus_command ; buffer = 'shaft2' ; line_number = 16 ; library rb2bus exited ; # Pin definitions: ; line_number = 20 ; package pdip ; line_number = 21 ; pin 1 = mclr ; line_number = 22 ; pin 2 = ra0_unused ; line_number = 23 ; pin 3 = ra1_unused ; line_number = 24 ; pin 4 = ra2_unused ; line_number = 25 ; pin 5 = ra3_unused ; line_number = 26 ; pin 6 = ra4_unused ; line_number = 27 ; pin 7 = ra5_unused ; line_number = 28 ; pin 8 = ground ; line_number = 29 ; pin 9 = osc1 ; line_number = 30 ; pin 10 = osc2 ; line_number = 31 ; pin 11 = rc0_unused ; line_number = 32 ; pin 12 = rc1_out, name=shaft1 shaft1___byte equ _portc shaft1___bit equ 1 ; line_number = 33 ; pin 13 = rc2_in, name=dflag1 dflag1___byte equ _portc dflag1___bit equ 2 ; line_number = 34 ; pin 14 = sck_master ; line_number = 35 ; pin 15 = sdi ; line_number = 36 ; pin 16 = sdo ; line_number = 37 ; pin 17 = tx ; line_number = 38 ; pin 18 = rx ; line_number = 39 ; pin 19 = ground2 ; line_number = 40 ; pin 20 = power_supply ; line_number = 41 ; pin 21 = rb0_in, name=lflag lflag___byte equ _portb lflag___bit equ 0 ; line_number = 42 ; pin 22 = rb1_unused ; line_number = 43 ; pin 23 = rb2_unused ; line_number = 44 ; pin 24 = rb3_in, name=dflag0 dflag0___byte equ _portb dflag0___bit equ 3 ; line_number = 45 ; pin 25 = rb4_unused ; line_number = 46 ; pin 26 = rb5_out, name=shaft0 shaft0___byte equ _portb shaft0___bit equ 5 ; line_number = 47 ; pin 27 = rb6_unused ; line_number = 48 ; pin 28 = rb7_unused ; # This are the constants for the LS7366 commands: ; # The Instruction Register bits: ; # For IR<7:6>: ; line_number = 54 ; constant ls_clear = 0 << 6 ls_clear equ 0 ; line_number = 55 ; constant ls_read = 1 << 6 ls_read equ 64 ; line_number = 56 ; constant ls_write = 2 << 6 ls_write equ 128 ; line_number = 57 ; constant ls_load = 3 << 6 ls_load equ 192 ; # For IR<5:3>: ; line_number = 59 ; constant ls_none = 0 << 3 ls_none equ 0 ; line_number = 60 ; constant ls_mdr0 = 1 << 3 ls_mdr0 equ 8 ; line_number = 61 ; constant ls_mdr1 = 2 << 3 ls_mdr1 equ 16 ; line_number = 62 ; constant ls_dtr = 3 << 3 ls_dtr equ 24 ; line_number = 63 ; constant ls_cntr = 4 << 3 ls_cntr equ 32 ; line_number = 64 ; constant ls_otr = 5 << 3 ls_otr equ 40 ; line_number = 65 ; constant ls_str = 6 << 3 ls_str equ 48 ; line_number = 66 ; constant ls_none2 = 7 << 3 ls_none2 equ 56 ; # For IR<2:0> are unused. We use them for chip selection: ; line_number = 68 ; constant ls_shaft0_bit = 0 ls_shaft0_bit equ 0 ; line_number = 69 ; constant ls_shaft1_bit = 1 ls_shaft1_bit equ 1 ; line_number = 70 ; constant ls_select_shaft0 = 1 << ls_shaft0_bit ls_select_shaft0 equ 1 ; line_number = 71 ; constant ls_select_shaft1 = 1 << ls_shaft1_bit ls_select_shaft1 equ 2 ; line_number = 72 ; constant ls_select_both = ls_select_shaft0 | ls_select_shaft1 ls_select_both equ 3 ; # For the MDR0 (mode register 0): ; # MDR0<1:0>: ; line_number = 76 ; constant ls_non_quad = 0 << 0 ls_non_quad equ 0 ; line_number = 77 ; constant ls_quad_x1 = 1 << 0 ls_quad_x1 equ 1 ; line_number = 78 ; constant ls_quad_x2 = 2 << 0 ls_quad_x2 equ 2 ; line_number = 79 ; constant ls_quad_x4 = 3 << 0 ls_quad_x4 equ 3 ; # MDR0<3:2>: ; line_number = 81 ; constant ls_count_free = 0 << 2 ls_count_free equ 0 ; line_number = 82 ; constant ls_count_single = 1 << 2 ls_count_single equ 4 ; line_number = 83 ; constant ls_count_range = 2 << 2 ls_count_range equ 8 ; line_number = 84 ; constant ls_count_module = 3 << 2 ls_count_module equ 12 ; # MDR0<5:4>: ; line_number = 86 ; constant ls_index_disable = 0 << 4 ls_index_disable equ 0 ; line_number = 87 ; constant ls_index_cntr_load = 1 << 4 ls_index_cntr_load equ 16 ; line_number = 88 ; constant ls_index_cntr_reset = 2 << 4 ls_index_cntr_reset equ 32 ; line_number = 89 ; constant ls_index_otr_load = 3 << 4 ls_index_otr_load equ 48 ; # MDR0<6>: ; line_number = 91 ; constant ls_index_negative = 0 << 6 ls_index_negative equ 0 ; line_number = 92 ; constant ls_index_positive = 1 << 6 ls_index_positive equ 64 ; # MDR0<7>: ; line_number = 94 ; constant ls_index_filter1 = 0 << 7 ls_index_filter1 equ 0 ; line_number = 95 ; constant ls_index_filter2 = 1 << 7 ls_index_filter2 equ 128 ; # The value for our MDR0 is: ; line_number = 97 ; constant ls_mdr0_value = ls_non_quad | ls_count_free | ls_index_disable | ls_index_negative | ls_index_filter1 ls_mdr0_value equ 0 ; # For the MDR1 (mode_register 1): ; # MDR1<1:0>: ; line_number = 102 ; constant ls_size_4 = 0 << 0 ls_size_4 equ 0 ; line_number = 103 ; constant ls_size_3 = 1 << 0 ls_size_3 equ 1 ; line_number = 104 ; constant ls_size_2 = 2 << 0 ls_size_2 equ 2 ; line_number = 105 ; constant ls_size_1 = 3 << 0 ls_size_1 equ 3 ; # MDR1<2>: ; line_number = 107 ; constant ls_count_enable = 0 << 2 ls_count_enable equ 0 ; line_number = 108 ; constant ls_count_disable = 1 << 2 ls_count_disable equ 4 ; # MDR1<3> unused: ; # MDR1<4>: ; line_number = 111 ; constant ls_flag_on_idx = 1 << 4 ls_flag_on_idx equ 16 ; # MDR1<5>: ; line_number = 113 ; constant ls_flag_on_cmp = 1 << 5 ls_flag_on_cmp equ 32 ; # MDR1<6>: ; line_number = 115 ; constant ls_flag_on_bw = 1 << 6 ls_flag_on_bw equ 64 ; # MDR1<7>: ; line_number = 117 ; constant ls_flag_on_cy = 1 << 7 ls_flag_on_cy equ 128 ; # The value for our MDR1 is: ; line_number = 119 ; constant ls_mdr1_value = ls_size_2 | ls_count_enable ls_mdr1_value equ 2 ; line_number = 121 ; origin 0 org 0 ; line_number = 123 ;info 123, 0 ; procedure main main: ; Initialize some registers clrf _adcon0 movlw 7 bsf __rp0___byte, __rp0___bit movwf _adcon1 movlw 7 movwf _cmcon movlw 63 movwf _trisa movlw 223 movwf _trisb movlw 149 movwf _trisc ; arguments_none ; line_number = 125 ; returns_nothing ; line_number = 127 ; local command byte main__command equ globals___0+12 ; line_number = 128 ; local shaft_high byte main__shaft_high equ globals___0+13 ; line_number = 129 ; local shaft_low byte main__shaft_low equ globals___0+14 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>01 code:00=uu=>00) ; line_number = 131 ; call reset() ;info 131, 12 bcf __rp0___byte, __rp0___bit call reset ; line_number = 133 ; loop_forever start main__1: ; # Make sure that we have been selected: ; line_number = 135 ; rb2bus_error := _true ;info 135, 14 bsf rb2bus_error___byte, rb2bus_error___bit ; line_number = 136 ; while rb2bus_error start main__2: ;info 136, 15 ; =>bit_code_emit@symbol(): sym=rb2bus_error ; No 1TEST: true.size=4 false.size=0 ; No 2TEST: true.size=4 false.size=0 ; 1GOTO: Single test with GOTO btfss rb2bus_error___byte, rb2bus_error___bit goto main__3 ; line_number = 137 ; call rb2bus_select_wait() ;info 137, 17 call rb2bus_select_wait ; line_number = 138 ; command := rb2bus_byte_get() ;info 138, 18 call rb2bus_byte_get movwf main__command goto main__2 ; Recombine size1 = 0 || size2 = 0 main__3: ; line_number = 136 ; while rb2bus_error done ; line_number = 140 ; switch command >> 6 start ;info 140, 21 ; switch_before:(data:00=uu=>00 code:00=uu=>00) size=7 movlw main__28>>8 movwf __pclath main__29 equ globals___0+18 swapf main__command,w movwf main__29 rrf main__29,f rrf main__29,w andlw 3 ; switch after expression:(data:00=uu=>00 code:00=uu=>00) addlw main__28 movwf __pcl ; page_group 4 main__28: goto main__26 goto main__30 goto main__30 goto main__27 ; line_number = 141 ; case 0 main__26: ; # 00xx xxxx: ; line_number = 143 ; switch (command >> 3) & 7 start ;info 143, 34 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__19>>8 movwf __pclath main__20 equ globals___0+18 rrf main__command,w movwf main__20 rrf main__20,f rrf main__20,w andlw 7 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__19 movwf __pcl ; page_group 2 main__19: goto main__17 goto main__18 ; line_number = 144 ; case 0 main__17: ; # 0000 0xxx: ; line_number = 146 ; switch command & 7 start ;info 146, 45 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 ; line_number = 163 ; case_maximum 7 movlw main__8>>8 movwf __pclath movlw 7 andwf main__command,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__8 movwf __pcl ; page_group 8 main__8: goto main__4 goto main__5 goto main__6 goto main__6 goto main__7 goto main__9 goto main__9 goto main__9 ; line_number = 147 ; case 0 main__4: ; # 0000 0000 (Count Latch): ; line_number = 149 ; call ls_command_put(ls_load | ls_otr | ls_select_both) ;info 149, 59 movlw 235 call ls_command_put goto main__9 ; line_number = 150 ; case 1 main__5: ; # 0000 0000 (Count Clear): ; line_number = 152 ; call ls_command_put(ls_clear | ls_cntr | ls_select_both) ;info 152, 62 movlw 35 call ls_command_put goto main__9 ; line_number = 153 ; case 2, 3 main__6: ; # 0000 010s (Read Shaft): ; line_number = 155 ; command := ls_shaft_select(command) ;info 155, 65 movf main__command,w call ls_shaft_select movwf main__command ; line_number = 156 ; call ls_command_put(ls_read | ls_otr | command) ;info 156, 68 movlw 104 iorwf main__command,w call ls_command_put ; line_number = 157 ; shaft_high := ls_byte_get() ;info 157, 71 call ls_byte_get movwf main__shaft_high ; line_number = 158 ; shaft_low := ls_byte_get() ;info 158, 73 call ls_byte_get movwf main__shaft_low ; line_number = 159 ; call rb2bus_byte_put(shaft_high) ;info 159, 75 movf main__shaft_high,w call rb2bus_byte_put goto main__9 ; line_number = 160 ; case 4 main__7: ; # 0000 0110 (Read Shaft Continue): ; line_number = 162 ; call rb2bus_byte_put(shaft_low) ;info 162, 78 movf main__shaft_low,w call rb2bus_byte_put main__9: ; line_number = 146 ; switch command & 7 done goto main__21 ; line_number = 164 ; case 1 main__18: ; # 0000 1xxx: ; # This is just for debugging; it will be ripped sometime: ; line_number = 167 ; switch command & 7 start ;info 167, 81 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__15>>8 movwf __pclath movlw 7 andwf main__command,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__15 movwf __pcl ; page_group 8 main__15: goto main__10 goto main__11 goto main__12 goto main__12 goto main__13 goto main__13 goto main__14 goto main__14 ; line_number = 168 ; case 0 main__10: ; This case body wants this bit set bsf __rp0___byte, __rp0___bit ; # 0000 1000 (Read SSPSTAT): ; line_number = 170 ; call rb2bus_byte_put(_sspstat) ;info 170, 96 movf _sspstat,w bcf __rp0___byte, __rp0___bit call rb2bus_byte_put goto main__16 ; line_number = 171 ; case 1 main__11: ; # 0000 1001 (Read SSPCON): ; line_number = 173 ; call rb2bus_byte_put(_sspcon) ;info 173, 100 movf _sspcon,w call rb2bus_byte_put goto main__16 ; line_number = 174 ; case 2, 3 main__12: ; # 0000 101s (Status Read): ; line_number = 176 ; command := ls_shaft_select(command) ;info 176, 103 movf main__command,w call ls_shaft_select movwf main__command ; line_number = 177 ; call ls_command_put(ls_read | ls_str | command) ;info 177, 106 movlw 112 iorwf main__command,w call ls_command_put ; line_number = 178 ; command := ls_byte_get() ;info 178, 109 call ls_byte_get movwf main__command ; line_number = 179 ; call rb2bus_byte_put(command) ;info 179, 111 movf main__command,w call rb2bus_byte_put goto main__16 ; line_number = 180 ; case 4, 5 main__13: ; # 0000 110s (Mode 0 Read): ; line_number = 182 ; command := ls_shaft_select(command) ;info 182, 114 movf main__command,w call ls_shaft_select movwf main__command ; line_number = 183 ; call ls_command_put(ls_read | ls_mdr0 | command) ;info 183, 117 movlw 72 iorwf main__command,w call ls_command_put ; line_number = 184 ; command := ls_byte_get() ;info 184, 120 call ls_byte_get movwf main__command ; line_number = 185 ; call rb2bus_byte_put(command) ;info 185, 122 movf main__command,w call rb2bus_byte_put goto main__16 ; line_number = 186 ; case 6, 7 main__14: ; # 0000 111s (Mode 1 Read): ; line_number = 188 ; command := ls_shaft_select(command) ;info 188, 125 movf main__command,w call ls_shaft_select movwf main__command ; line_number = 189 ; call ls_command_put(ls_read | ls_mdr1 | command) ;info 189, 128 movlw 80 iorwf main__command,w call ls_command_put ; line_number = 190 ; command := ls_byte_get() ;info 190, 131 call ls_byte_get movwf main__command ; line_number = 191 ; call rb2bus_byte_put(command) ;info 191, 133 movf main__command,w call rb2bus_byte_put main__16: ; line_number = 167 ; switch command & 7 done main__21: ; line_number = 143 ; switch (command >> 3) & 7 done goto main__30 ; line_number = 192 ; case 3 main__27: ; # 11xx xxxx: ; line_number = 194 ; switch (command >> 3) & 7 start ;info 194, 136 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__23>>8 movwf __pclath main__24 equ globals___0+18 rrf main__command,w movwf main__24 rrf main__24,f rrf main__24,w andlw 7 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__23 movwf __pcl ; page_group 8 main__23: goto main__25 goto main__25 goto main__25 goto main__25 goto main__25 goto main__25 goto main__25 goto main__22 ; line_number = 195 ; case 7 main__22: ; # 1111 1xxx: ; line_number = 197 ; call rb2bus_command(command) ;info 197, 153 movf main__command,w call rb2bus_command main__25: ; line_number = 194 ; switch (command >> 3) & 7 done main__30: ; line_number = 140 ; switch command >> 6 done ; # Deselect the shaft encoder chips: ; line_number = 200 ; shaft0 := _true ;info 200, 155 bsf shaft0___byte, shaft0___bit ; line_number = 201 ; shaft1 := _true ;info 201, 156 bsf shaft1___byte, shaft1___bit ; line_number = 133 ; loop_forever wrap-up goto main__1 ; line_number = 133 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 204 ;info 204, 158 ; procedure reset reset: ; arguments_none ; line_number = 206 ; returns_nothing ; # This procedure will reset the module. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 210 ; call rb2bus_initialize(5) ;info 210, 158 movlw 5 call rb2bus_initialize ; # The synchronous serial port can be run in master mode at three ; # different clock rates: ; # ; # Fosc/4 - SSPM<3:0> = 0000 = 5MHz @ Fosc=20MHz ; # Fosc/16 - SSPM<3:0> = 0001 = 1.25MHz @ Fosc=20MHz ; # Fosc/64 - SSPM<3:0> = 0010 = .3125MHz @ Fosc=20Mhz ; # ; # Technically, the specifications for the LS7366 dual quadrature ; # counter specify the following: ; # ; # SCK High Pulse width = 100ns and ; # SCK Low Pulse width = 100ns, ; # thus SCK maximum fequency = 5 MHz (suggesting Fosc/4) ; # Initialize {_sspstat} (only {_cke} and {_smp} are writable): ; # Transmit from active to idle: ; line_number = 229 ; _cke := _true ;info 229, 160 bsf __rp0___byte, __rp0___bit bsf _cke___byte, _cke___bit ; # Sample data in the middle: ; line_number = 231 ; _smp := _false ;info 231, 162 bcf _smp___byte, _smp___bit ; # Initialize {_sspcon}: ; # SSPM<3:0> := 0 (= SPI Master mode Fosc/4): ; line_number = 235 ; _sspcon := 0 ;info 235, 163 bcf __rp0___byte, __rp0___bit clrf _sspcon ; # Clock idle is at low ; line_number = 237 ; _ckp := _false ;info 237, 165 bcf _ckp___byte, _ckp___bit ; # Note {_ckp}=0 and {_cke}=1 is the one that matches the LS7366 ; # spec. sheet for clocking. {_smp}=0 is the correct sample location. ; # Make sure the two shaft encoder chips are deselected ; line_number = 243 ; shaft0 := _true ;info 243, 166 bsf shaft0___byte, shaft0___bit ; line_number = 244 ; shaft1 := _true ;info 244, 167 bsf shaft1___byte, shaft1___bit ; # Enable Synchronous Serial Port: ; line_number = 247 ; _sspen := _true ;info 247, 168 bsf _sspen___byte, _sspen___bit ; ## None of this is needed!!! ; ## The _bf (buffer full) bit is read-only and it initializes to 0. ; ## We need to get it set. This is done by causing the synchronous ; ## serial port to write (and read) 8 bits: ; #_sspbuf := 0 ; ## In about 8 cycles {_bf} should be 1: ; # Now intialize our favorite shaft encoder chips: ; line_number = 257 ; call ls_initialize() ;info 257, 169 call ls_initialize ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 260 ;info 260, 171 ; procedure wait wait: ; arguments_none ; line_number = 262 ; returns_nothing ; # This procedure is repeatably called whenever the software ; # is waiting for a byte to arrive from the bus. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 267 ; do_nothing ;info 267, 171 ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 270 ;info 270, 172 ; procedure ls_initialize ls_initialize: ; arguments_none ; line_number = 272 ; returns_nothing ; # Initialize both of the shaft encoder chips: ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 276 ; call ls_command_put(ls_clear | ls_mdr0) ;info 276, 172 movlw 8 call ls_command_put ; line_number = 277 ; call ls_command_put(ls_clear | ls_mdr1) ;info 277, 174 movlw 16 call ls_command_put ; line_number = 278 ; call ls_command_put(ls_clear | ls_str) ;info 278, 176 movlw 48 call ls_command_put ; line_number = 279 ; call ls_command_put(ls_clear | ls_cntr) ;info 279, 178 movlw 32 call ls_command_put ; line_number = 281 ; call ls_command_put(ls_write | ls_mdr0 | ls_select_both) ;info 281, 180 movlw 139 call ls_command_put ; line_number = 282 ; call ls_byte_put(ls_mdr0_value) ;info 282, 182 movlw 0 call ls_byte_put ; # This last command enables counting: ; line_number = 285 ; call ls_command_put(ls_write | ls_mdr1 | ls_select_both) ;info 285, 184 movlw 147 call ls_command_put ; line_number = 286 ; call ls_byte_put(ls_mdr1_value) ;info 286, 186 movlw 2 call ls_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 289 ;info 289, 189 ; procedure ls_shaft_select ls_shaft_select: ; Last argument is sitting in W; save into argument variable movwf ls_shaft_select__command ; delay=4294967295 ; line_number = 290 ; argument command byte ls_shaft_select__command equ globals___0+15 ; line_number = 291 ; returns byte ; # This procedure will return {ls_select_shaft0} or {ls_select_shaft1} ; # depending upon whether {command}@0 is set or not. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 296 ; if command@0 start ;info 296, 190 ls_shaft_select__select__1___byte equ ls_shaft_select__command ls_shaft_select__select__1___bit equ 0 ; =>bit_code_emit@symbol(): sym=ls_shaft_select__select__1 ; 1TEST: Single test with code in skip slot btfsc ls_shaft_select__select__1___byte, ls_shaft_select__select__1___bit ; line_number = 297 ; return ls_select_shaft1 start ; line_number = 297 ;info 297, 191 retlw 2 ; line_number = 297 ; return ls_select_shaft1 done ; Recombine size1 = 0 || size2 = 0 ; line_number = 296 ; if command@0 done ; line_number = 298 ; return ls_select_shaft0 start ; line_number = 298 ;info 298, 192 retlw 1 ; line_number = 298 ; return ls_select_shaft0 done ; delay after procedure statements=non-uniform ; line_number = 301 ;info 301, 193 ; procedure ls_command_put ls_command_put: ; Last argument is sitting in W; save into argument variable movwf ls_command_put__ir ; delay=4294967295 ; line_number = 302 ; argument ir byte ls_command_put__ir equ globals___0+16 ; line_number = 303 ; returns_nothing ; # This procedure will cause {ir} to be sent to the appropriate ; # shaft encoder. Construct a command by OR'ing together an ; # operation ({ls_clear}, {ls_read}, {ls_write}, or {ls_load}, ; # with a register ({ls_mdr0}, {ls_mdr1}, {ls_dtr}, {ls_cntr}, ; # {ls_otr}, {ls_str}), and either {ls_shaft0} and/or {ls_shaft1}. ; # If both {ls_shaft0} and {ls_shaft1} are set at the same time, ; # the operation should be one of {ls_clear}, {ls_write}, or ; # {ls_load}; only one shaft encoder chip at a time can be read. ; # Force both shaft chips to be deselected: ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 315 ; shaft0 := _true ;info 315, 194 bsf shaft0___byte, shaft0___bit ; line_number = 316 ; shaft1 := _true ;info 316, 195 bsf shaft1___byte, shaft1___bit ; # Select the appropriate ; line_number = 319 ; if ir@ls_shaft0_bit start ;info 319, 196 ls_command_put__select__1___byte equ ls_command_put__ir ls_command_put__select__1___bit equ 0 ; =>bit_code_emit@symbol(): sym=ls_command_put__select__1 ; 1TEST: Single test with code in skip slot btfsc ls_command_put__select__1___byte, ls_command_put__select__1___bit ; line_number = 320 ; shaft0 := _false ;info 320, 197 bcf shaft0___byte, shaft0___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 319 ; if ir@ls_shaft0_bit done ; line_number = 321 ; if ir@ls_shaft1_bit start ;info 321, 198 ls_command_put__select__2___byte equ ls_command_put__ir ls_command_put__select__2___bit equ 1 ; =>bit_code_emit@symbol(): sym=ls_command_put__select__2 ; 1TEST: Single test with code in skip slot btfsc ls_command_put__select__2___byte, ls_command_put__select__2___bit ; line_number = 322 ; shaft1 := _false ;info 322, 199 bcf shaft1___byte, shaft1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 321 ; if ir@ls_shaft1_bit done ; line_number = 323 ; call ls_byte_put(ir) ;info 323, 200 movf ls_command_put__ir,w call ls_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 326 ;info 326, 203 ; procedure ls_byte_put ls_byte_put: ; Last argument is sitting in W; save into argument variable movwf ls_byte_put__data ; delay=4294967295 ; line_number = 327 ; argument data byte ls_byte_put__data equ globals___0+17 ; line_number = 328 ; returns_nothing ; # This procedure will output {data} to the currently ; # select chip. ; # Ship the byte on its way: ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 334 ; _sspbuf := data ;info 334, 204 movf ls_byte_put__data,w movwf _sspbuf ; # Wait for the transmission to finish: ; line_number = 337 ; while !_bf start ls_byte_put__1: ;info 337, 206 ; =>bit_code_emit@symbol(): sym=_bf ; 1TEST: Single test with code in skip slot bsf __rp0___byte, __rp0___bit btfss _bf___byte, _bf___bit ; line_number = 338 ; do_nothing ;info 338, 208 goto ls_byte_put__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 337 ; while !_bf done ; # We don't need the data that was clocked in, so just clear {_bf}: ; line_number = 341 ; _bf := _false ;info 341, 209 bcf _bf___byte, _bf___bit ; delay after procedure statements=non-uniform bcf __rp0___byte, __rp0___bit ; Implied return retlw 0 ; line_number = 344 ;info 344, 212 ; procedure ls_byte_get ls_byte_get: ; arguments_none ; line_number = 346 ; returns byte ; # This procedure will read a byte of data from the ; # currently selected chip. ; # Write out a 0, and shift in the data: ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 352 ; _sspbuf := 0 ;info 352, 212 clrf _sspbuf ; #call rb2bus_byte_put(0xf1) ; # Now wait for the data to show up: ; line_number = 357 ; while !_bf start ls_byte_get__1: ;info 357, 213 ; =>bit_code_emit@symbol(): sym=_bf ; 1TEST: Single test with code in skip slot bsf __rp0___byte, __rp0___bit btfss _bf___byte, _bf___bit ; line_number = 358 ; do_nothing ;info 358, 215 goto ls_byte_get__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 357 ; while !_bf done ; #call rb2bus_byte_put(0xf2) ; # Now return the data (clears {_bf} as a side effect): ; line_number = 363 ; return _sspbuf start ; line_number = 363 ;info 363, 216 bcf __rp0___byte, __rp0___bit movf _sspbuf,w return ; line_number = 363 ; return _sspbuf done ; delay after procedure statements=non-uniform ; line_number = 366 ; string id = "\16,0,5,4,3,8\Shaft2-D\7\Gramson" start ; id = '\16,0,5,4,3,8\Shaft2-D\7\Gramson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 22 id___base: retlw 16 retlw 0 retlw 5 retlw 4 retlw 3 retlw 8 retlw 83 retlw 104 retlw 97 retlw 102 retlw 116 retlw 50 retlw 45 retlw 68 retlw 7 retlw 71 retlw 114 retlw 97 retlw 109 retlw 115 retlw 111 retlw 110 ; line_number = 366 ; string id = "\16,0,5,4,3,8\Shaft2-D\7\Gramson" start ; Appending 8 delayed procedures to code bank 0 ; buffer = 'rb2bus_pic16f876' ; line_number = 28 ;info 28, 247 ; procedure rb2bus_initialize rb2bus_initialize: ; Last argument is sitting in W; save into argument variable movwf rb2bus_initialize__address ; delay=4294967295 ; line_number = 29 ; argument address byte rb2bus_initialize__address equ globals___0+2 ; line_number = 30 ; returns_nothing ; # This procedure is responsibile for initializing the UART ; # connected to the bus. {address} is the address of this ; # slave module. This code is specific to the PIC16F688. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 36 ; rb2bus_address := address ;info 36, 248 movf rb2bus_initialize__address,w movwf rb2bus_address ; # Warm up the UART: ; line_number = 39 ; _trisc@7 := _true ;info 39, 250 rb2bus_initialize__select__1___byte equ _trisc rb2bus_initialize__select__1___bit equ 7 bsf __rp0___byte, __rp0___bit bsf rb2bus_initialize__select__1___byte, rb2bus_initialize__select__1___bit ; line_number = 40 ; _trisc@6 := _true ;info 40, 252 rb2bus_initialize__select__2___byte equ _trisc rb2bus_initialize__select__2___bit equ 6 bsf rb2bus_initialize__select__2___byte, rb2bus_initialize__select__2___bit ; # Initialize the {_txsta} register: ; line_number = 43 ; _txsta := 0 ;info 43, 253 clrf _txsta ; line_number = 44 ; _tx9 := _true ;info 44, 254 bsf _tx9___byte, _tx9___bit ; line_number = 45 ; _txen := _true ;info 45, 255 bsf _txen___byte, _txen___bit ; line_number = 46 ; _brgh := _true ;info 46, 256 bsf _brgh___byte, _brgh___bit ; # Initialize the {_rcsta} register: ; line_number = 49 ; _rcsta := 0 ;info 49, 257 bcf __rp0___byte, __rp0___bit clrf _rcsta ; line_number = 50 ; _spen := _true ;info 50, 259 bsf _spen___byte, _spen___bit ; line_number = 51 ; _rx9 := _true ;info 51, 260 bsf _rx9___byte, _rx9___bit ; line_number = 52 ; _cren := _true ;info 52, 261 bsf _cren___byte, _cren___bit ; #_adden := _true ; line_number = 54 ; _adden := _false ;info 54, 262 bcf _adden___byte, _adden___bit ; # Set up the baud rate generator: ; line_number = 57 ; _spbrg := spbrg_500k ;info 57, 263 movlw 1 bsf __rp0___byte, __rp0___bit movwf _spbrg ; line_number = 59 ; rb2bus_selected := _false ;info 59, 266 bcf __rp0___byte, __rp0___bit bcf rb2bus_selected___byte, rb2bus_selected___bit ; line_number = 60 ; rb2bus_error := _true ;info 60, 268 bsf rb2bus_error___byte, rb2bus_error___bit ; line_number = 61 ; rb2bus_index := 0 ;info 61, 269 clrf rb2bus_index ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 66 ;info 66, 271 ; procedure rb2bus_eedata_read rb2bus_eedata_read: ; arguments_none ; line_number = 68 ; returns byte ; # This procedure will return the address stored in EEData. If ; # there is no data, 0 is returned. ; line_number = 73 ; local temp1 byte rb2bus_eedata_read__temp1 equ globals___0+3 ; line_number = 74 ; local temp2 byte rb2bus_eedata_read__temp2 equ globals___0+4 ; # Read the first byte (the address): ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 77 ; _eecon1 := 0 ;info 77, 271 bsf __rp0___byte, __rp0___bit bsf __rp1___byte, __rp1___bit clrf _eecon1 ; line_number = 78 ; _eeadr := rb2bus_eedata_address ;info 78, 274 movlw 254 bcf __rp0___byte, __rp0___bit movwf _eeadr ; line_number = 79 ; _rd := _true ;info 79, 277 bsf __rp0___byte, __rp0___bit bsf _rd___byte, _rd___bit ; line_number = 80 ; temp1 := _eedata ;info 80, 279 bcf __rp0___byte, __rp0___bit movf _eedata,w bcf __rp1___byte, __rp1___bit movwf rb2bus_eedata_read__temp1 ; # Read the second byte (the 1'z complement) ; line_number = 83 ; _eeadr := _eeadr + 1 ;info 83, 283 bsf __rp1___byte, __rp1___bit incf _eeadr,f ; line_number = 84 ; _rd := _true ;info 84, 285 bsf __rp0___byte, __rp0___bit bsf _rd___byte, _rd___bit ; line_number = 85 ; temp2 := _eedata ;info 85, 287 bcf __rp0___byte, __rp0___bit movf _eedata,w bcf __rp1___byte, __rp1___bit movwf rb2bus_eedata_read__temp2 ; # If they are 1's complement of one another, they are valid: ; line_number = 88 ; if temp1 = (0xff ^ temp2) start ;info 88, 291 ; Left minus Right comf rb2bus_eedata_read__temp2,w subwf rb2bus_eedata_read__temp1,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=2 false.size=0 ; No 2TEST: true.size=2 false.size=0 ; 1GOTO: Single test with GOTO btfss __z___byte, __z___bit goto rb2bus_eedata_read__1 ; # Return the valid address: ; line_number = 90 ; return temp1 start ; line_number = 90 ;info 90, 295 movf rb2bus_eedata_read__temp1,w return ; line_number = 90 ; return temp1 done ; Recombine size1 = 0 || size2 = 0 rb2bus_eedata_read__1: ; line_number = 88 ; if temp1 = (0xff ^ temp2) done ; # They are not 1's complement, so return 0 as an error: ; line_number = 93 ; return 0 start ; line_number = 93 ;info 93, 297 retlw 0 ; line_number = 93 ; return 0 done ; delay after procedure statements=non-uniform ; line_number = 96 ;info 96, 298 ; procedure rb2bus_eedata_write rb2bus_eedata_write: ; Last argument is sitting in W; save into argument variable movwf rb2bus_eedata_write__address ; delay=4294967295 ; line_number = 97 ; argument address byte rb2bus_eedata_write__address equ globals___0+5 ; line_number = 98 ; returns_nothing ; # This procedure will write {address} into the EEData. The ; # microcontroll pauses while the EEData is written. ; # Clear out the {_eecon1} register ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 104 ; _eecon1 := 0 ;info 104, 299 bsf __rp0___byte, __rp0___bit bsf __rp1___byte, __rp1___bit clrf _eecon1 ; line_number = 105 ; _eeadr := rb2bus_eedata_address ;info 105, 302 movlw 254 bcf __rp0___byte, __rp0___bit movwf _eeadr ; line_number = 106 ; _eedata := address ;info 106, 305 bcf __rp1___byte, __rp1___bit movf rb2bus_eedata_write__address,w bsf __rp1___byte, __rp1___bit movwf _eedata ; # Write 2 bytes ({address} followed by {address}^0xff): ; line_number = 109 ; loop_exactly 2 start ;info 109, 309 rb2bus_eedata_write__1 equ globals___0+19 movlw 2 bcf __rp1___byte, __rp1___bit movwf rb2bus_eedata_write__1 rb2bus_eedata_write__2: ; # Set the data to write: ; # Set up the for the write: ; line_number = 113 ; _wren := _true ;info 113, 312 bsf __rp0___byte, __rp0___bit bsf __rp1___byte, __rp1___bit bsf _wren___byte, _wren___bit ; line_number = 114 ; _gie := _false ;info 114, 315 bcf _gie___byte, _gie___bit ; line_number = 115 ; _eecon2 := 0x55 ;info 115, 316 movlw 85 movwf _eecon2 ; line_number = 116 ; _eecon2 := 0xaa ;info 116, 318 movlw 170 movwf _eecon2 ; # Start the write: ; line_number = 118 ; _wr := _true ;info 118, 320 bsf _wr___byte, _wr___bit ; # Wait for write to complete: ; line_number = 121 ; while _wr start rb2bus_eedata_write__3: ;info 121, 321 ; =>bit_code_emit@symbol(): sym=_wr ; 1TEST: Single test with code in skip slot btfsc _wr___byte, _wr___bit ; line_number = 122 ; do_nothing ;info 122, 322 goto rb2bus_eedata_write__3 ; Recombine size1 = 0 || size2 = 0 ; line_number = 121 ; while _wr done ; # Disable writing: ; line_number = 125 ; _wren := _false ;info 125, 323 bcf _wren___byte, _wren___bit ; # Prepare the second byte of data: ; line_number = 128 ; _eeadr := _eeadr + 1 ;info 128, 324 bcf __rp0___byte, __rp0___bit incf _eeadr,f ; line_number = 129 ; _eedata := address ^ 0xff ;info 129, 326 bcf __rp1___byte, __rp1___bit comf rb2bus_eedata_write__address,w bsf __rp1___byte, __rp1___bit movwf _eedata bcf __rp1___byte, __rp1___bit ; line_number = 109 ; loop_exactly 2 wrap-up decfsz rb2bus_eedata_write__1,f goto rb2bus_eedata_write__2 ; line_number = 109 ; loop_exactly 2 done ; # Disable everything: ; line_number = 133 ; _eecon1 := 0 ;info 133, 333 bsf __rp0___byte, __rp0___bit bsf __rp1___byte, __rp1___bit clrf _eecon1 ; delay after procedure statements=non-uniform bcf __rp0___byte, __rp0___bit bcf __rp1___byte, __rp1___bit ; Implied return retlw 0 ; buffer = 'rb2bus' ; line_number = 57 ;info 57, 339 ; procedure rb2bus_select_wait rb2bus_select_wait: ; arguments_none ; line_number = 59 ; returns_nothing ; # This procedure will in an infinite loop until the select ; # address matches {rb2bus_address}. {rb2bus_address} is ; # typically set in the {rb2bus_initialize} procedure. ; # ; # This module will repeatably call the {wait} procedure until ; # it is properly selected. ; line_number = 68 ; local value byte rb2bus_select_wait__value equ globals___0+6 ; line_number = 69 ; local address_bit bit rb2bus_select_wait__address_bit___byte equ globals___0+79 rb2bus_select_wait__address_bit___bit equ 2 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 71 ; rb2bus_error := _false ;info 71, 339 bcf rb2bus_error___byte, rb2bus_error___bit ; line_number = 72 ; while !rb2bus_selected start rb2bus_select_wait__1: ;info 72, 340 ; =>bit_code_emit@symbol(): sym=rb2bus_selected ; No 1TEST: true.size=0 false.size=25 ; No 2TEST: true.size=0 false.size=25 ; 1GOTO: Single test with GOTO btfsc rb2bus_selected___byte, rb2bus_selected___bit goto rb2bus_select_wait__6 ; line_number = 73 ; _adden := _true ;info 73, 342 bsf _adden___byte, _adden___bit ; # Wait for a byte to arrive. ; line_number = 75 ; while !_rcif start rb2bus_select_wait__2: ;info 75, 343 ; =>bit_code_emit@symbol(): sym=_rcif ; No 1TEST: true.size=0 false.size=2 ; No 2TEST: true.size=0 false.size=2 ; 1GOTO: Single test with GOTO btfsc _rcif___byte, _rcif___bit goto rb2bus_select_wait__3 ; line_number = 76 ; call wait() ;info 76, 345 call wait goto rb2bus_select_wait__2 rb2bus_select_wait__3: ; Recombine size1 = 0 || size2 = 0 ; line_number = 75 ; while !_rcif done ; # Capture the received value: ; line_number = 79 ; address_bit := _false ;info 79, 347 bcf rb2bus_select_wait__address_bit___byte, rb2bus_select_wait__address_bit___bit ; line_number = 80 ; if _rx9d start ;info 80, 348 ; =>bit_code_emit@symbol(): sym=_rx9d ; 1TEST: Single test with code in skip slot btfsc _rx9d___byte, _rx9d___bit ; line_number = 81 ; address_bit := _true ;info 81, 349 bsf rb2bus_select_wait__address_bit___byte, rb2bus_select_wait__address_bit___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 80 ; if _rx9d done ; line_number = 82 ; value := _rcreg ;info 82, 350 movf _rcreg,w movwf rb2bus_select_wait__value ; # Clear any UART errors by toggling {_cren}: ; line_number = 85 ; if _oerr start ;info 85, 352 ; =>bit_code_emit@symbol(): sym=_oerr ; 1TEST: Single test with code in skip slot btfsc _oerr___byte, _oerr___bit ; line_number = 86 ; _cren := _false ;info 86, 353 bcf _cren___byte, _cren___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 85 ; if _oerr done ; line_number = 87 ; if _ferr start ;info 87, 354 ; =>bit_code_emit@symbol(): sym=_ferr ; 1TEST: Single test with code in skip slot btfsc _ferr___byte, _ferr___bit ; line_number = 88 ; _cren := _false ;info 88, 355 bcf _cren___byte, _cren___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 87 ; if _ferr done ; line_number = 89 ; _cren := _true ;info 89, 356 bsf _cren___byte, _cren___bit ; line_number = 91 ; if address_bit start ;info 91, 357 ; =>bit_code_emit@symbol(): sym=rb2bus_select_wait__address_bit ; No 1TEST: true.size=7 false.size=0 ; No 2TEST: true.size=7 false.size=0 ; 1GOTO: Single test with GOTO btfss rb2bus_select_wait__address_bit___byte, rb2bus_select_wait__address_bit___bit goto rb2bus_select_wait__5 ; line_number = 92 ; if value = rb2bus_address start ;info 92, 359 ; Left minus Right movf rb2bus_address,w subwf rb2bus_select_wait__value,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=3 false.size=0 ; No 2TEST: true.size=3 false.size=0 ; 1GOTO: Single test with GOTO btfss __z___byte, __z___bit goto rb2bus_select_wait__4 ; line_number = 93 ; rb2bus_selected := _true ;info 93, 363 bsf rb2bus_selected___byte, rb2bus_selected___bit ; line_number = 94 ; call rb2bus_byte_put(rb2_ok) ;info 94, 364 movlw 165 call rb2bus_byte_put ; Recombine size1 = 0 || size2 = 0 rb2bus_select_wait__4: ; line_number = 92 ; if value = rb2bus_address done ; Recombine size1 = 0 || size2 = 0 rb2bus_select_wait__5: ; line_number = 91 ; if address_bit done goto rb2bus_select_wait__1 rb2bus_select_wait__6: ; Recombine size1 = 0 || size2 = 0 ; line_number = 72 ; while !rb2bus_selected done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 97 ;info 97, 368 ; procedure rb2bus_deselect rb2bus_deselect: ; arguments_none ; line_number = 99 ; returns_nothing ; # This procedure forces this module into the deselected state until ; # it is reselected by some master module on the bus. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 104 ; rb2bus_selected := _false ;info 104, 368 bcf rb2bus_selected___byte, rb2bus_selected___bit ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 107 ;info 107, 370 ; procedure rb2bus_byte_get rb2bus_byte_get: ; arguments_none ; line_number = 109 ; returns byte ; # This procedure will return the next byte received from the bus. ; # The address (9th) bit is stored in the global {is_address}. ; # ; # If {rb2bus_error} is set, 0 is returned. Otherwise, the {wait} ; # procedure is repeatably called until a command byte is successfully ; # received. If an module select byte comes in, we enter a bus ; # error condition by setting {rb2bus_error} and returning 0. ; line_number = 119 ; local value byte rb2bus_byte_get__value equ globals___0+7 ; line_number = 120 ; local address_bit bit rb2bus_byte_get__address_bit___byte equ globals___0+79 rb2bus_byte_get__address_bit___bit equ 3 ; # Return 0 in a bus flush condition to get us back to {rb2bus_select_wait}: ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 123 ; if rb2bus_error start ;info 123, 370 ; =>bit_code_emit@symbol(): sym=rb2bus_error ; 1TEST: Single test with code in skip slot btfsc rb2bus_error___byte, rb2bus_error___bit ; line_number = 124 ; return 0 start ; line_number = 124 ;info 124, 371 retlw 0 ; line_number = 124 ; return 0 done ; Recombine size1 = 0 || size2 = 0 ; line_number = 123 ; if rb2bus_error done ; # Wait for a byte to arrive. ; line_number = 127 ; _adden := _false ;info 127, 372 bcf _adden___byte, _adden___bit ; line_number = 128 ; while !_rcif start rb2bus_byte_get__1: ;info 128, 373 ; =>bit_code_emit@symbol(): sym=_rcif ; No 1TEST: true.size=0 false.size=2 ; No 2TEST: true.size=0 false.size=2 ; 1GOTO: Single test with GOTO btfsc _rcif___byte, _rcif___bit goto rb2bus_byte_get__2 ; line_number = 129 ; call wait() ;info 129, 375 call wait goto rb2bus_byte_get__1 rb2bus_byte_get__2: ; Recombine size1 = 0 || size2 = 0 ; line_number = 128 ; while !_rcif done ; # Record the 9th bit in {address_bit}: ; line_number = 132 ; address_bit := _false ;info 132, 377 bcf rb2bus_byte_get__address_bit___byte, rb2bus_byte_get__address_bit___bit ; line_number = 133 ; if _rx9d start ;info 133, 378 ; =>bit_code_emit@symbol(): sym=_rx9d ; 1TEST: Single test with code in skip slot btfsc _rx9d___byte, _rx9d___bit ; line_number = 134 ; address_bit := _true ;info 134, 379 bsf rb2bus_byte_get__address_bit___byte, rb2bus_byte_get__address_bit___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 133 ; if _rx9d done ; line_number = 135 ; value := _rcreg ;info 135, 380 movf _rcreg,w movwf rb2bus_byte_get__value ; # Clear any errors by toggling _{cren}: ; # FIXME: All of this should be done *before* reading {_rcreg}!!! ; line_number = 139 ; if _oerr start ;info 139, 382 ; =>bit_code_emit@symbol(): sym=_oerr ; 1TEST: Single test with code in skip slot btfsc _oerr___byte, _oerr___bit ; line_number = 140 ; _cren := _false ;info 140, 383 bcf _cren___byte, _cren___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 139 ; if _oerr done ; line_number = 141 ; if _ferr start ;info 141, 384 ; =>bit_code_emit@symbol(): sym=_ferr ; 1TEST: Single test with code in skip slot btfsc _ferr___byte, _ferr___bit ; line_number = 142 ; _cren := _false ;info 142, 385 bcf _cren___byte, _cren___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 141 ; if _ferr done ; line_number = 143 ; _cren := _true ;info 143, 386 bsf _cren___byte, _cren___bit ; line_number = 145 ; if address_bit start ;info 145, 387 ; =>bit_code_emit@symbol(): sym=rb2bus_byte_get__address_bit ; No 1TEST: true.size=13 false.size=0 ; No 2TEST: true.size=13 false.size=0 ; 1GOTO: Single test with GOTO btfss rb2bus_byte_get__address_bit___byte, rb2bus_byte_get__address_bit___bit goto rb2bus_byte_get__5 ; # We have an unexpected address select coming in: ; line_number = 147 ; if value = rb2bus_address start ;info 147, 389 ; Left minus Right movf rb2bus_address,w subwf rb2bus_byte_get__value,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=4 false.size=2 ; No 2TEST: true.size=4 false.size=2 ; 2GOTO: Single test with two GOTO's btfss __z___byte, __z___bit goto rb2bus_byte_get__3 ; # We are being selected again: ; line_number = 149 ; rb2bus_selected := _true ;info 149, 393 bsf rb2bus_selected___byte, rb2bus_selected___bit ; line_number = 150 ; _adden := _false ;info 150, 394 bcf _adden___byte, _adden___bit ; line_number = 152 ; call rb2bus_byte_put(rb2_ok) ;info 152, 395 movlw 165 call rb2bus_byte_put ; Recombine code1_bit_states != code2_bit_states goto rb2bus_byte_get__4 ; 2GOTO: Starting code 2 rb2bus_byte_get__3: ; # Somebody else is being selected; we deselect: ; line_number = 155 ; rb2bus_selected := _false ;info 155, 398 bcf rb2bus_selected___byte, rb2bus_selected___bit ; line_number = 156 ; _adden := _true ;info 156, 399 bsf _adden___byte, _adden___bit rb2bus_byte_get__4: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) ; line_number = 147 ; if value = rb2bus_address done ; # We want to get back to the beginning of decode: ; line_number = 159 ; rb2bus_error := _true ;info 159, 400 bsf rb2bus_error___byte, rb2bus_error___bit ; line_number = 160 ; value := 0 ;info 160, 401 clrf rb2bus_byte_get__value ; Recombine size1 = 0 || size2 = 0 rb2bus_byte_get__5: ; line_number = 145 ; if address_bit done ; # Regular data byte: ; line_number = 163 ; return value start ; line_number = 163 ;info 163, 402 movf rb2bus_byte_get__value,w return ; line_number = 163 ; return value done ; delay after procedure statements=non-uniform ; line_number = 166 ;info 166, 404 ; procedure rb2bus_byte_put rb2bus_byte_put: ; Last argument is sitting in W; save into argument variable movwf rb2bus_byte_put__value ; delay=4294967295 ; line_number = 167 ; argument value byte rb2bus_byte_put__value equ globals___0+8 ; line_number = 168 ; returns_nothing ; # This procedure will send {value} to the bus. It automatically ; # consumes the echo that is on the bus. If {rb2bus_error} is ; # set, this procedure does nothing. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 174 ; if !rb2bus_error start ;info 174, 405 ; =>bit_code_emit@symbol(): sym=rb2bus_error ; No 1TEST: true.size=0 false.size=18 ; No 2TEST: true.size=0 false.size=18 ; 1GOTO: Single test with GOTO btfsc rb2bus_error___byte, rb2bus_error___bit goto rb2bus_byte_put__4 ; # Wait until {_txreg} is ready for a value: ; line_number = 176 ; while !_txif start rb2bus_byte_put__1: ;info 176, 407 ; =>bit_code_emit@symbol(): sym=_txif ; No 1TEST: true.size=0 false.size=2 ; No 2TEST: true.size=0 false.size=2 ; 1GOTO: Single test with GOTO btfsc _txif___byte, _txif___bit goto rb2bus_byte_put__2 ; line_number = 177 ; call wait() ;info 177, 409 call wait goto rb2bus_byte_put__1 rb2bus_byte_put__2: ; Recombine size1 = 0 || size2 = 0 ; line_number = 176 ; while !_txif done ; # Ship {value} out to the bus with 9th bit turned off: ; line_number = 180 ; _adden := _false ;info 180, 411 bcf _adden___byte, _adden___bit ; line_number = 181 ; _tx9d := _false ;info 181, 412 bsf __rp0___byte, __rp0___bit bcf _tx9d___byte, _tx9d___bit ; line_number = 182 ; _txreg := value ;info 182, 414 bcf __rp0___byte, __rp0___bit movf rb2bus_byte_put__value,w movwf _txreg ; # Wait for the echo to show up: ; line_number = 185 ; while !_rcif start rb2bus_byte_put__3: ;info 185, 417 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfss _rcif___byte, _rcif___bit ; # Still waiting: goto rb2bus_byte_put__3 ; Recombine size1 = 0 || size2 = 0 ; line_number = 185 ; while !_rcif done ; # Throw the received byte away (store into {_w}). ; line_number = 188 ; assemble ;info 188, 419 ; line_number = 189 ;info 189, 419 movf _rcreg,w ; # Recover from any receive errors by toggling {_cren}: ; line_number = 192 ; if _oerr start ;info 192, 420 ; =>bit_code_emit@symbol(): sym=_oerr ; 1TEST: Single test with code in skip slot btfsc _oerr___byte, _oerr___bit ; line_number = 193 ; _cren := _false ;info 193, 421 bcf _cren___byte, _cren___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 192 ; if _oerr done ; line_number = 194 ; if _ferr start ;info 194, 422 ; =>bit_code_emit@symbol(): sym=_ferr ; 1TEST: Single test with code in skip slot btfsc _ferr___byte, _ferr___bit ; line_number = 195 ; _cren := _false ;info 195, 423 bcf _cren___byte, _cren___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 194 ; if _ferr done ; line_number = 196 ; _cren := _true ;info 196, 424 bsf _cren___byte, _cren___bit rb2bus_byte_put__4: ; Recombine size1 = 0 || size2 = 0 ; line_number = 174 ; if !rb2bus_error done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 199 ;info 199, 426 ; procedure rb2bus_command rb2bus_command: ; Last argument is sitting in W; save into argument variable movwf rb2bus_command__command ; delay=4294967295 ; line_number = 200 ; argument command byte rb2bus_command__command equ globals___0+11 ; line_number = 201 ; returns_nothing ; # This procedure will process an shared {command}. This procedure ; # accesses the global string {id}. ; line_number = 206 ; local new_address byte rb2bus_command__new_address equ globals___0+9 ; line_number = 207 ; local temp byte rb2bus_command__temp equ globals___0+10 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 209 ; switch command & 7 start ;info 209, 427 ; switch_before:(data:00=uu=>00 code:00=uu=>00) size=1 movlw rb2bus_command__13>>8 movwf __pclath movlw 7 andwf rb2bus_command__command,w ; switch after expression:(data:00=uu=>00 code:00=uu=>00) addlw rb2bus_command__13 movwf __pcl ; page_group 8 rb2bus_command__13: goto rb2bus_command__14 goto rb2bus_command__14 goto rb2bus_command__14 goto rb2bus_command__14 goto rb2bus_command__9 goto rb2bus_command__10 goto rb2bus_command__11 goto rb2bus_command__12 ; line_number = 210 ; case 4 rb2bus_command__9: ; # 1111 1100 (Address_Set): ; # Return old address: ; line_number = 213 ; call rb2bus_byte_put(rb2bus_address) ;info 213, 441 movf rb2bus_address,w call rb2bus_byte_put ; # Fetch new address: ; line_number = 216 ; new_address := rb2bus_byte_get() ;info 216, 443 call rb2bus_byte_get movwf rb2bus_command__new_address ; line_number = 217 ; if new_address = 0 || new_address = rb2bus_address start ;info 217, 445 ; Left minus Right movf rb2bus_command__new_address,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=1 false.size=36 ; No 2TEST: true.size=1 false.size=36 ; 2GOTO: Single test with two GOTO's btfsc __z___byte, __z___bit goto rb2bus_command__5 ; Recombine code1_bit_states != code2_bit_states ; &&||: index=1 true_delay=4294967295 false_delay=4294967295 goto_delay=4294967295 ; Left minus Right movf rb2bus_address,w subwf rb2bus_command__new_address,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=4 false.size=27 ; No 2TEST: true.size=4 false.size=27 ; 2GOTO: Single test with two GOTO's btfss __z___byte, __z___bit goto rb2bus_command__6 rb2bus_command__5: ; line_number = 218 ; call rb2bus_byte_put(0) ;info 218, 452 movlw 0 call rb2bus_byte_put ; line_number = 219 ; rb2bus_error := _true ;info 219, 454 bsf rb2bus_error___byte, rb2bus_error___bit ; line_number = 220 ; rb2bus_selected := _false ;info 220, 455 bcf rb2bus_selected___byte, rb2bus_selected___bit goto rb2bus_command__7 ; 2GOTO: Starting code 2 rb2bus_command__6: ; # Return new address: ; line_number = 223 ; call rb2bus_byte_put(new_address) ;info 223, 457 movf rb2bus_command__new_address,w call rb2bus_byte_put ; # Fetch new address again as a check: ; line_number = 226 ; temp := rb2bus_byte_get() ;info 226, 459 call rb2bus_byte_get movwf rb2bus_command__temp ; line_number = 227 ; if temp != new_address start ;info 227, 461 ; Left minus Right movf rb2bus_command__new_address,w subwf rb2bus_command__temp,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=14 false.size=4 ; No 2TEST: true.size=14 false.size=4 ; 2GOTO: Single test with two GOTO's btfss __z___byte, __z___bit goto rb2bus_command__3 ; line_number = 232 ; call rb2bus_eedata_write(new_address) ;info 232, 465 movf rb2bus_command__new_address,w call rb2bus_eedata_write ; line_number = 233 ; temp := rb2bus_eedata_read() ;info 233, 467 call rb2bus_eedata_read movwf rb2bus_command__temp ; line_number = 234 ; if temp = new_address start ;info 234, 469 ; Left minus Right movf rb2bus_command__new_address,w subwf rb2bus_command__temp,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=3 false.size=1 ; No 2TEST: true.size=3 false.size=1 ; 2GOTO: Single test with two GOTO's btfss __z___byte, __z___bit goto rb2bus_command__1 ; line_number = 235 ; rb2bus_address := new_address ;info 235, 473 movf rb2bus_command__new_address,w movwf rb2bus_address ; line_number = 236 ; call rb2bus_byte_put(rb2_ok) ;info 236, 475 movlw 165 goto rb2bus_command__2 ; 2GOTO: Starting code 2 rb2bus_command__1: ; line_number = 238 ; call rb2bus_byte_put(0) ;info 238, 477 movlw 0 rb2bus_command__2: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) call rb2bus_byte_put ; line_number = 234 ; if temp = new_address done goto rb2bus_command__4 ; 2GOTO: Starting code 2 rb2bus_command__3: ; line_number = 228 ; call rb2bus_byte_put(0) ;info 228, 480 movlw 0 call rb2bus_byte_put ; line_number = 229 ; rb2bus_error := _true ;info 229, 482 bsf rb2bus_error___byte, rb2bus_error___bit ; line_number = 230 ; rb2bus_selected := _false ;info 230, 483 bcf rb2bus_selected___byte, rb2bus_selected___bit rb2bus_command__4: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) ; line_number = 227 ; if temp != new_address done rb2bus_command__7: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) ; &&||: index=0 true_delay=4294967295 false_delay=4294967295 goto_delay=4294967295 ; &&||:: index=0 new_delay=4294967295 goto_delay=4294967295 ; 2GOTO: No goto needed; true=rb2bus_command__5 false= true_size=1 false_size=36 ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code2 final bitstates:(data:XX=cc=>XX code:00=uu=>00) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) ; line_number = 217 ; if new_address = 0 || new_address = rb2bus_address done goto rb2bus_command__14 ; line_number = 239 ; case 5 rb2bus_command__10: ; # 1111 1101 (Id_next): ; line_number = 241 ; if rb2bus_index < id.size start ;info 241, 485 movlw 22 subwf rb2bus_index,w ; =>bit_code_emit@symbol(): sym=__c ; No 1TEST: true.size=0 false.size=4 ; No 2TEST: true.size=0 false.size=4 ; 1GOTO: Single test with GOTO btfsc __c___byte, __c___bit goto rb2bus_command__8 ; line_number = 242 ; call rb2bus_byte_put(id[rb2bus_index]) ;info 242, 489 movf rb2bus_index,w call id call rb2bus_byte_put ; line_number = 243 ; rb2bus_index := rb2bus_index + 1 ;info 243, 492 incf rb2bus_index,f ; #if rb2bus_index >= id.size ; # rb2bus_index := rb2bus_index - 1 rb2bus_command__8: ; Recombine size1 = 0 || size2 = 0 ; line_number = 241 ; if rb2bus_index < id.size done goto rb2bus_command__14 ; line_number = 246 ; case 6 rb2bus_command__11: ; # 1111 1110 (Id_start): ; line_number = 248 ; rb2bus_index := 0 ;info 248, 494 clrf rb2bus_index goto rb2bus_command__14 ; line_number = 249 ; case 7 rb2bus_command__12: ; # 1111 1111 (Deselect): ; line_number = 251 ; call rb2bus_deselect() ;info 251, 496 call rb2bus_deselect rb2bus_command__14: ; line_number = 209 ; switch command & 7 done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Code bank 1; Start address: 2048; End address: 4095 org 2048 ; Code bank 2; Start address: 4096; End address: 6143 org 4096 ; Code bank 3; Start address: 6144; End address: 8191 org 6144 ; Configuration bits ; address = 0x2007, fill = 0x1030 ; cp = off (0x2000) ; debug = off (0x800) ; wrt = off (0x300) ; cpd = off (0x100) ; lvp = off (0x0) ; boren = off (0x0) ; pwrte = off (0x8) ; wdte = off (0x0) ; fosc = hs (0x2) ; 15162 = 0x3b3a __config 15162 ; Define start addresses for data regions ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 ; Region="globals___0" Address=32" Size=80 Bytes=20 Bits=4 Available=59 ; Region="globals___1" Address=160" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___2" Address=272" Size=96 Bytes=0 Bits=0 Available=96 ; Region="globals___3" Address=400" Size=112 Bytes=0 Bits=0 Available=112 end