radix dec ; Code bank 0; Start address: 0; End address: 2047 org 0 ; Define start addresses for data regions shared___globals equ 112 globals___0 equ 32 globals___1 equ 160 globals___2 equ 272 globals___3 equ 400 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2006 by Wayne C. Gramlich. ; # All rights reserved. ; buffer = 'shaft2' ; line_number = 6 ; library _pic16f767 entered ; # Copyright (c) 2004-2007 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f767' ; line_number = 6 ; processor pic16f767 ; line_number = 7 ; configure_address 0x2007 ; line_number = 8 ; configure_fill 0x0600 ; line_number = 9 ; configure_option cp: off = 0x2000 ; line_number = 10 ; configure_option cp: on = 0x0000 ; line_number = 11 ; configure_option cpmx: rc1 = 0x1000 ; line_number = 12 ; configure_option cpmx: rb3 = 0x0000 ; line_number = 13 ; configure_option debug: off = 0x0800 ; line_number = 14 ; configure_option debug: on = 0x0000 ; line_number = 15 ; configure_option borv: borv11 = 0x0180 ; line_number = 16 ; configure_option borv: borv10 = 0x0100 ; line_number = 17 ; configure_option borv: borv01 = 0x0080 ; line_number = 18 ; configure_option borv: borv00 = 0x0000 ; line_number = 19 ; configure_option boren: on = 0x40 ; line_number = 20 ; configure_option boren: off = 0x00 ; line_number = 21 ; configure_option mclre: on = 0x20 ; line_number = 22 ; configure_option mclre: off = 0x00 ; line_number = 23 ; configure_option pwrten: off = 8 ; line_number = 24 ; configure_option pwrten: on = 0 ; line_number = 25 ; configure_option wdten: on = 4 ; line_number = 26 ; configure_option wdten: off = 0 ; line_number = 27 ; configure_option fosc: rc_clk = 0x13 ; line_number = 28 ; configure_option fosc: rc_no_clk = 0x12 ; line_number = 29 ; configure_option fosc: int_clk = 0x11 ; line_number = 30 ; configure_option fosc: int_no_clk = 0x10 ; line_number = 31 ; configure_option fosc: extclk = 3 ; line_number = 32 ; configure_option fosc: hs = 2 ; line_number = 33 ; configure_option fosc: xt = 1 ; line_number = 34 ; configure_option fosc: lp = 0 ; line_number = 36 ; configure_address 0x2008 ; line_number = 37 ; configure_fill 0x3fbc ; line_number = 38 ; configure_option borsen: on = 0x0040 ; line_number = 39 ; configure_option borsen: off = 0x0000 ; line_number = 40 ; configure_option ieso: on = 0x0002 ; line_number = 41 ; configure_option ieso: off = 0x0000 ; line_number = 42 ; configure_option fcmen: on = 0x0001 ; line_number = 43 ; configure_option fcmen: off = 0x0000 ; line_number = 45 ; code_bank 0x0 : 0x7ff ; line_number = 46 ; code_bank 0x800 : 0xfff ; line_number = 47 ; code_bank 0x1000 : 0x17ff ; line_number = 48 ; code_bank 0x1800 : 0x1fff ; line_number = 49 ; data_bank 0x0 : 0x7f ; line_number = 50 ; data_bank 0x80 : 0xff ; line_number = 51 ; data_bank 0x100 : 0x17f ; line_number = 52 ; data_bank 0x180 : 0x1ff ; line_number = 53 ; global_region 0x20 : 0x6f ; line_number = 54 ; global_region 0xa0 : 0xef ; line_number = 55 ; global_region 0x110 : 0x16f ; line_number = 56 ; global_region 0x190 : 0x1ff ; line_number = 57 ; shared_region 0x70 : 0x7f ; line_number = 59 ; interrupts_possible ; line_number = 60 ; packages pdip = 28 ; line_number = 61 ; pin mclr, vpp, thv, mclr_unused ; line_number = 62 ; pin_bindings pdip = 1 ; line_number = 63 ; pin ra0_in, ra0_out, an0, ra0_unused ; line_number = 64 ; pin_bindings pdip = 2 ; line_number = 65 ; bind_to _porta@0 ; line_number = 66 ; or_if ra0_in _trisa 1 ; line_number = 67 ; or_if ra0_in _adcon1 15 ; line_number = 68 ; or_if ra0_in _adcon0 0 ; line_number = 69 ; or_if ra0_out _trisa 0 ; line_number = 70 ; or_if ra0_out _adcon1 15 ; line_number = 71 ; or_if ra0_out _adcon0 0 ; line_number = 72 ; pin ra1_in, ra1_out, an1, ra1_unused ; line_number = 73 ; pin_bindings pdip = 3 ; line_number = 74 ; bind_to _porta@1 ; line_number = 75 ; or_if ra1_in _trisa 2 ; line_number = 76 ; or_if ra1_in _adcon1 15 ; line_number = 77 ; or_if ra1_in _adcon0 0 ; line_number = 78 ; or_if ra1_out _trisa 0 ; line_number = 79 ; or_if ra1_out _adcon1 15 ; line_number = 80 ; or_if ra1_out _adcon0 0 ; line_number = 81 ; pin ra2_in, ra2_out, an2, vref_minus, ra2_unused ; line_number = 82 ; pin_bindings pdip = 4 ; line_number = 83 ; bind_to _porta@2 ; line_number = 84 ; or_if ra2_in _trisa 4 ; line_number = 85 ; or_if ra2_in _adcon1 15 ; line_number = 86 ; or_if ra2_in _adcon0 0 ; line_number = 87 ; or_if ra2_out _trisa 0 ; line_number = 88 ; or_if ra2_out _adcon1 15 ; line_number = 89 ; or_if ra2_out _adcon0 0 ; line_number = 90 ; pin ra3_in, ra3_out, an3, vrev_plus, ra3_unused ; line_number = 91 ; pin_bindings pdip = 5 ; line_number = 92 ; bind_to _porta@3 ; line_number = 93 ; or_if ra3_in _trisa 8 ; line_number = 94 ; or_if ra3_in _adcon1 15 ; line_number = 95 ; or_if ra3_in _adcon0 0 ; line_number = 96 ; or_if ra3_out _trisa 0 ; line_number = 97 ; or_if ra3_out _adcon1 15 ; line_number = 98 ; or_if ra3_out _adcon0 0 ; line_number = 99 ; pin ra4_in, ra4_out, t0cki, ra4_unused ; line_number = 100 ; pin_bindings pdip = 6 ; line_number = 101 ; bind_to _porta@4 ; line_number = 102 ; or_if ra4_in _trisa 16 ; line_number = 103 ; or_if ra4_in _adcon1 15 ; line_number = 104 ; or_if ra4_in _adcon0 0 ; line_number = 105 ; or_if ra4_out _trisa 0 ; line_number = 106 ; or_if ra4_out _adcon1 15 ; line_number = 107 ; or_if ra4_out _adcon0 0 ; line_number = 108 ; pin ra5_in, ra5_out, an4, ra5_unused ; line_number = 109 ; pin_bindings pdip = 7 ; line_number = 110 ; bind_to _porta@5 ; line_number = 111 ; or_if ra5_in _trisa 32 ; line_number = 112 ; or_if ra5_in _adcon1 15 ; line_number = 113 ; or_if ra5_in _adcon1 0 ; line_number = 114 ; or_if ra5_out _trisa 0 ; line_number = 115 ; or_if ra5_out _adcon1 15 ; line_number = 116 ; or_if ra5_out _adcon0 0 ; line_number = 117 ; pin vss, ground ; line_number = 118 ; pin_bindings pdip = 8 ; line_number = 119 ; pin osc1, clkin ; line_number = 120 ; pin_bindings pdip = 9 ; line_number = 121 ; pin osc2, clkout ; line_number = 122 ; pin_bindings pdip = 10 ; line_number = 123 ; pin rc0_in, rc0_out, t1oso, t1cki, rc0_unused ; line_number = 124 ; pin_bindings pdip = 11 ; line_number = 125 ; bind_to _portc@0 ; line_number = 126 ; or_if rc0_in _trisc 1 ; line_number = 127 ; or_if rc0_in _adcon1 15 ; line_number = 128 ; or_if rc0_in _adcon0 0 ; line_number = 129 ; or_if rc0_out _trisc 0 ; line_number = 130 ; or_if rc0_out _adcon1 15 ; line_number = 131 ; or_if rc0_out _adcon0 0 ; line_number = 132 ; or_if rc0_unused _trisc 1 ; line_number = 133 ; or_if rc0_unused _adcon1 15 ; line_number = 134 ; or_if rc0_unused _adcon0 0 ; line_number = 135 ; pin rc1_in, rc1_out, t1osi, ccp2, rc1_unused ; line_number = 136 ; pin_bindings pdip = 12 ; line_number = 137 ; bind_to _portc@1 ; line_number = 138 ; or_if rc1_in _trisc 2 ; line_number = 139 ; or_if rc1_in _adcon1 15 ; line_number = 140 ; or_if rc1_in _adcon0 0 ; line_number = 141 ; or_if rc1_out _trisc 0 ; line_number = 142 ; or_if rc1_out _adcon1 15 ; line_number = 143 ; or_if rc1_out _adcon0 0 ; line_number = 144 ; or_if rc1_unused _trisc 2 ; line_number = 145 ; or_if rc1_unused _adcon1 15 ; line_number = 146 ; or_if rc1_unused _adcon0 0 ; line_number = 147 ; pin rc2_in, rc2_out, ccp1, rc2_unused ; line_number = 148 ; pin_bindings pdip = 13 ; line_number = 149 ; bind_to _portc@2 ; line_number = 150 ; or_if rc2_in _trisc 4 ; line_number = 151 ; or_if rc2_in _adcon1 15 ; line_number = 152 ; or_if rc2_in _adcon0 0 ; line_number = 153 ; or_if rc2_out _trisc 0 ; line_number = 154 ; or_if rc2_out _adcon1 15 ; line_number = 155 ; or_if rc2_out _adcon0 0 ; line_number = 156 ; or_if rc2_unused _trisc 4 ; line_number = 157 ; or_if rc2_unused _adcon1 15 ; line_number = 158 ; or_if rc2_unused _adcon0 0 ; line_number = 159 ; pin rc3_in, rc3_out, sck_master, sck_slave, scl, rc3_unused ; line_number = 160 ; pin_bindings pdip = 14 ; line_number = 161 ; bind_to _portc@3 ; line_number = 162 ; or_if rc3_in _trisc 8 ; line_number = 163 ; or_if rc3_in _adcon1 15 ; line_number = 164 ; or_if rc3_in _adcon0 0 ; line_number = 165 ; or_if rc3_out _trisc 0 ; line_number = 166 ; or_if rc3_out _adcon1 15 ; line_number = 167 ; or_if rc3_out _adcon0 0 ; line_number = 168 ; or_if sck_master _trisc 0 ; line_number = 169 ; or_if sck_master _adcon1 15 ; line_number = 170 ; or_if sck_master _adcon0 0 ; line_number = 171 ; or_if sck_slave _trisc 8 ; line_number = 172 ; or_if sck_slave _adcon1 15 ; line_number = 173 ; or_if sck_slave _adcon0 0 ; line_number = 174 ; or_if rc3_unused _trisc 8 ; line_number = 175 ; or_if rc3_unused _adcon1 15 ; line_number = 176 ; or_if rc3_unused _adcon0 0 ; line_number = 177 ; pin rc4_in, rc4_out, sdi, sda, rc4_unused ; line_number = 178 ; pin_bindings pdip = 15 ; line_number = 179 ; bind_to _portc@4 ; line_number = 180 ; or_if rc4_in _trisc 16 ; line_number = 181 ; or_if rc4_in _adcon1 15 ; line_number = 182 ; or_if rc4_in _adcon0 0 ; line_number = 183 ; or_if rc4_out _trisc 0 ; line_number = 184 ; or_if rc4_out _adcon1 15 ; line_number = 185 ; or_if rc4_out _adcon0 0 ; line_number = 186 ; or_if sdi _trisc 16 ; line_number = 187 ; or_if sdi _adcon1 15 ; line_number = 188 ; or_if sdi _adcon0 0 ; line_number = 189 ; or_if rc4_unused _trisc 16 ; line_number = 190 ; or_if rc4_unused _adcon1 15 ; line_number = 191 ; or_if rc4_unused _adcon0 0 ; line_number = 192 ; pin rc5_in, rc5_out, sdo, rc5_unused ; line_number = 193 ; pin_bindings pdip = 16 ; line_number = 194 ; bind_to _portc@5 ; line_number = 195 ; or_if rc5_in _trisc 32 ; line_number = 196 ; or_if rc5_in _adcon1 15 ; line_number = 197 ; or_if rc5_in _adcon0 0 ; line_number = 198 ; or_if rc5_out _trisc 0 ; line_number = 199 ; or_if rc5_out _adcon1 15 ; line_number = 200 ; or_if rc5_out _adcon0 0 ; line_number = 201 ; or_if sdo _trisc 0 ; line_number = 202 ; or_if sdo _adcon1 15 ; line_number = 203 ; or_if sdo _adcon0 0 ; line_number = 204 ; or_if rc5_unused _trisc 32 ; line_number = 205 ; or_if rc5_unused _adcon1 15 ; line_number = 206 ; or_if rc5_unused _adcon0 0 ; line_number = 207 ; pin rc6_in, rc6_out, tx, ck, rc6_unused ; line_number = 208 ; pin_bindings pdip = 17 ; line_number = 209 ; bind_to _portc@6 ; line_number = 210 ; or_if rc6_in _trisc 64 ; line_number = 211 ; or_if rc6_in _adcon1 15 ; line_number = 212 ; or_if rc6_in _adcon0 0 ; line_number = 213 ; or_if rc6_out _trisc 0 ; line_number = 214 ; or_if rc6_out _adcon1 15 ; line_number = 215 ; or_if rc6_out _adcon0 0 ; # Note: for TX, configure {_trisc} as input (as per spec. sheet): ; line_number = 217 ; or_if tx _trisc 0 ; line_number = 218 ; or_if tx _adcon1 15 ; line_number = 219 ; or_if tx _adcon0 0 ; line_number = 220 ; or_if rc6_unused _trisc 64 ; line_number = 221 ; or_if rc6_unused _adcon1 15 ; line_number = 222 ; or_if rc6_unused _adcon0 0 ; line_number = 223 ; pin rc7_in, rc7_out, rx, dt, rc7_unused ; line_number = 224 ; pin_bindings pdip = 18 ; line_number = 225 ; bind_to _portc@7 ; line_number = 226 ; or_if rc7_in _trisc 128 ; line_number = 227 ; or_if rc7_in _adcon1 15 ; line_number = 228 ; or_if rc7_in _adcon0 0 ; line_number = 229 ; or_if rx _trisc 128 ; line_number = 230 ; or_if rx _adcon1 15 ; line_number = 231 ; or_if rx _adcon0 0 ; line_number = 232 ; or_if rc7_out _trisc 0 ; line_number = 233 ; or_if rc7_out _adcon1 15 ; line_number = 234 ; or_if rc7_out _adcon0 0 ; line_number = 235 ; or_if rc7_unused _trisc 128 ; line_number = 236 ; or_if rc7_unused _adcon1 15 ; line_number = 237 ; or_if rc7_unused _adcon0 0 ; line_number = 238 ; pin vss2, ground2 ; line_number = 239 ; pin_bindings pdip = 19 ; line_number = 240 ; pin vdd, power_supply ; line_number = 241 ; pin_bindings pdip = 20 ; line_number = 242 ; pin rb0_in, rb0_out, int, rb0_unused ; line_number = 243 ; pin_bindings pdip = 21 ; line_number = 244 ; bind_to _portb@0 ; line_number = 245 ; or_if rb0_in _trisb 1 ; line_number = 246 ; or_if rb0_in _adcon1 15 ; line_number = 247 ; or_if rb0_in _adcon0 0 ; line_number = 248 ; or_if rb0_out _trisb 0 ; line_number = 249 ; or_if rb0_out _adcon1 15 ; line_number = 250 ; or_if rb0_out _adcon0 0 ; line_number = 251 ; or_if rb0_unused _trisb 1 ; line_number = 252 ; or_if rb0_unused _adcon1 15 ; line_number = 253 ; or_if rb0_unused _adcon0 0 ; line_number = 254 ; pin rb1_in, rb1_out, rb1_unused ; line_number = 255 ; pin_bindings pdip = 22 ; line_number = 256 ; bind_to _portb@1 ; line_number = 257 ; or_if rb1_in _trisb 2 ; line_number = 258 ; or_if rb1_in _adcon1 15 ; line_number = 259 ; or_if rb1_in _adcon0 0 ; line_number = 260 ; or_if rb1_out _trisb 0 ; line_number = 261 ; or_if rb1_out _adcon1 15 ; line_number = 262 ; or_if rb1_out _adcon0 0 ; line_number = 263 ; or_if rb1_unused _trisb 2 ; line_number = 264 ; or_if rb1_unused _adcon1 15 ; line_number = 265 ; or_if rb1_unused _adcon0 0 ; line_number = 266 ; pin rb2_in, rb2_out, rb2_unused ; line_number = 267 ; pin_bindings pdip = 23 ; line_number = 268 ; bind_to _portb@2 ; line_number = 269 ; or_if rb2_in _trisb 4 ; line_number = 270 ; or_if rb2_in _adcon1 15 ; line_number = 271 ; or_if rb2_in _adcon0 0 ; line_number = 272 ; or_if rb2_out _trisb 0 ; line_number = 273 ; or_if rb2_out _adcon1 15 ; line_number = 274 ; or_if rb2_out _adcon0 0 ; line_number = 275 ; or_if rb2_unused _trisb 4 ; line_number = 276 ; or_if rb2_unused _adcon1 15 ; line_number = 277 ; or_if rb2_unused _adcon0 0 ; line_number = 278 ; pin rb3_in, rb3_out, pgm, rb3_unused ; line_number = 279 ; pin_bindings pdip = 24 ; line_number = 280 ; bind_to _portb@3 ; line_number = 281 ; or_if rb3_in _trisb 8 ; line_number = 282 ; or_if rb3_in _adcon1 15 ; line_number = 283 ; or_if rb3_in _adcon0 0 ; line_number = 284 ; or_if rb3_out _trisb 0 ; line_number = 285 ; or_if rb3_out _adcon1 15 ; line_number = 286 ; or_if rb3_out _adcon0 0 ; line_number = 287 ; or_if rb3_unused _trisb 8 ; line_number = 288 ; or_if rb3_unused _adcon1 15 ; line_number = 289 ; or_if rb3_unused _adcon0 0 ; line_number = 290 ; pin rb4_in, rb4_out, rb4_unused ; line_number = 291 ; pin_bindings pdip = 25 ; line_number = 292 ; bind_to _portb@4 ; line_number = 293 ; or_if rb4_in _trisb 16 ; line_number = 294 ; or_if rb4_in _adcon1 15 ; line_number = 295 ; or_if rb4_in _adcon0 0 ; line_number = 296 ; or_if rb4_out _trisb 0 ; line_number = 297 ; or_if rb4_out _adcon1 15 ; line_number = 298 ; or_if rb4_out _adcon0 0 ; line_number = 299 ; or_if rb4_unused _trisb 16 ; line_number = 300 ; or_if rb4_unused _adcon1 15 ; line_number = 301 ; or_if rb4_unused _adcon0 0 ; line_number = 302 ; pin rb5_in, rb5_out, rb5_unused ; line_number = 303 ; pin_bindings pdip = 26 ; line_number = 304 ; bind_to _portb@5 ; line_number = 305 ; or_if rb5_in _trisb 32 ; line_number = 306 ; or_if rb5_in _adcon1 15 ; line_number = 307 ; or_if rb5_in _adcon0 0 ; line_number = 308 ; or_if rb5_out _trisb 0 ; line_number = 309 ; or_if rb5_out _adcon1 15 ; line_number = 310 ; or_if rb5_out _adcon0 0 ; line_number = 311 ; or_if rb5_unused _trisb 32 ; line_number = 312 ; or_if rb5_unused _adcon1 15 ; line_number = 313 ; or_if rb5_unused _adcon0 0 ; line_number = 314 ; pin rb6_in, rb6_out, pgc, rb6_unused ; line_number = 315 ; pin_bindings pdip = 27 ; line_number = 316 ; bind_to _portb@6 ; line_number = 317 ; or_if rb6_in _trisb 64 ; line_number = 318 ; or_if rb6_in _adcon1 15 ; line_number = 319 ; or_if rb6_in _adcon0 0 ; line_number = 320 ; or_if rb6_out _trisb 0 ; line_number = 321 ; or_if rb6_out _adcon1 15 ; line_number = 322 ; or_if rb6_out _adcon0 0 ; line_number = 323 ; or_if rb6_unused _trisb 64 ; line_number = 324 ; or_if rb6_unused _adcon1 15 ; line_number = 325 ; or_if rb6_unused _adcon0 0 ; line_number = 326 ; pin rb7_in, rb7_out, pgd, rb7_unused ; line_number = 327 ; pin_bindings pdip = 28 ; line_number = 328 ; bind_to _portb@7 ; line_number = 329 ; or_if rb7_in _trisb 128 ; line_number = 330 ; or_if rb7_in _adcon1 15 ; line_number = 331 ; or_if rb7_in _adcon0 0 ; line_number = 332 ; or_if rb7_out _trisb 0 ; line_number = 333 ; or_if rb7_out _adcon1 15 ; line_number = 334 ; or_if rb7_out _adcon0 0 ; line_number = 335 ; or_if rb7_unused _trisb 128 ; line_number = 336 ; or_if rb7_unused _adcon1 15 ; line_number = 337 ; or_if rb7_unused _adcon0 0 ; # Register and pin definitions: ; line_number = 341 ; library _pic16f7x7 entered ; # Copyright (c) 2004-2006 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f7x7' ; line_number = 6 ; library _standard entered ; # Copyright (c) 2006 by Wayne C. Gramlich ; # All rights reserved. ; # Standard definition for uCL: ; buffer = '_standard' ; line_number = 8 ; constant _true = (1 = 1) _true equ 1 ; line_number = 9 ; constant _false = (0 != 0) _false equ 0 ; buffer = '_pic16f7x7' ; line_number = 6 ; library _standard exited ; # Common declarations for PIC16F7x7 series microcontrollers: ; # Register and pin definitions: ; # Bank 0: ; line_number = 14 ; register _indf = _indf equ 0 ; line_number = 16 ; register _tmr0 = _tmr0 equ 1 ; line_number = 18 ; register _pcl = _pcl equ 2 ; line_number = 20 ; register _status = _status equ 3 ; line_number = 21 ; bind _irp = _status@7 _irp___byte equ _status _irp___bit equ 7 ; line_number = 22 ; bind _rp1 = _status@6 _rp1___byte equ _status _rp1___bit equ 6 ; line_number = 23 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 24 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 25 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 26 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 27 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 28 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 30 ; register _fsr = _fsr equ 4 ; line_number = 32 ; register _porta = _porta equ 5 ; line_number = 34 ; register _portb = _portb equ 6 ; line_number = 36 ; register _portc = _portc equ 7 ; line_number = 38 ; register _pclath = _pclath equ 10 ; line_number = 40 ; register _intcon = _intcon equ 11 ; line_number = 41 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 42 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 43 ; bind _tmr0ie = _intcon@5 _tmr0ie___byte equ _intcon _tmr0ie___bit equ 5 ; line_number = 44 ; bind _int0ie = _intcon@4 _int0ie___byte equ _intcon _int0ie___bit equ 4 ; line_number = 45 ; bind _rbie = _intcon@3 _rbie___byte equ _intcon _rbie___bit equ 3 ; line_number = 46 ; bind _tmr0if = _intcon@2 _tmr0if___byte equ _intcon _tmr0if___bit equ 2 ; line_number = 47 ; bind _int0if = _intcon@1 _int0if___byte equ _intcon _int0if___bit equ 1 ; line_number = 48 ; bind _rbif = _intcon@0 _rbif___byte equ _intcon _rbif___bit equ 0 ; line_number = 50 ; register _pir1 = _pir1 equ 12 ; line_number = 51 ; bind _pspif = _pir1@7 _pspif___byte equ _pir1 _pspif___bit equ 7 ; line_number = 52 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 53 ; bind _rcif = _pir1@5 _rcif___byte equ _pir1 _rcif___bit equ 5 ; line_number = 54 ; bind _txif = _pir1@4 _txif___byte equ _pir1 _txif___bit equ 4 ; line_number = 55 ; bind _sspif = _pir1@3 _sspif___byte equ _pir1 _sspif___bit equ 3 ; line_number = 56 ; bind _ccp1if = _pir1@2 _ccp1if___byte equ _pir1 _ccp1if___bit equ 2 ; line_number = 57 ; bind _tmr2if = _pir1@1 _tmr2if___byte equ _pir1 _tmr2if___bit equ 1 ; line_number = 58 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 60 ; register _pir2 = _pir2 equ 13 ; line_number = 61 ; bind _osif = _pir2@7 _osif___byte equ _pir2 _osif___bit equ 7 ; line_number = 62 ; bind _cmif = _pir2@6 _cmif___byte equ _pir2 _cmif___bit equ 6 ; line_number = 63 ; bind _lvif = _pir2@5 _lvif___byte equ _pir2 _lvif___bit equ 5 ; line_number = 64 ; bind _bclif = _pir2@3 _bclif___byte equ _pir2 _bclif___bit equ 3 ; line_number = 65 ; bind _ccp3if = _pir2@1 _ccp3if___byte equ _pir2 _ccp3if___bit equ 1 ; line_number = 66 ; bind _ccp2if = _pir2@0 _ccp2if___byte equ _pir2 _ccp2if___bit equ 0 ; line_number = 68 ; register _tmr1l = _tmr1l equ 14 ; line_number = 70 ; register _tmr1h = _tmr1h equ 15 ; line_number = 72 ; register _t1con = _t1con equ 16 ; line_number = 73 ; bind _t1run = _t1con@6 _t1run___byte equ _t1con _t1run___bit equ 6 ; line_number = 74 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 75 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 76 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 77 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 78 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 79 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 81 ; register _tmr2 = _tmr2 equ 17 ; line_number = 83 ; register _t2con = _t2con equ 18 ; line_number = 84 ; bind _toutps3 = _t2con@6 _toutps3___byte equ _t2con _toutps3___bit equ 6 ; line_number = 85 ; bind _toutps2 = _t2con@5 _toutps2___byte equ _t2con _toutps2___bit equ 5 ; line_number = 86 ; bind _toutps1 = _t2con@4 _toutps1___byte equ _t2con _toutps1___bit equ 4 ; line_number = 87 ; bind _toutps0 = _t2con@3 _toutps0___byte equ _t2con _toutps0___bit equ 3 ; line_number = 88 ; bind _tmr2on = _t2con@2 _tmr2on___byte equ _t2con _tmr2on___bit equ 2 ; line_number = 89 ; bind _t2ckps1 = _t2con@1 _t2ckps1___byte equ _t2con _t2ckps1___bit equ 1 ; line_number = 90 ; bind _t2ckps0 = _t2con@0 _t2ckps0___byte equ _t2con _t2ckps0___bit equ 0 ; line_number = 92 ; register _sspbuf = _sspbuf equ 19 ; line_number = 94 ; register _sspcon = _sspcon equ 20 ; line_number = 95 ; bind _wcol = _sspcon@7 _wcol___byte equ _sspcon _wcol___bit equ 7 ; line_number = 96 ; bind _sspov = _sspcon@6 _sspov___byte equ _sspcon _sspov___bit equ 6 ; line_number = 97 ; bind _sspen = _sspcon@5 _sspen___byte equ _sspcon _sspen___bit equ 5 ; line_number = 98 ; bind _ckp = _sspcon@4 _ckp___byte equ _sspcon _ckp___bit equ 4 ; line_number = 99 ; bind _sspm3 = _sspcon@3 _sspm3___byte equ _sspcon _sspm3___bit equ 3 ; line_number = 100 ; bind _sspm2 = _sspcon@2 _sspm2___byte equ _sspcon _sspm2___bit equ 2 ; line_number = 101 ; bind _sspm1 = _sspcon@1 _sspm1___byte equ _sspcon _sspm1___bit equ 1 ; line_number = 102 ; bind _sspm0 = _sspcon@0 _sspm0___byte equ _sspcon _sspm0___bit equ 0 ; line_number = 104 ; register _ccpr1l = _ccpr1l equ 21 ; line_number = 106 ; register _ccpr1h = _ccpr1h equ 22 ; line_number = 108 ; register _ccp1con = _ccp1con equ 23 ; line_number = 109 ; bind _ccp1x = _ccp1con@5 _ccp1x___byte equ _ccp1con _ccp1x___bit equ 5 ; line_number = 110 ; bind _ccp1y = _ccp1con@4 _ccp1y___byte equ _ccp1con _ccp1y___bit equ 4 ; line_number = 111 ; bind _ccp1m3 = _ccp1con@3 _ccp1m3___byte equ _ccp1con _ccp1m3___bit equ 3 ; line_number = 112 ; bind _ccp1m2 = _ccp1con@2 _ccp1m2___byte equ _ccp1con _ccp1m2___bit equ 2 ; line_number = 113 ; bind _ccp1m1 = _ccp1con@1 _ccp1m1___byte equ _ccp1con _ccp1m1___bit equ 1 ; line_number = 114 ; bind _ccp1m0 = _ccp1con@0 _ccp1m0___byte equ _ccp1con _ccp1m0___bit equ 0 ; line_number = 116 ; register _rcsta = _rcsta equ 24 ; line_number = 117 ; bind _spen = _rcsta@7 _spen___byte equ _rcsta _spen___bit equ 7 ; line_number = 118 ; bind _rx9 = _rcsta@6 _rx9___byte equ _rcsta _rx9___bit equ 6 ; line_number = 119 ; bind _sren = _rcsta@5 _sren___byte equ _rcsta _sren___bit equ 5 ; line_number = 120 ; bind _cren = _rcsta@4 _cren___byte equ _rcsta _cren___bit equ 4 ; line_number = 121 ; bind _adden = _rcsta@3 _adden___byte equ _rcsta _adden___bit equ 3 ; line_number = 122 ; bind _ferr = _rcsta@2 _ferr___byte equ _rcsta _ferr___bit equ 2 ; line_number = 123 ; bind _oerr = _rcsta@1 _oerr___byte equ _rcsta _oerr___bit equ 1 ; line_number = 124 ; bind _rx9d = _rcsta@0 _rx9d___byte equ _rcsta _rx9d___bit equ 0 ; line_number = 126 ; register _txreg = _txreg equ 25 ; line_number = 128 ; register _rcreg = _rcreg equ 26 ; line_number = 130 ; register _ccpr2l = _ccpr2l equ 27 ; line_number = 132 ; register _ccpr2h = _ccpr2h equ 28 ; line_number = 134 ; register _ccp2con = _ccp2con equ 29 ; line_number = 135 ; bind _ccp2x = _ccp2con@5 _ccp2x___byte equ _ccp2con _ccp2x___bit equ 5 ; line_number = 136 ; bind _ccp2y = _ccp2con@4 _ccp2y___byte equ _ccp2con _ccp2y___bit equ 4 ; line_number = 137 ; bind _ccp2m3 = _ccp2con@3 _ccp2m3___byte equ _ccp2con _ccp2m3___bit equ 3 ; line_number = 138 ; bind _ccp2m2 = _ccp2con@2 _ccp2m2___byte equ _ccp2con _ccp2m2___bit equ 2 ; line_number = 139 ; bind _ccp2m1 = _ccp2con@1 _ccp2m1___byte equ _ccp2con _ccp2m1___bit equ 1 ; line_number = 140 ; bind _ccp2m0 = _ccp2con@0 _ccp2m0___byte equ _ccp2con _ccp2m0___bit equ 0 ; line_number = 142 ; register _adresh = _adresh equ 30 ; line_number = 144 ; register _adcon0 = _adcon0 equ 31 ; line_number = 145 ; bind _adcs1 = _adcon0@7 _adcs1___byte equ _adcon0 _adcs1___bit equ 7 ; line_number = 146 ; bind _adcs0 = _adcon0@6 _adcs0___byte equ _adcon0 _adcs0___bit equ 6 ; line_number = 147 ; bind _chs2 = _adcon0@5 _chs2___byte equ _adcon0 _chs2___bit equ 5 ; line_number = 148 ; bind _chs1 = _adcon0@4 _chs1___byte equ _adcon0 _chs1___bit equ 4 ; line_number = 149 ; bind _chs0 = _adcon0@3 _chs0___byte equ _adcon0 _chs0___bit equ 3 ; line_number = 150 ; bind _go_done = _adcon0@2 _go_done___byte equ _adcon0 _go_done___bit equ 2 ; line_number = 151 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Bank 1: ; line_number = 155 ; register _option_reg = _option_reg equ 129 ; line_number = 156 ; bind _rbpu = _option_reg@7 _rbpu___byte equ _option_reg _rbpu___bit equ 7 ; line_number = 157 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 158 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 159 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 160 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 161 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 162 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 163 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 165 ; register _trisa = _trisa equ 133 ; line_number = 166 ; bind _trisa7 = _trisa@7 _trisa7___byte equ _trisa _trisa7___bit equ 7 ; line_number = 167 ; bind _trisa6 = _trisa@6 _trisa6___byte equ _trisa _trisa6___bit equ 6 ; line_number = 168 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 169 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 170 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 171 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 172 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 173 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 175 ; register _trisb = _trisb equ 134 ; line_number = 177 ; register _trisc = _trisc equ 135 ; line_number = 178 ; bind _trisc7 = _trisc@7 _trisc7___byte equ _trisc _trisc7___bit equ 7 ; line_number = 179 ; bind _trisc6 = _trisc@6 _trisc6___byte equ _trisc _trisc6___bit equ 6 ; line_number = 180 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 181 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 182 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 183 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 184 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 185 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 187 ; register _pie1 = _pie1 equ 140 ; line_number = 188 ; bind _pspie = _pie1@7 _pspie___byte equ _pie1 _pspie___bit equ 7 ; line_number = 189 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 190 ; bind _rcie = _pie1@5 _rcie___byte equ _pie1 _rcie___bit equ 5 ; line_number = 191 ; bind _txie = _pie1@4 _txie___byte equ _pie1 _txie___bit equ 4 ; line_number = 192 ; bind _sspie = _pie1@3 _sspie___byte equ _pie1 _sspie___bit equ 3 ; line_number = 193 ; bind _ccp1ie = _pie1@2 _ccp1ie___byte equ _pie1 _ccp1ie___bit equ 2 ; line_number = 194 ; bind _tmr2ie = _pie1@1 _tmr2ie___byte equ _pie1 _tmr2ie___bit equ 1 ; line_number = 195 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 197 ; register _pie2 = _pie2 equ 141 ; line_number = 198 ; bind _osfie = _pie2@7 _osfie___byte equ _pie2 _osfie___bit equ 7 ; line_number = 199 ; bind _cmie = _pie2@6 _cmie___byte equ _pie2 _cmie___bit equ 6 ; line_number = 200 ; bind _lvdie = _pie2@5 _lvdie___byte equ _pie2 _lvdie___bit equ 5 ; line_number = 201 ; bind _bclie = _pie2@3 _bclie___byte equ _pie2 _bclie___bit equ 3 ; line_number = 202 ; bind _ccp3ie = _pie2@1 _ccp3ie___byte equ _pie2 _ccp3ie___bit equ 1 ; line_number = 203 ; bind _ccp2ie = _pie2@0 _ccp2ie___byte equ _pie2 _ccp2ie___bit equ 0 ; line_number = 205 ; register _pcon = _pcon equ 142 ; line_number = 206 ; bind _sboren = _pcon@2 _sboren___byte equ _pcon _sboren___bit equ 2 ; line_number = 207 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 208 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 210 ; register _osccon = _osccon equ 143 ; line_number = 211 ; bind _ircf2 = _osccon@6 _ircf2___byte equ _osccon _ircf2___bit equ 6 ; line_number = 212 ; bind _ircf1 = _osccon@5 _ircf1___byte equ _osccon _ircf1___bit equ 5 ; line_number = 213 ; bind _ircf0 = _osccon@4 _ircf0___byte equ _osccon _ircf0___bit equ 4 ; line_number = 214 ; bind _osts = _osccon@3 _osts___byte equ _osccon _osts___bit equ 3 ; line_number = 215 ; bind _iofs = _osccon@2 _iofs___byte equ _osccon _iofs___bit equ 2 ; line_number = 216 ; bind _scs1 = _osccon@1 _scs1___byte equ _osccon _scs1___bit equ 1 ; line_number = 217 ; bind _scs0 = _osccon@0 _scs0___byte equ _osccon _scs0___bit equ 0 ; line_number = 219 ; register _osctune = _osctune equ 144 ; line_number = 220 ; bind _tun5 = _osctune@5 _tun5___byte equ _osctune _tun5___bit equ 5 ; line_number = 221 ; bind _tun4 = _osctune@4 _tun4___byte equ _osctune _tun4___bit equ 4 ; line_number = 222 ; bind _tun3 = _osctune@3 _tun3___byte equ _osctune _tun3___bit equ 3 ; line_number = 223 ; bind _tun2 = _osctune@2 _tun2___byte equ _osctune _tun2___bit equ 2 ; line_number = 224 ; bind _tun1 = _osctune@1 _tun1___byte equ _osctune _tun1___bit equ 1 ; line_number = 225 ; bind _tun0 = _osctune@0 _tun0___byte equ _osctune _tun0___bit equ 0 ; line_number = 227 ; register _sspcon2 = _sspcon2 equ 145 ; line_number = 228 ; bind _gcen = _sspcon2@7 _gcen___byte equ _sspcon2 _gcen___bit equ 7 ; line_number = 229 ; bind _ackstat = _sspcon2@6 _ackstat___byte equ _sspcon2 _ackstat___bit equ 6 ; line_number = 230 ; bind _ackdt = _sspcon2@5 _ackdt___byte equ _sspcon2 _ackdt___bit equ 5 ; line_number = 231 ; bind _acken = _sspcon2@4 _acken___byte equ _sspcon2 _acken___bit equ 4 ; line_number = 232 ; bind _rcen = _sspcon2@3 _rcen___byte equ _sspcon2 _rcen___bit equ 3 ; line_number = 233 ; bind _pen = _sspcon2@2 _pen___byte equ _sspcon2 _pen___bit equ 2 ; line_number = 234 ; bind _rsen = _sspcon2@1 _rsen___byte equ _sspcon2 _rsen___bit equ 1 ; line_number = 235 ; bind _sen = _sspcon2@0 _sen___byte equ _sspcon2 _sen___bit equ 0 ; line_number = 237 ; register _pr2 = _pr2 equ 146 ; line_number = 239 ; register _sspadd = _sspadd equ 147 ; line_number = 241 ; register _sspstat = _sspstat equ 148 ; line_number = 242 ; bind _smp = _sspstat@7 _smp___byte equ _sspstat _smp___bit equ 7 ; line_number = 243 ; bind _cke = _sspstat@6 _cke___byte equ _sspstat _cke___bit equ 6 ; line_number = 244 ; bind _da = _sspstat@5 _da___byte equ _sspstat _da___bit equ 5 ; line_number = 245 ; bind _p = _sspstat@4 _p___byte equ _sspstat _p___bit equ 4 ; line_number = 246 ; bind _s = _sspstat@3 _s___byte equ _sspstat _s___bit equ 3 ; line_number = 247 ; bind _rw = _sspstat@2 _rw___byte equ _sspstat _rw___bit equ 2 ; line_number = 248 ; bind _ua = _sspstat@1 _ua___byte equ _sspstat _ua___bit equ 1 ; line_number = 249 ; bind _bf = _sspstat@0 _bf___byte equ _sspstat _bf___bit equ 0 ; line_number = 251 ; register _ccpr3l = _ccpr3l equ 149 ; line_number = 253 ; register _ccpr3h = _ccpr3h equ 150 ; line_number = 255 ; register _ccp3con = _ccp3con equ 150 ; line_number = 256 ; bind _ccp3x = _ccp3con@5 _ccp3x___byte equ _ccp3con _ccp3x___bit equ 5 ; line_number = 257 ; bind _ccp3y = _ccp3con@4 _ccp3y___byte equ _ccp3con _ccp3y___bit equ 4 ; line_number = 258 ; bind _ccp3m3 = _ccp3con@3 _ccp3m3___byte equ _ccp3con _ccp3m3___bit equ 3 ; line_number = 259 ; bind _ccp3m2 = _ccp3con@2 _ccp3m2___byte equ _ccp3con _ccp3m2___bit equ 2 ; line_number = 260 ; bind _ccp3m1 = _ccp3con@1 _ccp3m1___byte equ _ccp3con _ccp3m1___bit equ 1 ; line_number = 261 ; bind _ccp3m0 = _ccp3con@0 _ccp3m0___byte equ _ccp3con _ccp3m0___bit equ 0 ; line_number = 263 ; register _txsta = _txsta equ 152 ; line_number = 264 ; bind _csrc = _txsta@7 _csrc___byte equ _txsta _csrc___bit equ 7 ; line_number = 265 ; bind _tx9 = _txsta@6 _tx9___byte equ _txsta _tx9___bit equ 6 ; line_number = 266 ; bind _txen = _txsta@5 _txen___byte equ _txsta _txen___bit equ 5 ; line_number = 267 ; bind _sync = _txsta@4 _sync___byte equ _txsta _sync___bit equ 4 ; line_number = 268 ; bind _brgh = _txsta@2 _brgh___byte equ _txsta _brgh___bit equ 2 ; line_number = 269 ; bind _trmt = _txsta@1 _trmt___byte equ _txsta _trmt___bit equ 1 ; line_number = 270 ; bind _tx9d = _txsta@0 _tx9d___byte equ _txsta _tx9d___bit equ 0 ; line_number = 272 ; register _spbrg = _spbrg equ 153 ; line_number = 274 ; register _adcon2 = _adcon2 equ 155 ; line_number = 275 ; bind _acqt2 = _adcon2@5 _acqt2___byte equ _adcon2 _acqt2___bit equ 5 ; line_number = 276 ; bind _acqt1 = _adcon2@4 _acqt1___byte equ _adcon2 _acqt1___bit equ 4 ; line_number = 277 ; bind _acqt0 = _adcon2@3 _acqt0___byte equ _adcon2 _acqt0___bit equ 3 ; line_number = 279 ; register _cmcon = _cmcon equ 156 ; line_number = 280 ; bind _c2out = _cmcon@7 _c2out___byte equ _cmcon _c2out___bit equ 7 ; line_number = 281 ; bind _c1out = _cmcon@6 _c1out___byte equ _cmcon _c1out___bit equ 6 ; line_number = 282 ; bind _c2inv = _cmcon@5 _c2inv___byte equ _cmcon _c2inv___bit equ 5 ; line_number = 283 ; bind _c1inv = _cmcon@4 _c1inv___byte equ _cmcon _c1inv___bit equ 4 ; line_number = 284 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 285 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 286 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 287 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; line_number = 289 ; register _cvrcon = _cvrcon equ 157 ; line_number = 290 ; bind _cvren = _cvrcon@7 _cvren___byte equ _cvrcon _cvren___bit equ 7 ; line_number = 291 ; bind _cvroe = _cvrcon@6 _cvroe___byte equ _cvrcon _cvroe___bit equ 6 ; line_number = 292 ; bind _cvrr = _cvrcon@5 _cvrr___byte equ _cvrcon _cvrr___bit equ 5 ; line_number = 293 ; bind _cvr3 = _cvrcon@3 _cvr3___byte equ _cvrcon _cvr3___bit equ 3 ; line_number = 294 ; bind _cvr2 = _cvrcon@2 _cvr2___byte equ _cvrcon _cvr2___bit equ 2 ; line_number = 295 ; bind _cvr1 = _cvrcon@1 _cvr1___byte equ _cvrcon _cvr1___bit equ 1 ; line_number = 296 ; bind _cvr0 = _cvrcon@0 _cvr0___byte equ _cvrcon _cvr0___bit equ 0 ; line_number = 298 ; register _adresl = _adresl equ 158 ; line_number = 300 ; register _adcon1 = _adcon1 equ 159 ; line_number = 301 ; bind _adfm = _adcon1@7 _adfm___byte equ _adcon1 _adfm___bit equ 7 ; line_number = 302 ; bind _adcs2 = _adcon1@6 _adcs2___byte equ _adcon1 _adcs2___bit equ 6 ; line_number = 303 ; bind _vfg1 = _adcon1@5 _vfg1___byte equ _adcon1 _vfg1___bit equ 5 ; line_number = 304 ; bind _vfg0 = _adcon1@4 _vfg0___byte equ _adcon1 _vfg0___bit equ 4 ; line_number = 305 ; bind _pcfg3 = _adcon1@3 _pcfg3___byte equ _adcon1 _pcfg3___bit equ 3 ; line_number = 306 ; bind _pcfg2 = _adcon1@2 _pcfg2___byte equ _adcon1 _pcfg2___bit equ 2 ; line_number = 307 ; bind _pcfg1 = _adcon1@1 _pcfg1___byte equ _adcon1 _pcfg1___bit equ 1 ; line_number = 308 ; bind _pcfg0 = _adcon1@0 _pcfg0___byte equ _adcon1 _pcfg0___bit equ 0 ; # Bank 2: ; line_number = 312 ; register _wdtcon = _wdtcon equ 261 ; line_number = 313 ; bind _wdtps3 = _wdtcon@4 _wdtps3___byte equ _wdtcon _wdtps3___bit equ 4 ; line_number = 314 ; bind _wdtps2 = _wdtcon@3 _wdtps2___byte equ _wdtcon _wdtps2___bit equ 3 ; line_number = 315 ; bind _wdtps1 = _wdtcon@2 _wdtps1___byte equ _wdtcon _wdtps1___bit equ 2 ; line_number = 316 ; bind _wdtps0 = _wdtcon@1 _wdtps0___byte equ _wdtcon _wdtps0___bit equ 1 ; line_number = 317 ; bind _swdten = _wdtcon@0 _swdten___byte equ _wdtcon _swdten___bit equ 0 ; line_number = 319 ; register _lvdcon = _lvdcon equ 265 ; line_number = 320 ; bind _irvst = _lvdcon@5 _irvst___byte equ _lvdcon _irvst___bit equ 5 ; line_number = 321 ; bind _lvden = _lvdcon@4 _lvden___byte equ _lvdcon _lvden___bit equ 4 ; line_number = 322 ; bind _lvdl3 = _lvdcon@3 _lvdl3___byte equ _lvdcon _lvdl3___bit equ 3 ; line_number = 323 ; bind _lvdl2 = _lvdcon@2 _lvdl2___byte equ _lvdcon _lvdl2___bit equ 2 ; line_number = 324 ; bind _lvdl1 = _lvdcon@1 _lvdl1___byte equ _lvdcon _lvdl1___bit equ 1 ; line_number = 325 ; bind _lvdl0 = _lvdcon@0 _lvdl0___byte equ _lvdcon _lvdl0___bit equ 0 ; line_number = 327 ; register _pmdata = _pmdata equ 268 ; line_number = 329 ; register _pmadr = _pmadr equ 269 ; line_number = 331 ; register _pmdath = _pmdath equ 270 ; line_number = 333 ; register _pmadrh = _pmadrh equ 271 ; # Bank 3: ; line_number = 337 ; register _pmcon1 = _pmcon1 equ 396 ; line_number = 338 ; bind _rd = _pmcon1@0 _rd___byte equ _pmcon1 _rd___bit equ 0 ; buffer = '_pic16f767' ; line_number = 341 ; library _pic16f7x7 exited ; buffer = 'shaft2' ; line_number = 6 ; library _pic16f767 exited ; line_number = 7 ; library clock20mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock20mhz' ; line_number = 9 ; constant clock_rate = 20000000 clock_rate equ 20000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 5000000 ; buffer = 'shaft2' ; line_number = 7 ; library clock20mhz exited ; line_number = 8 ; library _uart entered ; # Copyright (c) 2004 by Wayne C. Gramlich. ; # All rights reserved. ; # This library contains some procedures for accessing the UART. ; Delaying code generation for procedure _uart_byte_safe_get ; Delaying code generation for procedure _uart_byte_get ; Delaying code generation for procedure _uart_hex_put ; Delaying code generation for procedure _uart_nibble_put ; Delaying code generation for procedure _uart_space_put ; Delaying code generation for procedure _uart_crlf_put ; Delaying code generation for procedure _uart_byte_put ; line_number = 8 ; library _uart exited ; # Pin definitions: ; line_number = 12 ; package pdip ; line_number = 13 ; pin 1 = mclr ; line_number = 14 ; pin 2 = ra0_unused ; line_number = 15 ; pin 3 = ra1_unused ; line_number = 16 ; pin 4 = ra2_unused ; line_number = 17 ; pin 5 = ra3_unused ; line_number = 18 ; pin 6 = ra4_unused ; line_number = 19 ; pin 7 = ra5_unused ; line_number = 20 ; pin 8 = ground ; line_number = 21 ; pin 9 = osc1 ; line_number = 22 ; pin 10 = osc2 ; line_number = 23 ; pin 11 = rc0_unused ; line_number = 24 ; pin 12 = rc1_unused ; line_number = 25 ; pin 13 = rc2_unused ; line_number = 26 ; pin 14 = rc3_unused ; line_number = 27 ; pin 15 = rc4_unused ; line_number = 28 ; pin 16 = rc5_unused ; line_number = 29 ; pin 17 = tx ; line_number = 30 ; pin 18 = rx ; line_number = 31 ; pin 19 = ground2 ; line_number = 32 ; pin 20 = power_supply ; line_number = 33 ; pin 21 = rb0_unused ; line_number = 34 ; pin 22 = rb1_unused ; line_number = 35 ; pin 23 = rb2_unused ; line_number = 36 ; pin 24 = rb3_unused ; line_number = 37 ; pin 25 = rb4_unused ; line_number = 38 ; pin 26 = rb5_unused ; line_number = 39 ; pin 27 = rb6_unused ; line_number = 40 ; pin 28 = rb7_unused ; line_number = 42 ; global module_address byte module_address equ globals___0+3 ; line_number = 43 ; global rx9d bit rx9d___byte equ globals___0+79 rx9d___bit equ 0 ; line_number = 44 ; global id_index byte id_index equ globals___0+4 ; line_number = 46 ; origin 0 org 0 ; line_number = 48 ;info 48, 0 ; procedure main main: ; Initialize some registers clrf _adcon0 movlw 15 bsf __rp0___byte, __rp0___bit movwf _adcon1 movlw 255 movwf _trisb movlw 191 movwf _trisc ; arguments_none ; line_number = 50 ; returns_nothing ; line_number = 52 ; local command byte main__command equ globals___0+5 ; line_number = 53 ; local transmit bit main__transmit___byte equ globals___0+79 main__transmit___bit equ 1 ; line_number = 54 ; local result byte main__result equ globals___0+6 ; line_number = 55 ; local mode byte main__mode equ globals___0+7 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>01 code:00=uu=>00) ; line_number = 57 ; module_address := 5 ;info 57, 8 movlw 5 bcf __rp0___byte, __rp0___bit movwf module_address ; # Warm up the UART: ; line_number = 60 ; _trisc@7 := _true ;info 60, 11 main__select__1___byte equ _trisc main__select__1___bit equ 7 bsf __rp0___byte, __rp0___bit bsf main__select__1___byte, main__select__1___bit ; line_number = 61 ; _trisc@6 := _true ;info 61, 13 main__select__2___byte equ _trisc main__select__2___bit equ 6 bsf main__select__2___byte, main__select__2___bit ; line_number = 63 ; _txsta := 0 ;info 63, 14 clrf _txsta ; line_number = 64 ; _tx9 := _true ;info 64, 15 bsf _tx9___byte, _tx9___bit ; #_tx9 := _false ; line_number = 66 ; _txen := _true ;info 66, 16 bsf _txen___byte, _txen___bit ; line_number = 67 ; _brgh := _true ;info 67, 17 bsf _brgh___byte, _brgh___bit ; line_number = 69 ; _rcsta := 0 ;info 69, 18 bcf __rp0___byte, __rp0___bit clrf _rcsta ; line_number = 70 ; _spen := _true ;info 70, 20 bsf _spen___byte, _spen___bit ; line_number = 71 ; _rx9 := _true ;info 71, 21 bsf _rx9___byte, _rx9___bit ; #_rx9 := _false ; line_number = 73 ; _cren := _true ;info 73, 22 bsf _cren___byte, _cren___bit ; #_adden := _true ; line_number = 75 ; _adden := _false ;info 75, 23 bcf _adden___byte, _adden___bit ; # Baud rate = 625000 @ 20MHz. ; line_number = 78 ; _spbrg := 1 ;info 78, 24 movlw 1 bsf __rp0___byte, __rp0___bit movwf _spbrg ; line_number = 80 ; mode := 0 ;info 80, 27 bcf __rp0___byte, __rp0___bit clrf main__mode ; line_number = 81 ; id_index := 0 ;info 81, 29 clrf id_index ; #loop_forever ; # call _uart_byte_put(command) ; # loop_exactly 100 ; # delay 500 ; # do_nothing ; # command := command + 1 ; #loop_forever ; # command := _uart_byte_get() ; # call _uart_byte_put(command + 1) ; # call _uart_byte_get() ; line_number = 95 ; loop_forever start main__3: ; line_number = 96 ; transmit := _false ;info 96, 30 bcf main__transmit___byte, main__transmit___bit ; line_number = 97 ; rx9d := _false ;info 97, 31 bcf rx9d___byte, rx9d___bit ; line_number = 98 ; while !_rcif start main__4: ;info 98, 32 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfss _rcif___byte, _rcif___bit ; line_number = 99 ; do_nothing ;info 99, 33 goto main__4 ; Recombine size1 = 0 || size2 = 0 ; line_number = 98 ; while !_rcif done ; line_number = 100 ; if _rx9d start ;info 100, 34 ; =>bit_code_emit@symbol(): sym=_rx9d ; 1TEST: Single test with code in skip slot btfsc _rx9d___byte, _rx9d___bit ; line_number = 101 ; rx9d := _true ;info 101, 35 bsf rx9d___byte, rx9d___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 100 ; if _rx9d done ; line_number = 102 ; command := _rcreg ;info 102, 36 movf _rcreg,w movwf main__command ; line_number = 104 ; if rx9d start ;info 104, 38 ; =>bit_code_emit@symbol(): sym=rx9d ; No 1TEST: true.size=11 false.size=69 ; No 2TEST: true.size=11 false.size=69 ; 2GOTO: Single test with two GOTO's btfss rx9d___byte, rx9d___bit goto main__25 ; # We have an address bit: ; line_number = 106 ; if command = module_address start ;info 106, 40 ; Left minus Right movf module_address,w subwf main__command,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=4 false.size=1 ; No 2TEST: true.size=4 false.size=1 ; 2GOTO: Single test with two GOTO's btfss __z___byte, __z___bit goto main__23 ; # We have a match: ; line_number = 108 ; _adden := _false ;info 108, 44 bcf _adden___byte, _adden___bit ; line_number = 109 ; result := 0x5a ;info 109, 45 movlw 90 movwf main__result ; line_number = 110 ; transmit := _true ;info 110, 47 bsf main__transmit___byte, main__transmit___bit goto main__24 ; 2GOTO: Starting code 2 main__23: ; # We need to disable non-address reception: ; line_number = 113 ; _adden := _true ;info 113, 49 bsf _adden___byte, _adden___bit main__24: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) ; line_number = 106 ; if command = module_address done ; line_number = 114 ; mode := 0 ;info 114, 50 clrf main__mode goto main__26 ; 2GOTO: Starting code 2 main__25: ; # We have a command: ; line_number = 117 ; switch mode start ;info 117, 52 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__21>>8 movwf __pclath movf main__mode,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__21 movwf __pcl ; page_group 1 main__21: goto main__20 ; line_number = 118 ; case 0 main__20: ; # Basic instruction decoding: ; line_number = 120 ; switch command >> 6 start ;info 120, 58 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__17>>8 movwf __pclath main__18 equ globals___0+8 swapf main__command,w movwf main__18 rrf main__18,f rrf main__18,w andlw 3 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__17 movwf __pcl ; page_group 4 main__17: goto main__19 goto main__19 goto main__19 goto main__16 ; line_number = 121 ; case 3 main__16: ; # 11xx xxxx: ; line_number = 123 ; switch (command >> 3) & 7 start ;info 123, 71 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__13>>8 movwf __pclath main__14 equ globals___0+8 rrf main__command,w movwf main__14 rrf main__14,f rrf main__14,w andlw 7 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__13 movwf __pcl ; page_group 8 main__13: goto main__15 goto main__15 goto main__15 goto main__15 goto main__15 goto main__15 goto main__15 goto main__12 ; line_number = 124 ; case 7 main__12: ; # 1111 1xxx: ; line_number = 126 ; switch command & 7 start ;info 126, 88 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__10>>8 movwf __pclath movlw 7 andwf main__command,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__10 movwf __pcl ; page_group 8 main__10: goto main__11 goto main__11 goto main__11 goto main__11 goto main__6 goto main__7 goto main__8 goto main__9 ; line_number = 127 ; case 4 main__6: ; # 1111 1100 (Address_Set) goto main__11 ; line_number = 129 ; case 5 main__7: ; # 1111 1101 (Id_Next) ; line_number = 131 ; transmit := _true ;info 131, 103 bsf main__transmit___byte, main__transmit___bit ; line_number = 132 ; result := 0 ;info 132, 104 clrf main__result ; line_number = 133 ; if id_index < id.size start ;info 133, 105 movlw 22 subwf id_index,w ; =>bit_code_emit@symbol(): sym=__c ; No 1TEST: true.size=0 false.size=4 ; No 2TEST: true.size=0 false.size=4 ; 1GOTO: Single test with GOTO btfsc __c___byte, __c___bit goto main__5 ; line_number = 134 ; result := id[id_index] ;info 134, 109 movf id_index,w call id movwf main__result ; line_number = 135 ; id_index := id_index + 1 ;info 135, 112 incf id_index,f main__5: ; Recombine size1 = 0 || size2 = 0 ; line_number = 133 ; if id_index < id.size done ; #result := id_index goto main__11 ; line_number = 137 ; case 6 main__8: ; # 1111 1110 (Id_Start) ; line_number = 139 ; id_index := 0 ;info 139, 114 clrf id_index ; line_number = 140 ; result := 0 ;info 140, 115 clrf main__result ; line_number = 141 ; transmit := _true ;info 141, 116 bsf main__transmit___byte, main__transmit___bit goto main__11 ; line_number = 142 ; case 7 main__9: ; # 1111 1111 (Deselect): ; line_number = 144 ; result := 0 ;info 144, 118 clrf main__result ; line_number = 145 ; transmit := _true ;info 145, 119 bsf main__transmit___byte, main__transmit___bit ; line_number = 146 ; _adden := _true ;info 146, 120 bsf _adden___byte, _adden___bit main__11: ; line_number = 126 ; switch command & 7 done main__15: ; line_number = 123 ; switch (command >> 3) & 7 done main__19: ; line_number = 120 ; switch command >> 6 done main__22: ; line_number = 117 ; switch mode done main__26: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) ; line_number = 104 ; if rx9d done ; line_number = 148 ; if transmit start ;info 148, 121 ; =>bit_code_emit@symbol(): sym=main__transmit ; No 1TEST: true.size=3 false.size=0 ; No 2TEST: true.size=3 false.size=0 ; 1GOTO: Single test with GOTO btfss main__transmit___byte, main__transmit___bit goto main__27 ; line_number = 149 ; call _uart_byte_put(result) ;info 149, 123 movf main__result,w call _uart_byte_put ; # Dispose of echoed command in buffer: ; line_number = 152 ; call _uart_byte_get() ;info 152, 125 call _uart_byte_get ; Recombine size1 = 0 || size2 = 0 main__27: ; line_number = 148 ; if transmit done ; line_number = 95 ; loop_forever wrap-up goto main__3 ; line_number = 95 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 155 ; string id = "\16,0,5,2,3,8\Shaft2-B\7\Gramson" start ; id = '\16,0,5,2,3,8\Shaft2-B\7\Gramson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 22 id___base: retlw 16 retlw 0 retlw 5 retlw 2 retlw 3 retlw 8 retlw 83 retlw 104 retlw 97 retlw 102 retlw 116 retlw 50 retlw 45 retlw 66 retlw 7 retlw 71 retlw 114 retlw 97 retlw 109 retlw 115 retlw 111 retlw 110 ; line_number = 155 ; string id = "\16,0,5,2,3,8\Shaft2-B\7\Gramson" start ; Appending 7 delayed procedures to code bank 0 ; buffer = '_uart' ; line_number = 7 ;info 7, 155 ; procedure _uart_byte_safe_get _uart_byte_safe_get: ; arguments_none ; line_number = 9 ; returns byte ; # This procedure will the next byte from UART. If no byte ; # received in a reasonable time, 0xfc is returned. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 14 ; loop_exactly 255 start ;info 14, 155 _uart_byte_safe_get__1 equ globals___0+9 movlw 255 movwf _uart_byte_safe_get__1 _uart_byte_safe_get__2: ; line_number = 15 ; loop_exactly 255 start ;info 15, 157 _uart_byte_safe_get__3 equ globals___0+10 movlw 255 movwf _uart_byte_safe_get__3 _uart_byte_safe_get__4: ; line_number = 16 ; if _rcif start ;info 16, 159 ; =>bit_code_emit@symbol(): sym=_rcif ; No 1TEST: true.size=2 false.size=0 ; No 2TEST: true.size=2 false.size=0 ; 1GOTO: Single test with GOTO btfss _rcif___byte, _rcif___bit goto _uart_byte_safe_get__5 ; line_number = 17 ; return _rcreg start ; line_number = 17 ;info 17, 161 movf _rcreg,w return ; line_number = 17 ; return _rcreg done ; Recombine size1 = 0 || size2 = 0 _uart_byte_safe_get__5: ; line_number = 16 ; if _rcif done ; line_number = 15 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__3,f goto _uart_byte_safe_get__4 ; line_number = 15 ; loop_exactly 255 done ; line_number = 14 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__1,f goto _uart_byte_safe_get__2 ; line_number = 14 ; loop_exactly 255 done ; line_number = 18 ; return 0xfc start ; line_number = 18 ;info 18, 167 retlw 252 ; line_number = 18 ; return 0xfc done ; delay after procedure statements=non-uniform ; line_number = 21 ;info 21, 168 ; procedure _uart_byte_get _uart_byte_get: ; arguments_none ; line_number = 23 ; returns byte ; # This procedure will return the next byte from the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 27 ; while !_rcif start _uart_byte_get__1: ;info 27, 168 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfss _rcif___byte, _rcif___bit ; line_number = 28 ; do_nothing ;info 28, 169 goto _uart_byte_get__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 27 ; while !_rcif done ; line_number = 29 ; return _rcreg start ; line_number = 29 ;info 29, 170 movf _rcreg,w return ; line_number = 29 ; return _rcreg done ; delay after procedure statements=non-uniform ; line_number = 32 ;info 32, 172 ; procedure _uart_hex_put _uart_hex_put: ; Last argument is sitting in W; save into argument variable movwf _uart_hex_put__value ; delay=4294967295 ; line_number = 33 ; argument value byte _uart_hex_put__value equ globals___0 ; line_number = 34 ; returns_nothing ; # This procedure will output {value} to the UART as a 2-digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 39 ; call _uart_nibble_put(value >> 4) ;info 39, 173 _uart_hex_put__1 equ globals___0+11 swapf _uart_hex_put__value,w andlw 15 call _uart_nibble_put ; line_number = 40 ; call _uart_nibble_put(value & 0xf) ;info 40, 176 movlw 15 andwf _uart_hex_put__value,w call _uart_nibble_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 43 ;info 43, 180 ; procedure _uart_nibble_put _uart_nibble_put: ; Last argument is sitting in W; save into argument variable movwf _uart_nibble_put__nibble ; delay=4294967295 ; line_number = 44 ; argument nibble byte _uart_nibble_put__nibble equ globals___0+1 ; line_number = 45 ; returns_nothing ; # This procedure will output {value} to UART as a 1 digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 50 ; if nibble < 10 start ;info 50, 181 movlw 10 subwf _uart_nibble_put__nibble,w ; =>bit_code_emit@symbol(): sym=__c ; No 1TEST: true.size=1 false.size=1 ; 2TEST: two tests with code in both delay slots btfsc __c___byte, __c___bit ; line_number = 53 ; nibble := nibble - 10 + 'A' ;info 53, 184 movlw 55 btfss __c___byte, __c___bit ; line_number = 51 ; nibble := nibble + '0' ;info 51, 186 movlw 48 addwf _uart_nibble_put__nibble,f ; line_number = 50 ; if nibble < 10 done ; line_number = 54 ; call _uart_byte_put(nibble) ;info 54, 188 movf _uart_nibble_put__nibble,w call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 57 ;info 57, 191 ; procedure _uart_space_put _uart_space_put: ; arguments_none ; line_number = 59 ; returns_nothing ; # This procedure will output a space to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 63 ; call _uart_byte_put(' ') ;info 63, 191 movlw 32 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 66 ;info 66, 194 ; procedure _uart_crlf_put _uart_crlf_put: ; arguments_none ; line_number = 68 ; returns_nothing ; # This procedure will output a carriage return line feed sequecne to ; # the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 73 ; call _uart_byte_put('\cr\') ;info 73, 194 movlw 13 call _uart_byte_put ; line_number = 74 ; call _uart_byte_put('\lf\') ;info 74, 196 movlw 10 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 77 ;info 77, 199 ; procedure _uart_byte_put _uart_byte_put: ; Last argument is sitting in W; save into argument variable movwf _uart_byte_put__byte ; delay=4294967295 ; line_number = 78 ; argument byte byte _uart_byte_put__byte equ globals___0+2 ; line_number = 79 ; returns_nothing ; # This procedure will send {byte} out using to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 83 ; while !_txif start _uart_byte_put__1: ;info 83, 200 ; =>bit_code_emit@symbol(): sym=_txif ; 1TEST: Single test with code in skip slot btfss _txif___byte, _txif___bit ; line_number = 84 ; do_nothing ;info 84, 201 goto _uart_byte_put__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 83 ; while !_txif done ; line_number = 85 ; _txreg := byte ;info 85, 202 movf _uart_byte_put__byte,w movwf _txreg ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Code bank 1; Start address: 2048; End address: 4095 org 2048 ; Code bank 2; Start address: 4096; End address: 6143 org 4096 ; Code bank 3; Start address: 6144; End address: 8191 org 6144 ; Configuration bits ; address = 0x2007, fill = 0x600 ; cp = off (0x2000) ; cpmx = rc1 (0x1000) ; debug = off (0x800) ; borv = borv00 (0x0) ; boren = off (0x0) ; mclre = off (0x0) ; pwrten = off (0x8) ; wdten = off (0x0) ; fosc = hs (0x2) ; 15882 = 0x3e0a ; 8199 = 0x2007 __config 8199, 15882 ; Configuration bits ; address = 0x2008, fill = 0x3fbc ; borsen = off (0x0) ; ieso = off (0x0) ; fcmen = off (0x0) ; 16316 = 0x3fbc ; 8200 = 0x2008 __config 8200, 16316 ; Define start addresses for data regions ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 ; Region="globals___0" Address=32" Size=80 Bytes=12 Bits=2 Available=67 ; Region="globals___1" Address=160" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___2" Address=272" Size=96 Bytes=0 Bits=0 Available=96 ; Region="globals___3" Address=400" Size=112 Bytes=0 Bits=0 Available=112 end