radix dec ; Code bank 0; Start address: 0; End address: 2047 org 0 ; Define start addresses for data regions shared___globals equ 112 globals___0 equ 32 globals___1 equ 160 globals___2 equ 272 globals___3 equ 400 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2006 by Wayne C. Gramlich. ; # All rights reserved. ; # This is a boot loader that resides in high memory for ; # loading programs into low memory. ; #library _pic16f767 ; buffer = 'controller28' ; line_number = 10 ; library _pic16f876 entered ; # Copyright (c) 2004-2007 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f876' ; line_number = 6 ; processor pic16f876 ; line_number = 7 ; configure_address 0x2007 ; line_number = 8 ; configure_fill 0x0400 ; line_number = 9 ; configure_option cp: off = 0x3030 ; line_number = 10 ; configure_option cp: quarter = 0x2020 ; line_number = 11 ; configure_option cp: half = 0x1010 ; line_number = 12 ; configure_option cp: on = 0x0000 ; line_number = 13 ; configure_option debug: on = 0x000 ; line_number = 14 ; configure_option debug: off = 0x800 ; line_number = 15 ; configure_option wrt: on = 0x200 ; line_number = 16 ; configure_option wrt: off = 0x000 ; line_number = 17 ; configure_option cpd: on = 0x000 ; line_number = 18 ; configure_option cpd: off = 0x100 ; line_number = 19 ; configure_option lvp: on = 0x80 ; line_number = 20 ; configure_option lvp: off = 0x00 ; line_number = 21 ; configure_option boden: on = 0x40 ; line_number = 22 ; configure_option boden: off = 0x00 ; line_number = 23 ; configure_option pwrte: on = 0 ; line_number = 24 ; configure_option pwrte: off = 8 ; line_number = 25 ; configure_option wdte: on = 4 ; line_number = 26 ; configure_option wdte: off = 0 ; line_number = 27 ; configure_option fosc: rc = 3 ; line_number = 28 ; configure_option fosc: hs = 2 ; line_number = 29 ; configure_option fosc: xt = 1 ; line_number = 30 ; configure_option fosc: lp = 0 ; line_number = 31 ; code_bank 0x0 : 0x7ff ; line_number = 32 ; code_bank 0x800 : 0xfff ; line_number = 33 ; code_bank 0x1000 : 0x17ff ; line_number = 34 ; code_bank 0x1800 : 0x1fff ; line_number = 35 ; data_bank 0x0 : 0x7f ; line_number = 36 ; data_bank 0x80 : 0xff ; line_number = 37 ; data_bank 0x100 : 0x17f ; line_number = 38 ; data_bank 0x180 : 0x1ff ; line_number = 39 ; global_region 0x20 : 0x6f ; line_number = 40 ; global_region 0xa0 : 0xef ; line_number = 41 ; global_region 0x110 : 0x16f ; line_number = 42 ; global_region 0x190 : 0x1ff ; line_number = 43 ; shared_region 0x70 : 0x7f ; line_number = 44 ; interrupts_possible ; line_number = 45 ; packages pdip = 28 ; line_number = 46 ; pin mclr, vpp, thv, mclr_unused ; line_number = 47 ; pin_bindings pdip = 1 ; line_number = 48 ; pin ra0_in, ra0_out, an0, ra0_unused ; line_number = 49 ; pin_bindings pdip = 2 ; line_number = 50 ; bind_to _porta@0 ; line_number = 51 ; or_if ra0_in _trisa 1 ; line_number = 52 ; or_if ra0_in _adcon1 7 ; line_number = 53 ; or_if ra0_in _adcon0 0 ; line_number = 54 ; or_if ra0_in _cmcon 7 ; line_number = 55 ; or_if ra0_out _trisa 0 ; line_number = 56 ; or_if ra0_out _adcon1 7 ; line_number = 57 ; or_if ra0_out _adcon0 0 ; line_number = 58 ; or_if ra0_out _cmcon 7 ; line_number = 59 ; or_if ra0_unused _trisa 1 ; line_number = 60 ; or_if ra0_unused _adcon1 7 ; line_number = 61 ; or_if ra0_unused _adcon0 0 ; line_number = 62 ; or_if ra0_unused _cmcon 7 ; line_number = 63 ; pin ra1_in, ra1_out, an1, ra1_unused ; line_number = 64 ; pin_bindings pdip = 3 ; line_number = 65 ; bind_to _porta@1 ; line_number = 66 ; or_if ra1_in _trisa 2 ; line_number = 67 ; or_if ra1_in _adcon1 7 ; line_number = 68 ; or_if ra1_in _adcon0 0 ; line_number = 69 ; or_if ra1_in _cmcon 7 ; line_number = 70 ; or_if ra1_out _trisa 0 ; line_number = 71 ; or_if ra1_out _adcon1 7 ; line_number = 72 ; or_if ra1_out _adcon0 0 ; line_number = 73 ; or_if ra1_out _cmcon 7 ; line_number = 74 ; or_if ra1_unused _trisa 2 ; line_number = 75 ; or_if ra1_unused _adcon1 7 ; line_number = 76 ; or_if ra1_unused _adcon0 0 ; line_number = 77 ; or_if ra1_unused _cmcon 7 ; line_number = 78 ; pin ra2_in, ra2_out, an2, vref_minus, ra2_unused ; line_number = 79 ; pin_bindings pdip = 4 ; line_number = 80 ; bind_to _porta@2 ; line_number = 81 ; or_if ra2_in _trisa 4 ; line_number = 82 ; or_if ra2_in _adcon1 7 ; line_number = 83 ; or_if ra2_in _adcon0 0 ; line_number = 84 ; or_if ra2_in _cmcon 7 ; line_number = 85 ; or_if ra2_out _trisa 0 ; line_number = 86 ; or_if ra2_out _adcon1 7 ; line_number = 87 ; or_if ra2_out _adcon0 0 ; line_number = 88 ; or_if ra2_out _cmcon 7 ; line_number = 89 ; or_if ra2_unused _trisa 4 ; line_number = 90 ; or_if ra2_unused _adcon1 7 ; line_number = 91 ; or_if ra2_unused _adcon0 0 ; line_number = 92 ; or_if ra2_unused _cmcon 7 ; line_number = 93 ; pin ra3_in, ra3_out, an3, vrev_plus, ra3_unused ; line_number = 94 ; pin_bindings pdip = 5 ; line_number = 95 ; bind_to _porta@3 ; line_number = 96 ; or_if ra3_in _trisa 8 ; line_number = 97 ; or_if ra3_in _adcon1 7 ; line_number = 98 ; or_if ra3_in _adcon0 0 ; line_number = 99 ; or_if ra3_in _cmcon 7 ; line_number = 100 ; or_if ra3_out _trisa 0 ; line_number = 101 ; or_if ra3_out _adcon1 7 ; line_number = 102 ; or_if ra3_out _adcon0 0 ; line_number = 103 ; or_if ra3_out _cmcon 7 ; line_number = 104 ; or_if ra3_unused _trisa 8 ; line_number = 105 ; or_if ra3_unused _adcon1 7 ; line_number = 106 ; or_if ra3_unused _adcon0 0 ; line_number = 107 ; or_if ra3_unused _cmcon 7 ; line_number = 108 ; pin ra4_in, ra4_out, t0cki, ra4_unused ; line_number = 109 ; pin_bindings pdip = 6 ; line_number = 110 ; bind_to _porta@4 ; line_number = 111 ; or_if ra4_in _trisa 16 ; line_number = 112 ; or_if ra4_in _adcon1 7 ; line_number = 113 ; or_if ra4_in _adcon0 0 ; line_number = 114 ; or_if ra4_out _trisa 0 ; line_number = 115 ; or_if ra4_out _adcon1 7 ; line_number = 116 ; or_if ra4_out _adcon0 0 ; line_number = 117 ; or_if ra4_unused _trisa 16 ; line_number = 118 ; or_if ra4_unused _adcon1 7 ; line_number = 119 ; or_if ra4_unused _adcon0 0 ; line_number = 120 ; pin ra5_in, ra5_out, an4, ra5_unused ; line_number = 121 ; pin_bindings pdip = 7 ; line_number = 122 ; bind_to _porta@5 ; line_number = 123 ; or_if ra5_in _trisa 32 ; line_number = 124 ; or_if ra5_in _adcon1 7 ; line_number = 125 ; or_if ra5_in _adcon1 0 ; line_number = 126 ; or_if ra5_out _trisa 0 ; line_number = 127 ; or_if ra5_out _adcon1 7 ; line_number = 128 ; or_if ra5_out _adcon0 0 ; line_number = 129 ; or_if ra5_unused _trisa 32 ; line_number = 130 ; or_if ra5_unused _adcon1 7 ; line_number = 131 ; or_if ra5_unused _adcon1 0 ; line_number = 132 ; pin vss, ground ; line_number = 133 ; pin_bindings pdip = 8 ; line_number = 134 ; pin osc1, clkin ; line_number = 135 ; pin_bindings pdip = 9 ; line_number = 136 ; pin osc2, clkout ; line_number = 137 ; pin_bindings pdip = 10 ; line_number = 138 ; pin rc0_in, rc0_out, t1oso, t1cki, rc0_unused ; line_number = 139 ; pin_bindings pdip = 11 ; line_number = 140 ; bind_to _portc@0 ; line_number = 141 ; or_if rc0_in _trisc 1 ; line_number = 142 ; or_if rc0_in _adcon1 7 ; line_number = 143 ; or_if rc0_in _adcon0 0 ; line_number = 144 ; or_if rc0_out _trisc 0 ; line_number = 145 ; or_if rc0_out _adcon1 7 ; line_number = 146 ; or_if rc0_out _adcon0 0 ; line_number = 147 ; or_if rc0_unused _trisc 1 ; line_number = 148 ; or_if rc0_unused _adcon1 7 ; line_number = 149 ; or_if rc0_unused _adcon0 0 ; line_number = 150 ; pin rc1_in, rc1_out, t1osi, ccp2, rc1_unused ; line_number = 151 ; pin_bindings pdip = 12 ; line_number = 152 ; bind_to _portc@1 ; line_number = 153 ; or_if rc1_in _trisc 2 ; line_number = 154 ; or_if rc1_in _adcon1 7 ; line_number = 155 ; or_if rc1_in _adcon0 0 ; line_number = 156 ; or_if rc1_out _trisc 0 ; line_number = 157 ; or_if rc1_out _adcon1 7 ; line_number = 158 ; or_if rc1_out _adcon0 0 ; line_number = 159 ; or_if rc1_unused _trisc 2 ; line_number = 160 ; or_if rc1_unused _adcon1 7 ; line_number = 161 ; or_if rc1_unused _adcon0 0 ; line_number = 162 ; pin rc2_in, rc2_out, ccp1, rc2_unused ; line_number = 163 ; pin_bindings pdip = 13 ; line_number = 164 ; bind_to _portc@2 ; line_number = 165 ; or_if rc2_in _trisc 4 ; line_number = 166 ; or_if rc2_in _adcon1 7 ; line_number = 167 ; or_if rc2_in _adcon0 0 ; line_number = 168 ; or_if rc2_out _trisc 0 ; line_number = 169 ; or_if rc2_out _adcon1 7 ; line_number = 170 ; or_if rc2_out _adcon0 0 ; line_number = 171 ; or_if rc2_unused _trisc 4 ; line_number = 172 ; or_if rc2_unused _adcon1 7 ; line_number = 173 ; or_if rc2_unused _adcon0 0 ; line_number = 174 ; pin rc3_in, rc3_out, sck_master, sck_slave, scl, rc3_unused ; line_number = 175 ; pin_bindings pdip = 14 ; line_number = 176 ; bind_to _portc@3 ; line_number = 177 ; or_if rc3_in _trisc 8 ; line_number = 178 ; or_if rc3_in _adcon1 7 ; line_number = 179 ; or_if rc3_in _adcon0 0 ; line_number = 180 ; or_if rc3_out _trisc 0 ; line_number = 181 ; or_if rc3_out _adcon1 7 ; line_number = 182 ; or_if rc3_out _adcon0 0 ; line_number = 183 ; or_if sck_slave _trisc 8 ; line_number = 184 ; or_if sck_slave _adcon1 7 ; line_number = 185 ; or_if sck_slave _adcon0 0 ; line_number = 186 ; or_if sck_master _trisc 0 ; line_number = 187 ; or_if sck_master _adcon1 7 ; line_number = 188 ; or_if sck_master _adcon0 0 ; line_number = 189 ; or_if rc3_unused _trisc 8 ; line_number = 190 ; or_if rc3_unused _adcon1 7 ; line_number = 191 ; or_if rc3_unused _adcon0 0 ; line_number = 192 ; pin rc4_in, rc4_out, sdi, sda, rc4_unused ; line_number = 193 ; pin_bindings pdip = 15 ; line_number = 194 ; bind_to _portc@4 ; line_number = 195 ; or_if rc4_in _trisc 16 ; line_number = 196 ; or_if rc4_in _adcon1 7 ; line_number = 197 ; or_if rc4_in _adcon0 0 ; line_number = 198 ; or_if rc4_out _trisc 0 ; line_number = 199 ; or_if rc4_out _adcon1 7 ; line_number = 200 ; or_if rc4_out _adcon0 0 ; line_number = 201 ; or_if sdi _trisc 16 ; line_number = 202 ; or_if sdi _adcon1 7 ; line_number = 203 ; or_if sdi _adcon0 0 ; line_number = 204 ; or_if rc4_unused _trisc 16 ; line_number = 205 ; or_if rc4_unused _adcon1 7 ; line_number = 206 ; or_if rc4_unused _adcon0 0 ; line_number = 207 ; pin rc5_in, rc5_out, sdo, rc5_unused ; line_number = 208 ; pin_bindings pdip = 16 ; line_number = 209 ; bind_to _portc@5 ; line_number = 210 ; or_if rc5_in _trisc 32 ; line_number = 211 ; or_if rc5_in _adcon1 7 ; line_number = 212 ; or_if rc5_in _adcon0 0 ; line_number = 213 ; or_if rc5_out _trisc 0 ; line_number = 214 ; or_if rc5_out _adcon1 7 ; line_number = 215 ; or_if rc5_out _adcon0 0 ; line_number = 216 ; or_if sdo _trisc 0 ; line_number = 217 ; or_if sdo _adcon1 7 ; line_number = 218 ; or_if sdo _adcon0 0 ; line_number = 219 ; or_if rc5_unused _trisc 32 ; line_number = 220 ; or_if rc5_unused _adcon1 7 ; line_number = 221 ; or_if rc5_unused _adcon0 0 ; line_number = 222 ; pin rc6_in, rc6_out, tx, ck, rc6_unused ; line_number = 223 ; pin_bindings pdip = 17 ; line_number = 224 ; bind_to _portc@6 ; line_number = 225 ; or_if rc6_in _trisc 64 ; line_number = 226 ; or_if rc6_in _adcon1 7 ; line_number = 227 ; or_if rc6_in _adcon0 0 ; line_number = 228 ; or_if rc6_out _trisc 0 ; line_number = 229 ; or_if rc6_out _adcon1 7 ; line_number = 230 ; or_if rc6_out _adcon0 0 ; line_number = 231 ; or_if tx _trisc 0 ; line_number = 232 ; or_if tx _adcon1 7 ; line_number = 233 ; or_if tx _adcon0 0 ; line_number = 234 ; or_if rc6_unused _trisc 64 ; line_number = 235 ; or_if rc6_unused _adcon1 7 ; line_number = 236 ; or_if rc6_unused _adcon0 0 ; line_number = 237 ; pin rc7_in, rc7_out, rx, dt, rc7_unused ; line_number = 238 ; pin_bindings pdip = 18 ; line_number = 239 ; bind_to _portc@7 ; line_number = 240 ; or_if rc7_in _trisc 128 ; line_number = 241 ; or_if rc7_in _adcon1 7 ; line_number = 242 ; or_if rc7_in _adcon0 0 ; line_number = 243 ; or_if rx _trisc 128 ; line_number = 244 ; or_if rx _adcon1 7 ; line_number = 245 ; or_if rx _adcon0 0 ; line_number = 246 ; or_if rc7_out _trisc 0 ; line_number = 247 ; or_if rc7_out _adcon1 7 ; line_number = 248 ; or_if rc7_out _adcon0 0 ; line_number = 249 ; or_if rc7_unused _trisc 128 ; line_number = 250 ; or_if rc7_unused _adcon1 7 ; line_number = 251 ; or_if rc7_unused _adcon0 0 ; line_number = 252 ; pin vss2, ground2 ; line_number = 253 ; pin_bindings pdip = 19 ; line_number = 254 ; pin vdd, power_supply ; line_number = 255 ; pin_bindings pdip = 20 ; line_number = 256 ; pin rb0_in, rb0_out, int, rb0_unused ; line_number = 257 ; pin_bindings pdip = 21 ; line_number = 258 ; bind_to _portb@0 ; line_number = 259 ; or_if rb0_in _trisb 1 ; line_number = 260 ; or_if rb0_in _adcon1 7 ; line_number = 261 ; or_if rb0_in _adcon0 0 ; line_number = 262 ; or_if rb0_out _trisb 0 ; line_number = 263 ; or_if rb0_out _adcon1 7 ; line_number = 264 ; or_if rb0_out _adcon0 0 ; line_number = 265 ; or_if rb0_unused _trisb 1 ; line_number = 266 ; or_if rb0_unused _adcon1 7 ; line_number = 267 ; or_if rb0_unused _adcon0 0 ; line_number = 268 ; pin rb1_in, rb1_out, rb1_unused ; line_number = 269 ; pin_bindings pdip = 22 ; line_number = 270 ; bind_to _portb@1 ; line_number = 271 ; or_if rb1_in _trisb 2 ; line_number = 272 ; or_if rb1_in _adcon1 7 ; line_number = 273 ; or_if rb1_in _adcon0 0 ; line_number = 274 ; or_if rb1_out _trisb 0 ; line_number = 275 ; or_if rb1_out _adcon1 7 ; line_number = 276 ; or_if rb1_out _adcon0 0 ; line_number = 277 ; or_if rb1_unused _trisb 2 ; line_number = 278 ; or_if rb1_unused _adcon1 7 ; line_number = 279 ; or_if rb1_unused _adcon0 0 ; line_number = 280 ; pin rb2_in, rb2_out, rb2_unused ; line_number = 281 ; pin_bindings pdip = 23 ; line_number = 282 ; bind_to _portb@2 ; line_number = 283 ; or_if rb2_in _trisb 4 ; line_number = 284 ; or_if rb2_in _adcon1 7 ; line_number = 285 ; or_if rb2_in _adcon0 0 ; line_number = 286 ; or_if rb2_out _trisb 0 ; line_number = 287 ; or_if rb2_out _adcon1 7 ; line_number = 288 ; or_if rb2_out _adcon0 0 ; line_number = 289 ; or_if rb2_unused _trisb 4 ; line_number = 290 ; or_if rb2_unused _adcon1 7 ; line_number = 291 ; or_if rb2_unused _adcon0 0 ; line_number = 292 ; pin rb3_in, rb3_out, pgm, rb3_unused ; line_number = 293 ; pin_bindings pdip = 24 ; line_number = 294 ; bind_to _portb@3 ; line_number = 295 ; or_if rb3_in _trisb 8 ; line_number = 296 ; or_if rb3_in _adcon1 7 ; line_number = 297 ; or_if rb3_in _adcon0 0 ; line_number = 298 ; or_if rb3_out _trisb 0 ; line_number = 299 ; or_if rb3_out _adcon1 7 ; line_number = 300 ; or_if rb3_out _adcon0 0 ; line_number = 301 ; or_if rb3_unused _trisb 8 ; line_number = 302 ; or_if rb3_unused _adcon1 7 ; line_number = 303 ; or_if rb3_unused _adcon0 0 ; line_number = 304 ; pin rb4_in, rb4_out, rb4_unused ; line_number = 305 ; pin_bindings pdip = 25 ; line_number = 306 ; bind_to _portb@4 ; line_number = 307 ; or_if rb4_in _trisb 16 ; line_number = 308 ; or_if rb4_in _adcon1 7 ; line_number = 309 ; or_if rb4_in _adcon0 0 ; line_number = 310 ; or_if rb4_out _trisb 0 ; line_number = 311 ; or_if rb4_out _adcon1 7 ; line_number = 312 ; or_if rb4_out _adcon0 0 ; line_number = 313 ; or_if rb4_unused _trisb 16 ; line_number = 314 ; or_if rb4_unused _adcon1 7 ; line_number = 315 ; or_if rb4_unused _adcon0 0 ; line_number = 316 ; pin rb5_in, rb5_out, rb5_unused ; line_number = 317 ; pin_bindings pdip = 26 ; line_number = 318 ; bind_to _portb@5 ; line_number = 319 ; or_if rb5_in _trisb 32 ; line_number = 320 ; or_if rb5_in _adcon1 7 ; line_number = 321 ; or_if rb5_in _adcon0 0 ; line_number = 322 ; or_if rb5_out _trisb 0 ; line_number = 323 ; or_if rb5_out _adcon1 7 ; line_number = 324 ; or_if rb5_out _adcon0 0 ; line_number = 325 ; or_if rb5_unused _trisb 32 ; line_number = 326 ; or_if rb5_unused _adcon1 7 ; line_number = 327 ; or_if rb5_unused _adcon0 0 ; line_number = 328 ; pin rb6_in, rb6_out, pgc, rb6_unused ; line_number = 329 ; pin_bindings pdip = 27 ; line_number = 330 ; bind_to _portb@6 ; line_number = 331 ; or_if rb6_in _trisb 64 ; line_number = 332 ; or_if rb6_in _adcon1 7 ; line_number = 333 ; or_if rb6_in _adcon0 0 ; line_number = 334 ; or_if rb6_out _trisb 0 ; line_number = 335 ; or_if rb6_out _adcon1 7 ; line_number = 336 ; or_if rb6_out _adcon0 0 ; line_number = 337 ; or_if rb6_unused _trisb 64 ; line_number = 338 ; or_if rb6_unused _adcon1 7 ; line_number = 339 ; or_if rb6_unused _adcon0 0 ; line_number = 340 ; pin rb7_in, rb7_out, pgd, rb7_unused ; line_number = 341 ; pin_bindings pdip = 28 ; line_number = 342 ; bind_to _portb@7 ; line_number = 343 ; or_if rb7_in _trisb 128 ; line_number = 344 ; or_if rb7_in _adcon1 7 ; line_number = 345 ; or_if rb7_in _adcon0 0 ; line_number = 346 ; or_if rb7_out _trisb 0 ; line_number = 347 ; or_if rb7_out _adcon1 7 ; line_number = 348 ; or_if rb7_out _adcon0 0 ; line_number = 349 ; or_if rb7_unused _trisb 128 ; line_number = 350 ; or_if rb7_unused _adcon1 7 ; line_number = 351 ; or_if rb7_unused _adcon0 0 ; # Register and pin definitions: ; line_number = 358 ; library _pic16f87x entered ; # Copyright (c) 2004-2006 by Wayne C. Gramlich ; # All rights reserved. ; # Common declarations for PIC16F87x series microcontrollers: ; buffer = '_pic16f87x' ; line_number = 8 ; library _standard entered ; # Copyright (c) 2006 by Wayne C. Gramlich ; # All rights reserved. ; # Standard definition for uCL: ; buffer = '_standard' ; line_number = 8 ; constant _true = (1 = 1) _true equ 1 ; line_number = 9 ; constant _false = (0 != 0) _false equ 0 ; buffer = '_pic16f87x' ; line_number = 8 ; library _standard exited ; # Register and pin definitions: ; # Bank 0: ; line_number = 14 ; register _indf = _indf equ 0 ; line_number = 16 ; register _tmr0 = _tmr0 equ 1 ; line_number = 18 ; register _pcl = _pcl equ 2 ; line_number = 20 ; register _status = _status equ 3 ; line_number = 21 ; bind _irp = _status@7 _irp___byte equ _status _irp___bit equ 7 ; line_number = 22 ; bind _rp1 = _status@6 _rp1___byte equ _status _rp1___bit equ 6 ; line_number = 23 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 24 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 25 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 26 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 27 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 28 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 30 ; register _fsr = _fsr equ 4 ; line_number = 32 ; register _porta = _porta equ 5 ; line_number = 34 ; register _portb = _portb equ 6 ; line_number = 36 ; register _portc = _portc equ 7 ; line_number = 38 ; register _pclath = _pclath equ 10 ; line_number = 40 ; register _intcon = _intcon equ 11 ; line_number = 41 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 42 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 43 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 44 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 45 ; bind _rbie = _intcon@3 _rbie___byte equ _intcon _rbie___bit equ 3 ; line_number = 46 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 47 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 48 ; bind _rbf = _intcon@0 _rbf___byte equ _intcon _rbf___bit equ 0 ; line_number = 50 ; register _pir1 = _pir1 equ 12 ; line_number = 51 ; bind _pspif = _pir1@7 _pspif___byte equ _pir1 _pspif___bit equ 7 ; line_number = 52 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 53 ; bind _rcif = _pir1@5 _rcif___byte equ _pir1 _rcif___bit equ 5 ; line_number = 54 ; bind _txif = _pir1@4 _txif___byte equ _pir1 _txif___bit equ 4 ; line_number = 55 ; bind _sspif = _pir1@3 _sspif___byte equ _pir1 _sspif___bit equ 3 ; line_number = 56 ; bind _ccpif = _pir1@2 _ccpif___byte equ _pir1 _ccpif___bit equ 2 ; line_number = 57 ; bind _tmr2if = _pir1@1 _tmr2if___byte equ _pir1 _tmr2if___bit equ 1 ; line_number = 58 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 60 ; register _pir2 = _pir2 equ 13 ; line_number = 61 ; bind _eeif = _pir2@4 _eeif___byte equ _pir2 _eeif___bit equ 4 ; line_number = 62 ; bind _bclif = _pir2@3 _bclif___byte equ _pir2 _bclif___bit equ 3 ; line_number = 63 ; bind _ccp2if = _pir2@0 _ccp2if___byte equ _pir2 _ccp2if___bit equ 0 ; line_number = 65 ; register _tmr1l = _tmr1l equ 14 ; line_number = 67 ; register _tmr1h = _tmr1h equ 15 ; line_number = 69 ; register _t1con = _t1con equ 16 ; line_number = 70 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 71 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 72 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 73 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 74 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 75 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 77 ; register _tmr2 = _tmr2 equ 17 ; line_number = 79 ; register _t2con = _t2con equ 18 ; line_number = 80 ; bind _toutps3 = _t2con@6 _toutps3___byte equ _t2con _toutps3___bit equ 6 ; line_number = 81 ; bind _toutps2 = _t2con@5 _toutps2___byte equ _t2con _toutps2___bit equ 5 ; line_number = 82 ; bind _toutps1 = _t2con@4 _toutps1___byte equ _t2con _toutps1___bit equ 4 ; line_number = 83 ; bind _toutps0 = _t2con@3 _toutps0___byte equ _t2con _toutps0___bit equ 3 ; line_number = 84 ; bind _tmr2on = _t2con@2 _tmr2on___byte equ _t2con _tmr2on___bit equ 2 ; line_number = 85 ; bind _t2ckps1 = _t2con@1 _t2ckps1___byte equ _t2con _t2ckps1___bit equ 1 ; line_number = 86 ; bind _t2ckps0 = _t2con@0 _t2ckps0___byte equ _t2con _t2ckps0___bit equ 0 ; line_number = 88 ; register _sspbuf = _sspbuf equ 19 ; line_number = 90 ; register _sspcon = _sspcon equ 20 ; line_number = 91 ; bind _wcol = _sspcon@7 _wcol___byte equ _sspcon _wcol___bit equ 7 ; line_number = 92 ; bind _sspov = _sspcon@6 _sspov___byte equ _sspcon _sspov___bit equ 6 ; line_number = 93 ; bind _sspen = _sspcon@5 _sspen___byte equ _sspcon _sspen___bit equ 5 ; line_number = 94 ; bind _ckp = _sspcon@4 _ckp___byte equ _sspcon _ckp___bit equ 4 ; line_number = 95 ; bind _sspm3 = _sspcon@3 _sspm3___byte equ _sspcon _sspm3___bit equ 3 ; line_number = 96 ; bind _sspm2 = _sspcon@2 _sspm2___byte equ _sspcon _sspm2___bit equ 2 ; line_number = 97 ; bind _sspm1 = _sspcon@1 _sspm1___byte equ _sspcon _sspm1___bit equ 1 ; line_number = 98 ; bind _sspm0 = _sspcon@0 _sspm0___byte equ _sspcon _sspm0___bit equ 0 ; line_number = 100 ; register _ccpr1l = _ccpr1l equ 21 ; line_number = 102 ; register _ccpr1h = _ccpr1h equ 22 ; line_number = 104 ; register _ccp1con = _ccp1con equ 23 ; line_number = 105 ; bind _ccp1x = _ccp1con@5 _ccp1x___byte equ _ccp1con _ccp1x___bit equ 5 ; line_number = 106 ; bind _ccp1y = _ccp1con@4 _ccp1y___byte equ _ccp1con _ccp1y___bit equ 4 ; line_number = 107 ; bind _ccp1m3 = _ccp1con@3 _ccp1m3___byte equ _ccp1con _ccp1m3___bit equ 3 ; line_number = 108 ; bind _ccp1m2 = _ccp1con@2 _ccp1m2___byte equ _ccp1con _ccp1m2___bit equ 2 ; line_number = 109 ; bind _ccp1m1 = _ccp1con@1 _ccp1m1___byte equ _ccp1con _ccp1m1___bit equ 1 ; line_number = 110 ; bind _ccp1m0 = _ccp1con@0 _ccp1m0___byte equ _ccp1con _ccp1m0___bit equ 0 ; line_number = 112 ; register _rcsta = _rcsta equ 24 ; line_number = 113 ; bind _spen = _rcsta@7 _spen___byte equ _rcsta _spen___bit equ 7 ; line_number = 114 ; bind _rx9 = _rcsta@6 _rx9___byte equ _rcsta _rx9___bit equ 6 ; line_number = 115 ; bind _sren = _rcsta@5 _sren___byte equ _rcsta _sren___bit equ 5 ; line_number = 116 ; bind _cren = _rcsta@4 _cren___byte equ _rcsta _cren___bit equ 4 ; line_number = 117 ; bind _adden = _rcsta@3 _adden___byte equ _rcsta _adden___bit equ 3 ; line_number = 118 ; bind _ferr = _rcsta@2 _ferr___byte equ _rcsta _ferr___bit equ 2 ; line_number = 119 ; bind _oerr = _rcsta@1 _oerr___byte equ _rcsta _oerr___bit equ 1 ; line_number = 120 ; bind _rx9d = _rcsta@0 _rx9d___byte equ _rcsta _rx9d___bit equ 0 ; line_number = 122 ; register _txreg = _txreg equ 25 ; line_number = 124 ; register _rcreg = _rcreg equ 26 ; line_number = 126 ; register _ccpr2l = _ccpr2l equ 27 ; line_number = 128 ; register _ccpr2h = _ccpr2h equ 28 ; line_number = 130 ; register _ccp2con = _ccp2con equ 29 ; line_number = 131 ; bind _ccp2x = _ccp2con@5 _ccp2x___byte equ _ccp2con _ccp2x___bit equ 5 ; line_number = 132 ; bind _ccp2y = _ccp2con@4 _ccp2y___byte equ _ccp2con _ccp2y___bit equ 4 ; line_number = 133 ; bind _ccp2m3 = _ccp2con@3 _ccp2m3___byte equ _ccp2con _ccp2m3___bit equ 3 ; line_number = 134 ; bind _ccp2m2 = _ccp2con@2 _ccp2m2___byte equ _ccp2con _ccp2m2___bit equ 2 ; line_number = 135 ; bind _ccp2m1 = _ccp2con@1 _ccp2m1___byte equ _ccp2con _ccp2m1___bit equ 1 ; line_number = 136 ; bind _ccp2m0 = _ccp2con@0 _ccp2m0___byte equ _ccp2con _ccp2m0___bit equ 0 ; line_number = 138 ; register _adresh = _adresh equ 30 ; line_number = 140 ; register _adcon0 = _adcon0 equ 31 ; line_number = 141 ; bind _adcs1 = _adcon0@7 _adcs1___byte equ _adcon0 _adcs1___bit equ 7 ; line_number = 142 ; bind _adcs0 = _adcon0@6 _adcs0___byte equ _adcon0 _adcs0___bit equ 6 ; line_number = 143 ; bind _chs2 = _adcon0@5 _chs2___byte equ _adcon0 _chs2___bit equ 5 ; line_number = 144 ; bind _chs1 = _adcon0@4 _chs1___byte equ _adcon0 _chs1___bit equ 4 ; line_number = 145 ; bind _chs0 = _adcon0@3 _chs0___byte equ _adcon0 _chs0___bit equ 3 ; line_number = 146 ; bind _go_done = _adcon0@2 _go_done___byte equ _adcon0 _go_done___bit equ 2 ; line_number = 147 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Bank 1: ; line_number = 151 ; register _option_reg = _option_reg equ 129 ; line_number = 152 ; bind _rbpu = _option_reg@7 _rbpu___byte equ _option_reg _rbpu___bit equ 7 ; line_number = 153 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 154 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 155 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 156 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 157 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 158 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 159 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 161 ; register _trisa = _trisa equ 133 ; line_number = 163 ; register _trisb = _trisb equ 134 ; line_number = 165 ; register _trisc = _trisc equ 135 ; line_number = 167 ; register _pie1 = _pie1 equ 140 ; line_number = 168 ; bind _pspie = _pie1@7 _pspie___byte equ _pie1 _pspie___bit equ 7 ; line_number = 169 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 170 ; bind _rcie = _pie1@5 _rcie___byte equ _pie1 _rcie___bit equ 5 ; line_number = 171 ; bind _txie = _pie1@4 _txie___byte equ _pie1 _txie___bit equ 4 ; line_number = 172 ; bind _sspie = _pie1@3 _sspie___byte equ _pie1 _sspie___bit equ 3 ; line_number = 173 ; bind _ccp1ie = _pie1@2 _ccp1ie___byte equ _pie1 _ccp1ie___bit equ 2 ; line_number = 174 ; bind _tmr2ie = _pie1@1 _tmr2ie___byte equ _pie1 _tmr2ie___bit equ 1 ; line_number = 175 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 177 ; register _pie2 = _pie2 equ 141 ; line_number = 178 ; bind _eeie = _pie2@4 _eeie___byte equ _pie2 _eeie___bit equ 4 ; line_number = 179 ; bind _bcie = _pie2@3 _bcie___byte equ _pie2 _bcie___bit equ 3 ; line_number = 180 ; bind _ccp2ie = _pie2@0 _ccp2ie___byte equ _pie2 _ccp2ie___bit equ 0 ; line_number = 182 ; register _pcon = _pcon equ 142 ; line_number = 183 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 184 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 186 ; register _sspcon2 = _sspcon2 equ 145 ; line_number = 187 ; bind _gcen = _sspcon2@7 _gcen___byte equ _sspcon2 _gcen___bit equ 7 ; line_number = 188 ; bind _ackstat = _sspcon2@6 _ackstat___byte equ _sspcon2 _ackstat___bit equ 6 ; line_number = 189 ; bind _ackdt = _sspcon2@5 _ackdt___byte equ _sspcon2 _ackdt___bit equ 5 ; line_number = 190 ; bind _acken = _sspcon2@4 _acken___byte equ _sspcon2 _acken___bit equ 4 ; line_number = 191 ; bind _rcen = _sspcon2@3 _rcen___byte equ _sspcon2 _rcen___bit equ 3 ; line_number = 192 ; bind _pen = _sspcon2@2 _pen___byte equ _sspcon2 _pen___bit equ 2 ; line_number = 193 ; bind _rsen = _sspcon2@1 _rsen___byte equ _sspcon2 _rsen___bit equ 1 ; line_number = 194 ; bind _sen = _sspcon2@0 _sen___byte equ _sspcon2 _sen___bit equ 0 ; line_number = 196 ; register _pr2 = _pr2 equ 146 ; line_number = 198 ; register _sspadd = _sspadd equ 147 ; line_number = 200 ; register _sspstat = _sspstat equ 148 ; line_number = 201 ; bind _smp = _sspstat@7 _smp___byte equ _sspstat _smp___bit equ 7 ; line_number = 202 ; bind _cke = _sspstat@6 _cke___byte equ _sspstat _cke___bit equ 6 ; line_number = 203 ; bind _da = _sspstat@5 _da___byte equ _sspstat _da___bit equ 5 ; line_number = 204 ; bind _p = _sspstat@4 _p___byte equ _sspstat _p___bit equ 4 ; line_number = 205 ; bind _s = _sspstat@3 _s___byte equ _sspstat _s___bit equ 3 ; line_number = 206 ; bind _rw = _sspstat@2 _rw___byte equ _sspstat _rw___bit equ 2 ; line_number = 207 ; bind _ua = _sspstat@1 _ua___byte equ _sspstat _ua___bit equ 1 ; line_number = 208 ; bind _bf = _sspstat@0 _bf___byte equ _sspstat _bf___bit equ 0 ; line_number = 210 ; register _txsta = _txsta equ 152 ; line_number = 211 ; bind _csrc = _txsta@7 _csrc___byte equ _txsta _csrc___bit equ 7 ; line_number = 212 ; bind _tx9 = _txsta@6 _tx9___byte equ _txsta _tx9___bit equ 6 ; line_number = 213 ; bind _txen = _txsta@5 _txen___byte equ _txsta _txen___bit equ 5 ; line_number = 214 ; bind _sync = _txsta@4 _sync___byte equ _txsta _sync___bit equ 4 ; line_number = 215 ; bind _brgh = _txsta@2 _brgh___byte equ _txsta _brgh___bit equ 2 ; line_number = 216 ; bind _trmt = _txsta@1 _trmt___byte equ _txsta _trmt___bit equ 1 ; line_number = 217 ; bind _tx9d = _txsta@0 _tx9d___byte equ _txsta _tx9d___bit equ 0 ; line_number = 219 ; register _spbrg = _spbrg equ 153 ; line_number = 221 ; register _cmcon = _cmcon equ 156 ; line_number = 222 ; bind _c2out = _cmcon@7 _c2out___byte equ _cmcon _c2out___bit equ 7 ; line_number = 223 ; bind _c1out = _cmcon@6 _c1out___byte equ _cmcon _c1out___bit equ 6 ; line_number = 224 ; bind _c2inv = _cmcon@5 _c2inv___byte equ _cmcon _c2inv___bit equ 5 ; line_number = 225 ; bind _c1inv = _cmcon@4 _c1inv___byte equ _cmcon _c1inv___bit equ 4 ; line_number = 226 ; bind _cis = _cmcon@3 _cis___byte equ _cmcon _cis___bit equ 3 ; line_number = 227 ; bind _cm2 = _cmcon@2 _cm2___byte equ _cmcon _cm2___bit equ 2 ; line_number = 228 ; bind _cm1 = _cmcon@1 _cm1___byte equ _cmcon _cm1___bit equ 1 ; line_number = 229 ; bind _cm0 = _cmcon@0 _cm0___byte equ _cmcon _cm0___bit equ 0 ; line_number = 231 ; register _cvrcon = _cvrcon equ 157 ; line_number = 232 ; bind _cvren = _cvrcon@7 _cvren___byte equ _cvrcon _cvren___bit equ 7 ; line_number = 233 ; bind _cvroe = _cvrcon@6 _cvroe___byte equ _cvrcon _cvroe___bit equ 6 ; line_number = 234 ; bind _cvrr = _cvrcon@5 _cvrr___byte equ _cvrcon _cvrr___bit equ 5 ; line_number = 235 ; bind _cvr3 = _cvrcon@3 _cvr3___byte equ _cvrcon _cvr3___bit equ 3 ; line_number = 236 ; bind _cvr2 = _cvrcon@2 _cvr2___byte equ _cvrcon _cvr2___bit equ 2 ; line_number = 237 ; bind _cvr1 = _cvrcon@1 _cvr1___byte equ _cvrcon _cvr1___bit equ 1 ; line_number = 238 ; bind _cvr0 = _cvrcon@0 _cvr0___byte equ _cvrcon _cvr0___bit equ 0 ; line_number = 240 ; register _adresl = _adresl equ 158 ; line_number = 242 ; register _adcon1 = _adcon1 equ 159 ; line_number = 243 ; bind _adfm = _adcon1@7 _adfm___byte equ _adcon1 _adfm___bit equ 7 ; line_number = 244 ; bind _pcfg3 = _adcon1@3 _pcfg3___byte equ _adcon1 _pcfg3___bit equ 3 ; line_number = 245 ; bind _pcfg2 = _adcon1@2 _pcfg2___byte equ _adcon1 _pcfg2___bit equ 2 ; line_number = 246 ; bind _pcfg1 = _adcon1@1 _pcfg1___byte equ _adcon1 _pcfg1___bit equ 1 ; line_number = 247 ; bind _pcfg0 = _adcon1@0 _pcfg0___byte equ _adcon1 _pcfg0___bit equ 0 ; # Bank 2: ; line_number = 251 ; register _eedata = _eedata equ 268 ; line_number = 253 ; register _eeadr = _eeadr equ 269 ; line_number = 255 ; register _eedath = _eedath equ 270 ; line_number = 257 ; register _eeadrh = _eeadrh equ 271 ; # Bank 3: ; line_number = 261 ; register _eecon1 = _eecon1 equ 396 ; line_number = 262 ; bind _eepgd = _eecon1@7 _eepgd___byte equ _eecon1 _eepgd___bit equ 7 ; line_number = 263 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 264 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 265 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 266 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 268 ; register _eecon2 = _eecon2 equ 397 ; buffer = '_pic16f876' ; line_number = 358 ; library _pic16f87x exited ; buffer = 'controller28' ; line_number = 10 ; library _pic16f876 exited ; line_number = 11 ; library clock20mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock20mhz' ; line_number = 9 ; constant clock_rate = 20000000 clock_rate equ 20000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 5000000 ; buffer = 'controller28' ; line_number = 11 ; library clock20mhz exited ; line_number = 12 ; library _uart entered ; # Copyright (c) 2004 by Wayne C. Gramlich. ; # All rights reserved. ; # This library contains some procedures for accessing the UART. ; Delaying code generation for procedure _uart_byte_safe_get ; Delaying code generation for procedure _uart_byte_get ; Delaying code generation for procedure _uart_hex_put ; Delaying code generation for procedure _uart_nibble_put ; Delaying code generation for procedure _uart_space_put ; Delaying code generation for procedure _uart_crlf_put ; Delaying code generation for procedure _uart_byte_put ; line_number = 12 ; library _uart exited ; # Port and pin definitions: ; # Port definitions: ; line_number = 20 ; package pdip ; line_number = 21 ; pin 1 = mclr ; line_number = 22 ; pin 2 = ra0_unused ; line_number = 23 ; pin 3 = ra1_unused ; line_number = 24 ; pin 4 = ra2_unused ; line_number = 25 ; pin 5 = ra3_unused ; line_number = 26 ; pin 6 = ra4_unused ; line_number = 27 ; pin 7 = ra5_unused ; line_number = 28 ; pin 8 = ground ; line_number = 29 ; pin 9 = osc1 ; line_number = 30 ; pin 10 = osc2 ; line_number = 31 ; pin 11 = rc0_unused ; line_number = 32 ; pin 12 = rc1_unused ; line_number = 33 ; pin 13 = rc2_unused ; line_number = 34 ; pin 14 = rc3_unused ; line_number = 35 ; pin 15 = rc4_unused ; line_number = 36 ; pin 16 = rc5_unused ; line_number = 37 ; pin 17 = tx ; line_number = 38 ; pin 18 = rx ; line_number = 39 ; pin 19 = ground2 ; line_number = 40 ; pin 20 = power_supply ; line_number = 41 ; pin 21 = rb0_unused ; line_number = 42 ; pin 22 = rb1_unused ; line_number = 43 ; pin 23 = rb2_unused ; line_number = 44 ; pin 24 = rb3_unused ; line_number = 45 ; pin 25 = rb4_unused ; line_number = 46 ; pin 26 = rb5_unused ; line_number = 47 ; pin 27 = rb6_unused ; line_number = 48 ; pin 28 = rb7_unused ; line_number = 50 ; global module_address byte module_address equ globals___0+3 ; line_number = 51 ; global rx9d bit rx9d___byte equ globals___0+79 rx9d___bit equ 0 ; line_number = 52 ; global id_index byte id_index equ globals___0+4 ; line_number = 53 ; global address_high byte address_high equ globals___0+5 ; line_number = 54 ; global address_low byte address_low equ globals___0+6 ; line_number = 55 ; global count byte count equ globals___0+7 ; line_number = 56 ; global index byte index equ globals___0+8 ; line_number = 58 ; origin 0 org 0 ; line_number = 60 ;info 60, 0 ; procedure main main: ; Initialize some registers clrf _adcon0 movlw 7 bsf __rp0___byte, __rp0___bit movwf _adcon1 movlw 7 movwf _cmcon movlw 63 movwf _trisa movlw 255 movwf _trisb movlw 191 movwf _trisc ; arguments_none ; line_number = 62 ; returns_nothing ; line_number = 64 ; local byte_high byte main__byte_high equ globals___0+9 ; line_number = 65 ; local byte_low byte main__byte_low equ globals___0+10 ; line_number = 66 ; local command byte main__command equ globals___0+11 ; line_number = 67 ; local transmit bit main__transmit___byte equ globals___0+79 main__transmit___bit equ 1 ; line_number = 68 ; local result byte main__result equ globals___0+12 ; line_number = 69 ; local mode byte main__mode equ globals___0+13 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>01 code:00=uu=>00) ; line_number = 71 ; module_address := 28 ;info 71, 12 movlw 28 bcf __rp0___byte, __rp0___bit movwf module_address ; # Warm up the UART: ; line_number = 74 ; _trisc@7 := _true ;info 74, 15 main__select__1___byte equ _trisc main__select__1___bit equ 7 bsf __rp0___byte, __rp0___bit bsf main__select__1___byte, main__select__1___bit ; line_number = 75 ; _trisc@6 := _true ;info 75, 17 main__select__2___byte equ _trisc main__select__2___bit equ 6 bsf main__select__2___byte, main__select__2___bit ; line_number = 77 ; _txsta := 0 ;info 77, 18 clrf _txsta ; line_number = 78 ; _tx9 := _true ;info 78, 19 bsf _tx9___byte, _tx9___bit ; #_tx9 := _false ; line_number = 80 ; _txen := _true ;info 80, 20 bsf _txen___byte, _txen___bit ; line_number = 81 ; _brgh := _true ;info 81, 21 bsf _brgh___byte, _brgh___bit ; line_number = 83 ; _rcsta := 0 ;info 83, 22 bcf __rp0___byte, __rp0___bit clrf _rcsta ; line_number = 84 ; _spen := _true ;info 84, 24 bsf _spen___byte, _spen___bit ; line_number = 85 ; _rx9 := _true ;info 85, 25 bsf _rx9___byte, _rx9___bit ; #_rx9 := _false ; line_number = 87 ; _cren := _true ;info 87, 26 bsf _cren___byte, _cren___bit ; #_adden := _true ; line_number = 89 ; _adden := _false ;info 89, 27 bcf _adden___byte, _adden___bit ; # Baud rate = 625000 @ 20MHz. ; line_number = 92 ; _spbrg := 1 ;info 92, 28 movlw 1 bsf __rp0___byte, __rp0___bit movwf _spbrg ; line_number = 94 ; mode := 0 ;info 94, 31 bcf __rp0___byte, __rp0___bit clrf main__mode ; line_number = 95 ; id_index := 0 ;info 95, 33 clrf id_index ; #loop_forever ; # call _uart_byte_put(command) ; # loop_exactly 100 ; # delay 500 ; # do_nothing ; # command := command + 1 ; #loop_forever ; # command := _uart_byte_get() ; # call _uart_byte_put(command + 1) ; # call _uart_byte_get() ; line_number = 109 ; loop_forever start main__3: ; line_number = 110 ; transmit := _false ;info 110, 34 bcf main__transmit___byte, main__transmit___bit ; line_number = 111 ; rx9d := _false ;info 111, 35 bcf rx9d___byte, rx9d___bit ; line_number = 112 ; while !_rcif start main__4: ;info 112, 36 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfss _rcif___byte, _rcif___bit ; line_number = 113 ; do_nothing ;info 113, 37 goto main__4 ; Recombine size1 = 0 || size2 = 0 ; line_number = 112 ; while !_rcif done ; line_number = 114 ; if _rx9d start ;info 114, 38 ; =>bit_code_emit@symbol(): sym=_rx9d ; 1TEST: Single test with code in skip slot btfsc _rx9d___byte, _rx9d___bit ; line_number = 115 ; rx9d := _true ;info 115, 39 bsf rx9d___byte, rx9d___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 114 ; if _rx9d done ; line_number = 116 ; command := _rcreg ;info 116, 40 movf _rcreg,w movwf main__command ; line_number = 118 ; if rx9d start ;info 118, 42 ; =>bit_code_emit@symbol(): sym=rx9d ; No 1TEST: true.size=11 false.size=230 ; No 2TEST: true.size=11 false.size=230 ; 2GOTO: Single test with two GOTO's btfss rx9d___byte, rx9d___bit goto main__45 ; # We have an address bit: ; line_number = 120 ; if command = module_address start ;info 120, 44 ; Left minus Right movf module_address,w subwf main__command,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=4 false.size=1 ; No 2TEST: true.size=4 false.size=1 ; 2GOTO: Single test with two GOTO's btfss __z___byte, __z___bit goto main__43 ; # We have a match: ; line_number = 122 ; _adden := _false ;info 122, 48 bcf _adden___byte, _adden___bit ; line_number = 123 ; result := 0x5a ;info 123, 49 movlw 90 movwf main__result ; line_number = 124 ; transmit := _true ;info 124, 51 bsf main__transmit___byte, main__transmit___bit goto main__44 ; 2GOTO: Starting code 2 main__43: ; # We need to disable non-address reception: ; line_number = 127 ; _adden := _true ;info 127, 53 bsf _adden___byte, _adden___bit main__44: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) ; line_number = 120 ; if command = module_address done ; line_number = 128 ; mode := 0 ;info 128, 54 clrf main__mode goto main__46 ; 2GOTO: Starting code 2 main__45: ; # We have a command: ; line_number = 131 ; switch mode start ;info 131, 56 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__41>>8 movwf __pclath movf main__mode,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__41 movwf __pcl ; page_group 6 main__41: goto main__35 goto main__36 goto main__37 goto main__38 goto main__39 goto main__40 ; line_number = 132 ; case 0 main__35: ; # Basic instruction decoding: ; line_number = 134 ; switch command >> 6 start ;info 134, 67 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__28>>8 movwf __pclath main__29 equ globals___0+14 swapf main__command,w movwf main__29 rrf main__29,f rrf main__29,w andlw 3 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__28 movwf __pcl ; page_group 4 main__28: goto main__26 goto main__30 goto main__30 goto main__27 ; line_number = 135 ; case 0 main__26: ; # 00xx xxxx: ; line_number = 137 ; switch (command >> 3) & 7 start ;info 137, 80 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 ; line_number = 138 ; case_maximum 7 movlw main__12>>8 movwf __pclath main__13 equ globals___0+14 rrf main__command,w movwf main__13 rrf main__13,f rrf main__13,w andlw 7 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__12 movwf __pcl ; page_group 8 main__12: goto main__11 goto main__14 goto main__14 goto main__14 goto main__14 goto main__14 goto main__14 goto main__14 ; line_number = 139 ; case 0 main__11: ; #: 0000 0xxx: ; line_number = 141 ; switch command & 7 start ;info 141, 97 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 ; line_number = 142 ; case_maximum 7 movlw main__9>>8 movwf __pclath movlw 7 andwf main__command,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__9 movwf __pcl ; page_group 8 main__9: goto main__5 goto main__6 goto main__7 goto main__8 goto main__10 goto main__10 goto main__10 goto main__10 ; line_number = 143 ; case 0 main__5: ; #: 0000 0000 (Set Memory Address): ; line_number = 145 ; mode := 1 ;info 145, 111 movlw 1 movwf main__mode goto main__10 ; line_number = 146 ; case 1 main__6: ; #: 0000 0001 (Read Program Memory): ; line_number = 148 ; mode := 3 ;info 148, 114 movlw 3 movwf main__mode goto main__10 ; line_number = 149 ; case 2 main__7: ; #: 0000 0010 (Set Program Memory): ; line_number = 151 ; mode := 4 ;info 151, 117 movlw 4 movwf main__mode goto main__10 ; line_number = 152 ; case 3 main__8: ; #: 0000 0013 (Execute): ; line_number = 154 ; _pclath := address_high ;info 154, 120 movf address_high,w movwf _pclath ; line_number = 155 ; _pcl := address_low ;info 155, 122 movf address_low,w movwf _pcl main__10: ; line_number = 141 ; switch command & 7 done main__14: ; line_number = 137 ; switch (command >> 3) & 7 done goto main__30 ; line_number = 156 ; case 3 main__27: ; # 11xx xxxx: ; line_number = 158 ; switch (command >> 3) & 7 start ;info 158, 125 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__23>>8 movwf __pclath main__24 equ globals___0+14 rrf main__command,w movwf main__24 rrf main__24,f rrf main__24,w andlw 7 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__23 movwf __pcl ; page_group 8 main__23: goto main__25 goto main__25 goto main__25 goto main__25 goto main__25 goto main__25 goto main__25 goto main__22 ; line_number = 159 ; case 7 main__22: ; # 1111 1xxx: ; line_number = 161 ; switch command & 7 start ;info 161, 142 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__20>>8 movwf __pclath movlw 7 andwf main__command,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__20 movwf __pcl ; page_group 8 main__20: goto main__21 goto main__21 goto main__21 goto main__21 goto main__16 goto main__17 goto main__18 goto main__19 ; line_number = 162 ; case 4 main__16: ; # 1111 1100 (Address_Set) goto main__21 ; line_number = 164 ; case 5 main__17: ; # 1111 1101 (Id_Next) ; line_number = 166 ; transmit := _true ;info 166, 157 bsf main__transmit___byte, main__transmit___bit ; line_number = 167 ; result := 0 ;info 167, 158 clrf main__result ; line_number = 168 ; if id_index < id.size start ;info 168, 159 movlw 28 subwf id_index,w ; =>bit_code_emit@symbol(): sym=__c ; No 1TEST: true.size=0 false.size=4 ; No 2TEST: true.size=0 false.size=4 ; 1GOTO: Single test with GOTO btfsc __c___byte, __c___bit goto main__15 ; line_number = 169 ; result := id[id_index] ;info 169, 163 movf id_index,w call id movwf main__result ; line_number = 170 ; id_index := id_index + 1 ;info 170, 166 incf id_index,f main__15: ; Recombine size1 = 0 || size2 = 0 ; line_number = 168 ; if id_index < id.size done ; #result := id_index goto main__21 ; line_number = 172 ; case 6 main__18: ; # 1111 1110 (Id_Start) ; line_number = 174 ; id_index := 0 ;info 174, 168 clrf id_index ; line_number = 175 ; result := 0 ;info 175, 169 clrf main__result ; line_number = 176 ; transmit := _true ;info 176, 170 bsf main__transmit___byte, main__transmit___bit goto main__21 ; line_number = 177 ; case 7 main__19: ; # 1111 1111 (Deselect): ; line_number = 179 ; result := 0 ;info 179, 172 clrf main__result ; line_number = 180 ; transmit := _true ;info 180, 173 bsf main__transmit___byte, main__transmit___bit ; line_number = 181 ; _adden := _true ;info 181, 174 bsf _adden___byte, _adden___bit main__21: ; line_number = 161 ; switch command & 7 done main__25: ; line_number = 158 ; switch (command >> 3) & 7 done main__30: ; line_number = 134 ; switch command >> 6 done goto main__42 ; line_number = 182 ; case 1 main__36: ; # Read Program Memory: Get high address: ; line_number = 184 ; mode := 2 ;info 184, 176 movlw 2 movwf main__mode ; line_number = 185 ; address_high := command ;info 185, 178 movf main__command,w movwf address_high goto main__42 ; line_number = 186 ; case 2 main__37: ; # Read Program Memory: Get high address: ; line_number = 188 ; mode := 0 ;info 188, 181 clrf main__mode ; line_number = 189 ; address_low := command ;info 189, 182 movf main__command,w movwf address_low ; line_number = 190 ; result := 0x5b ;info 190, 184 movlw 91 movwf main__result ; line_number = 191 ; transmit := _true ;info 191, 186 bsf main__transmit___byte, main__transmit___bit goto main__42 ; line_number = 192 ; case 3 main__38: ; # Read Program Memory: Get count: ; line_number = 194 ; mode := 0 ;info 194, 188 clrf main__mode ; line_number = 195 ; count := command ;info 195, 189 movf main__command,w movwf count ; # Pump the program memory data back: ; line_number = 198 ; loop_exactly count start ;info 198, 191 main__31 equ globals___0+14 movf count,w movwf main__31 main__32: ; line_number = 199 ; _eeadrh := address_high ;info 199, 193 movf address_high,w bsf __rp1___byte, __rp1___bit movwf _eeadrh ; line_number = 200 ; _eeadr := address_low ;info 200, 196 bcf __rp1___byte, __rp1___bit movf address_low,w bsf __rp1___byte, __rp1___bit movwf _eeadr ; # Read the word: ; line_number = 203 ; _eepgd := _true ;info 203, 200 bsf __rp0___byte, __rp0___bit bsf _eepgd___byte, _eepgd___bit ; line_number = 204 ; _rd := _true ;info 204, 202 bsf _rd___byte, _rd___bit ; # The next two instructions are *ignored*: ; line_number = 206 ; assemble ;info 206, 203 ; line_number = 207 ;info 207, 203 nop ; Statement 0 of 3 delay = 9 ; line_number = 208 ;info 208, 204 nop ; Statement 1 of 3 delay = 10 ; Statement 2 of 3 delay = 10 ; # Ship the results back: ; line_number = 211 ; call _uart_byte_put(_eedath) ;info 211, 205 bcf __rp0___byte, __rp0___bit movf _eedath,w bcf __rp1___byte, __rp1___bit call _uart_byte_put ; line_number = 212 ; call _uart_byte_get() ;info 212, 209 call _uart_byte_get ; line_number = 213 ; call _uart_byte_put(_eedata) ;info 213, 210 bsf __rp1___byte, __rp1___bit movf _eedata,w bcf __rp1___byte, __rp1___bit call _uart_byte_put ; line_number = 214 ; call _uart_byte_get() ;info 214, 214 call _uart_byte_get ; line_number = 216 ; address_low := address_low + 1 ;info 216, 215 incf address_low,f ; line_number = 217 ; if _z start ;info 217, 216 ; =>bit_code_emit@symbol(): sym=_z ; 1TEST: Single test with code in skip slot btfsc _z___byte, _z___bit ; line_number = 218 ; address_high := address_high + 1 ;info 218, 217 incf address_high,f ; Recombine size1 = 0 || size2 = 0 ; line_number = 217 ; if _z done ; line_number = 198 ; loop_exactly count wrap-up decfsz main__31,f goto main__32 ; line_number = 198 ; loop_exactly count done ; line_number = 219 ; result := 0x5c ;info 219, 220 movlw 92 movwf main__result ; line_number = 220 ; transmit := _true ;info 220, 222 bsf main__transmit___byte, main__transmit___bit goto main__42 ; line_number = 221 ; case 4 main__39: ; # Set Program Memory; Get {byte_high}: ; line_number = 223 ; mode := 5 ;info 223, 224 movlw 5 movwf main__mode ; line_number = 224 ; byte_high := command ;info 224, 226 movf main__command,w movwf main__byte_high goto main__42 ; line_number = 225 ; case 5 main__40: ; # Set Program Memory; Get {byte_low}: ; line_number = 227 ; mode := 0 ;info 227, 229 clrf main__mode ; line_number = 228 ; byte_low := command ;info 228, 230 movf main__command,w movwf main__byte_low ; # Fry it in: ; line_number = 231 ; _eedath := byte_high ;info 231, 232 movf main__byte_high,w bsf __rp1___byte, __rp1___bit movwf _eedath ; line_number = 232 ; _eedata := byte_low ;info 232, 235 bcf __rp1___byte, __rp1___bit movf main__byte_low,w bsf __rp1___byte, __rp1___bit movwf _eedata ; line_number = 233 ; _eeadrh := address_high ;info 233, 239 bcf __rp1___byte, __rp1___bit movf address_high,w bsf __rp1___byte, __rp1___bit movwf _eeadrh ; line_number = 234 ; _eeadr := address_low ;info 234, 243 bcf __rp1___byte, __rp1___bit movf address_low,w bsf __rp1___byte, __rp1___bit movwf _eeadr ; # Remember to get the WRT bit in the configuration ; # word set -- "configure wrt=on" ; # Write the word: ; line_number = 240 ; _eepgd := _true ;info 240, 247 bsf __rp0___byte, __rp0___bit bsf _eepgd___byte, _eepgd___bit ; line_number = 241 ; _wren := _true ;info 241, 249 bsf _wren___byte, _wren___bit ; line_number = 242 ; _eecon2 := 0x55 ;info 242, 250 movlw 85 movwf _eecon2 ; line_number = 243 ; _eecon2 := 0xaa ;info 243, 252 movlw 170 movwf _eecon2 ; line_number = 244 ; _wr := _true ;info 244, 254 bsf _wr___byte, _wr___bit ; # The next two instructions are *ignored*: ; line_number = 246 ; assemble ;info 246, 255 ; line_number = 247 ;info 247, 255 nop ; line_number = 248 ;info 248, 256 nop ; line_number = 249 ; _wren := _true ;info 249, 257 bsf _wren___byte, _wren___bit ; # Now read it back: ; # Read the word: ; line_number = 254 ; _eepgd := _true ;info 254, 258 bsf _eepgd___byte, _eepgd___bit ; line_number = 255 ; _rd := _true ;info 255, 259 bsf _rd___byte, _rd___bit ; # The next two instructions are *ignored*: ; line_number = 257 ; assemble ;info 257, 260 ; line_number = 258 ;info 258, 260 nop ; line_number = 259 ;info 259, 261 nop ; # Send the result code back: ; line_number = 262 ; result := 0x5f ;info 262, 262 movlw 95 bcf __rp0___byte, __rp0___bit bcf __rp1___byte, __rp1___bit movwf main__result ; line_number = 263 ; if _eedath != byte_high start ;info 263, 266 ; Left minus Right movf main__byte_high,w bsf __rp1___byte, __rp1___bit subwf _eedath,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=0 false.size=2 ; No 2TEST: true.size=0 false.size=2 ; 1GOTO: Single test with GOTO btfsc __z___byte, __z___bit goto main__33 bcf __rp1___byte, __rp1___bit ; line_number = 264 ; result := 0x5e ;info 264, 272 movlw 94 movwf main__result main__33: ; Recombine size1 = 0 || size2 = 0 ; line_number = 263 ; if _eedath != byte_high done ; line_number = 265 ; if _eedata != byte_low start ;info 265, 274 ; Left minus Right bcf __rp1___byte, __rp1___bit movf main__byte_low,w bsf __rp1___byte, __rp1___bit subwf _eedata,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=0 false.size=2 ; No 2TEST: true.size=0 false.size=2 ; 1GOTO: Single test with GOTO btfsc __z___byte, __z___bit goto main__34 bcf __rp1___byte, __rp1___bit ; line_number = 266 ; result := 0x5d ;info 266, 281 movlw 93 movwf main__result main__34: ; Recombine size1 = 0 || size2 = 0 ; line_number = 265 ; if _eedata != byte_low done ; line_number = 267 ; transmit := _true ;info 267, 283 bcf __rp1___byte, __rp1___bit bsf main__transmit___byte, main__transmit___bit ; # Bump the address: ; line_number = 270 ; address_low := address_low + 1 ;info 270, 285 incf address_low,f ; line_number = 271 ; if _z start ;info 271, 286 ; =>bit_code_emit@symbol(): sym=_z ; 1TEST: Single test with code in skip slot btfsc _z___byte, _z___bit ; line_number = 272 ; address_high := address_high + 1 ;info 272, 287 incf address_high,f ; Recombine size1 = 0 || size2 = 0 ; line_number = 271 ; if _z done main__42: ; line_number = 131 ; switch mode done main__46: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:00=uu=>00) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:00=uu=>00) ; line_number = 118 ; if rx9d done ; line_number = 274 ; if transmit start ;info 274, 288 ; =>bit_code_emit@symbol(): sym=main__transmit ; No 1TEST: true.size=4 false.size=0 ; No 2TEST: true.size=4 false.size=0 ; 1GOTO: Single test with GOTO btfss main__transmit___byte, main__transmit___bit goto main__47 ; line_number = 275 ; transmit := _true ;info 275, 290 bsf main__transmit___byte, main__transmit___bit ; # Send the result byte: ; line_number = 277 ; call _uart_byte_put(result) ;info 277, 291 movf main__result,w call _uart_byte_put ; # Dispose of echoed command in buffer: ; line_number = 280 ; call _uart_byte_get() ;info 280, 293 call _uart_byte_get ; Recombine size1 = 0 || size2 = 0 main__47: ; line_number = 274 ; if transmit done ; line_number = 109 ; loop_forever wrap-up goto main__3 ; line_number = 109 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 283 ; string id = "\16,0,28,1,3,14\Controller28-A\7\Gramson" start ; id = '\16,0,28,1,3,14\Controller28-A\7\Gramson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 28 id___base: retlw 16 retlw 0 retlw 28 retlw 1 retlw 3 retlw 14 retlw 67 retlw 111 retlw 110 retlw 116 retlw 114 retlw 111 retlw 108 retlw 108 retlw 101 retlw 114 retlw 50 retlw 56 retlw 45 retlw 65 retlw 7 retlw 71 retlw 114 retlw 97 retlw 109 retlw 115 retlw 111 retlw 110 ; line_number = 283 ; string id = "\16,0,28,1,3,14\Controller28-A\7\Gramson" start ; Appending 7 delayed procedures to code bank 0 ; buffer = '_uart' ; line_number = 7 ;info 7, 329 ; procedure _uart_byte_safe_get _uart_byte_safe_get: ; arguments_none ; line_number = 9 ; returns byte ; # This procedure will the next byte from UART. If no byte ; # received in a reasonable time, 0xfc is returned. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 14 ; loop_exactly 255 start ;info 14, 329 _uart_byte_safe_get__1 equ globals___0+15 movlw 255 movwf _uart_byte_safe_get__1 _uart_byte_safe_get__2: ; line_number = 15 ; loop_exactly 255 start ;info 15, 331 _uart_byte_safe_get__3 equ globals___0+16 movlw 255 movwf _uart_byte_safe_get__3 _uart_byte_safe_get__4: ; line_number = 16 ; if _rcif start ;info 16, 333 ; =>bit_code_emit@symbol(): sym=_rcif ; No 1TEST: true.size=2 false.size=0 ; No 2TEST: true.size=2 false.size=0 ; 1GOTO: Single test with GOTO btfss _rcif___byte, _rcif___bit goto _uart_byte_safe_get__5 ; line_number = 17 ; return _rcreg start ; line_number = 17 ;info 17, 335 movf _rcreg,w return ; line_number = 17 ; return _rcreg done ; Recombine size1 = 0 || size2 = 0 _uart_byte_safe_get__5: ; line_number = 16 ; if _rcif done ; line_number = 15 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__3,f goto _uart_byte_safe_get__4 ; line_number = 15 ; loop_exactly 255 done ; line_number = 14 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__1,f goto _uart_byte_safe_get__2 ; line_number = 14 ; loop_exactly 255 done ; line_number = 18 ; return 0xfc start ; line_number = 18 ;info 18, 341 retlw 252 ; line_number = 18 ; return 0xfc done ; delay after procedure statements=non-uniform ; line_number = 21 ;info 21, 342 ; procedure _uart_byte_get _uart_byte_get: ; arguments_none ; line_number = 23 ; returns byte ; # This procedure will return the next byte from the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 27 ; while !_rcif start _uart_byte_get__1: ;info 27, 342 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfss _rcif___byte, _rcif___bit ; line_number = 28 ; do_nothing ;info 28, 343 goto _uart_byte_get__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 27 ; while !_rcif done ; line_number = 29 ; return _rcreg start ; line_number = 29 ;info 29, 344 movf _rcreg,w return ; line_number = 29 ; return _rcreg done ; delay after procedure statements=non-uniform ; line_number = 32 ;info 32, 346 ; procedure _uart_hex_put _uart_hex_put: ; Last argument is sitting in W; save into argument variable movwf _uart_hex_put__value ; delay=4294967295 ; line_number = 33 ; argument value byte _uart_hex_put__value equ globals___0 ; line_number = 34 ; returns_nothing ; # This procedure will output {value} to the UART as a 2-digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 39 ; call _uart_nibble_put(value >> 4) ;info 39, 347 _uart_hex_put__1 equ globals___0+17 swapf _uart_hex_put__value,w andlw 15 call _uart_nibble_put ; line_number = 40 ; call _uart_nibble_put(value & 0xf) ;info 40, 350 movlw 15 andwf _uart_hex_put__value,w call _uart_nibble_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 43 ;info 43, 354 ; procedure _uart_nibble_put _uart_nibble_put: ; Last argument is sitting in W; save into argument variable movwf _uart_nibble_put__nibble ; delay=4294967295 ; line_number = 44 ; argument nibble byte _uart_nibble_put__nibble equ globals___0+1 ; line_number = 45 ; returns_nothing ; # This procedure will output {value} to UART as a 1 digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 50 ; if nibble < 10 start ;info 50, 355 movlw 10 subwf _uart_nibble_put__nibble,w ; =>bit_code_emit@symbol(): sym=__c ; No 1TEST: true.size=1 false.size=1 ; 2TEST: two tests with code in both delay slots btfsc __c___byte, __c___bit ; line_number = 53 ; nibble := nibble - 10 + 'A' ;info 53, 358 movlw 55 btfss __c___byte, __c___bit ; line_number = 51 ; nibble := nibble + '0' ;info 51, 360 movlw 48 addwf _uart_nibble_put__nibble,f ; line_number = 50 ; if nibble < 10 done ; line_number = 54 ; call _uart_byte_put(nibble) ;info 54, 362 movf _uart_nibble_put__nibble,w call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 57 ;info 57, 365 ; procedure _uart_space_put _uart_space_put: ; arguments_none ; line_number = 59 ; returns_nothing ; # This procedure will output a space to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 63 ; call _uart_byte_put(' ') ;info 63, 365 movlw 32 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 66 ;info 66, 368 ; procedure _uart_crlf_put _uart_crlf_put: ; arguments_none ; line_number = 68 ; returns_nothing ; # This procedure will output a carriage return line feed sequecne to ; # the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 73 ; call _uart_byte_put('\cr\') ;info 73, 368 movlw 13 call _uart_byte_put ; line_number = 74 ; call _uart_byte_put('\lf\') ;info 74, 370 movlw 10 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 77 ;info 77, 373 ; procedure _uart_byte_put _uart_byte_put: ; Last argument is sitting in W; save into argument variable movwf _uart_byte_put__byte ; delay=4294967295 ; line_number = 78 ; argument byte byte _uart_byte_put__byte equ globals___0+2 ; line_number = 79 ; returns_nothing ; # This procedure will send {byte} out using to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:00=uu=>00) ; line_number = 83 ; while !_txif start _uart_byte_put__1: ;info 83, 374 ; =>bit_code_emit@symbol(): sym=_txif ; 1TEST: Single test with code in skip slot btfss _txif___byte, _txif___bit ; line_number = 84 ; do_nothing ;info 84, 375 goto _uart_byte_put__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 83 ; while !_txif done ; line_number = 85 ; _txreg := byte ;info 85, 376 movf _uart_byte_put__byte,w movwf _txreg ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Code bank 1; Start address: 2048; End address: 4095 org 2048 ; Code bank 2; Start address: 4096; End address: 6143 org 4096 ; Code bank 3; Start address: 6144; End address: 8191 org 6144 ; Configuration bits ; address = 0x2007, fill = 0x400 ; cp = off (0x3030) ; debug = off (0x800) ; wrt = on (0x200) ; cpd = off (0x100) ; lvp = off (0x0) ; boden = off (0x0) ; pwrte = off (0x8) ; wdte = off (0x0) ; fosc = hs (0x2) ; 16186 = 0x3f3a __config 16186 ; Define start addresses for data regions ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 ; Region="globals___0" Address=32" Size=80 Bytes=18 Bits=2 Available=61 ; Region="globals___1" Address=160" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___2" Address=272" Size=96 Bytes=0 Bits=0 Available=96 ; Region="globals___3" Address=400" Size=112 Bytes=0 Bits=0 Available=112 end