radix dec global__variables__bank0 equ 32 global__variables__bank1 equ 160 global__variables__bank2 equ 288 global__variables__bank3 equ 496 global__bit__variables__bank0 equ 43 global__bit__variables__bank1 equ 160 global__bit__variables__bank2 equ 288 global__bit__variables__bank3 equ 496 indf___register equ 0 pcl___register equ 2 c___byte equ 3 c___bit equ 0 z___byte equ 3 z___bit equ 2 rp0___byte equ 3 rp0___bit equ 5 rp1___byte equ 3 rp1___bit equ 6 irp___byte equ 3 irp___bit equ 7 trisa___register equ 0x85 trisb___register equ 0x86 fsr___register equ 4 pclath___register equ 10 org 0 start: nop nop nop goto skip___interrupt interrupt___vector: retfie skip___interrupt: ; Initialize A/D system to allow digital I/O movlw 3 movwf 31 ; Initialize TRIS registers movlw 254 ; Switch from register bank 0 to register bank 1 (which contains trisa___register) bsf rp0___byte,rp0___bit ; Register bank is now 1 movwf trisa___register movlw 6 movwf trisb___register clrf pclath___register ; Switch from register bank 1 to register bank 0 bcf rp0___byte,rp0___bit ; Register bank is now 0 goto main ; comment ############################################################################# ; comment {} ; comment {Copyright < c > 2002 by Wayne C . Gramlich .} ; comment {All rights reserved .} ; comment {} ; comment {Permission to use , copy , modify , distribute , and sell this software} ; comment {for any purpose is hereby granted without fee provided that the above} ; comment {copyright notice and this permission are retained . The author makes} ; comment {no representations about the suitability of this software for any purpose .} ; comment {It is provided { as is } without express or implied warranty .} ; comment {} ; comment {This is hub7 code for Wayne ' s SimpliciNet Hub7 board :} ; comment {} ; comment {http : / / web . gramlich . net / projects / simplicinet / hub7 / index . html} ; comment {} ; comment {for more details .} ; comment {} ; comment ############################################################################# ; processor pic16f628 cp = off cpd = off lvp = off bowden = off mclre = off pwrte = off wdte = off fosc = ec ; 16139=0x3f0b 8199=0x2007 __config 16139 configuration___address equ 8199 ; constant clock_rate 20000000 clock_rate equ 20000000 ; comment {Some character constants :} ; constant sp 32 sp equ 32 ; constant cr 13 cr equ 13 ; constant lf 10 lf equ 10 ; comment {Some register definitions :} status equ 3 ; bind c status @ 0 c equ status+0 c__byte equ status+0 c__bit equ 0 ; bind z status @ 2 z equ status+0 z__byte equ status+0 z__bit equ 2 pir1 equ 12 ; bind rcif pir1 @ 5 rcif equ pir1+0 rcif__byte equ pir1+0 rcif__bit equ 5 ; bind txif pir1 @ 4 txif equ pir1+0 txif__byte equ pir1+0 txif__bit equ 4 rcsta equ 24 ; bind spen rcsta @ 7 spen equ rcsta+0 spen__byte equ rcsta+0 spen__bit equ 7 ; bind rx9 rcsta @ 6 rx9 equ rcsta+0 rx9__byte equ rcsta+0 rx9__bit equ 6 ; bind sren rcsta @ 5 sren equ rcsta+0 sren__byte equ rcsta+0 sren__bit equ 5 ; bind cren rcsta @ 4 cren equ rcsta+0 cren__byte equ rcsta+0 cren__bit equ 4 ; bind aden rcsta @ 3 aden equ rcsta+0 aden__byte equ rcsta+0 aden__bit equ 3 ; bind ferr rcsta @ 2 ferr equ rcsta+0 ferr__byte equ rcsta+0 ferr__bit equ 2 ; bind oerr rcsta @ 1 oerr equ rcsta+0 oerr__byte equ rcsta+0 oerr__bit equ 1 ; bind rx9d rcsta @ 0 rx9d equ rcsta+0 rx9d__byte equ rcsta+0 rx9d__bit equ 0 txreg equ 25 rcreg equ 26 pie1 equ 140 ; bind rcie pie1 @ 5 rcie equ pie1+0 rcie__byte equ pie1+0 rcie__bit equ 5 ; bind txie pie1 @ 4 txie equ pie1+0 txie__byte equ pie1+0 txie__bit equ 4 txsta equ 152 ; bind tx9 txsta @ 6 tx9 equ txsta+0 tx9__byte equ txsta+0 tx9__bit equ 6 ; bind txen txsta @ 5 txen equ txsta+0 txen__byte equ txsta+0 txen__bit equ 5 ; bind sync txsta @ 4 sync equ txsta+0 sync__byte equ txsta+0 sync__bit equ 4 ; bind brgh txsta @ 2 brgh equ txsta+0 brgh__byte equ txsta+0 brgh__bit equ 2 ; bind trmt txsta @ 1 trmt equ txsta+0 trmt__byte equ txsta+0 trmt__bit equ 1 ; bind tx9d txsta @ 0 tx9d equ txsta+0 tx9d__byte equ txsta+0 tx9d__bit equ 0 spbrg equ 153 ; comment {Some bit definitions :} ; constant en0_bit 0 en0_bit equ 0 ; constant rx_bit 1 rx_bit equ 1 ; constant tx_bit 2 tx_bit equ 2 ; constant en1_bit 3 en1_bit equ 3 ; constant en2_bit 4 en2_bit equ 4 ; constant en3_bit 5 en3_bit equ 5 ; constant en4_bit 6 en4_bit equ 6 ; constant en5_bit 7 en5_bit equ 7 ; constant en6_bit 0 en6_bit equ 0 ; comment {Some port and pin definitions :} porta equ 5 en6_pin__byte equ 5 en6_pin__bit equ 0 portb equ 6 en0_pin__byte equ 6 en0_pin__bit equ 0 ; comment {When using the USART , both the TX and RX pins must be set to input :} tx_pin__byte equ 6 tx_pin__bit equ 2 rx_pin__byte equ 6 rx_pin__bit equ 1 en1_pin__byte equ 6 en1_pin__bit equ 3 en2_pin__byte equ 6 en2_pin__bit equ 4 en3_pin__byte equ 6 en3_pin__bit equ 5 en4_pin__byte equ 6 en4_pin__bit equ 6 en5_pin__byte equ 6 en5_pin__bit equ 7 ; string_constants Start string___fetch: movwf pcl___register ; hello_string = 0s'Hello' hello_string___string equ 0 hello_string: addwf pcl___register,f ; Length = 5 retlw 5 ; `Hello' retlw 72 retlw 101 retlw 108 retlw 108 retlw 111 ; string__constants End ; procedure main start main: main__variables__base equ global__variables__bank0+0 main__bytes__base equ main__variables__base+0 main__bits__base equ main__variables__base+3 main__total__bytes equ 3 main__150byte0 equ main__bytes__base+2 ; arguments_none main__char equ main__bytes__base+0 main__number equ main__bytes__base+1 ; Initialize UART : ; Prescaler = low : ; brgh := 0 ; Prescaler = high ; brgh := 1 ; Switch from register bank 0 to register bank 1 (which contains brgh__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bsf brgh__byte,brgh__bit ; Baud rate = 2400 baud : ; spbrg := 129 ; Baud rate = 115200 baud : ; spbrg := 10 movlw 10 movwf spbrg ; Asynchronous mode : ; sync := 0 bcf sync__byte,sync__bit ; 8 - bit mode : ; tx9 := 0 bcf tx9__byte,tx9__bit ; Serial Port Enable : ; spen := 1 ; Switch from register bank 1 to register bank 0 (which contains spen__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bsf spen__byte,spen__bit ; Keep interrupts off : ; txie := 0 ; Switch from register bank 0 to register bank 1 (which contains txie__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bcf txie__byte,txie__bit ; Clear out an previous character . ; txif := 0 ; Switch from register bank 1 to register bank 0 (which contains txif__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bcf txif__byte,txif__bit ; Enable the transmitter : ; txen := 1 ; Switch from register bank 0 to register bank 1 (which contains txen__byte) bsf rp0___byte,rp0___bit ; Register bank is now 1 bsf txen__byte,txen__bit ; Enable the receiver : ; Keep inerrupts off : ; rcie := 0 bcf rcie__byte,rcie__bit ; Enable continuous reception : ; cren := 1 ; Switch from register bank 1 to register bank 0 (which contains cren__byte) bcf rp0___byte,rp0___bit ; Register bank is now 0 bsf cren__byte,cren__bit ; Enable single receptions : ; sren := 1 bsf sren__byte,sren__bit ; Disable address ; aden := 0 bcf aden__byte,aden__bit ; Print out a welcome message : ; call send_crlf {{ }} call send_crlf ; call master_string {{ hello_string }} movlw LOW hello_string+1 movwf master_string__message call master_string ; call send_crlf {{ }} call send_crlf ; A little initialization : ; call set_mask {{ 0 }} clrf set_mask__mask call set_mask ; number := 0 clrf main__number ; Main loop ; loop_forever ... start main__145loop__forever: ; char := get_byte {{ }} call get_byte movf get_byte__0return__byte,w movwf main__char ; call send_byte {{ char }} movwf send_byte__char call send_byte ; if { {{ 0c'0' <= char && char <= 0c'7' }} } start movlw 48 subwf main__char,w ; expression=`0c'0' <= char' exp_delay=2 true_delay=-1 false_delay=1 true_size=29 false_size=1 btfss c___byte,c___bit goto and149__0false movlw 56 subwf main__char,w ; expression=`char <= 0c'7'' exp_delay=2 true_delay=8 false_delay=-1 true_size=8 false_size=16 btfsc c___byte,c___bit goto label149__1false label149__1true: and149__0true: ; if { {{ 0c'0' <= char && char <= 0c'7' }} } body start ; number := {{ number << 3 }} + char - 0c'0' rlf main__number,w movwf main__150byte0 rlf main__150byte0,f rlf main__150byte0,w andlw 248 addwf main__char,w addlw 208 movwf main__number ; if { {{ 0c'0' <= char && char <= 0c'7' }} } body end goto label149__1end label149__1false: and149__0false: movlw 101 subwf main__char,w ; expression=`{ char = 0c'e' }' exp_delay=2 true_delay=-2 false_delay=-2 true_size=7 false_size=3 btfss z___byte,z___bit goto label151__0false label151__0true: ; else_if { char = 0c'e' } body start ; call send_octal {{ number }} movf main__number,w movwf send_octal__number call send_octal ; call set_mask {{ number }} movf main__number,w movwf set_mask__mask call set_mask ; number := 0 clrf main__number ; call send_crlf {{ }} ; 1 instructions found for sharing goto label151__0end label151__0false: ; else body start ; call send_byte {{ 0c'?' }} movlw 63 movwf send_byte__char call send_byte ; call send_crlf {{ }} ; 1 instructions found for sharing ; if exp=` char = 0c'e' ' generic label151__0end: ; Other expression=`{ char = 0c'e' }' delay=-1 ; 1 shared instructions follow call send_crlf ; if exp=`char <= 0c'7'' generic label149__1end: ; Other expression=`char <= 0c'7'' delay=-1 ; if exp=`0c'0' <= char' false goto ; Other expression=`0c'0' <= char' delay=-1 and149__0end: ; if { {{ 0c'0' <= char && char <= 0c'7' }} } end goto main__145loop__forever ; loop_forever ... end ; procedure main end ; procedure set_mask start set_mask: set_mask__variables__base equ global__variables__bank0+3 set_mask__bytes__base equ set_mask__variables__base+0 set_mask__bits__base equ set_mask__variables__base+1 set_mask__total__bytes equ 1 set_mask__mask equ set_mask__bytes__base+0 ; This procedure will set the output mask to < mask > . ; FIXME : The compiler is choking on this simple code : ; en0_pin := ! mask @ 0 ; en1_pin := ! mask @ 1 ; en2_pin := ! mask @ 2 ; en3_pin := ! mask @ 3 ; en4_pin := ! mask @ 4 ; en5_pin := ! mask @ 5 ; en6_pin := ! mask @ 6 ; if { mask @ 0 } start ; Alias variable for select mask @ 0 set_mask__mask__178select0 equ set_mask__mask+0 set_mask__mask__178select0__byte equ set_mask__mask+0 set_mask__mask__178select0__bit equ 0 ; expression=`{ mask @ 0 }' exp_delay=0 true_delay=1 false_delay=1 true_size=1 false_size=1 btfsc set_mask__mask__178select0__byte,set_mask__mask__178select0__bit ; if { mask @ 0 } body start ; en0_pin := 0 bcf en0_pin__byte,en0_pin__bit ; if { mask @ 0 } body end btfss set_mask__mask__178select0__byte,set_mask__mask__178select0__bit ; else body start ; en0_pin := 1 bsf en0_pin__byte,en0_pin__bit ; else body end ; if exp=` mask @ 0 ' single true and false skip delay=4 ; Other expression=`{ mask @ 0 }' delay=4 ; if { mask @ 0 } end ; if { mask @ 1 } start ; Alias variable for select mask @ 1 set_mask__mask__183select0 equ set_mask__mask+0 set_mask__mask__183select0__byte equ set_mask__mask+0 set_mask__mask__183select0__bit equ 1 ; expression=`{ mask @ 1 }' exp_delay=0 true_delay=1 false_delay=1 true_size=1 false_size=1 btfsc set_mask__mask__183select0__byte,set_mask__mask__183select0__bit ; if { mask @ 1 } body start ; en1_pin := 0 bcf en1_pin__byte,en1_pin__bit ; if { mask @ 1 } body end btfss set_mask__mask__183select0__byte,set_mask__mask__183select0__bit ; else body start ; en1_pin := 1 bsf en1_pin__byte,en1_pin__bit ; else body end ; if exp=` mask @ 1 ' single true and false skip delay=4 ; Other expression=`{ mask @ 1 }' delay=4 ; if { mask @ 1 } end ; if { mask @ 2 } start ; Alias variable for select mask @ 2 set_mask__mask__188select0 equ set_mask__mask+0 set_mask__mask__188select0__byte equ set_mask__mask+0 set_mask__mask__188select0__bit equ 2 ; expression=`{ mask @ 2 }' exp_delay=0 true_delay=1 false_delay=1 true_size=1 false_size=1 btfsc set_mask__mask__188select0__byte,set_mask__mask__188select0__bit ; if { mask @ 2 } body start ; en2_pin := 0 bcf en2_pin__byte,en2_pin__bit ; if { mask @ 2 } body end btfss set_mask__mask__188select0__byte,set_mask__mask__188select0__bit ; else body start ; en2_pin := 1 bsf en2_pin__byte,en2_pin__bit ; else body end ; if exp=` mask @ 2 ' single true and false skip delay=4 ; Other expression=`{ mask @ 2 }' delay=4 ; if { mask @ 2 } end ; if { mask @ 3 } start ; Alias variable for select mask @ 3 set_mask__mask__193select0 equ set_mask__mask+0 set_mask__mask__193select0__byte equ set_mask__mask+0 set_mask__mask__193select0__bit equ 3 ; expression=`{ mask @ 3 }' exp_delay=0 true_delay=1 false_delay=1 true_size=1 false_size=1 btfsc set_mask__mask__193select0__byte,set_mask__mask__193select0__bit ; if { mask @ 3 } body start ; en3_pin := 0 bcf en3_pin__byte,en3_pin__bit ; if { mask @ 3 } body end btfss set_mask__mask__193select0__byte,set_mask__mask__193select0__bit ; else body start ; en3_pin := 1 bsf en3_pin__byte,en3_pin__bit ; else body end ; if exp=` mask @ 3 ' single true and false skip delay=4 ; Other expression=`{ mask @ 3 }' delay=4 ; if { mask @ 3 } end ; if { mask @ 4 } start ; Alias variable for select mask @ 4 set_mask__mask__198select0 equ set_mask__mask+0 set_mask__mask__198select0__byte equ set_mask__mask+0 set_mask__mask__198select0__bit equ 4 ; expression=`{ mask @ 4 }' exp_delay=0 true_delay=1 false_delay=1 true_size=1 false_size=1 btfsc set_mask__mask__198select0__byte,set_mask__mask__198select0__bit ; if { mask @ 4 } body start ; en4_pin := 0 bcf en4_pin__byte,en4_pin__bit ; if { mask @ 4 } body end btfss set_mask__mask__198select0__byte,set_mask__mask__198select0__bit ; else body start ; en4_pin := 1 bsf en4_pin__byte,en4_pin__bit ; else body end ; if exp=` mask @ 4 ' single true and false skip delay=4 ; Other expression=`{ mask @ 4 }' delay=4 ; if { mask @ 4 } end ; if { mask @ 5 } start ; Alias variable for select mask @ 5 set_mask__mask__203select0 equ set_mask__mask+0 set_mask__mask__203select0__byte equ set_mask__mask+0 set_mask__mask__203select0__bit equ 5 ; expression=`{ mask @ 5 }' exp_delay=0 true_delay=1 false_delay=1 true_size=1 false_size=1 btfsc set_mask__mask__203select0__byte,set_mask__mask__203select0__bit ; if { mask @ 5 } body start ; en5_pin := 0 bcf en5_pin__byte,en5_pin__bit ; if { mask @ 5 } body end btfss set_mask__mask__203select0__byte,set_mask__mask__203select0__bit ; else body start ; en5_pin := 1 bsf en5_pin__byte,en5_pin__bit ; else body end ; if exp=` mask @ 5 ' single true and false skip delay=4 ; Other expression=`{ mask @ 5 }' delay=4 ; if { mask @ 5 } end ; if { mask @ 6 } start ; Alias variable for select mask @ 6 set_mask__mask__208select0 equ set_mask__mask+0 set_mask__mask__208select0__byte equ set_mask__mask+0 set_mask__mask__208select0__bit equ 6 ; expression=`{ mask @ 6 }' exp_delay=0 true_delay=1 false_delay=1 true_size=1 false_size=1 btfsc set_mask__mask__208select0__byte,set_mask__mask__208select0__bit ; if { mask @ 6 } body start ; en6_pin := 0 bcf en6_pin__byte,en6_pin__bit ; if { mask @ 6 } body end btfss set_mask__mask__208select0__byte,set_mask__mask__208select0__bit ; else body start ; en6_pin := 1 bsf en6_pin__byte,en6_pin__bit ; else body end ; if exp=` mask @ 6 ' single true and false skip delay=4 ; Other expression=`{ mask @ 6 }' delay=4 ; if { mask @ 6 } end ; procedure set_mask end retlw 0 ; comment {The following procedures are used to communicate with the master :} ; procedure send_crlf start send_crlf: send_crlf__variables__base equ global__variables__bank0+4 send_crlf__bytes__base equ send_crlf__variables__base+0 send_crlf__bits__base equ send_crlf__variables__base+0 send_crlf__total__bytes equ 0 ; arguments_none ; This procedure will output a carriage - return line - feed ; to the master . ; call send_byte {{ cr }} movlw 13 movwf send_byte__char call send_byte ; call send_byte {{ lf }} movlw 10 movwf send_byte__char call send_byte ; procedure send_crlf end retlw 0 ; procedure send_octal start send_octal: send_octal__variables__base equ global__variables__bank0+4 send_octal__bytes__base equ send_octal__variables__base+0 send_octal__bits__base equ send_octal__variables__base+2 send_octal__total__bytes equ 2 send_octal__235byte0 equ send_octal__bytes__base+1 send_octal__236byte0 equ send_octal__bytes__base+1 send_octal__number equ send_octal__bytes__base+0 ; This procedure will output < number > in octal to the tx port . ; Output the character in octal : ; call send_byte {{ {{ number >> 6 }} + 0c'0' }} swapf send_octal__number,w movwf send_octal__235byte0 rrf send_octal__235byte0,f rrf send_octal__235byte0,w andlw 3 addlw 48 movwf send_byte__char call send_byte ; call send_byte {{ {{ {{ number >> 3 }} & 7 }} + 0c'0' }} rrf send_octal__number,w movwf send_octal__236byte0 rrf send_octal__236byte0,f rrf send_octal__236byte0,w andlw 7 addlw 48 movwf send_byte__char call send_byte ; call send_byte {{ {{ number & 7 }} + 0c'0' }} movlw 7 andwf send_octal__number,w addlw 48 movwf send_byte__char call send_byte ; call send_byte {{ sp }} movlw 32 movwf send_byte__char call send_byte ; procedure send_octal end retlw 0 ; comment {The last procedures do character sending and receiving :} ; procedure get_byte start get_byte: get_byte__variables__base equ global__variables__bank0+6 get_byte__bytes__base equ get_byte__variables__base+0 get_byte__bits__base equ get_byte__variables__base+1 get_byte__total__bytes equ 1 ; arguments_none get_byte__0return__byte equ get_byte__bytes__base+0 ; `while ! rcif ...' start get_byte__247while__continue: ; expression=`rcif' exp_delay=0 true_delay=2 false_delay=2 true_size=1 false_size=1 btfsc rcif__byte,rcif__bit goto get_byte__247while__break ; Wait for character to show up : goto get_byte__247while__continue ; if exp=`rcif' true goto small true ; Other expression=`rcif' delay=-1 get_byte__247while__break: ; `while ! rcif ...' end ; return rcreg movf rcreg,w movwf get_byte__0return__byte retlw 0 ; procedure get_byte end ; procedure send_byte start send_byte: send_byte__variables__base equ global__variables__bank0+7 send_byte__bytes__base equ send_byte__variables__base+0 send_byte__bits__base equ send_byte__variables__base+1 send_byte__total__bytes equ 1 send_byte__char equ send_byte__bytes__base+0 ; Send < char > to the TX pin . ; `while ! txif ...' start send_byte__259while__continue: ; expression=`txif' exp_delay=0 true_delay=2 false_delay=2 true_size=1 false_size=1 btfsc txif__byte,txif__bit goto send_byte__259while__break ; Wait for transmitt buffer to empty . goto send_byte__259while__continue ; if exp=`txif' true goto small true ; Other expression=`txif' delay=-1 send_byte__259while__break: ; `while ! txif ...' end ; Send the character : ; txreg := char movf send_byte__char,w movwf txreg ; watch_dog_reset clrwdt ; NOw wait for it to be fully sent : ; `while ! txif ...' start send_byte__268while__continue: ; expression=`txif' exp_delay=0 true_delay=2 false_delay=2 true_size=1 false_size=1 btfsc txif__byte,txif__bit goto send_byte__268while__break ; Wait for transmit buffer to empty . goto send_byte__268while__continue ; if exp=`txif' true goto small true ; Other expression=`txif' delay=-1 send_byte__268while__break: ; `while ! txif ...' end ; procedure send_byte end retlw 0 ; procedure master_string start master_string: master_string__variables__base equ global__variables__bank0+8 master_string__bytes__base equ master_string__variables__base+0 master_string__bits__base equ master_string__variables__base+3 master_string__total__bytes equ 3 master_string__message equ master_string__bytes__base+0 ; This procedure will output < message > to the master . master_string__size equ master_string__bytes__base+1 master_string__index equ master_string__bytes__base+2 ; index := 0 clrf master_string__index ; `while index < message . size ...' start master_string__283while__continue: clrf pclath___register movf master_string__message,w call string___fetch subwf master_string__index,w ; expression=` index < message . size ' exp_delay=4 true_delay=7 false_delay=2 true_size=8 false_size=1 btfsc c___byte,c___bit goto master_string__283while__break ; call send_byte {{ message ~~ {{ index }} }} incf master_string__index,w addwf master_string__message,w clrf pclath___register call string___fetch movwf send_byte__char call send_byte ; index := index + 1 incf master_string__index,f goto master_string__283while__continue ; if exp=` index < message . size ' false goto ; Other expression=` index < message . size ' delay=-1 master_string__283while__break: ; `while index < message . size ...' end ; call send_byte {{ sp }} movlw 32 movwf send_byte__char call send_byte ; procedure master_string end retlw 0 ; Register bank 0 used 11 bytes of 96 available bytes ; Register bank 1 used 0 bytes of 80 available bytes ; Register bank 2 used 0 bytes of 48 available bytes ; Register bank 3 used 0 bytes of 0 available bytes end