1 radix dec 2 ; Code bank 0; Start address: 0; End address: 1023 3 0000 : org 0 4 ; #pin 12 = vref 5 6 ; Define start addresses for data regions 7 00000020 = shared___globals equ 32 8 00000000 = __indf equ 0 9 00000002 = __pcl equ 2 10 00000003 = __status equ 3 11 00000004 = __fsr equ 4 12 00000003 = __c___byte equ 3 13 00000000 = __c___bit equ 0 14 00000003 = __z___byte equ 3 15 00000002 = __z___bit equ 2 16 00000003 = __rp0___byte equ 3 17 00000005 = __rp0___bit equ 5 18 00000003 = __rp1___byte equ 3 19 00000006 = __rp1___bit equ 6 20 00000003 = __irp___byte equ 3 21 00000007 = __irp___bit equ 7 22 0000000a = __pclath equ 10 23 0000000a = __cb0___byte equ 10 24 00000003 = __cb0___bit equ 3 25 0000000a = __cb1___byte equ 10 26 00000004 = __cb1___bit equ 4 27 28 ; # Copyright (c) 2005 by Wayne C. Gramlich 29 ; # All rights reserved. 30 31 ; buffer = 'micro_step' 32 ; line_number = 6 33 ; library _pic16f676 entered 34 ; # Copyright (c) 2004 by Wayne C. Gramlich 35 ; # All rights reserved. 36 37 ; buffer = '_pic16f676' 38 ; line_number = 5 39 ; processor pic16f676 40 ; line_number = 6 41 ; configure_address 0x2007 42 ; line_number = 7 43 ; configure_fill 0x0000 44 ; line_number = 8 45 ; configure_option bg: bg11 = 0x3000 46 ; line_number = 9 47 ; configure_option bg: bg10 = 0x2000 48 ; line_number = 10 49 ; configure_option bg: bg01 = 0x1000 50 ; line_number = 11 51 ; configure_option bg: bg00 = 0x0000 52 ; line_number = 12 53 ; configure_option cpd: on = 0x000 54 ; line_number = 13 55 ; configure_option cpd: off = 0x100 56 ; line_number = 14 57 ; configure_option cp: on = 0x00 58 ; line_number = 15 59 ; configure_option cp: off = 0x80 60 ; line_number = 16 61 ; configure_option boden: on = 0x40 62 ; line_number = 17 63 ; configure_option boden: off = 0x00 64 ; line_number = 18 65 ; configure_option mclre: on = 0x20 66 ; line_number = 19 67 ; configure_option mclre: off = 0x00 68 ; line_number = 20 69 ; configure_option pwrte: on = 0x00 70 ; line_number = 21 71 ; configure_option pwrte: off = 0x10 72 ; line_number = 22 73 ; configure_option wdte: on = 8 74 ; line_number = 23 75 ; configure_option wdte: off = 0 76 ; line_number = 24 77 ; configure_option fosc: rc_clk = 7 78 ; line_number = 25 79 ; configure_option fosc: rc_no_clk = 6 80 ; line_number = 26 81 ; configure_option fosc: int_clk = 5 82 ; line_number = 27 83 ; configure_option fosc: int_no_clk = 4 84 ; line_number = 28 85 ; configure_option fosc: ec = 3 86 ; line_number = 29 87 ; configure_option fosc: hs = 2 88 ; line_number = 30 89 ; configure_option fosc: xt = 1 90 ; line_number = 31 91 ; configure_option fosc: lp = 0 92 ; line_number = 32 93 ; code_bank 0x0 : 0x3ff 94 ; line_number = 33 95 ; data_bank 0x0 : 0x7f 96 ; line_number = 34 97 ; data_bank 0x80 : 0xff 98 ; line_number = 35 99 ; shared_region 0x20 : 0x5f 100 ; line_number = 36 101 ; interrupts_possible 102 ; line_number = 37 103 ; osccal_register_symbol _osccal 104 ; line_number = 38 105 ; osccal_at_address 0x3ff 106 ; line_number = 39 107 ; packages pdip=14, soic=14, tssop=14 108 ; line_number = 40 109 ; pin vdd, power_supply 110 ; line_number = 41 111 ; pin_bindings pdip=1, soic=1, tssop=1 112 ; line_number = 42 113 ; pin ra5_in, ra5_out, t1cki, osc1, clkin 114 ; line_number = 43 115 ; pin_bindings pdip=2, soic=2, tssop=2 116 ; line_number = 44 117 ; bind_to _porta@5 118 ; line_number = 45 119 ; or_if ra5_in _trisa 32 120 ; line_number = 46 121 ; or_if ra5_out _trisa 0 122 ; line_number = 47 123 ; pin ra4_in, ra4_out, t1g, osc2, an3, clkout 124 ; line_number = 48 125 ; pin_bindings pdip=3, soic=3, tssop=3 126 ; line_number = 49 127 ; bind_to _porta@4 128 ; line_number = 50 129 ; or_if ra4_in _trisa 16 130 ; line_number = 51 131 ; or_if ra4_out _trisa 0 132 ; line_number = 52 133 ; or_if an3 _trisa 16 134 ; line_number = 53 135 ; or_if an3 _ansel 8 136 ; line_number = 54 137 ; or_if an3 _adcon0 1 138 ; line_number = 55 139 ; pin ra3_in, mclr, vpp 140 ; line_number = 56 141 ; pin_bindings pdip=4, soic=4, tssop=4 142 ; line_number = 57 143 ; bind_to _porta@4 144 ; line_number = 58 145 ; or_if ra3_in _trisa 8 146 ; line_number = 59 147 ; pin rc5_in, rc5_out 148 ; line_number = 60 149 ; pin_bindings pdip=5, soic=5, tssop=5 150 ; line_number = 61 151 ; bind_to _portc@5 152 ; line_number = 62 153 ; or_if rc5_in _trisc 32 154 ; line_number = 63 155 ; or_if rc5_out _trisc 0 156 ; line_number = 64 157 ; pin rc4_in, rc4_out 158 ; line_number = 65 159 ; pin_bindings pdip=6, soic=6, tssop=6 160 ; line_number = 66 161 ; bind_to _portc@4 162 ; line_number = 67 163 ; or_if rc4_in _trisc 16 164 ; line_number = 68 165 ; or_if rc4_out _trisc 0 166 ; line_number = 69 167 ; pin rc3_in, rc3_out, an7 168 ; line_number = 70 169 ; pin_bindings pdip=7, soic=7, tssop=7 170 ; line_number = 71 171 ; bind_to _portc@3 172 ; line_number = 72 173 ; or_if rc3_in _trisc 8 174 ; line_number = 73 175 ; or_if rc3_out _trisc 0 176 ; line_number = 74 177 ; or_if an7 _trisc 8 178 ; line_number = 75 179 ; or_if an7 _ansel 128 180 ; line_number = 76 181 ; or_if an7 _adcon0 1 182 ; line_number = 77 183 ; pin rc2_in, rc2_out, an6 184 ; line_number = 78 185 ; pin_bindings pdip=8, soic=8, tssop=8 186 ; line_number = 79 187 ; bind_to _portc@2 188 ; line_number = 80 189 ; or_if rc2_in _trisc 4 190 ; line_number = 81 191 ; or_if rc2_out _trisc 0 192 ; line_number = 82 193 ; or_if an6 _trisc 4 194 ; line_number = 83 195 ; or_if an6 _ansel 64 196 ; line_number = 84 197 ; or_if an6 _adcon0 1 198 ; line_number = 85 199 ; pin rc1_in, rc1_out, an5 200 ; line_number = 86 201 ; pin_bindings pdip=9, soic=9, tssop=9 202 ; line_number = 87 203 ; bind_to _portc@1 204 ; line_number = 88 205 ; or_if rc1_in _trisc 2 206 ; line_number = 89 207 ; or_if rc1_out _trisc 0 208 ; line_number = 90 209 ; or_if an5 _trisc 2 210 ; line_number = 91 211 ; or_if an5 _ansel 32 212 ; line_number = 92 213 ; or_if an5 _adcon0 1 214 ; line_number = 93 215 ; pin rc0_in, rc0_out, an4 216 ; line_number = 94 217 ; pin_bindings pdip=10, soic=10, tssop=10 218 ; line_number = 95 219 ; bind_to _portc@0 220 ; line_number = 96 221 ; or_if rc0_in _trisc 1 222 ; line_number = 97 223 ; or_if rc0_out _trisc 0 224 ; line_number = 98 225 ; or_if an4 _trisc 1 226 ; line_number = 99 227 ; or_if an4 _ansel 16 228 ; line_number = 100 229 ; or_if an4 _adcon0 1 230 ; line_number = 101 231 ; pin ra2_in, ra2_out, an2, cout, t0cki, int 232 ; line_number = 102 233 ; pin_bindings pdip=11, soic=11, tssop=11 234 ; line_number = 103 235 ; bind_to _porta@2 236 ; line_number = 104 237 ; or_if ra2_in _trisa 4 238 ; line_number = 105 239 ; or_if ra2_out _trisa 0 240 ; line_number = 106 241 ; or_if an2 _trisa 4 242 ; line_number = 107 243 ; or_if an2 _ansel 4 244 ; line_number = 108 245 ; or_if an2 _adcon0 1 246 ; line_number = 109 247 ; pin ra1_in, ra1_out, an1, cin_minus, vref, icspclk 248 ; line_number = 110 249 ; pin_bindings pdip=12, soic=12, tssop=12 250 ; line_number = 111 251 ; bind_to _porta@1 252 ; line_number = 112 253 ; or_if ra1_in _trisa 2 254 ; line_number = 113 255 ; or_if ra1_out _trisa 0 256 ; line_number = 114 257 ; or_if an1 _trisa 2 258 ; line_number = 115 259 ; or_if an1 _ansel 2 260 ; line_number = 116 261 ; or_if an1 _adcon0 1 262 ; line_number = 117 263 ; or_if vref _trisa 2 264 ; line_number = 118 265 ; or_if vref _ansel 2 266 ; line_number = 119 267 ; or_if vref _adcon0 33 268 ; line_number = 120 269 ; pin ra0_in, ra0_out, an0, cin_plus, icspdat 270 ; line_number = 121 271 ; pin_bindings pdip=13, soic=13, tssop=13 272 ; line_number = 122 273 ; bind_to _porta@0 274 ; line_number = 123 275 ; or_if ra0_in _trisa 1 276 ; line_number = 124 277 ; or_if ra0_out _trisa 0 278 ; line_number = 125 279 ; or_if an0 _trisa 1 280 ; line_number = 126 281 ; or_if an0 _ansel 1 282 ; line_number = 127 283 ; or_if an0 _adcon0 1 284 ; line_number = 128 285 ; pin vss, ground 286 ; line_number = 129 287 ; pin_bindings pdip=14, soic=14, tssop=14 288 289 290 ; line_number = 134 291 ; library _pic16f630_676 entered 292 ; # Copyright (c) 2004 by Wayne C. Gramlich 293 ; # All rights reserved. 294 295 ; # Shared register definitions for the PIC16F630 and PIC16F676. 296 297 ; buffer = '_pic16f630_676' 298 ; line_number = 7 299 ; register _indf = 300 00000000 = _indf equ 0 301 302 ; line_number = 9 303 ; register _tmr0 = 304 00000001 = _tmr0 equ 1 305 306 ; line_number = 11 307 ; register _pcl = 308 00000002 = _pcl equ 2 309 310 ; line_number = 13 311 ; register _status = 312 00000003 = _status equ 3 313 ; line_number = 14 314 ; bind _rp0 = _status@5 315 00000003 = _rp0___byte equ _status 316 00000005 = _rp0___bit equ 5 317 ; line_number = 15 318 ; bind _to = _status@4 319 00000003 = _to___byte equ _status 320 00000004 = _to___bit equ 4 321 ; line_number = 16 322 ; bind _pd = _status@3 323 00000003 = _pd___byte equ _status 324 00000003 = _pd___bit equ 3 325 ; line_number = 17 326 ; bind _z = _status@2 327 00000003 = _z___byte equ _status 328 00000002 = _z___bit equ 2 329 ; line_number = 18 330 ; bind _dc = _status@1 331 00000003 = _dc___byte equ _status 332 00000001 = _dc___bit equ 1 333 ; line_number = 19 334 ; bind _c = _status@0 335 00000003 = _c___byte equ _status 336 00000000 = _c___bit equ 0 337 338 ; line_number = 21 339 ; register _fsr = 340 00000004 = _fsr equ 4 341 342 ; line_number = 23 343 ; register _porta = 344 00000005 = _porta equ 5 345 ; line_number = 24 346 ; register _ra = 347 00000005 = _ra equ 5 348 ; line_number = 25 349 ; bind _ra5 = _porta@5 350 00000005 = _ra5___byte equ _porta 351 00000005 = _ra5___bit equ 5 352 ; line_number = 26 353 ; bind _ra4 = _porta@4 354 00000005 = _ra4___byte equ _porta 355 00000004 = _ra4___bit equ 4 356 ; line_number = 27 357 ; bind _ra3 = _porta@3 358 00000005 = _ra3___byte equ _porta 359 00000003 = _ra3___bit equ 3 360 ; line_number = 28 361 ; bind _ra2 = _porta@2 362 00000005 = _ra2___byte equ _porta 363 00000002 = _ra2___bit equ 2 364 ; line_number = 29 365 ; bind _ra1 = _porta@1 366 00000005 = _ra1___byte equ _porta 367 00000001 = _ra1___bit equ 1 368 ; line_number = 30 369 ; bind _ra0 = _porta@0 370 00000005 = _ra0___byte equ _porta 371 00000000 = _ra0___bit equ 0 372 373 ; line_number = 32 374 ; register _portc = 375 00000007 = _portc equ 7 376 ; line_number = 33 377 ; register _rc = 378 00000007 = _rc equ 7 379 ; line_number = 34 380 ; bind _rc5 = _portc@5 381 00000007 = _rc5___byte equ _portc 382 00000005 = _rc5___bit equ 5 383 ; line_number = 35 384 ; bind _rc4 = _portc@4 385 00000007 = _rc4___byte equ _portc 386 00000004 = _rc4___bit equ 4 387 ; line_number = 36 388 ; bind _rc3 = _portc@3 389 00000007 = _rc3___byte equ _portc 390 00000003 = _rc3___bit equ 3 391 ; line_number = 37 392 ; bind _rc2 = _portc@2 393 00000007 = _rc2___byte equ _portc 394 00000002 = _rc2___bit equ 2 395 ; line_number = 38 396 ; bind _rc1 = _portc@1 397 00000007 = _rc1___byte equ _portc 398 00000001 = _rc1___bit equ 1 399 ; line_number = 39 400 ; bind _rc0 = _portc@0 401 00000007 = _rc0___byte equ _portc 402 00000000 = _rc0___bit equ 0 403 404 ; line_number = 41 405 ; register _pclath = 406 0000000a = _pclath equ 10 407 408 ; line_number = 43 409 ; register _intcon = 410 0000000b = _intcon equ 11 411 ; line_number = 44 412 ; bind _gie = _intcon@7 413 0000000b = _gie___byte equ _intcon 414 00000007 = _gie___bit equ 7 415 ; line_number = 45 416 ; bind _peie = _intcon@6 417 0000000b = _peie___byte equ _intcon 418 00000006 = _peie___bit equ 6 419 ; line_number = 46 420 ; bind _t0ie = _intcon@5 421 0000000b = _t0ie___byte equ _intcon 422 00000005 = _t0ie___bit equ 5 423 ; line_number = 47 424 ; bind _inte = _intcon@4 425 0000000b = _inte___byte equ _intcon 426 00000004 = _inte___bit equ 4 427 ; line_number = 48 428 ; bind _raie = _intcon@3 429 0000000b = _raie___byte equ _intcon 430 00000003 = _raie___bit equ 3 431 ; line_number = 49 432 ; bind _t0if = _intcon@2 433 0000000b = _t0if___byte equ _intcon 434 00000002 = _t0if___bit equ 2 435 ; line_number = 50 436 ; bind _intf = _intcon@1 437 0000000b = _intf___byte equ _intcon 438 00000001 = _intf___bit equ 1 439 ; line_number = 51 440 ; bind _raif = _intcon@0 441 0000000b = _raif___byte equ _intcon 442 00000000 = _raif___bit equ 0 443 444 ; line_number = 53 445 ; register _pir1 = 446 0000000c = _pir1 equ 12 447 ; line_number = 54 448 ; bind _eeif = _pir1@7 449 0000000c = _eeif___byte equ _pir1 450 00000007 = _eeif___bit equ 7 451 ; line_number = 55 452 ; bind _cmif = _pir1@3 453 0000000c = _cmif___byte equ _pir1 454 00000003 = _cmif___bit equ 3 455 ; line_number = 56 456 ; bind _tmr1if = _pir1@0 457 0000000c = _tmr1if___byte equ _pir1 458 00000000 = _tmr1if___bit equ 0 459 460 ; line_number = 58 461 ; register _tmr1l = 462 0000000e = _tmr1l equ 14 463 464 ; line_number = 60 465 ; register _tmr1h = 466 0000000f = _tmr1h equ 15 467 468 ; line_number = 62 469 ; register _t1con = 470 00000010 = _t1con equ 16 471 ; line_number = 63 472 ; bind _t1ge = _t1con@6 473 00000010 = _t1ge___byte equ _t1con 474 00000006 = _t1ge___bit equ 6 475 ; line_number = 64 476 ; bind _t1ckps1 = _t1con@5 477 00000010 = _t1ckps1___byte equ _t1con 478 00000005 = _t1ckps1___bit equ 5 479 ; line_number = 65 480 ; bind _t1ckps0 = _t1con@4 481 00000010 = _t1ckps0___byte equ _t1con 482 00000004 = _t1ckps0___bit equ 4 483 ; line_number = 66 484 ; bind _t1oscen = _t1con@3 485 00000010 = _t1oscen___byte equ _t1con 486 00000003 = _t1oscen___bit equ 3 487 ; line_number = 67 488 ; bind _t1sync = _t1con@2 489 00000010 = _t1sync___byte equ _t1con 490 00000002 = _t1sync___bit equ 2 491 ; line_number = 68 492 ; bind _tmr1cs = _t1con@1 493 00000010 = _tmr1cs___byte equ _t1con 494 00000001 = _tmr1cs___bit equ 1 495 ; line_number = 69 496 ; bind _tmr1on = _t1con@0 497 00000010 = _tmr1on___byte equ _t1con 498 00000000 = _tmr1on___bit equ 0 499 500 ; line_number = 71 501 ; register _cmcon = 502 00000019 = _cmcon equ 25 503 ; line_number = 72 504 ; bind _cout = _cmcon@6 505 00000019 = _cout___byte equ _cmcon 506 00000006 = _cout___bit equ 6 507 ; line_number = 73 508 ; bind _cinv = _cmcon@4 509 00000019 = _cinv___byte equ _cmcon 510 00000004 = _cinv___bit equ 4 511 ; line_number = 74 512 ; bind _cis = _cmcon@3 513 00000019 = _cis___byte equ _cmcon 514 00000003 = _cis___bit equ 3 515 ; line_number = 75 516 ; bind _cm2 = _cmcon@2 517 00000019 = _cm2___byte equ _cmcon 518 00000002 = _cm2___bit equ 2 519 ; line_number = 76 520 ; bind _cm1 = _cmcon@1 521 00000019 = _cm1___byte equ _cmcon 522 00000001 = _cm1___bit equ 1 523 ; line_number = 77 524 ; bind _cm0 = _cmcon@0 525 00000019 = _cm0___byte equ _cmcon 526 00000000 = _cm0___bit equ 0 527 528 ; # Data bank 1 (0x80-0xff): 529 530 ; line_number = 81 531 ; register _option_reg = 532 00000080 = _option_reg equ 128 533 ; line_number = 82 534 ; bind _rapu = _option_reg@7 535 00000080 = _rapu___byte equ _option_reg 536 00000007 = _rapu___bit equ 7 537 ; line_number = 83 538 ; bind _intedg = _option_reg@6 539 00000080 = _intedg___byte equ _option_reg 540 00000006 = _intedg___bit equ 6 541 ; line_number = 84 542 ; bind _t0cs = _option_reg@5 543 00000080 = _t0cs___byte equ _option_reg 544 00000005 = _t0cs___bit equ 5 545 ; line_number = 85 546 ; bind _t0se = _option_reg@4 547 00000080 = _t0se___byte equ _option_reg 548 00000004 = _t0se___bit equ 4 549 ; line_number = 86 550 ; bind _psa = _option_reg@3 551 00000080 = _psa___byte equ _option_reg 552 00000003 = _psa___bit equ 3 553 ; line_number = 87 554 ; bind _ps2 = _option_reg@2 555 00000080 = _ps2___byte equ _option_reg 556 00000002 = _ps2___bit equ 2 557 ; line_number = 88 558 ; bind _ps1 = _option_reg@1 559 00000080 = _ps1___byte equ _option_reg 560 00000001 = _ps1___bit equ 1 561 ; line_number = 89 562 ; bind _ps0 = _option_reg@0 563 00000080 = _ps0___byte equ _option_reg 564 00000000 = _ps0___bit equ 0 565 566 ; line_number = 91 567 ; register _trisa = 568 00000085 = _trisa equ 133 569 ; line_number = 92 570 ; bind _trisa5 = _trisa@5 571 00000085 = _trisa5___byte equ _trisa 572 00000005 = _trisa5___bit equ 5 573 ; line_number = 93 574 ; bind _trisa4 = _trisa@4 575 00000085 = _trisa4___byte equ _trisa 576 00000004 = _trisa4___bit equ 4 577 ; line_number = 94 578 ; bind _trisa3 = _trisa@3 579 00000085 = _trisa3___byte equ _trisa 580 00000003 = _trisa3___bit equ 3 581 ; line_number = 95 582 ; bind _trisa2 = _trisa@2 583 00000085 = _trisa2___byte equ _trisa 584 00000002 = _trisa2___bit equ 2 585 ; line_number = 96 586 ; bind _trisa1 = _trisa@1 587 00000085 = _trisa1___byte equ _trisa 588 00000001 = _trisa1___bit equ 1 589 ; line_number = 97 590 ; bind _trisa0 = _trisa@0 591 00000085 = _trisa0___byte equ _trisa 592 00000000 = _trisa0___bit equ 0 593 594 ; line_number = 99 595 ; register _trisc = 596 00000087 = _trisc equ 135 597 ; line_number = 100 598 ; bind _trisc5 = _trisc@5 599 00000087 = _trisc5___byte equ _trisc 600 00000005 = _trisc5___bit equ 5 601 ; line_number = 101 602 ; bind _trisc4 = _trisc@4 603 00000087 = _trisc4___byte equ _trisc 604 00000004 = _trisc4___bit equ 4 605 ; line_number = 102 606 ; bind _trisc3 = _trisc@3 607 00000087 = _trisc3___byte equ _trisc 608 00000003 = _trisc3___bit equ 3 609 ; line_number = 103 610 ; bind _trisc2 = _trisc@2 611 00000087 = _trisc2___byte equ _trisc 612 00000002 = _trisc2___bit equ 2 613 ; line_number = 104 614 ; bind _trisc1 = _trisc@1 615 00000087 = _trisc1___byte equ _trisc 616 00000001 = _trisc1___bit equ 1 617 ; line_number = 105 618 ; bind _trisc0 = _trisc@0 619 00000087 = _trisc0___byte equ _trisc 620 00000000 = _trisc0___bit equ 0 621 622 ; line_number = 107 623 ; register _pie1 = 624 0000008c = _pie1 equ 140 625 ; line_number = 108 626 ; bind _eeie = _pie1@7 627 0000008c = _eeie___byte equ _pie1 628 00000007 = _eeie___bit equ 7 629 ; line_number = 109 630 ; bind _adie = _pie1@6 631 0000008c = _adie___byte equ _pie1 632 00000006 = _adie___bit equ 6 633 ; line_number = 110 634 ; bind _cmie = _pie1@3 635 0000008c = _cmie___byte equ _pie1 636 00000003 = _cmie___bit equ 3 637 ; line_number = 111 638 ; bind _tmr1ie = _pie1@0 639 0000008c = _tmr1ie___byte equ _pie1 640 00000000 = _tmr1ie___bit equ 0 641 642 ; line_number = 113 643 ; register _pcon = 644 0000008e = _pcon equ 142 645 ; line_number = 114 646 ; bind _por = _pcon@1 647 0000008e = _por___byte equ _pcon 648 00000001 = _por___bit equ 1 649 ; line_number = 115 650 ; bind _bor = _pcon@0 651 0000008e = _bor___byte equ _pcon 652 00000000 = _bor___bit equ 0 653 654 ; line_number = 117 655 ; register _osccal = 656 00000090 = _osccal equ 144 657 ; line_number = 118 658 ; bind _cal5 = _osccal@7 659 00000090 = _cal5___byte equ _osccal 660 00000007 = _cal5___bit equ 7 661 ; line_number = 119 662 ; bind _cal4 = _osccal@6 663 00000090 = _cal4___byte equ _osccal 664 00000006 = _cal4___bit equ 6 665 ; line_number = 120 666 ; bind _cal3 = _osccal@5 667 00000090 = _cal3___byte equ _osccal 668 00000005 = _cal3___bit equ 5 669 ; line_number = 121 670 ; bind _cal2 = _osccal@4 671 00000090 = _cal2___byte equ _osccal 672 00000004 = _cal2___bit equ 4 673 ; line_number = 122 674 ; bind _cal1 = _osccal@3 675 00000090 = _cal1___byte equ _osccal 676 00000003 = _cal1___bit equ 3 677 ; line_number = 123 678 ; bind _cal0 = _osccal@2 679 00000090 = _cal0___byte equ _osccal 680 00000002 = _cal0___bit equ 2 681 ; line_number = 124 682 ; constant _osccal_lsb = 4 683 00000004 = _osccal_lsb equ 4 684 685 ; line_number = 126 686 ; register _wpua = 687 00000095 = _wpua equ 149 688 ; line_number = 127 689 ; bind _wpua5 = _wpua@5 690 00000095 = _wpua5___byte equ _wpua 691 00000005 = _wpua5___bit equ 5 692 ; line_number = 128 693 ; bind _wpua4 = _wpua@4 694 00000095 = _wpua4___byte equ _wpua 695 00000004 = _wpua4___bit equ 4 696 ; line_number = 129 697 ; bind _wpua2 = _wpua@2 698 00000095 = _wpua2___byte equ _wpua 699 00000002 = _wpua2___bit equ 2 700 ; line_number = 130 701 ; bind _wpua1 = _wpua@1 702 00000095 = _wpua1___byte equ _wpua 703 00000001 = _wpua1___bit equ 1 704 ; line_number = 131 705 ; bind _wpua0 = _wpua@0 706 00000095 = _wpua0___byte equ _wpua 707 00000000 = _wpua0___bit equ 0 708 709 ; line_number = 133 710 ; register _ioca = 711 00000096 = _ioca equ 150 712 ; line_number = 134 713 ; bind _ioca5 = _ioca@5 714 00000096 = _ioca5___byte equ _ioca 715 00000005 = _ioca5___bit equ 5 716 ; line_number = 135 717 ; bind _ioca4 = _ioca@4 718 00000096 = _ioca4___byte equ _ioca 719 00000004 = _ioca4___bit equ 4 720 ; line_number = 136 721 ; bind _ioca3 = _ioca@3 722 00000096 = _ioca3___byte equ _ioca 723 00000003 = _ioca3___bit equ 3 724 ; line_number = 137 725 ; bind _ioca2 = _ioca@2 726 00000096 = _ioca2___byte equ _ioca 727 00000002 = _ioca2___bit equ 2 728 ; line_number = 138 729 ; bind _ioca1 = _ioca@1 730 00000096 = _ioca1___byte equ _ioca 731 00000001 = _ioca1___bit equ 1 732 ; line_number = 139 733 ; bind _ioca0 = _ioca@0 734 00000096 = _ioca0___byte equ _ioca 735 00000000 = _ioca0___bit equ 0 736 737 ; line_number = 141 738 ; register _vrcon = 739 00000099 = _vrcon equ 153 740 ; line_number = 142 741 ; bind _vren = _vrcon@7 742 00000099 = _vren___byte equ _vrcon 743 00000007 = _vren___bit equ 7 744 ; line_number = 143 745 ; bind _vrr = _vrcon@5 746 00000099 = _vrr___byte equ _vrcon 747 00000005 = _vrr___bit equ 5 748 ; line_number = 144 749 ; bind _vr3 = _vrcon@3 750 00000099 = _vr3___byte equ _vrcon 751 00000003 = _vr3___bit equ 3 752 ; line_number = 145 753 ; bind _vr2 = _vrcon@2 754 00000099 = _vr2___byte equ _vrcon 755 00000002 = _vr2___bit equ 2 756 ; line_number = 146 757 ; bind _vr1 = _vrcon@1 758 00000099 = _vr1___byte equ _vrcon 759 00000001 = _vr1___bit equ 1 760 ; line_number = 147 761 ; bind _vr0 = _vrcon@0 762 00000099 = _vr0___byte equ _vrcon 763 00000000 = _vr0___bit equ 0 764 765 ; line_number = 149 766 ; register _eedata = 767 0000009a = _eedata equ 154 768 769 ; line_number = 151 770 ; register _eeadr = 771 0000009b = _eeadr equ 155 772 773 ; line_number = 153 774 ; register _eecon1 = 775 0000009c = _eecon1 equ 156 776 ; line_number = 154 777 ; bind _wrerr = _eecon1@3 778 0000009c = _wrerr___byte equ _eecon1 779 00000003 = _wrerr___bit equ 3 780 ; line_number = 155 781 ; bind _wren = _eecon1@2 782 0000009c = _wren___byte equ _eecon1 783 00000002 = _wren___bit equ 2 784 ; line_number = 156 785 ; bind _wr = _eecon1@1 786 0000009c = _wr___byte equ _eecon1 787 00000001 = _wr___bit equ 1 788 ; line_number = 157 789 ; bind _rd = _eecon1@0 790 0000009c = _rd___byte equ _eecon1 791 00000000 = _rd___bit equ 0 792 793 ; line_number = 159 794 ; register _eecon2 = 795 0000009d = _eecon2 equ 157 796 797 798 ; buffer = '_pic16f676' 799 ; line_number = 134 800 ; library _pic16f630_676 exited 801 802 ; # The only difference between the PIC16F676 and the PIC16F630 is that 803 ; # the 'F676 has 8 channels of A/D and the 'F630 does not. 804 805 ; line_number = 139 806 ; register _adresh = 807 0000001e = _adresh equ 30 808 809 ; # The {_adif} flag is only avaiable for the PIC16F676: 810 ; line_number = 142 811 ; bind _adif = _pir1@6 812 0000000c = _adif___byte equ _pir1 813 00000006 = _adif___bit equ 6 814 815 ; line_number = 144 816 ; register _adcon0 = 817 0000001f = _adcon0 equ 31 818 ; line_number = 145 819 ; bind _adfm = _adcon0@7 820 0000001f = _adfm___byte equ _adcon0 821 00000007 = _adfm___bit equ 7 822 ; line_number = 146 823 ; bind _vcfg = _adcon0@5 824 0000001f = _vcfg___byte equ _adcon0 825 00000005 = _vcfg___bit equ 5 826 ; line_number = 147 827 ; bind _chs2 = _adcon0@4 828 0000001f = _chs2___byte equ _adcon0 829 00000004 = _chs2___bit equ 4 830 ; line_number = 148 831 ; bind _chs1 = _adcon0@3 832 0000001f = _chs1___byte equ _adcon0 833 00000003 = _chs1___bit equ 3 834 ; line_number = 149 835 ; bind _chs0 = _adcon0@2 836 0000001f = _chs0___byte equ _adcon0 837 00000002 = _chs0___bit equ 2 838 ; line_number = 150 839 ; bind _go = _adcon0@1 840 0000001f = _go___byte equ _adcon0 841 00000001 = _go___bit equ 1 842 ; line_number = 151 843 ; bind _adon = _adcon0@0 844 0000001f = _adon___byte equ _adcon0 845 00000000 = _adon___bit equ 0 846 847 ; line_number = 153 848 ; register _ansel = 849 00000091 = _ansel equ 145 850 ; line_number = 154 851 ; bind _ans7 = _ansel@7 852 00000091 = _ans7___byte equ _ansel 853 00000007 = _ans7___bit equ 7 854 ; line_number = 155 855 ; bind _ans6 = _ansel@6 856 00000091 = _ans6___byte equ _ansel 857 00000006 = _ans6___bit equ 6 858 ; line_number = 156 859 ; bind _ans5 = _ansel@5 860 00000091 = _ans5___byte equ _ansel 861 00000005 = _ans5___bit equ 5 862 ; line_number = 157 863 ; bind _ans4 = _ansel@4 864 00000091 = _ans4___byte equ _ansel 865 00000004 = _ans4___bit equ 4 866 ; line_number = 158 867 ; bind _ans3 = _ansel@3 868 00000091 = _ans3___byte equ _ansel 869 00000003 = _ans3___bit equ 3 870 ; line_number = 159 871 ; bind _ans2 = _ansel@2 872 00000091 = _ans2___byte equ _ansel 873 00000002 = _ans2___bit equ 2 874 ; line_number = 160 875 ; bind _ans1 = _ansel@1 876 00000091 = _ans1___byte equ _ansel 877 00000001 = _ans1___bit equ 1 878 ; line_number = 161 879 ; bind _ans0 = _ansel@0 880 00000091 = _ans0___byte equ _ansel 881 00000000 = _ans0___bit equ 0 882 883 ; line_number = 163 884 ; register _adresl = 885 0000009e = _adresl equ 158 886 887 ; line_number = 165 888 ; register _adcon1 = 889 0000009f = _adcon1 equ 159 890 ; line_number = 166 891 ; bind _adcs2 = _adcon1@6 892 0000009f = _adcs2___byte equ _adcon1 893 00000006 = _adcs2___bit equ 6 894 ; line_number = 167 895 ; bind _adcs1 = _adcon1@5 896 0000009f = _adcs1___byte equ _adcon1 897 00000005 = _adcs1___bit equ 5 898 ; line_number = 168 899 ; bind _adcs0 = _adcon1@4 900 0000009f = _adcs0___byte equ _adcon1 901 00000004 = _adcs0___bit equ 4 902 903 904 ; buffer = 'micro_step' 905 ; line_number = 6 906 ; library _pic16f676 exited 907 908 ; line_number = 8 909 ; package pdip 910 ; line_number = 9 911 ; pin 1 = power_supply 912 ; line_number = 10 913 ; pin 2 = clkin 914 ; line_number = 11 915 ; pin 3 = an3, name=coil0_in 916 00000005 = coil0_in___byte equ _porta 917 00000004 = coil0_in___bit equ 4 918 ; line_number = 12 919 ; pin 4 = mclr 920 ; line_number = 13 921 ; pin 5 = rc5_out, name=coil0a, mask=coil0a_mask 922 00000007 = coil0a___byte equ _portc 923 00000005 = coil0a___bit equ 5 924 00000020 = coil0a_mask equ 32 925 ; line_number = 14 926 ; pin 6 = rc4_out, name=coil0b, mask=coil0b_mask 927 00000007 = coil0b___byte equ _portc 928 00000004 = coil0b___bit equ 4 929 00000010 = coil0b_mask equ 16 930 ; line_number = 15 931 ; pin 7 = rc3_out, name=coil1a, mask=coil1a_mask 932 00000007 = coil1a___byte equ _portc 933 00000003 = coil1a___bit equ 3 934 00000008 = coil1a_mask equ 8 935 ; line_number = 16 936 ; pin 8 = rc2_out, name=coil1b, mask=coil1b_mask 937 00000007 = coil1b___byte equ _portc 938 00000002 = coil1b___bit equ 2 939 00000004 = coil1b_mask equ 4 940 ; line_number = 17 941 ; pin 9 = rc1_in, name=step 942 00000007 = step___byte equ _portc 943 00000001 = step___bit equ 1 944 ; line_number = 18 945 ; pin 10 = rc0_in, name=dir 946 00000007 = dir___byte equ _portc 947 00000000 = dir___bit equ 0 948 ; line_number = 19 949 ; pin 11 = ra2_in, name=mode 950 00000005 = mode___byte equ _porta 951 00000002 = mode___bit equ 2 952 ; #pin 12 = vref 953 ; line_number = 21 954 ; pin 12 = ra1_in 955 ; line_number = 22 956 ; pin 13 = an0, name=coil1_in 957 00000005 = coil1_in___byte equ _porta 958 00000000 = coil1_in___bit equ 0 959 ; line_number = 23 960 ; pin 14 = ground 961 962 963 ; line_number = 27 964 ; constant microsecond = 5 965 00000005 = microsecond equ 5 966 967 ; # Current sense resistor is .50 Ohms. 968 ; # Voltage across resistor is I * R = I * (1/2) 969 ; # A/D measures voltage between 0 an 5 volts between 0 and 255. 970 ; # Thus, the A/D result is A = (255/5) * I * R. 971 ; # Converting I into milliamps: A = (255 / 5) * I/1000 * (1/2) 972 ; # Reworking: A = (I * 255) / (5 * 1000 * 2) 973 ; # More rework: A = (I * 255) / 10000 974 ; # More Rework: A = (I * 51) / 2000 975 976 ; line_number = 38 977 ; constant coil0_current = 1000 978 000003e8 = coil0_current equ 1000 979 ; line_number = 39 980 ; constant coil0_a2d = (coil0_current * 51) / 2000 981 00000019 = coil0_a2d equ 25 982 ; line_number = 40 983 ; constant coil1_current = 1000 984 000003e8 = coil1_current equ 1000 985 ; line_number = 41 986 ; constant coil1_a2d = (coil1_current * 51) / 2000 987 00000019 = coil1_a2d equ 25 988 989 ; # A/D acquistion time is: 990 ; # 991 ; # Tacq = Tamp + Tc + Tcoff 992 ; # 993 ; # where 994 ; # 995 ; # Tamp = 2uS 996 ; # Tc = Chold x (Ric + Rss + Rs) x In(1/2047) 997 ; # Tcoff = (T - 25) x .005 (T measured in degrees Centigrade) 998 ; # 999 ; # For T = 50, Tcoff = 1.25uS 1000 ; # Worst case, Ric = 1K, Rss=7K, Rs=10K, Chold=120pf 1001 ; # So, Tc ~= 16.47usec. 1002 ; # 1003 ; # Finally, Tacp = 2 + 16.47 + 1.25 = 19.72uS, call it 20uS. 1004 1005 ; line_number = 59 1006 ; origin 0 1007 0000 : org 0 1008 1009 ; line_number = 61 1010 ; procedure main 1011 0000 : main: 1012 ; Need to calibrate the oscillator 1013 0000 23ff call 1023 1014 0001 1683 bsf __rp0___byte, __rp0___bit 1015 0002 0090 movwf _osccal 1016 ; Initialize some registers 1017 0003 3001 movlw 1 1018 0004 1283 bcf __rp0___byte, __rp0___bit 1019 0005 009f movwf _adcon0 1020 0006 3009 movlw 9 1021 0007 1683 bsf __rp0___byte, __rp0___bit 1022 0008 0091 movwf _ansel 1023 0009 3017 movlw 23 1024 000a 0085 movwf _trisa 1025 000b 3003 movlw 3 1026 000c 0087 movwf _trisc 1027 ; arguments_none 1028 ; line_number = 63 1029 ; returns_nothing 1030 1031 ; line_number = 65 1032 ; local index byte 1033 00000020 = main__index equ shared___globals 1034 ; line_number = 66 1035 ; local previous bit 1036 0000005f = main__previous___byte equ shared___globals+63 1037 00000000 = main__previous___bit equ 0 1038 ; line_number = 67 1039 ; local pulse byte 1040 00000021 = main__pulse equ shared___globals+1 1041 ; line_number = 68 1042 ; local coil0_mask byte 1043 00000022 = main__coil0_mask equ shared___globals+2 1044 ; line_number = 69 1045 ; local coil1_mask byte 1046 00000023 = main__coil1_mask equ shared___globals+3 1047 ; line_number = 70 1048 ; local coil0_current byte 1049 00000024 = main__coil0_current equ shared___globals+4 1050 ; line_number = 71 1051 ; local coil0_limit byte 1052 00000025 = main__coil0_limit equ shared___globals+5 1053 ; line_number = 72 1054 ; local coil1_current byte 1055 00000026 = main__coil1_current equ shared___globals+6 1056 ; line_number = 73 1057 ; local coil1_limit byte 1058 00000027 = main__coil1_limit equ shared___globals+7 1059 1060 ; # Set A/D clock source to Tad = 32 x Tocs = 32 x .2uS = 6.4uS. 1061 ; # A/D time = 11 x TAd = 11 x 6.4uS = 70.4uS. 1062 ; before procedure statements delay=non-uniform, bit states=(data:X0=>X1 code:XX=>XX) 1063 ; line_number = 77 1064 ; _adcon1 := 0x20 1065 000d 3020 movlw 32 1066 000e 009f movwf _adcon1 1067 1068 ; line_number = 79 1069 ; pulse := 0 1070 000f 3000 movlw 0 1071 0010 1283 bcf __rp0___byte, __rp0___bit 1072 0011 00a1 movwf main__pulse 1073 ; line_number = 80 1074 ; coil0_limit:= coil0_a2d 1075 0012 3019 movlw 25 1076 0013 00a5 movwf main__coil0_limit 1077 ; line_number = 81 1078 ; coil0_mask := coil0a_mask 1079 0014 3020 movlw 32 1080 0015 00a2 movwf main__coil0_mask 1081 ; line_number = 82 1082 ; coil1_limit := coil1_a2d 1083 0016 3019 movlw 25 1084 0017 00a7 movwf main__coil1_limit 1085 ; line_number = 83 1086 ; coil1_mask := coil1a_mask 1087 0018 3008 movlw 8 1088 0019 00a3 movwf main__coil1_mask 1089 ; line_number = 84 1090 ; previous := 0 1091 001a 105f bcf main__previous___byte, main__previous___bit 1092 ; line_number = 85 1093 ; index := 0 1094 001b 3000 movlw 0 1095 001c 00a0 movwf main__index 1096 ; line_number = 86 1097 ; _rc := 0 1098 001d 3000 movlw 0 1099 001e 0087 movwf _rc 1100 1101 ; # Set ADCS<2:0> to 010 = Fosc/32: 1102 ; line_number = 89 1103 ; _adcs0 := 0 1104 001f 1683 bsf __rp0___byte, __rp0___bit 1105 0020 121f bcf _adcs0___byte, _adcs0___bit 1106 ; line_number = 90 1107 ; _adcs1 := 1 1108 0021 169f bsf _adcs1___byte, _adcs1___bit 1109 ; line_number = 91 1110 ; _adcs2 := 0 1111 0022 131f bcf _adcs2___byte, _adcs2___bit 1112 1113 ; # Right justify the 10-bit value into ADR 1114 ; line_number = 94 1115 ; _adfm := 1 1116 0023 1283 bcf __rp0___byte, __rp0___bit 1117 0024 179f bsf _adfm___byte, _adfm___bit 1118 ; line_number = 95 1119 ; _adon := 1 1120 0025 141f bsf _adon___byte, _adon___bit 1121 ; line_number = 96 1122 ; loop_forever start 1123 0026 : main__1: 1124 ; # Step/Dir process: 1125 ; line_number = 98 1126 ; if step start 1127 ; =>bit_code_emit@symbol(): sym=step 1128 ; CASE: true.size>1 false.size=1; no GOTO's 1129 0026 1c87 btfss step___byte, step___bit 1130 0027 2830 goto main__3 1131 ; line_number = 99 1132 ; if !previous start 1133 ; =>bit_code_emit@symbol(): sym=main__previous 1134 ; CASE: true.size=0 && false.size>1 1135 0028 185f btfsc main__previous___byte, main__previous___bit 1136 0029 282e goto main__2 1137 ; # We have a positive step edge: 1138 ; line_number = 101 1139 ; if dir start 1140 ; =>bit_code_emit@symbol(): sym=dir 1141 ; CASE: true_size=1 && false_size=1 1142 002a 1807 btfsc dir___byte, dir___bit 1143 ; line_number = 102 1144 ; index := index + 1 1145 002b 0aa0 incf main__index,f 1146 002c 1c07 btfss dir___byte, dir___bit 1147 ; line_number = 104 1148 ; index := index - 1 1149 002d 03a0 decf main__index,f 1150 ; <=bit_code_emit@symbol; sym=dir (data:00=>00 code:XX=>XX) 1151 ; line_number = 101 1152 ; if dir done 1153 002e : main__2: 1154 ; Recombine size1 = 0 || size2 = 0 1155 ; <=bit_code_emit@symbol; sym=main__previous (data:00=>00 code:XX=>XX) 1156 ; line_number = 99 1157 ; if !previous done 1158 ; line_number = 105 1159 ; previous := 1 1160 002e 145f bsf main__previous___byte, main__previous___bit 1161 002f 2831 goto main__4 1162 0030 : main__3: 1163 ; line_number = 107 1164 ; previous := 0 1165 0030 105f bcf main__previous___byte, main__previous___bit 1166 1167 0031 : main__4: 1168 ; <=bit_code_emit@symbol; sym=step (data:00=>00 code:XX=>XX) 1169 ; line_number = 98 1170 ; if step done 1171 ; # Ripple table: 1172 ; line_number = 110 1173 ; if index@1 start 1174 00000020 = main__select__11___byte equ main__index 1175 00000001 = main__select__11___bit equ 1 1176 ; =>bit_code_emit@symbol(): sym=main__select__11 1177 ; CASE: true_code_size > 1 && false_code_size > 1 1178 0031 1ca0 btfss main__select__11___byte, main__select__11___bit 1179 0032 283d goto main__12 1180 ; line_number = 111 1181 ; if index@0 start 1182 00000020 = main__select__8___byte equ main__index 1183 00000000 = main__select__8___bit equ 0 1184 ; =>bit_code_emit@symbol(): sym=main__select__8 1185 ; CASE: true_code_size > 1 && false_code_size > 1 1186 0033 1c20 btfss main__select__8___byte, main__select__8___bit 1187 0034 2839 goto main__9 1188 ; # index & 3 = 3: 1189 ; line_number = 113 1190 ; coil0_mask := coil0a_mask 1191 0035 3020 movlw 32 1192 0036 00a2 movwf main__coil0_mask 1193 ; line_number = 114 1194 ; coil1_mask := 0 1195 0037 3000 movlw 0 1196 0038 283c goto main__10 1197 0039 : main__9: 1198 ; # index & 3 = 2: 1199 ; line_number = 117 1200 ; coil0_mask := 0 1201 0039 3000 movlw 0 1202 003a 00a2 movwf main__coil0_mask 1203 ; line_number = 118 1204 ; coil1_mask := coil1a_mask 1205 003b 3008 movlw 8 1206 003c : main__10: 1207 003c 2846 goto main__13 1208 003d : main__12: 1209 ; line_number = 120 1210 ; if index@0 start 1211 00000020 = main__select__5___byte equ main__index 1212 00000000 = main__select__5___bit equ 0 1213 ; =>bit_code_emit@symbol(): sym=main__select__5 1214 ; CASE: true_code_size > 1 && false_code_size > 1 1215 003d 1c20 btfss main__select__5___byte, main__select__5___bit 1216 003e 2843 goto main__6 1217 ; # index & 3 = 1: 1218 ; line_number = 122 1219 ; coil0_mask := coil0b_mask 1220 003f 3010 movlw 16 1221 0040 00a2 movwf main__coil0_mask 1222 ; line_number = 123 1223 ; coil1_mask := 0 1224 0041 3000 movlw 0 1225 0042 2846 goto main__7 1226 0043 : main__6: 1227 ; # index & 3 = 0: 1228 ; line_number = 126 1229 ; coil0_mask := 0 1230 0043 3000 movlw 0 1231 0044 00a2 movwf main__coil0_mask 1232 ; line_number = 127 1233 ; coil1_mask := coil1b_mask 1234 0045 3004 movlw 4 1235 0046 : main__7: 1236 0046 : main__13: 1237 0046 00a3 movwf main__coil1_mask 1238 ; <=bit_code_emit@symbol; sym=main__select__8 (data:00=>00 code:XX=>XX) 1239 ; line_number = 111 1240 ; if index@0 done 1241 1242 ; <=bit_code_emit@symbol; sym=main__select__5 (data:00=>00 code:XX=>XX) 1243 ; line_number = 120 1244 ; if index@0 done 1245 ; <=bit_code_emit@symbol; sym=main__select__11 (data:00=>00 code:XX=>XX) 1246 ; line_number = 110 1247 ; if index@1 done 1248 ; # The sense resistor for coil 1 is on RA0/AN0, the we set 1249 ; # CHS2<2:0> in ADCON0 to 000 (i.e. AN0): 1250 ; line_number = 131 1251 ; _chs0 := 0 1252 0047 111f bcf _chs0___byte, _chs0___bit 1253 ; line_number = 132 1254 ; _chs1 := 0 1255 0048 119f bcf _chs1___byte, _chs1___bit 1256 ; line_number = 133 1257 ; _chs2 := 0 1258 0049 121f bcf _chs2___byte, _chs2___bit 1259 1260 ; # Wait 20uS for the sample and hold to settle out: 1261 ; # The loop overhead is 3 cycles (=.6uS) and the minimum 1262 ; # time through the loop is 4 cycles = (.8us). Total = 1.2uS. 1263 ; # 20/1.2 = 16.66. 17 is the minimum: 1264 ; line_number = 139 1265 ; loop_exactly 17 start 1266 00000028 = main__14 equ shared___globals+8 1267 004a 3011 movlw 17 1268 004b 00a8 movwf main__14 1269 004c : main__15: 1270 ; # Step/Dir process: 1271 ; line_number = 141 1272 ; if step start 1273 ; =>bit_code_emit@symbol(): sym=step 1274 ; CASE: true.size>1 false.size=1; no GOTO's 1275 004c 1c87 btfss step___byte, step___bit 1276 004d 2856 goto main__17 1277 ; line_number = 142 1278 ; if !previous start 1279 ; =>bit_code_emit@symbol(): sym=main__previous 1280 ; CASE: true.size=0 && false.size>1 1281 004e 185f btfsc main__previous___byte, main__previous___bit 1282 004f 2854 goto main__16 1283 ; # We have a positive step edge: 1284 ; line_number = 144 1285 ; if dir start 1286 ; =>bit_code_emit@symbol(): sym=dir 1287 ; CASE: true_size=1 && false_size=1 1288 0050 1807 btfsc dir___byte, dir___bit 1289 ; line_number = 145 1290 ; index := index + 1 1291 0051 0aa0 incf main__index,f 1292 0052 1c07 btfss dir___byte, dir___bit 1293 ; line_number = 147 1294 ; index := index - 1 1295 0053 03a0 decf main__index,f 1296 ; <=bit_code_emit@symbol; sym=dir (data:00=>00 code:XX=>XX) 1297 ; line_number = 144 1298 ; if dir done 1299 0054 : main__16: 1300 ; Recombine size1 = 0 || size2 = 0 1301 ; <=bit_code_emit@symbol; sym=main__previous (data:00=>00 code:XX=>XX) 1302 ; line_number = 142 1303 ; if !previous done 1304 ; line_number = 148 1305 ; previous := 1 1306 0054 145f bsf main__previous___byte, main__previous___bit 1307 0055 2857 goto main__18 1308 0056 : main__17: 1309 ; line_number = 150 1310 ; previous := 0 1311 0056 105f bcf main__previous___byte, main__previous___bit 1312 1313 0057 : main__18: 1314 ; <=bit_code_emit@symbol; sym=step (data:00=>00 code:XX=>XX) 1315 ; line_number = 141 1316 ; if step done 1317 ; line_number = 139 1318 ; loop_exactly 17 wrap-up 1319 0057 0ba8 decfsz main__14,f 1320 0058 284c goto main__15 1321 ; line_number = 139 1322 ; loop_exactly 17 done 1323 ; # Trigger the A/D conversion: 1324 ; line_number = 153 1325 ; _go := 1 1326 0059 149f bsf _go___byte, _go___bit 1327 ; line_number = 154 1328 ; while _go start 1329 005a : main__19: 1330 ; =>bit_code_emit@symbol(): sym=_go 1331 ; CASE: true_code.size = 0 && false_code.size > 1 1332 005a 1c9f btfss _go___byte, _go___bit 1333 005b 2868 goto main__23 1334 ; # Step/Dir process: 1335 ; line_number = 156 1336 ; if step start 1337 ; =>bit_code_emit@symbol(): sym=step 1338 ; CASE: true.size>1 false.size=1; no GOTO's 1339 005c 1c87 btfss step___byte, step___bit 1340 005d 2866 goto main__21 1341 ; line_number = 157 1342 ; if !previous start 1343 ; =>bit_code_emit@symbol(): sym=main__previous 1344 ; CASE: true.size=0 && false.size>1 1345 005e 185f btfsc main__previous___byte, main__previous___bit 1346 005f 2864 goto main__20 1347 ; # We have a positive step edge: 1348 ; line_number = 159 1349 ; if dir start 1350 ; =>bit_code_emit@symbol(): sym=dir 1351 ; CASE: true_size=1 && false_size=1 1352 0060 1807 btfsc dir___byte, dir___bit 1353 ; line_number = 160 1354 ; index := index + 1 1355 0061 0aa0 incf main__index,f 1356 0062 1c07 btfss dir___byte, dir___bit 1357 ; line_number = 162 1358 ; index := index - 1 1359 0063 03a0 decf main__index,f 1360 ; <=bit_code_emit@symbol; sym=dir (data:00=>00 code:XX=>XX) 1361 ; line_number = 159 1362 ; if dir done 1363 0064 : main__20: 1364 ; Recombine size1 = 0 || size2 = 0 1365 ; <=bit_code_emit@symbol; sym=main__previous (data:00=>00 code:XX=>XX) 1366 ; line_number = 157 1367 ; if !previous done 1368 ; line_number = 163 1369 ; previous := 1 1370 0064 145f bsf main__previous___byte, main__previous___bit 1371 0065 2867 goto main__22 1372 0066 : main__21: 1373 ; line_number = 165 1374 ; previous := 0 1375 0066 105f bcf main__previous___byte, main__previous___bit 1376 1377 0067 : main__22: 1378 ; <=bit_code_emit@symbol; sym=step (data:00=>00 code:XX=>XX) 1379 ; line_number = 156 1380 ; if step done 1381 0067 285a goto main__19 1382 ; Recombine size1 = 0 || size2 = 0 1383 0068 : main__23: 1384 ; <=bit_code_emit@symbol; sym=_go (data:00=>00 code:XX=>XX) 1385 ; line_number = 154 1386 ; while _go done 1387 ; # Read out the A/D value: 1388 ; line_number = 168 1389 ; coil1_current := 255 1390 0068 30ff movlw 255 1391 0069 00a6 movwf main__coil1_current 1392 ; line_number = 169 1393 ; if _adresh = 0 start 1394 ; Left minus Right 1395 006a 081e movf _adresh,w 1396 ; =>bit_code_emit@symbol(): sym=__z 1397 006b 1683 bsf __rp0___byte, __rp0___bit 1398 ; CASE: true_code.size = 0 && false_code.size > 1 1399 006c 1d03 btfss __z___byte, __z___bit 1400 006d 2871 goto main__24 1401 ; line_number = 170 1402 ; coil1_current := _adresl 1403 006e 081e movf _adresl,w 1404 006f 1283 bcf __rp0___byte, __rp0___bit 1405 0070 00a6 movwf main__coil1_current 1406 1407 ; Recombine size1 = 0 || size2 = 0 1408 0071 : main__24: 1409 ; <=bit_code_emit@symbol; sym=__z (data:00=>0? code:XX=>XX) 1410 ; line_number = 169 1411 ; if _adresh = 0 done 1412 ; # Process the current values: 1413 ; line_number = 173 1414 ; pulse := 0 1415 0071 3000 movlw 0 1416 0072 1283 bcf __rp0___byte, __rp0___bit 1417 0073 00a1 movwf main__pulse 1418 ; line_number = 174 1419 ; if coil0_current < coil0_limit start 1420 0074 0825 movf main__coil0_limit,w 1421 0075 0224 subwf main__coil0_current,w 1422 ; =>bit_code_emit@symbol(): sym=__c 1423 ; CASE: true.size=0 && false.size>1 1424 0076 1803 btfsc __c___byte, __c___bit 1425 0077 287a goto main__25 1426 ; line_number = 175 1427 ; pulse := coil0_mask 1428 0078 0822 movf main__coil0_mask,w 1429 0079 00a1 movwf main__pulse 1430 007a : main__25: 1431 ; Recombine size1 = 0 || size2 = 0 1432 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) 1433 ; line_number = 174 1434 ; if coil0_current < coil0_limit done 1435 ; line_number = 176 1436 ; if coil1_current < coil1_limit start 1437 007a 0827 movf main__coil1_limit,w 1438 007b 0226 subwf main__coil1_current,w 1439 ; =>bit_code_emit@symbol(): sym=__c 1440 ; CASE: true.size=0 && false.size>1 1441 007c 1803 btfsc __c___byte, __c___bit 1442 007d 2880 goto main__26 1443 ; line_number = 177 1444 ; pulse := pulse | coil1_mask 1445 007e 0823 movf main__coil1_mask,w 1446 007f 04a1 iorwf main__pulse,f 1447 0080 : main__26: 1448 ; Recombine size1 = 0 || size2 = 0 1449 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) 1450 ; line_number = 176 1451 ; if coil1_current < coil1_limit done 1452 ; line_number = 178 1453 ; _rc := pulse 1454 0080 0821 movf main__pulse,w 1455 0081 0087 movwf _rc 1456 1457 ; # The sense resistor for coil 0 is on RA4/AN3, the we set 1458 ; # CHS2<2:0> in ADCON0 to 011 (i.e. AN3): 1459 ; line_number = 182 1460 ; _chs0 := 1 1461 0082 151f bsf _chs0___byte, _chs0___bit 1462 ; line_number = 183 1463 ; _chs1 := 1 1464 0083 159f bsf _chs1___byte, _chs1___bit 1465 ; line_number = 184 1466 ; _chs2 := 0 1467 0084 121f bcf _chs2___byte, _chs2___bit 1468 1469 ; # Wait 20uS for the sample and hold to settle out: 1470 ; line_number = 187 1471 ; loop_exactly 17 start 1472 00000028 = main__27 equ shared___globals+8 1473 0085 3011 movlw 17 1474 0086 00a8 movwf main__27 1475 0087 : main__28: 1476 ; line_number = 188 1477 ; if step start 1478 ; =>bit_code_emit@symbol(): sym=step 1479 ; CASE: true.size>1 false.size=1; no GOTO's 1480 0087 1c87 btfss step___byte, step___bit 1481 0088 2891 goto main__30 1482 ; line_number = 189 1483 ; if !previous start 1484 ; =>bit_code_emit@symbol(): sym=main__previous 1485 ; CASE: true.size=0 && false.size>1 1486 0089 185f btfsc main__previous___byte, main__previous___bit 1487 008a 288f goto main__29 1488 ; # We have a positive step edge: 1489 ; line_number = 191 1490 ; if dir start 1491 ; =>bit_code_emit@symbol(): sym=dir 1492 ; CASE: true_size=1 && false_size=1 1493 008b 1807 btfsc dir___byte, dir___bit 1494 ; line_number = 192 1495 ; index := index + 1 1496 008c 0aa0 incf main__index,f 1497 008d 1c07 btfss dir___byte, dir___bit 1498 ; line_number = 194 1499 ; index := index - 1 1500 008e 03a0 decf main__index,f 1501 ; <=bit_code_emit@symbol; sym=dir (data:00=>00 code:XX=>XX) 1502 ; line_number = 191 1503 ; if dir done 1504 008f : main__29: 1505 ; Recombine size1 = 0 || size2 = 0 1506 ; <=bit_code_emit@symbol; sym=main__previous (data:00=>00 code:XX=>XX) 1507 ; line_number = 189 1508 ; if !previous done 1509 ; line_number = 195 1510 ; previous := 1 1511 008f 145f bsf main__previous___byte, main__previous___bit 1512 0090 2892 goto main__31 1513 0091 : main__30: 1514 ; line_number = 197 1515 ; previous := 0 1516 0091 105f bcf main__previous___byte, main__previous___bit 1517 1518 0092 : main__31: 1519 ; <=bit_code_emit@symbol; sym=step (data:00=>00 code:XX=>XX) 1520 ; line_number = 188 1521 ; if step done 1522 ; line_number = 187 1523 ; loop_exactly 17 wrap-up 1524 0092 0ba8 decfsz main__27,f 1525 0093 2887 goto main__28 1526 ; line_number = 187 1527 ; loop_exactly 17 done 1528 ; # Trigger the AN3 A/D conversion: 1529 ; line_number = 200 1530 ; _go := 1 1531 0094 149f bsf _go___byte, _go___bit 1532 ; line_number = 201 1533 ; while _go start 1534 0095 : main__32: 1535 ; =>bit_code_emit@symbol(): sym=_go 1536 ; CASE: true_code.size = 0 && false_code.size > 1 1537 0095 1c9f btfss _go___byte, _go___bit 1538 0096 28a3 goto main__36 1539 ; line_number = 202 1540 ; if step start 1541 ; =>bit_code_emit@symbol(): sym=step 1542 ; CASE: true.size>1 false.size=1; no GOTO's 1543 0097 1c87 btfss step___byte, step___bit 1544 0098 28a1 goto main__34 1545 ; line_number = 203 1546 ; if !previous start 1547 ; =>bit_code_emit@symbol(): sym=main__previous 1548 ; CASE: true.size=0 && false.size>1 1549 0099 185f btfsc main__previous___byte, main__previous___bit 1550 009a 289f goto main__33 1551 ; # We have a positive step edge: 1552 ; line_number = 205 1553 ; if dir start 1554 ; =>bit_code_emit@symbol(): sym=dir 1555 ; CASE: true_size=1 && false_size=1 1556 009b 1807 btfsc dir___byte, dir___bit 1557 ; line_number = 206 1558 ; index := index + 1 1559 009c 0aa0 incf main__index,f 1560 009d 1c07 btfss dir___byte, dir___bit 1561 ; line_number = 208 1562 ; index := index - 1 1563 009e 03a0 decf main__index,f 1564 ; <=bit_code_emit@symbol; sym=dir (data:00=>00 code:XX=>XX) 1565 ; line_number = 205 1566 ; if dir done 1567 009f : main__33: 1568 ; Recombine size1 = 0 || size2 = 0 1569 ; <=bit_code_emit@symbol; sym=main__previous (data:00=>00 code:XX=>XX) 1570 ; line_number = 203 1571 ; if !previous done 1572 ; line_number = 209 1573 ; previous := 1 1574 009f 145f bsf main__previous___byte, main__previous___bit 1575 00a0 28a2 goto main__35 1576 00a1 : main__34: 1577 ; line_number = 211 1578 ; previous := 0 1579 00a1 105f bcf main__previous___byte, main__previous___bit 1580 1581 00a2 : main__35: 1582 ; <=bit_code_emit@symbol; sym=step (data:00=>00 code:XX=>XX) 1583 ; line_number = 202 1584 ; if step done 1585 00a2 2895 goto main__32 1586 ; Recombine size1 = 0 || size2 = 0 1587 00a3 : main__36: 1588 ; <=bit_code_emit@symbol; sym=_go (data:00=>00 code:XX=>XX) 1589 ; line_number = 201 1590 ; while _go done 1591 ; # Read out the A/D value for AN3: 1592 ; line_number = 214 1593 ; coil0_current := 255 1594 00a3 30ff movlw 255 1595 00a4 00a4 movwf main__coil0_current 1596 ; line_number = 215 1597 ; if _adresh = 0 start 1598 ; Left minus Right 1599 00a5 081e movf _adresh,w 1600 ; =>bit_code_emit@symbol(): sym=__z 1601 00a6 1683 bsf __rp0___byte, __rp0___bit 1602 ; CASE: true_code.size = 0 && false_code.size > 1 1603 00a7 1d03 btfss __z___byte, __z___bit 1604 00a8 28ac goto main__37 1605 ; line_number = 216 1606 ; coil0_current := _adresl 1607 00a9 081e movf _adresl,w 1608 00aa 1283 bcf __rp0___byte, __rp0___bit 1609 00ab 00a4 movwf main__coil0_current 1610 1611 ; Recombine size1 = 0 || size2 = 0 1612 00ac : main__37: 1613 ; <=bit_code_emit@symbol; sym=__z (data:00=>0? code:XX=>XX) 1614 ; line_number = 215 1615 ; if _adresh = 0 done 1616 ; # Process the current values: 1617 ; line_number = 219 1618 ; pulse := 0 1619 00ac 3000 movlw 0 1620 00ad 1283 bcf __rp0___byte, __rp0___bit 1621 00ae 00a1 movwf main__pulse 1622 ; line_number = 220 1623 ; if coil0_current < coil0_limit start 1624 00af 0825 movf main__coil0_limit,w 1625 00b0 0224 subwf main__coil0_current,w 1626 ; =>bit_code_emit@symbol(): sym=__c 1627 ; CASE: true.size=0 && false.size>1 1628 00b1 1803 btfsc __c___byte, __c___bit 1629 00b2 28b5 goto main__38 1630 ; line_number = 221 1631 ; pulse := coil0_mask 1632 00b3 0822 movf main__coil0_mask,w 1633 00b4 00a1 movwf main__pulse 1634 00b5 : main__38: 1635 ; Recombine size1 = 0 || size2 = 0 1636 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) 1637 ; line_number = 220 1638 ; if coil0_current < coil0_limit done 1639 ; line_number = 222 1640 ; if coil1_current < coil1_limit start 1641 00b5 0827 movf main__coil1_limit,w 1642 00b6 0226 subwf main__coil1_current,w 1643 ; =>bit_code_emit@symbol(): sym=__c 1644 ; CASE: true.size=0 && false.size>1 1645 00b7 1803 btfsc __c___byte, __c___bit 1646 00b8 28bd goto main__39 1647 ; line_number = 223 1648 ; pulse := pulse | coil1_mask 1649 00b9 0823 movf main__coil1_mask,w 1650 00ba 04a1 iorwf main__pulse,f 1651 ; line_number = 224 1652 ; _rc := pulse 1653 00bb 0821 movf main__pulse,w 1654 00bc 0087 movwf _rc 1655 1656 1657 00bd : main__39: 1658 ; Recombine size1 = 0 || size2 = 0 1659 ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:XX=>XX) 1660 ; line_number = 222 1661 ; if coil1_current < coil1_limit done 1662 ; line_number = 96 1663 ; loop_forever wrap-up 1664 00bd 2826 goto main__1 1665 ; line_number = 96 1666 ; loop_forever done 1667 ; delay after procedure statements=non-uniform 1668 1669 1670 1671 1672 ; # # Convert index into full step coil pulse masks: 1673 ; # if index@1 1674 ; # if index@0 1675 ; # # index & 3 = 3: 1676 ; # coil0_mask := coil0a_mask 1677 ; # coil1_mask := coil1a_mask 1678 ; # else 1679 ; # # index & 3 = 2: 1680 ; # coil0_mask := coil0a_mask 1681 ; # coil1_mask := coil1b_mask 1682 ; # else 1683 ; # if index@0 1684 ; # # index & 3 = 1: 1685 ; # coil0_mask := coil0b_mask 1686 ; # coil1_mask := coil1b_mask 1687 ; # else 1688 ; # # index & 3 = 0: 1689 ; # coil0_mask := coil0b_mask 1690 ; # coil1_mask := coil1a_mask 1691 1692 1693 ; Configuration bits 1694 ; address = 0x2007, fill = 0x0 1695 ; bg = bg11 (0x3000) 1696 ; cpd = off (0x100) 1697 ; cp = off (0x80) 1698 ; boden = off (0x0) 1699 ; mclre = on (0x20) 1700 ; pwrte = off (0x10) 1701 ; wdte = off (0x0) 1702 ; fosc = hs (0x2) 1703 ; 12722 = 0x31b2 1704 31b2 = __config 12722 1705 ; Define start addresses for data regions 1706 ; Region="shared___globals" Address=32" Size=64 Bytes=9 Bits=1 Available=54 1707 ; Region="shared___globals" Address=32" Size=64 Bytes=9 Bits=1 Available=54 1708 ; Region="shared___globals" Address=32" Size=64 Bytes=9 Bits=1 Available=54 1709 end