radix dec ; Code bank 0; Start address: 0; End address: 2047 org 0 ; Define start addresses for data regions shared___globals equ 112 globals___0 equ 32 globals___1 equ 160 globals___2 equ 272 globals___3 equ 400 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2005 by Wayne C. Gramlich ; # All rights reserved. ; buffer = 'debug' ; line_number = 6 ; library _pic16f876 entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f876' ; line_number = 6 ; processor pic16f876 ; line_number = 7 ; configure_address 0x2007 ; line_number = 8 ; configure_fill 0x0400 ; line_number = 9 ; configure_option cp: off = 0x3030 ; line_number = 10 ; configure_option cp: quarter = 0x2020 ; line_number = 11 ; configure_option cp: half = 0x1010 ; line_number = 12 ; configure_option cp: on = 0x0000 ; line_number = 13 ; configure_option debug: on = 0x000 ; line_number = 14 ; configure_option debug: off = 0x800 ; line_number = 15 ; configure_option wrt: on = 0x200 ; line_number = 16 ; configure_option wrt: off = 0x000 ; line_number = 17 ; configure_option cpd: on = 0x000 ; line_number = 18 ; configure_option cpd: off = 0x100 ; line_number = 19 ; configure_option lvp: on = 0x80 ; line_number = 20 ; configure_option lvp: off = 0x00 ; line_number = 21 ; configure_option boden: on = 0x40 ; line_number = 22 ; configure_option boden: off = 0x00 ; line_number = 23 ; configure_option pwrte: on = 0 ; line_number = 24 ; configure_option pwrte: off = 8 ; line_number = 25 ; configure_option wdte: on = 4 ; line_number = 26 ; configure_option wdte: off = 0 ; line_number = 27 ; configure_option fosc: rc = 3 ; line_number = 28 ; configure_option fosc: hs = 2 ; line_number = 29 ; configure_option fosc: xt = 1 ; line_number = 30 ; configure_option fosc: lp = 0 ; line_number = 31 ; code_bank 0x0 : 0x7ff ; line_number = 32 ; code_bank 0x800 : 0xfff ; line_number = 33 ; code_bank 0x1000 : 0x17ff ; line_number = 34 ; code_bank 0x1800 : 0x1fff ; line_number = 35 ; data_bank 0x0 : 0x7f ; line_number = 36 ; data_bank 0x80 : 0xff ; line_number = 37 ; data_bank 0x100 : 0x17f ; line_number = 38 ; data_bank 0x180 : 0x1ff ; line_number = 39 ; global_region 0x20 : 0x6f ; line_number = 40 ; global_region 0xa0 : 0xef ; line_number = 41 ; global_region 0x110 : 0x16f ; line_number = 42 ; global_region 0x190 : 0x1ff ; line_number = 43 ; shared_region 0x70 : 0x7f ; line_number = 44 ; interrupts_possible ; line_number = 45 ; packages pdip = 28 ; line_number = 46 ; pin mclr, vpp, thv, mclr_unused ; line_number = 47 ; pin_bindings pdip = 1 ; line_number = 48 ; pin ra0_in, ra0_out, an0, ra0_unused ; line_number = 49 ; pin_bindings pdip = 2 ; line_number = 50 ; bind_to _porta@0 ; line_number = 51 ; or_if ra0_in _trisa 1 ; line_number = 52 ; or_if ra0_in _adcon1 7 ; line_number = 53 ; or_if ra0_in _adcon0 0 ; line_number = 54 ; or_if ra0_out _trisa 0 ; line_number = 55 ; or_if ra0_out _adcon1 7 ; line_number = 56 ; or_if ra0_out _adcon0 0 ; line_number = 57 ; pin ra1_in, ra1_out, an1, ra1_unused ; line_number = 58 ; pin_bindings pdip = 3 ; line_number = 59 ; bind_to _porta@1 ; line_number = 60 ; or_if ra1_in _trisa 2 ; line_number = 61 ; or_if ra1_in _adcon1 7 ; line_number = 62 ; or_if ra1_in _adcon0 0 ; line_number = 63 ; or_if ra1_out _trisa 0 ; line_number = 64 ; or_if ra1_out _adcon1 7 ; line_number = 65 ; or_if ra1_out _adcon0 0 ; line_number = 66 ; pin ra2_in, ra2_out, an2, vref_minus, ra2_unused ; line_number = 67 ; pin_bindings pdip = 4 ; line_number = 68 ; bind_to _porta@2 ; line_number = 69 ; or_if ra2_in _trisa 4 ; line_number = 70 ; or_if ra2_in _adcon1 7 ; line_number = 71 ; or_if ra2_in _adcon0 0 ; line_number = 72 ; or_if ra2_out _trisa 0 ; line_number = 73 ; or_if ra2_out _adcon1 7 ; line_number = 74 ; or_if ra2_out _adcon0 0 ; line_number = 75 ; pin ra3_in, ra3_out, an3, vrev_plus, ra3_unused ; line_number = 76 ; pin_bindings pdip = 5 ; line_number = 77 ; bind_to _porta@3 ; line_number = 78 ; or_if ra3_in _trisa 8 ; line_number = 79 ; or_if ra3_in _adcon1 7 ; line_number = 80 ; or_if ra3_in _adcon0 0 ; line_number = 81 ; or_if ra3_out _trisa 0 ; line_number = 82 ; or_if ra3_out _adcon1 7 ; line_number = 83 ; or_if ra3_out _adcon0 0 ; line_number = 84 ; pin ra4_in, ra4_out, t0cki, ra4_unused ; line_number = 85 ; pin_bindings pdip = 6 ; line_number = 86 ; bind_to _porta@4 ; line_number = 87 ; or_if ra4_in _trisa 16 ; line_number = 88 ; or_if ra4_in _adcon1 7 ; line_number = 89 ; or_if ra4_in _adcon0 0 ; line_number = 90 ; or_if ra4_out _trisa 0 ; line_number = 91 ; or_if ra4_out _adcon1 7 ; line_number = 92 ; or_if ra4_out _adcon0 0 ; line_number = 93 ; pin ra5_in, ra5_out, an4, ra5_unused ; line_number = 94 ; pin_bindings pdip = 7 ; line_number = 95 ; bind_to _porta@5 ; line_number = 96 ; or_if ra5_in _trisa 32 ; line_number = 97 ; or_if ra5_in _adcon1 7 ; line_number = 98 ; or_if ra5_in _adcon1 0 ; line_number = 99 ; or_if ra5_out _trisa 0 ; line_number = 100 ; or_if ra5_out _adcon1 7 ; line_number = 101 ; or_if ra5_out _adcon0 0 ; line_number = 102 ; pin vss, ground ; line_number = 103 ; pin_bindings pdip = 8 ; line_number = 104 ; pin osc1, clkin ; line_number = 105 ; pin_bindings pdip = 9 ; line_number = 106 ; pin osc2, clkout ; line_number = 107 ; pin_bindings pdip = 10 ; line_number = 108 ; pin rc0_in, rc0_out, t1oso, t1cki, rc0_unused ; line_number = 109 ; pin_bindings pdip = 11 ; line_number = 110 ; bind_to _portc@0 ; line_number = 111 ; or_if rc0_in _trisc 1 ; line_number = 112 ; or_if rc0_in _adcon1 7 ; line_number = 113 ; or_if rc0_in _adcon0 0 ; line_number = 114 ; or_if rc0_out _trisc 0 ; line_number = 115 ; or_if rc0_out _adcon1 7 ; line_number = 116 ; or_if rc0_out _adcon0 0 ; line_number = 117 ; pin rc1_in, rc1_out, t1osi, ccp2, rc1_unused ; line_number = 118 ; pin_bindings pdip = 12 ; line_number = 119 ; bind_to _portc@1 ; line_number = 120 ; or_if rc1_in _trisc 2 ; line_number = 121 ; or_if rc1_in _adcon1 7 ; line_number = 122 ; or_if rc1_in _adcon0 0 ; line_number = 123 ; or_if rc1_out _trisc 0 ; line_number = 124 ; or_if rc1_out _adcon1 7 ; line_number = 125 ; or_if rc1_out _adcon0 0 ; line_number = 126 ; pin rc2_in, rc2_out, ccp1, rc2_unused ; line_number = 127 ; pin_bindings pdip = 13 ; line_number = 128 ; bind_to _portc@2 ; line_number = 129 ; or_if rc2_in _trisc 4 ; line_number = 130 ; or_if rc2_in _adcon1 7 ; line_number = 131 ; or_if rc2_in _adcon0 0 ; line_number = 132 ; or_if rc2_out _trisc 0 ; line_number = 133 ; or_if rc2_out _adcon1 7 ; line_number = 134 ; or_if rc2_out _adcon0 0 ; line_number = 135 ; pin rc3_in, rc3_out, sck, scl, rc3_unused ; line_number = 136 ; pin_bindings pdip = 14 ; line_number = 137 ; bind_to _portc@3 ; line_number = 138 ; or_if rc3_in _trisc 8 ; line_number = 139 ; or_if rc3_in _adcon1 7 ; line_number = 140 ; or_if rc3_in _adcon0 0 ; line_number = 141 ; or_if rc3_out _trisc 0 ; line_number = 142 ; or_if rc3_out _adcon1 7 ; line_number = 143 ; or_if rc3_out _adcon0 0 ; line_number = 144 ; pin rc4_in, rc4_out, sdi, sda, rc4_unused ; line_number = 145 ; pin_bindings pdip = 15 ; line_number = 146 ; bind_to _portc@4 ; line_number = 147 ; or_if rc4_in _trisc 16 ; line_number = 148 ; or_if rc4_in _adcon1 7 ; line_number = 149 ; or_if rc4_in _adcon0 0 ; line_number = 150 ; or_if rc4_out _trisc 0 ; line_number = 151 ; or_if rc4_out _adcon1 7 ; line_number = 152 ; or_if rc4_out _adcon0 0 ; line_number = 153 ; pin rc5_in, rc5_out, sdo, rc5_unused ; line_number = 154 ; pin_bindings pdip = 16 ; line_number = 155 ; bind_to _portc@5 ; line_number = 156 ; or_if rc5_in _trisc 32 ; line_number = 157 ; or_if rc5_in _adcon1 7 ; line_number = 158 ; or_if rc5_in _adcon0 0 ; line_number = 159 ; or_if rc5_out _trisc 0 ; line_number = 160 ; or_if rc5_out _adcon1 7 ; line_number = 161 ; or_if rc5_out _adcon0 0 ; line_number = 162 ; pin rc6_in, rc6_out, tx, ck, rc6_unused ; line_number = 163 ; pin_bindings pdip = 17 ; line_number = 164 ; bind_to _portc@6 ; line_number = 165 ; or_if rc6_in _trisc 64 ; line_number = 166 ; or_if rc6_in _adcon1 7 ; line_number = 167 ; or_if rc6_in _adcon0 0 ; line_number = 168 ; or_if rc6_out _trisc 0 ; line_number = 169 ; or_if rc6_out _adcon1 7 ; line_number = 170 ; or_if rc6_out _adcon0 0 ; line_number = 171 ; or_if tx _trisc 0 ; line_number = 172 ; or_if tx _adcon1 7 ; line_number = 173 ; or_if tx _adcon0 0 ; line_number = 174 ; pin rc7_in, rc7_out, rx, dt, rc7_unused ; line_number = 175 ; pin_bindings pdip = 18 ; line_number = 176 ; bind_to _portc@7 ; line_number = 177 ; or_if rc7_in _trisc 128 ; line_number = 178 ; or_if rc7_in _adcon1 7 ; line_number = 179 ; or_if rc7_in _adcon0 0 ; line_number = 180 ; or_if rx _trisc 128 ; line_number = 181 ; or_if rx _adcon1 7 ; line_number = 182 ; or_if rx _adcon0 0 ; line_number = 183 ; or_if rc7_out _trisc 0 ; line_number = 184 ; or_if rc7_out _adcon1 7 ; line_number = 185 ; or_if rc7_out _adcon0 0 ; line_number = 186 ; pin vss2, ground2 ; line_number = 187 ; pin_bindings pdip = 19 ; line_number = 188 ; pin vdd, power_supply ; line_number = 189 ; pin_bindings pdip = 20 ; line_number = 190 ; pin rb0_in, rb0_out, int, rb0_unused ; line_number = 191 ; pin_bindings pdip = 21 ; line_number = 192 ; bind_to _portb@0 ; line_number = 193 ; or_if rb0_in _trisb 1 ; line_number = 194 ; or_if rb0_in _adcon1 7 ; line_number = 195 ; or_if rb0_in _adcon0 0 ; line_number = 196 ; or_if rb0_out _trisb 0 ; line_number = 197 ; or_if rb0_out _adcon1 7 ; line_number = 198 ; or_if rb0_out _adcon0 0 ; line_number = 199 ; pin rb1_in, rb1_out, rb1_unused ; line_number = 200 ; pin_bindings pdip = 22 ; line_number = 201 ; bind_to _portb@1 ; line_number = 202 ; or_if rb1_in _trisb 2 ; line_number = 203 ; or_if rb1_in _adcon1 7 ; line_number = 204 ; or_if rb1_in _adcon0 0 ; line_number = 205 ; or_if rb1_out _trisb 0 ; line_number = 206 ; or_if rb1_out _adcon1 7 ; line_number = 207 ; or_if rb1_out _adcon0 0 ; line_number = 208 ; pin rb2_in, rb2_out, rb2_unused ; line_number = 209 ; pin_bindings pdip = 23 ; line_number = 210 ; bind_to _portb@2 ; line_number = 211 ; or_if rb2_in _trisb 4 ; line_number = 212 ; or_if rb2_in _adcon1 7 ; line_number = 213 ; or_if rb2_in _adcon0 0 ; line_number = 214 ; or_if rb2_out _trisb 0 ; line_number = 215 ; or_if rb2_out _adcon1 7 ; line_number = 216 ; or_if rb2_out _adcon0 0 ; line_number = 217 ; pin rb3_in, rb3_out, pgm, rb3_unused ; line_number = 218 ; pin_bindings pdip = 24 ; line_number = 219 ; bind_to _portb@3 ; line_number = 220 ; or_if rb3_in _trisb 8 ; line_number = 221 ; or_if rb3_in _adcon1 7 ; line_number = 222 ; or_if rb3_out _trisb 0 ; line_number = 223 ; or_if rb3_out _adcon1 7 ; line_number = 224 ; pin rb4_in, rb4_out, rb4_unused ; line_number = 225 ; pin_bindings pdip = 25 ; line_number = 226 ; bind_to _portb@4 ; line_number = 227 ; or_if rb4_in _trisb 16 ; line_number = 228 ; or_if rb4_in _adcon1 7 ; line_number = 229 ; or_if rb4_in _adcon0 0 ; line_number = 230 ; or_if rb4_out _trisb 0 ; line_number = 231 ; or_if rb4_out _adcon1 7 ; line_number = 232 ; or_if rb4_out _adcon0 0 ; line_number = 233 ; pin rb5_in, rb5_out, rb5_unused ; line_number = 234 ; pin_bindings pdip = 26 ; line_number = 235 ; bind_to _portb@5 ; line_number = 236 ; or_if rb5_in _trisb 32 ; line_number = 237 ; or_if rb5_in _adcon1 7 ; line_number = 238 ; or_if rb5_in _adcon0 0 ; line_number = 239 ; or_if rb5_out _trisb 0 ; line_number = 240 ; or_if rb5_out _adcon1 7 ; line_number = 241 ; or_if rb5_out _adcon0 0 ; line_number = 242 ; pin rb6_in, rb6_out, pgc, rb6_unused ; line_number = 243 ; pin_bindings pdip = 27 ; line_number = 244 ; bind_to _portb@6 ; line_number = 245 ; or_if rb6_in _trisb 64 ; line_number = 246 ; or_if rb6_in _adcon1 7 ; line_number = 247 ; or_if rb6_in _adcon0 0 ; line_number = 248 ; or_if rb6_out _trisb 0 ; line_number = 249 ; or_if rb6_out _adcon1 7 ; line_number = 250 ; or_if rb6_out _adcon0 0 ; line_number = 251 ; pin rb7_in, rb7_out, pgd, rb7_unused ; line_number = 252 ; pin_bindings pdip = 28 ; line_number = 253 ; bind_to _portb@7 ; line_number = 254 ; or_if rb7_in _trisb 128 ; line_number = 255 ; or_if rb7_in _adcon1 7 ; line_number = 256 ; or_if rb7_in _adcon0 0 ; line_number = 257 ; or_if rb7_out _trisb 0 ; line_number = 258 ; or_if rb7_out _adcon1 7 ; line_number = 259 ; or_if rb7_out _adcon0 0 ; # Register and pin definitions: ; line_number = 266 ; library _pic16f87x entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # Common declarations for PIC16F87x series microcontrollers: ; # Register and pin definitions: ; # Bank 0: ; buffer = '_pic16f87x' ; line_number = 12 ; register _indf = _indf equ 0 ; line_number = 14 ; register _tmr0 = _tmr0 equ 1 ; line_number = 16 ; register _pcl = _pcl equ 2 ; line_number = 18 ; register _status = _status equ 3 ; line_number = 19 ; bind _irp = _status@7 _irp___byte equ _status _irp___bit equ 7 ; line_number = 20 ; bind _rp1 = _status@6 _rp1___byte equ _status _rp1___bit equ 6 ; line_number = 21 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 22 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 23 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 24 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 25 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 27 ; register _fsr = _fsr equ 4 ; line_number = 29 ; register _porta = _porta equ 5 ; line_number = 31 ; register _portb = _portb equ 6 ; line_number = 33 ; register _portc = _portc equ 7 ; line_number = 35 ; register _pclath = _pclath equ 10 ; line_number = 37 ; register _intcon = _intcon equ 11 ; line_number = 38 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 39 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 40 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 41 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 42 ; bind _rbie = _intcon@3 _rbie___byte equ _intcon _rbie___bit equ 3 ; line_number = 43 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 44 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 45 ; bind _rbf = _intcon@0 _rbf___byte equ _intcon _rbf___bit equ 0 ; line_number = 47 ; register _pir1 = _pir1 equ 12 ; line_number = 48 ; bind _pspif = _pir1@7 _pspif___byte equ _pir1 _pspif___bit equ 7 ; line_number = 49 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 50 ; bind _rcif = _pir1@5 _rcif___byte equ _pir1 _rcif___bit equ 5 ; line_number = 51 ; bind _txif = _pir1@4 _txif___byte equ _pir1 _txif___bit equ 4 ; line_number = 52 ; bind _sspif = _pir1@3 _sspif___byte equ _pir1 _sspif___bit equ 3 ; line_number = 53 ; bind _ccpif = _pir1@2 _ccpif___byte equ _pir1 _ccpif___bit equ 2 ; line_number = 54 ; bind _tmr2if = _pir1@1 _tmr2if___byte equ _pir1 _tmr2if___bit equ 1 ; line_number = 55 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 57 ; register _pir2 = _pir2 equ 13 ; line_number = 58 ; bind _eeif = _pir2@4 _eeif___byte equ _pir2 _eeif___bit equ 4 ; line_number = 59 ; bind _bclif = _pir2@3 _bclif___byte equ _pir2 _bclif___bit equ 3 ; line_number = 60 ; bind _ccp2if = _pir2@0 _ccp2if___byte equ _pir2 _ccp2if___bit equ 0 ; line_number = 62 ; register _tmr1l = _tmr1l equ 14 ; line_number = 64 ; register _tmr1h = _tmr1h equ 15 ; line_number = 66 ; register _t1con = _t1con equ 16 ; line_number = 67 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 68 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 69 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 70 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 71 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 72 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 74 ; register _tmr2 = _tmr2 equ 17 ; line_number = 76 ; register _t2con = _t2con equ 18 ; line_number = 77 ; bind _toutps3 = _t2con@6 _toutps3___byte equ _t2con _toutps3___bit equ 6 ; line_number = 78 ; bind _toutps2 = _t2con@5 _toutps2___byte equ _t2con _toutps2___bit equ 5 ; line_number = 79 ; bind _toutps1 = _t2con@4 _toutps1___byte equ _t2con _toutps1___bit equ 4 ; line_number = 80 ; bind _toutps0 = _t2con@3 _toutps0___byte equ _t2con _toutps0___bit equ 3 ; line_number = 81 ; bind _tmr2on = _t2con@2 _tmr2on___byte equ _t2con _tmr2on___bit equ 2 ; line_number = 82 ; bind _t2ckps1 = _t2con@1 _t2ckps1___byte equ _t2con _t2ckps1___bit equ 1 ; line_number = 83 ; bind _t2ckps0 = _t2con@0 _t2ckps0___byte equ _t2con _t2ckps0___bit equ 0 ; line_number = 85 ; register _sspbuf = _sspbuf equ 19 ; line_number = 87 ; register _sspcon = _sspcon equ 20 ; line_number = 88 ; bind _wcol = _sspcon@7 _wcol___byte equ _sspcon _wcol___bit equ 7 ; line_number = 89 ; bind _sspov = _sspcon@6 _sspov___byte equ _sspcon _sspov___bit equ 6 ; line_number = 90 ; bind _sspen = _sspcon@5 _sspen___byte equ _sspcon _sspen___bit equ 5 ; line_number = 91 ; bind _ckp = _sspcon@4 _ckp___byte equ _sspcon _ckp___bit equ 4 ; line_number = 92 ; bind _sspm3 = _sspcon@3 _sspm3___byte equ _sspcon _sspm3___bit equ 3 ; line_number = 93 ; bind _sspm2 = _sspcon@2 _sspm2___byte equ _sspcon _sspm2___bit equ 2 ; line_number = 94 ; bind _sspm1 = _sspcon@1 _sspm1___byte equ _sspcon _sspm1___bit equ 1 ; line_number = 95 ; bind _sspm0 = _sspcon@0 _sspm0___byte equ _sspcon _sspm0___bit equ 0 ; line_number = 97 ; register _ccpr1l = _ccpr1l equ 21 ; line_number = 99 ; register _ccpr1h = _ccpr1h equ 22 ; line_number = 101 ; register _ccp1con = _ccp1con equ 23 ; line_number = 102 ; bind _ccp1x = _ccp1con@5 _ccp1x___byte equ _ccp1con _ccp1x___bit equ 5 ; line_number = 103 ; bind _ccp1y = _ccp1con@4 _ccp1y___byte equ _ccp1con _ccp1y___bit equ 4 ; line_number = 104 ; bind _ccp1m3 = _ccp1con@3 _ccp1m3___byte equ _ccp1con _ccp1m3___bit equ 3 ; line_number = 105 ; bind _ccp1m2 = _ccp1con@2 _ccp1m2___byte equ _ccp1con _ccp1m2___bit equ 2 ; line_number = 106 ; bind _ccp1m1 = _ccp1con@1 _ccp1m1___byte equ _ccp1con _ccp1m1___bit equ 1 ; line_number = 107 ; bind _ccp1m0 = _ccp1con@0 _ccp1m0___byte equ _ccp1con _ccp1m0___bit equ 0 ; line_number = 109 ; register _rcsta = _rcsta equ 24 ; line_number = 110 ; bind _spen = _rcsta@7 _spen___byte equ _rcsta _spen___bit equ 7 ; line_number = 111 ; bind _rx9 = _rcsta@6 _rx9___byte equ _rcsta _rx9___bit equ 6 ; line_number = 112 ; bind _sren = _rcsta@5 _sren___byte equ _rcsta _sren___bit equ 5 ; line_number = 113 ; bind _cren = _rcsta@4 _cren___byte equ _rcsta _cren___bit equ 4 ; line_number = 114 ; bind _adden = _rcsta@3 _adden___byte equ _rcsta _adden___bit equ 3 ; line_number = 115 ; bind _ferr = _rcsta@2 _ferr___byte equ _rcsta _ferr___bit equ 2 ; line_number = 116 ; bind _oerr = _rcsta@1 _oerr___byte equ _rcsta _oerr___bit equ 1 ; line_number = 117 ; bind _rx9d = _rcsta@0 _rx9d___byte equ _rcsta _rx9d___bit equ 0 ; line_number = 119 ; register _txreg = _txreg equ 25 ; line_number = 121 ; register _rcreg = _rcreg equ 26 ; line_number = 123 ; register _ccpr2l = _ccpr2l equ 27 ; line_number = 125 ; register _ccpr2h = _ccpr2h equ 28 ; line_number = 127 ; register _ccp2con = _ccp2con equ 29 ; line_number = 128 ; bind _ccp2x = _ccp2con@5 _ccp2x___byte equ _ccp2con _ccp2x___bit equ 5 ; line_number = 129 ; bind _ccp2y = _ccp2con@4 _ccp2y___byte equ _ccp2con _ccp2y___bit equ 4 ; line_number = 130 ; bind _ccp2m3 = _ccp2con@3 _ccp2m3___byte equ _ccp2con _ccp2m3___bit equ 3 ; line_number = 131 ; bind _ccp2m2 = _ccp2con@2 _ccp2m2___byte equ _ccp2con _ccp2m2___bit equ 2 ; line_number = 132 ; bind _ccp2m1 = _ccp2con@1 _ccp2m1___byte equ _ccp2con _ccp2m1___bit equ 1 ; line_number = 133 ; bind _ccp2m0 = _ccp2con@0 _ccp2m0___byte equ _ccp2con _ccp2m0___bit equ 0 ; line_number = 135 ; register _adresh = _adresh equ 30 ; line_number = 137 ; register _adcon0 = _adcon0 equ 31 ; line_number = 138 ; bind _adcs1 = _adcon0@7 _adcs1___byte equ _adcon0 _adcs1___bit equ 7 ; line_number = 139 ; bind _adcs0 = _adcon0@6 _adcs0___byte equ _adcon0 _adcs0___bit equ 6 ; line_number = 140 ; bind _chs2 = _adcon0@5 _chs2___byte equ _adcon0 _chs2___bit equ 5 ; line_number = 141 ; bind _chs1 = _adcon0@4 _chs1___byte equ _adcon0 _chs1___bit equ 4 ; line_number = 142 ; bind _chs0 = _adcon0@3 _chs0___byte equ _adcon0 _chs0___bit equ 3 ; line_number = 143 ; bind _go_done = _adcon0@2 _go_done___byte equ _adcon0 _go_done___bit equ 2 ; line_number = 144 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Bank 1: ; line_number = 148 ; register _option_reg = _option_reg equ 129 ; line_number = 149 ; bind _rbpu = _option_reg@7 _rbpu___byte equ _option_reg _rbpu___bit equ 7 ; line_number = 150 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 151 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 152 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 153 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 154 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 155 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 156 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 158 ; register _trisa = _trisa equ 133 ; line_number = 160 ; register _trisb = _trisb equ 134 ; line_number = 162 ; register _trisc = _trisc equ 135 ; line_number = 164 ; register _pie1 = _pie1 equ 140 ; line_number = 165 ; bind _pspie = _pie1@7 _pspie___byte equ _pie1 _pspie___bit equ 7 ; line_number = 166 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 167 ; bind _rcie = _pie1@5 _rcie___byte equ _pie1 _rcie___bit equ 5 ; line_number = 168 ; bind _txie = _pie1@4 _txie___byte equ _pie1 _txie___bit equ 4 ; line_number = 169 ; bind _sspie = _pie1@3 _sspie___byte equ _pie1 _sspie___bit equ 3 ; line_number = 170 ; bind _ccp1ie = _pie1@2 _ccp1ie___byte equ _pie1 _ccp1ie___bit equ 2 ; line_number = 171 ; bind _tmr2ie = _pie1@1 _tmr2ie___byte equ _pie1 _tmr2ie___bit equ 1 ; line_number = 172 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 174 ; register _pie2 = _pie2 equ 141 ; line_number = 175 ; bind _eeie = _pie2@4 _eeie___byte equ _pie2 _eeie___bit equ 4 ; line_number = 176 ; bind _bcie = _pie2@3 _bcie___byte equ _pie2 _bcie___bit equ 3 ; line_number = 177 ; bind _ccp2ie = _pie2@0 _ccp2ie___byte equ _pie2 _ccp2ie___bit equ 0 ; line_number = 179 ; register _pcon = _pcon equ 142 ; line_number = 180 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 181 ; bind _bor = _pcon@0 _bor___byte equ _pcon _bor___bit equ 0 ; line_number = 183 ; register _sspcon2 = _sspcon2 equ 145 ; line_number = 184 ; bind _gcen = _sspcon2@7 _gcen___byte equ _sspcon2 _gcen___bit equ 7 ; line_number = 185 ; bind _ackstat = _sspcon2@6 _ackstat___byte equ _sspcon2 _ackstat___bit equ 6 ; line_number = 186 ; bind _ackdt = _sspcon2@5 _ackdt___byte equ _sspcon2 _ackdt___bit equ 5 ; line_number = 187 ; bind _acken = _sspcon2@4 _acken___byte equ _sspcon2 _acken___bit equ 4 ; line_number = 188 ; bind _rcen = _sspcon2@3 _rcen___byte equ _sspcon2 _rcen___bit equ 3 ; line_number = 189 ; bind _pen = _sspcon2@2 _pen___byte equ _sspcon2 _pen___bit equ 2 ; line_number = 190 ; bind _rsen = _sspcon2@1 _rsen___byte equ _sspcon2 _rsen___bit equ 1 ; line_number = 191 ; bind _sen = _sspcon2@0 _sen___byte equ _sspcon2 _sen___bit equ 0 ; line_number = 193 ; register _pr2 = _pr2 equ 146 ; line_number = 195 ; register _sspadd = _sspadd equ 147 ; line_number = 197 ; register _sspstat = _sspstat equ 148 ; line_number = 198 ; bind _smp = _sspstat@7 _smp___byte equ _sspstat _smp___bit equ 7 ; line_number = 199 ; bind _cke = _sspstat@6 _cke___byte equ _sspstat _cke___bit equ 6 ; line_number = 200 ; bind _da = _sspstat@5 _da___byte equ _sspstat _da___bit equ 5 ; line_number = 201 ; bind _p = _sspstat@4 _p___byte equ _sspstat _p___bit equ 4 ; line_number = 202 ; bind _s = _sspstat@3 _s___byte equ _sspstat _s___bit equ 3 ; line_number = 203 ; bind _rw = _sspstat@2 _rw___byte equ _sspstat _rw___bit equ 2 ; line_number = 204 ; bind _ua = _sspstat@1 _ua___byte equ _sspstat _ua___bit equ 1 ; line_number = 205 ; bind _bf = _sspstat@0 _bf___byte equ _sspstat _bf___bit equ 0 ; line_number = 207 ; register _txsta = _txsta equ 152 ; line_number = 208 ; bind _csrc = _txsta@7 _csrc___byte equ _txsta _csrc___bit equ 7 ; line_number = 209 ; bind _tx9 = _txsta@6 _tx9___byte equ _txsta _tx9___bit equ 6 ; line_number = 210 ; bind _txen = _txsta@5 _txen___byte equ _txsta _txen___bit equ 5 ; line_number = 211 ; bind _sync = _txsta@4 _sync___byte equ _txsta _sync___bit equ 4 ; line_number = 212 ; bind _brgh = _txsta@2 _brgh___byte equ _txsta _brgh___bit equ 2 ; line_number = 213 ; bind _trmt = _txsta@1 _trmt___byte equ _txsta _trmt___bit equ 1 ; line_number = 214 ; bind _tx9d = _txsta@0 _tx9d___byte equ _txsta _tx9d___bit equ 0 ; line_number = 216 ; register _spbrg = _spbrg equ 153 ; line_number = 218 ; register _adresl = _adresl equ 158 ; line_number = 220 ; register _adcon1 = _adcon1 equ 159 ; line_number = 221 ; bind _adfm = _adcon1@7 _adfm___byte equ _adcon1 _adfm___bit equ 7 ; line_number = 222 ; bind _pcfg3 = _adcon1@3 _pcfg3___byte equ _adcon1 _pcfg3___bit equ 3 ; line_number = 223 ; bind _pcfg2 = _adcon1@2 _pcfg2___byte equ _adcon1 _pcfg2___bit equ 2 ; line_number = 224 ; bind _pcfg1 = _adcon1@1 _pcfg1___byte equ _adcon1 _pcfg1___bit equ 1 ; line_number = 225 ; bind _pcfg0 = _adcon1@0 _pcfg0___byte equ _adcon1 _pcfg0___bit equ 0 ; # Bank 2: ; line_number = 229 ; register _eedata = _eedata equ 268 ; line_number = 231 ; register _eeadr = _eeadr equ 269 ; line_number = 233 ; register _eedath = _eedath equ 270 ; line_number = 235 ; register _eeadrh = _eeadrh equ 271 ; # Bank 3: ; line_number = 239 ; register _eecon1 = _eecon1 equ 396 ; line_number = 240 ; bind _eepgd = _eecon1@7 _eepgd___byte equ _eecon1 _eepgd___bit equ 7 ; line_number = 241 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 242 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 243 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 244 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 246 ; register _eecon2 = _eecon2 equ 397 ; buffer = '_pic16f876' ; line_number = 266 ; library _pic16f87x exited ; buffer = 'debug' ; line_number = 6 ; library _pic16f876 exited ; line_number = 7 ; library _uart entered ; # Copyright (c) 2004 by Wayne C. Gramlich. ; # All rights reserved. ; # This library contains some procedures for accessing the UART. ; Delaying code generation for procedure _uart_byte_safe_get ; Delaying code generation for procedure _uart_byte_get ; Delaying code generation for procedure _uart_hex_put ; Delaying code generation for procedure _uart_nibble_put ; Delaying code generation for procedure _uart_space_put ; Delaying code generation for procedure _uart_crlf_put ; Delaying code generation for procedure _uart_byte_put ; line_number = 7 ; library _uart exited ; line_number = 9 ; package pdip ; line_number = 10 ; pin 1 = mclr ; line_number = 11 ; pin 2 = ra0_in, name = en en___byte equ _porta en___bit equ 0 ; line_number = 12 ; pin 3 = ra1_unused ; line_number = 13 ; pin 4 = ra2_out, name = x_dir x_dir___byte equ _porta x_dir___bit equ 2 ; line_number = 14 ; pin 5 = ra3_out, name = fault fault___byte equ _porta fault___bit equ 3 ; line_number = 15 ; pin 6 = ra4_unused ; line_number = 16 ; pin 7 = ra5_out, name = x_step x_step___byte equ _porta x_step___bit equ 5 ; line_number = 17 ; pin 8 = vss ; line_number = 18 ; pin 9 = clkin ; line_number = 19 ; pin 10 = osc2 ; line_number = 20 ; pin 11 = rc0_out, name = y_dir y_dir___byte equ _portc y_dir___bit equ 0 ; line_number = 21 ; pin 12 = rc1_out, name = y_step y_step___byte equ _portc y_step___bit equ 1 ; line_number = 22 ; pin 13 = rc2_out, name = z_dir z_dir___byte equ _portc z_dir___bit equ 2 ; line_number = 23 ; pin 14 = rc3_unused ; line_number = 24 ; pin 15 = rc4_unused ; line_number = 25 ; pin 16 = rc5_unused ; line_number = 26 ; pin 17 = tx ; line_number = 27 ; pin 18 = rx ; line_number = 28 ; pin 19 = vss2 ; line_number = 29 ; pin 20 = vdd ; line_number = 30 ; pin 21 = rb0_out, name = z_step z_step___byte equ _portb z_step___bit equ 0 ; line_number = 31 ; pin 22 = rb1_out, name = a_dir a_dir___byte equ _portb a_dir___bit equ 1 ; line_number = 32 ; pin 23 = rb2_out, name = a_step a_step___byte equ _portb a_step___bit equ 2 ; line_number = 33 ; pin 24 = rb3_in, name = probe probe___byte equ _portb probe___bit equ 3 ; line_number = 34 ; pin 25 = rb4_in, name = detect detect___byte equ _portb detect___bit equ 4 ; line_number = 35 ; pin 26 = rb5_out, name = mode mode___byte equ _portb mode___bit equ 5 ; line_number = 36 ; pin 27 = rb6_out, name = q_dir q_dir___byte equ _portb q_dir___bit equ 6 ; line_number = 37 ; pin 28 = rb7_out, name = q_step q_step___byte equ _portb q_step___bit equ 7 ; line_number = 42 ; constant microsecond = 5 microsecond equ 5 ; line_number = 43 ; constant delay_amount = 10 * microsecond delay_amount equ 50 ; line_number = 45 ; global command byte command equ globals___0+3 ; line_number = 47 ; origin 0 org 0 ; line_number = 49 ; procedure main main: ; Initialize some registers clrf _adcon0 movlw 7 bsf __rp0___byte, __rp0___bit movwf _adcon1 movlw 1 movwf _trisa movlw 24 movwf _trisb movlw 128 movwf _trisc ; arguments_none ; line_number = 51 ; returns_nothing ; # Turn of general interrupts: ; before procedure statements delay=non-uniform, bit states=(data:00=>01 code:00=>00) ; line_number = 54 ; _gie := 0 bcf _gie___byte, _gie___bit ; # Initilize serial port: ; # Do Baud Rate selection and asynch. serial port enable: ; # Prescaler = low: ; line_number = 60 ; _brgh := 1 bsf _brgh___byte, _brgh___bit ; # Baud rate = 19200 Baud: ; line_number = 62 ; _spbrg := 64 movlw 64 movwf _spbrg ; # Asynchronous mode: ; line_number = 64 ; _sync := 0 bcf _sync___byte, _sync___bit ; # Serial port enable: ; line_number = 66 ; _spen := 1 bcf __rp0___byte, __rp0___bit bsf _spen___byte, _spen___bit ; line_number = 67 ; _txif := 0 bcf _txif___byte, _txif___bit ; # Enable the transmitter: ; # 8-bit mode: ; line_number = 71 ; _tx9 := 0 bsf __rp0___byte, __rp0___bit bcf _tx9___byte, _tx9___bit ; # Enable transmitter: ; line_number = 73 ; _txen := 1 bsf _txen___byte, _txen___bit ; # Enable the receiver: ; # 8-bit mode: ; line_number = 77 ; _rx9 := 0 bcf __rp0___byte, __rp0___bit bcf _rx9___byte, _rx9___bit ; # Disable address: ; line_number = 79 ; _adden := 0 bcf _adden___byte, _adden___bit ; # Continuous receive enable: ; line_number = 81 ; _cren := 1 bsf _cren___byte, _cren___bit ; # Serial receive enable: ; line_number = 83 ; _sren := 1 bsf _sren___byte, _sren___bit ; line_number = 85 ; call _uart_crlf_put() call _uart_crlf_put ; line_number = 86 ; call _uart_byte_put('D') movlw 68 call _uart_byte_put ; line_number = 87 ; call _uart_byte_put('e') movlw 101 call _uart_byte_put ; line_number = 88 ; call _uart_byte_put('b') movlw 98 call _uart_byte_put ; line_number = 89 ; call _uart_byte_put('u') movlw 117 call _uart_byte_put ; line_number = 90 ; call _uart_byte_put('g') movlw 103 call _uart_byte_put ; line_number = 91 ; call _uart_crlf_put() call _uart_crlf_put ; # Initialize step and direction: ; line_number = 94 ; a_step := 0 bcf a_step___byte, a_step___bit ; line_number = 95 ; a_dir := 0 bcf a_dir___byte, a_dir___bit ; line_number = 96 ; x_step := 0 bcf x_step___byte, x_step___bit ; line_number = 97 ; x_dir := 0 bcf x_dir___byte, x_dir___bit ; line_number = 98 ; y_step := 0 bcf y_step___byte, y_step___bit ; line_number = 99 ; y_dir := 0 bcf y_dir___byte, y_dir___bit ; line_number = 100 ; z_step := 0 bcf z_step___byte, z_step___bit ; line_number = 101 ; z_dir := 0 bcf z_dir___byte, z_dir___bit ; # Command loop: ; line_number = 104 ; loop_forever start main__1: ; # Wait for a character: ; line_number = 106 ; command := _uart_byte_get() call _uart_byte_get movwf command ; line_number = 107 ; if command = 'A' start ; Left minus Right movlw 191 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code_size > 1 && false_code_size > 1 btfss __z___byte, __z___bit goto main__18 ; # Increment A: ; line_number = 109 ; a_dir := 1 bsf a_dir___byte, a_dir___bit ; line_number = 110 ; a_step := 1 bsf a_step___byte, a_step___bit ; Recombine code1_bit_states != code2_bit_states goto main__19 main__18: ; line_number = 111 ; Left minus Right movlw 168 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code_size > 1 && false_code_size > 1 btfss __z___byte, __z___bit goto main__16 ; # Increment X: ; line_number = 113 ; x_dir := 1 bsf x_dir___byte, x_dir___bit ; line_number = 114 ; x_step := 1 bsf x_step___byte, x_step___bit ; Recombine code1_bit_states != code2_bit_states goto main__17 main__16: ; line_number = 115 ; Left minus Right movlw 167 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code_size > 1 && false_code_size > 1 btfss __z___byte, __z___bit goto main__14 ; # Increment Y: ; line_number = 117 ; y_dir := 1 bsf y_dir___byte, y_dir___bit ; line_number = 118 ; y_step := 1 bsf y_step___byte, y_step___bit ; Recombine code1_bit_states != code2_bit_states goto main__15 main__14: ; line_number = 119 ; Left minus Right movlw 166 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code_size > 1 && false_code_size > 1 btfss __z___byte, __z___bit goto main__12 ; # Increment Z: ; line_number = 121 ; z_dir := 1 bsf z_dir___byte, z_dir___bit ; line_number = 122 ; z_step := 1 bsf z_step___byte, z_step___bit ; Recombine code1_bit_states != code2_bit_states goto main__13 main__12: ; line_number = 123 ; Left minus Right movlw 159 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code_size > 1 && false_code_size > 1 btfss __z___byte, __z___bit goto main__10 ; # Decrement A: ; line_number = 125 ; a_dir := 0 bcf a_dir___byte, a_dir___bit ; line_number = 126 ; a_step := 1 bsf a_step___byte, a_step___bit ; Recombine code1_bit_states != code2_bit_states goto main__11 main__10: ; line_number = 127 ; Left minus Right movlw 136 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code_size > 1 && false_code_size > 1 btfss __z___byte, __z___bit goto main__8 ; # Decrement X: ; line_number = 129 ; x_dir := 0 bcf x_dir___byte, x_dir___bit ; line_number = 130 ; x_step := 1 bsf x_step___byte, x_step___bit ; Recombine code1_bit_states != code2_bit_states goto main__9 main__8: ; line_number = 131 ; Left minus Right movlw 135 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code_size > 1 && false_code_size > 1 btfss __z___byte, __z___bit goto main__6 ; # Decrement Y: ; line_number = 133 ; y_dir := 0 bcf y_dir___byte, y_dir___bit ; line_number = 134 ; y_step := 1 bsf y_step___byte, y_step___bit ; Recombine code1_bit_states != code2_bit_states goto main__7 main__6: ; line_number = 135 ; Left minus Right movlw 134 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true_code_size > 1 && false_code_size > 1 btfss __z___byte, __z___bit goto main__4 ; # Decrement Z: ; line_number = 137 ; z_dir := 0 bcf z_dir___byte, z_dir___bit ; line_number = 138 ; z_step := 1 bsf z_step___byte, z_step___bit ; Recombine code1_bit_states != code2_bit_states goto main__5 main__4: ; line_number = 139 ; Left minus Right movlw 243 addwf command,w ; =>bit_code_emit@symbol(): sym=__z ; CASE: true.size=1 false.size>1; no GOTO btfss __z___byte, __z___bit goto main__2 ; # Carriage-return/line-feed: ; line_number = 141 ; call _uart_crlf_put() call _uart_crlf_put ; Recombine code1_bit_states != code2_bit_states goto main__3 main__2: ; # Unrecognized command: ; line_number = 144 ; command := '?' movlw 63 movwf command main__3: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) main__5: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) main__7: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) main__9: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) main__11: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) main__13: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) main__15: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) main__17: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) main__19: ; <=bit_code_emit@symbol; sym=__z (data:00=>00 code:00=>00) ; line_number = 107 ; if command = 'A' done ; # Clear the step pulses after waiting for 10usec: ; line_number = 147 ; delay delay_amount start ; Delay expression evaluates to 50 ; line_number = 148 ; do_nothing ; Delay 50 cycles ; Delay loop takes 12 * 4 = 48 cycles movlw 12 main__20: addlw 255 btfss __z___byte, __z___bit goto main__20 goto main__21 main__21: ; line_number = 147 ; delay delay_amount done ; line_number = 149 ; a_step := 0 bcf a_step___byte, a_step___bit ; line_number = 150 ; x_step := 0 bcf x_step___byte, x_step___bit ; line_number = 151 ; y_step := 0 bcf y_step___byte, y_step___bit ; line_number = 152 ; z_step := 0 bcf z_step___byte, z_step___bit ; # Echo command: ; line_number = 155 ; call _uart_byte_put(command) movf command,w call _uart_byte_put ; line_number = 104 ; loop_forever wrap-up goto main__1 ; line_number = 104 ; loop_forever done ; delay after procedure statements=non-uniform ; Appending 7 delayed procedures to code bank 0 ; buffer = '_uart' ; line_number = 7 ; procedure _uart_byte_safe_get _uart_byte_safe_get: ; arguments_none ; line_number = 9 ; returns byte ; # This procedure will the next byte from UART. If no byte ; # received in a reasonable time, 0xfc is returned. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:00=>00) ; line_number = 14 ; loop_exactly 255 start _uart_byte_safe_get__1 equ globals___0+4 movlw 255 movwf _uart_byte_safe_get__1 _uart_byte_safe_get__2: ; line_number = 15 ; loop_exactly 255 start _uart_byte_safe_get__3 equ globals___0+5 movlw 255 movwf _uart_byte_safe_get__3 _uart_byte_safe_get__4: ; line_number = 16 ; if _rcif start ; =>bit_code_emit@symbol(): sym=_rcif ; CASE: true_code.size = 0 && false_code.size > 1 btfss _rcif___byte, _rcif___bit goto _uart_byte_safe_get__5 ; line_number = 17 ; return _rcreg start ; line_number = 17 movf _rcreg,w return ; line_number = 17 ; return _rcreg done ; Recombine size1 = 0 || size2 = 0 _uart_byte_safe_get__5: ; <=bit_code_emit@symbol; sym=_rcif (data:00=>00 code:00=>00) ; line_number = 16 ; if _rcif done ; line_number = 15 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__3,f goto _uart_byte_safe_get__4 ; line_number = 15 ; loop_exactly 255 done ; line_number = 14 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__1,f goto _uart_byte_safe_get__2 ; line_number = 14 ; loop_exactly 255 done ; line_number = 18 ; return 0xfc start ; line_number = 18 retlw 252 ; line_number = 18 ; return 0xfc done ; delay after procedure statements=non-uniform ; line_number = 21 ; procedure _uart_byte_get _uart_byte_get: ; arguments_none ; line_number = 23 ; returns byte ; # This procedure will return the next byte from the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:00=>00) ; line_number = 27 ; while !_rcif start _uart_byte_get__1: ; =>bit_code_emit@symbol(): sym=_rcif ; CASE: true_code.size=0 && false_code.size=1 btfss _rcif___byte, _rcif___bit ; true.size=0 false_size=1 false=GOTO goto _uart_byte_get__1 ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=_rcif (data:00=>00 code:00=>00) ; line_number = 27 ; while !_rcif done ; line_number = 29 ; return _rcreg start ; line_number = 29 movf _rcreg,w return ; line_number = 29 ; return _rcreg done ; delay after procedure statements=non-uniform ; line_number = 32 ; procedure _uart_hex_put _uart_hex_put: ; Last argument is sitting in W; save into argument variable movwf _uart_hex_put__value ; delay=4294967295 ; line_number = 33 ; argument value byte _uart_hex_put__value equ globals___0 ; line_number = 34 ; returns_nothing ; # This procedure will output {value} to the UART as a 2-digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:00=>00) ; line_number = 39 ; call _uart_nibble_put(value >> 4) _uart_hex_put__1 equ globals___0+6 swapf _uart_hex_put__value,w andlw 15 call _uart_nibble_put ; line_number = 40 ; call _uart_nibble_put(value & 0xf) movlw 15 andwf _uart_hex_put__value,w call _uart_nibble_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 43 ; procedure _uart_nibble_put _uart_nibble_put: ; Last argument is sitting in W; save into argument variable movwf _uart_nibble_put__nibble ; delay=4294967295 ; line_number = 44 ; argument nibble byte _uart_nibble_put__nibble equ globals___0+1 ; line_number = 45 ; returns_nothing ; # This procedure will output {value} to UART as a 1 digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:00=>00) ; line_number = 50 ; if nibble < 10 start movlw 10 subwf _uart_nibble_put__nibble,w ; =>bit_code_emit@symbol(): sym=__c ; CASE: true_size=1 && false_size=1 btfsc __c___byte, __c___bit ; line_number = 53 ; nibble := nibble - 10 + 'A' movlw 55 btfss __c___byte, __c___bit ; line_number = 51 ; nibble := nibble + '0' movlw 48 addwf _uart_nibble_put__nibble,f ; <=bit_code_emit@symbol; sym=__c (data:00=>00 code:00=>00) ; line_number = 50 ; if nibble < 10 done ; line_number = 54 ; call _uart_byte_put(nibble) movf _uart_nibble_put__nibble,w call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 57 ; procedure _uart_space_put _uart_space_put: ; arguments_none ; line_number = 59 ; returns_nothing ; # This procedure will output a space to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:00=>00) ; line_number = 63 ; call _uart_byte_put(' ') movlw 32 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 66 ; procedure _uart_crlf_put _uart_crlf_put: ; arguments_none ; line_number = 68 ; returns_nothing ; # This procedure will output a carriage return line feed sequecne to ; # the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:00=>00) ; line_number = 73 ; call _uart_byte_put('\cr\') movlw 13 call _uart_byte_put ; line_number = 74 ; call _uart_byte_put('\lf\') movlw 10 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 77 ; procedure _uart_byte_put _uart_byte_put: ; Last argument is sitting in W; save into argument variable movwf _uart_byte_put__byte ; delay=4294967295 ; line_number = 78 ; argument byte byte _uart_byte_put__byte equ globals___0+2 ; line_number = 79 ; returns_nothing ; # This procedure will send {byte} out using to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=>00 code:00=>00) ; line_number = 83 ; while !_txif start _uart_byte_put__1: ; =>bit_code_emit@symbol(): sym=_txif ; CASE: true_code.size=0 && false_code.size=1 btfss _txif___byte, _txif___bit ; true.size=0 false_size=1 false=GOTO goto _uart_byte_put__1 ; Recombine size1 = 0 || size2 = 0 ; <=bit_code_emit@symbol; sym=_txif (data:00=>00 code:00=>00) ; line_number = 83 ; while !_txif done ; line_number = 85 ; _txreg := byte movf _uart_byte_put__byte,w movwf _txreg ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Code bank 1; Start address: 2048; End address: 4095 org 2048 ; Code bank 2; Start address: 4096; End address: 6143 org 4096 ; Code bank 3; Start address: 6144; End address: 8191 org 6144 ; Configuration bits ; address = 0x2007, fill = 0x400 ; cp = off (0x3030) ; debug = off (0x800) ; wrt = off (0x0) ; cpd = off (0x100) ; lvp = off (0x0) ; boden = off (0x0) ; pwrte = off (0x8) ; wdte = off (0x0) ; fosc = hs (0x2) ; 15674 = 0x3d3a __config 15674 ; Define start addresses for data regions ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 ; Region="globals___0" Address=32" Size=80 Bytes=7 Bits=0 Available=73 ; Region="globals___1" Address=160" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___2" Address=272" Size=96 Bytes=0 Bits=0 Available=96 ; Region="globals___3" Address=400" Size=112 Bytes=0 Bits=0 Available=112 end